1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
26 /* This file contains subroutines used only from the file reload1.c.
27 It knows how to scan one insn for operands and values
28 that need to be copied into registers to make valid code.
29 It also finds other operands and values which are valid
30 but for which equivalent values in registers exist and
31 ought to be used instead.
33 Before processing the first insn of the function, call `init_reload'.
35 To scan an insn, call `find_reloads'. This does two things:
36 1. sets up tables describing which values must be reloaded
37 for this insn, and what kind of hard regs they must be reloaded into;
38 2. optionally record the locations where those values appear in
39 the data, so they can be replaced properly later.
40 This is done only if the second arg to `find_reloads' is nonzero.
42 The third arg to `find_reloads' specifies the number of levels
43 of indirect addressing supported by the machine. If it is zero,
44 indirect addressing is not valid. If it is one, (MEM (REG n))
45 is valid even if (REG n) did not get a hard register; if it is two,
46 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
47 hard register, and similarly for higher values.
49 Then you must choose the hard regs to reload those pseudo regs into,
50 and generate appropriate load insns before this insn and perhaps
51 also store insns after this insn. Set up the array `reload_reg_rtx'
52 to contain the REG rtx's for the registers you used. In some
53 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
54 for certain reloads. Then that tells you which register to use,
55 so you do not need to allocate one. But you still do need to add extra
56 instructions to copy the value into and out of that register.
58 Finally you must call `subst_reloads' to substitute the reload reg rtx's
59 into the locations already recorded.
63 find_reloads can alter the operands of the instruction it is called on.
65 1. Two operands of any sort may be interchanged, if they are in a
66 commutative instruction.
67 This happens only if find_reloads thinks the instruction will compile
70 2. Pseudo-registers that are equivalent to constants are replaced
71 with those constants if they are not in hard registers.
73 1 happens every time find_reloads is called.
74 2 happens only when REPLACE is 1, which is only when
75 actually doing the reloads, not when just counting them.
77 Using a reload register for several reloads in one insn:
79 When an insn has reloads, it is considered as having three parts:
80 the input reloads, the insn itself after reloading, and the output reloads.
81 Reloads of values used in memory addresses are often needed for only one part.
83 When this is so, reload_when_needed records which part needs the reload.
84 Two reloads for different parts of the insn can share the same reload
87 When a reload is used for addresses in multiple parts, or when it is
88 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
89 a register with any other reload. */
97 #include "insn-config.h"
103 #include "hard-reg-set.h"
107 #include "function.h"
110 #ifndef REGISTER_MOVE_COST
111 #define REGISTER_MOVE_COST(m, x, y) 2
114 #ifndef REGNO_MODE_OK_FOR_BASE_P
115 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
118 #ifndef REG_MODE_OK_FOR_BASE_P
119 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
122 /* All reloads of the current insn are recorded here. See reload.h for
125 struct reload rld[MAX_RELOADS];
127 /* All the "earlyclobber" operands of the current insn
128 are recorded here. */
130 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
132 int reload_n_operands;
134 /* Replacing reloads.
136 If `replace_reloads' is nonzero, then as each reload is recorded
137 an entry is made for it in the table `replacements'.
138 Then later `subst_reloads' can look through that table and
139 perform all the replacements needed. */
141 /* Nonzero means record the places to replace. */
142 static int replace_reloads;
144 /* Each replacement is recorded with a structure like this. */
147 rtx *where; /* Location to store in */
148 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
149 a SUBREG; 0 otherwise. */
150 int what; /* which reload this is for */
151 enum machine_mode mode; /* mode it must have */
154 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
156 /* Number of replacements currently recorded. */
157 static int n_replacements;
159 /* Used to track what is modified by an operand. */
162 int reg_flag; /* Nonzero if referencing a register. */
163 int safe; /* Nonzero if this can't conflict with anything. */
164 rtx base; /* Base address for MEM. */
165 HOST_WIDE_INT start; /* Starting offset or register number. */
166 HOST_WIDE_INT end; /* Ending offset or register number. */
169 #ifdef SECONDARY_MEMORY_NEEDED
171 /* Save MEMs needed to copy from one class of registers to another. One MEM
172 is used per mode, but normally only one or two modes are ever used.
174 We keep two versions, before and after register elimination. The one
175 after register elimination is record separately for each operand. This
176 is done in case the address is not valid to be sure that we separately
179 static rtx secondary_memlocs[NUM_MACHINE_MODES];
180 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
183 /* The instruction we are doing reloads for;
184 so we can test whether a register dies in it. */
185 static rtx this_insn;
187 /* Nonzero if this instruction is a user-specified asm with operands. */
188 static int this_insn_is_asm;
190 /* If hard_regs_live_known is nonzero,
191 we can tell which hard regs are currently live,
192 at least enough to succeed in choosing dummy reloads. */
193 static int hard_regs_live_known;
195 /* Indexed by hard reg number,
196 element is nonnegative if hard reg has been spilled.
197 This vector is passed to `find_reloads' as an argument
198 and is not changed here. */
199 static short *static_reload_reg_p;
201 /* Set to 1 in subst_reg_equivs if it changes anything. */
202 static int subst_reg_equivs_changed;
204 /* On return from push_reload, holds the reload-number for the OUT
205 operand, which can be different for that from the input operand. */
206 static int output_reloadnum;
208 /* Compare two RTX's. */
209 #define MATCHES(x, y) \
210 (x == y || (x != 0 && (GET_CODE (x) == REG \
211 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
212 : rtx_equal_p (x, y) && ! side_effects_p (x))))
214 /* Indicates if two reloads purposes are for similar enough things that we
215 can merge their reloads. */
216 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
217 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
218 || ((when1) == (when2) && (op1) == (op2)) \
219 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
220 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
221 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
222 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
223 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
225 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
226 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
227 ((when1) != (when2) \
228 || ! ((op1) == (op2) \
229 || (when1) == RELOAD_FOR_INPUT \
230 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
231 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
233 /* If we are going to reload an address, compute the reload type to
235 #define ADDR_TYPE(type) \
236 ((type) == RELOAD_FOR_INPUT_ADDRESS \
237 ? RELOAD_FOR_INPADDR_ADDRESS \
238 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
239 ? RELOAD_FOR_OUTADDR_ADDRESS \
242 #ifdef HAVE_SECONDARY_RELOADS
243 static int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class,
244 enum machine_mode, enum reload_type,
247 static enum reg_class find_valid_class PARAMS ((enum machine_mode, int,
249 static int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode));
250 static void push_replacement PARAMS ((rtx *, int, enum machine_mode));
251 static void combine_reloads PARAMS ((void));
252 static int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class,
253 enum reload_type, int, int));
254 static rtx find_dummy_reload PARAMS ((rtx, rtx, rtx *, rtx *,
255 enum machine_mode, enum machine_mode,
256 enum reg_class, int, int));
257 static int hard_reg_set_here_p PARAMS ((unsigned int, unsigned int, rtx));
258 static struct decomposition decompose PARAMS ((rtx));
259 static int immune_p PARAMS ((rtx, rtx, struct decomposition));
260 static int alternative_allows_memconst PARAMS ((const char *, int));
261 static rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int,
263 static rtx make_memloc PARAMS ((rtx, int));
264 static int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *,
265 int, enum reload_type, int, rtx));
266 static rtx subst_reg_equivs PARAMS ((rtx, rtx));
267 static rtx subst_indexed_address PARAMS ((rtx));
268 static void update_auto_inc_notes PARAMS ((rtx, int, int));
269 static int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *,
270 int, enum reload_type,int, rtx));
271 static void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class,
272 enum machine_mode, int,
273 enum reload_type, int));
274 static rtx find_reloads_subreg_address PARAMS ((rtx, int, int,
275 enum reload_type, int, rtx));
276 static void copy_replacements_1 PARAMS ((rtx *, rtx *, int));
277 static int find_inc_amount PARAMS ((rtx, rtx));
279 #ifdef HAVE_SECONDARY_RELOADS
281 /* Determine if any secondary reloads are needed for loading (if IN_P is
282 non-zero) or storing (if IN_P is zero) X to or from a reload register of
283 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
284 are needed, push them.
286 Return the reload number of the secondary reload we made, or -1 if
287 we didn't need one. *PICODE is set to the insn_code to use if we do
288 need a secondary reload. */
291 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
297 enum reg_class reload_class;
298 enum machine_mode reload_mode;
299 enum reload_type type;
300 enum insn_code *picode;
302 enum reg_class class = NO_REGS;
303 enum machine_mode mode = reload_mode;
304 enum insn_code icode = CODE_FOR_nothing;
305 enum reg_class t_class = NO_REGS;
306 enum machine_mode t_mode = VOIDmode;
307 enum insn_code t_icode = CODE_FOR_nothing;
308 enum reload_type secondary_type;
309 int s_reload, t_reload = -1;
311 if (type == RELOAD_FOR_INPUT_ADDRESS
312 || type == RELOAD_FOR_OUTPUT_ADDRESS
313 || type == RELOAD_FOR_INPADDR_ADDRESS
314 || type == RELOAD_FOR_OUTADDR_ADDRESS)
315 secondary_type = type;
317 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
319 *picode = CODE_FOR_nothing;
321 /* If X is a paradoxical SUBREG, use the inner value to determine both the
322 mode and object being reloaded. */
323 if (GET_CODE (x) == SUBREG
324 && (GET_MODE_SIZE (GET_MODE (x))
325 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
328 reload_mode = GET_MODE (x);
331 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
332 is still a pseudo-register by now, it *must* have an equivalent MEM
333 but we don't want to assume that), use that equivalent when seeing if
334 a secondary reload is needed since whether or not a reload is needed
335 might be sensitive to the form of the MEM. */
337 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
338 && reg_equiv_mem[REGNO (x)] != 0)
339 x = reg_equiv_mem[REGNO (x)];
341 #ifdef SECONDARY_INPUT_RELOAD_CLASS
343 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
346 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
348 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
351 /* If we don't need any secondary registers, done. */
352 if (class == NO_REGS)
355 /* Get a possible insn to use. If the predicate doesn't accept X, don't
358 icode = (in_p ? reload_in_optab[(int) reload_mode]
359 : reload_out_optab[(int) reload_mode]);
361 if (icode != CODE_FOR_nothing
362 && insn_data[(int) icode].operand[in_p].predicate
363 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
364 icode = CODE_FOR_nothing;
366 /* If we will be using an insn, see if it can directly handle the reload
367 register we will be using. If it can, the secondary reload is for a
368 scratch register. If it can't, we will use the secondary reload for
369 an intermediate register and require a tertiary reload for the scratch
372 if (icode != CODE_FOR_nothing)
374 /* If IN_P is non-zero, the reload register will be the output in
375 operand 0. If IN_P is zero, the reload register will be the input
376 in operand 1. Outputs should have an initial "=", which we must
379 enum reg_class insn_class;
381 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
382 insn_class = ALL_REGS;
386 = insn_data[(int) icode].operand[!in_p].constraint[in_p];
388 = (insn_letter == 'r' ? GENERAL_REGS
389 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
391 if (insn_class == NO_REGS)
394 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
398 /* The scratch register's constraint must start with "=&". */
399 if (insn_data[(int) icode].operand[2].constraint[0] != '='
400 || insn_data[(int) icode].operand[2].constraint[1] != '&')
403 if (reg_class_subset_p (reload_class, insn_class))
404 mode = insn_data[(int) icode].operand[2].mode;
407 char t_letter = insn_data[(int) icode].operand[2].constraint[2];
409 t_mode = insn_data[(int) icode].operand[2].mode;
410 t_class = (t_letter == 'r' ? GENERAL_REGS
411 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));
413 icode = CODE_FOR_nothing;
417 /* This case isn't valid, so fail. Reload is allowed to use the same
418 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
419 in the case of a secondary register, we actually need two different
420 registers for correct code. We fail here to prevent the possibility of
421 silently generating incorrect code later.
423 The convention is that secondary input reloads are valid only if the
424 secondary_class is different from class. If you have such a case, you
425 can not use secondary reloads, you must work around the problem some
428 Allow this when a reload_in/out pattern is being used. I.e. assume
429 that the generated code handles this case. */
431 if (in_p && class == reload_class && icode == CODE_FOR_nothing
432 && t_icode == CODE_FOR_nothing)
435 /* If we need a tertiary reload, see if we have one we can reuse or else
438 if (t_class != NO_REGS)
440 for (t_reload = 0; t_reload < n_reloads; t_reload++)
441 if (rld[t_reload].secondary_p
442 && (reg_class_subset_p (t_class, rld[t_reload].class)
443 || reg_class_subset_p (rld[t_reload].class, t_class))
444 && ((in_p && rld[t_reload].inmode == t_mode)
445 || (! in_p && rld[t_reload].outmode == t_mode))
446 && ((in_p && (rld[t_reload].secondary_in_icode
447 == CODE_FOR_nothing))
448 || (! in_p &&(rld[t_reload].secondary_out_icode
449 == CODE_FOR_nothing)))
450 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
451 && MERGABLE_RELOADS (secondary_type,
452 rld[t_reload].when_needed,
453 opnum, rld[t_reload].opnum))
456 rld[t_reload].inmode = t_mode;
458 rld[t_reload].outmode = t_mode;
460 if (reg_class_subset_p (t_class, rld[t_reload].class))
461 rld[t_reload].class = t_class;
463 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
464 rld[t_reload].optional &= optional;
465 rld[t_reload].secondary_p = 1;
466 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
467 opnum, rld[t_reload].opnum))
468 rld[t_reload].when_needed = RELOAD_OTHER;
471 if (t_reload == n_reloads)
473 /* We need to make a new tertiary reload for this register class. */
474 rld[t_reload].in = rld[t_reload].out = 0;
475 rld[t_reload].class = t_class;
476 rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
477 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
478 rld[t_reload].reg_rtx = 0;
479 rld[t_reload].optional = optional;
480 rld[t_reload].inc = 0;
481 /* Maybe we could combine these, but it seems too tricky. */
482 rld[t_reload].nocombine = 1;
483 rld[t_reload].in_reg = 0;
484 rld[t_reload].out_reg = 0;
485 rld[t_reload].opnum = opnum;
486 rld[t_reload].when_needed = secondary_type;
487 rld[t_reload].secondary_in_reload = -1;
488 rld[t_reload].secondary_out_reload = -1;
489 rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
490 rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
491 rld[t_reload].secondary_p = 1;
497 /* See if we can reuse an existing secondary reload. */
498 for (s_reload = 0; s_reload < n_reloads; s_reload++)
499 if (rld[s_reload].secondary_p
500 && (reg_class_subset_p (class, rld[s_reload].class)
501 || reg_class_subset_p (rld[s_reload].class, class))
502 && ((in_p && rld[s_reload].inmode == mode)
503 || (! in_p && rld[s_reload].outmode == mode))
504 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
505 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
506 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
507 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
508 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
509 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
510 opnum, rld[s_reload].opnum))
513 rld[s_reload].inmode = mode;
515 rld[s_reload].outmode = mode;
517 if (reg_class_subset_p (class, rld[s_reload].class))
518 rld[s_reload].class = class;
520 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
521 rld[s_reload].optional &= optional;
522 rld[s_reload].secondary_p = 1;
523 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
524 opnum, rld[s_reload].opnum))
525 rld[s_reload].when_needed = RELOAD_OTHER;
528 if (s_reload == n_reloads)
530 #ifdef SECONDARY_MEMORY_NEEDED
531 /* If we need a memory location to copy between the two reload regs,
532 set it up now. Note that we do the input case before making
533 the reload and the output case after. This is due to the
534 way reloads are output. */
536 if (in_p && icode == CODE_FOR_nothing
537 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
539 get_secondary_mem (x, reload_mode, opnum, type);
541 /* We may have just added new reloads. Make sure we add
542 the new reload at the end. */
543 s_reload = n_reloads;
547 /* We need to make a new secondary reload for this register class. */
548 rld[s_reload].in = rld[s_reload].out = 0;
549 rld[s_reload].class = class;
551 rld[s_reload].inmode = in_p ? mode : VOIDmode;
552 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
553 rld[s_reload].reg_rtx = 0;
554 rld[s_reload].optional = optional;
555 rld[s_reload].inc = 0;
556 /* Maybe we could combine these, but it seems too tricky. */
557 rld[s_reload].nocombine = 1;
558 rld[s_reload].in_reg = 0;
559 rld[s_reload].out_reg = 0;
560 rld[s_reload].opnum = opnum;
561 rld[s_reload].when_needed = secondary_type;
562 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
563 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
564 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
565 rld[s_reload].secondary_out_icode
566 = ! in_p ? t_icode : CODE_FOR_nothing;
567 rld[s_reload].secondary_p = 1;
571 #ifdef SECONDARY_MEMORY_NEEDED
572 if (! in_p && icode == CODE_FOR_nothing
573 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
574 get_secondary_mem (x, mode, opnum, type);
581 #endif /* HAVE_SECONDARY_RELOADS */
583 #ifdef SECONDARY_MEMORY_NEEDED
585 /* Return a memory location that will be used to copy X in mode MODE.
586 If we haven't already made a location for this mode in this insn,
587 call find_reloads_address on the location being returned. */
590 get_secondary_mem (x, mode, opnum, type)
591 rtx x ATTRIBUTE_UNUSED;
592 enum machine_mode mode;
594 enum reload_type type;
599 /* By default, if MODE is narrower than a word, widen it to a word.
600 This is required because most machines that require these memory
601 locations do not support short load and stores from all registers
602 (e.g., FP registers). */
604 #ifdef SECONDARY_MEMORY_NEEDED_MODE
605 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
607 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
608 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
611 /* If we already have made a MEM for this operand in MODE, return it. */
612 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
613 return secondary_memlocs_elim[(int) mode][opnum];
615 /* If this is the first time we've tried to get a MEM for this mode,
616 allocate a new one. `something_changed' in reload will get set
617 by noticing that the frame size has changed. */
619 if (secondary_memlocs[(int) mode] == 0)
621 #ifdef SECONDARY_MEMORY_NEEDED_RTX
622 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
624 secondary_memlocs[(int) mode]
625 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
629 /* Get a version of the address doing any eliminations needed. If that
630 didn't give us a new MEM, make a new one if it isn't valid. */
632 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
633 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
635 if (! mem_valid && loc == secondary_memlocs[(int) mode])
636 loc = copy_rtx (loc);
638 /* The only time the call below will do anything is if the stack
639 offset is too large. In that case IND_LEVELS doesn't matter, so we
640 can just pass a zero. Adjust the type to be the address of the
641 corresponding object. If the address was valid, save the eliminated
642 address. If it wasn't valid, we need to make a reload each time, so
647 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
648 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
651 find_reloads_address (mode, (rtx*) 0, XEXP (loc, 0), &XEXP (loc, 0),
655 secondary_memlocs_elim[(int) mode][opnum] = loc;
659 /* Clear any secondary memory locations we've made. */
662 clear_secondary_mem ()
664 memset ((char *) secondary_memlocs, 0, sizeof secondary_memlocs);
666 #endif /* SECONDARY_MEMORY_NEEDED */
668 /* Find the largest class for which every register number plus N is valid in
669 M1 (if in range) and is cheap to move into REGNO.
670 Abort if no such class exists. */
672 static enum reg_class
673 find_valid_class (m1, n, dest_regno)
674 enum machine_mode m1 ATTRIBUTE_UNUSED;
676 unsigned int dest_regno;
681 enum reg_class best_class = NO_REGS;
682 enum reg_class dest_class = REGNO_REG_CLASS (dest_regno);
683 unsigned int best_size = 0;
686 for (class = 1; class < N_REG_CLASSES; class++)
689 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
690 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
691 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
692 && ! HARD_REGNO_MODE_OK (regno + n, m1))
697 cost = REGISTER_MOVE_COST (m1, class, dest_class);
699 if ((reg_class_size[class] > best_size
700 && (best_cost < 0 || best_cost >= cost))
704 best_size = reg_class_size[class];
705 best_cost = REGISTER_MOVE_COST (m1, class, dest_class);
715 /* Return the number of a previously made reload that can be combined with
716 a new one, or n_reloads if none of the existing reloads can be used.
717 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
718 push_reload, they determine the kind of the new reload that we try to
719 combine. P_IN points to the corresponding value of IN, which can be
720 modified by this function.
721 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
724 find_reusable_reload (p_in, out, class, type, opnum, dont_share)
726 enum reg_class class;
727 enum reload_type type;
728 int opnum, dont_share;
732 /* We can't merge two reloads if the output of either one is
735 if (earlyclobber_operand_p (out))
738 /* We can use an existing reload if the class is right
739 and at least one of IN and OUT is a match
740 and the other is at worst neutral.
741 (A zero compared against anything is neutral.)
743 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
744 for the same thing since that can cause us to need more reload registers
745 than we otherwise would. */
747 for (i = 0; i < n_reloads; i++)
748 if ((reg_class_subset_p (class, rld[i].class)
749 || reg_class_subset_p (rld[i].class, class))
750 /* If the existing reload has a register, it must fit our class. */
751 && (rld[i].reg_rtx == 0
752 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
753 true_regnum (rld[i].reg_rtx)))
754 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
755 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
756 || (out != 0 && MATCHES (rld[i].out, out)
757 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
758 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
759 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
760 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
763 /* Reloading a plain reg for input can match a reload to postincrement
764 that reg, since the postincrement's value is the right value.
765 Likewise, it can match a preincrement reload, since we regard
766 the preincrementation as happening before any ref in this insn
768 for (i = 0; i < n_reloads; i++)
769 if ((reg_class_subset_p (class, rld[i].class)
770 || reg_class_subset_p (rld[i].class, class))
771 /* If the existing reload has a register, it must fit our
773 && (rld[i].reg_rtx == 0
774 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
775 true_regnum (rld[i].reg_rtx)))
776 && out == 0 && rld[i].out == 0 && rld[i].in != 0
777 && ((GET_CODE (in) == REG
778 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a'
779 && MATCHES (XEXP (rld[i].in, 0), in))
780 || (GET_CODE (rld[i].in) == REG
781 && GET_RTX_CLASS (GET_CODE (in)) == 'a'
782 && MATCHES (XEXP (in, 0), rld[i].in)))
783 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
784 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
785 && MERGABLE_RELOADS (type, rld[i].when_needed,
786 opnum, rld[i].opnum))
788 /* Make sure reload_in ultimately has the increment,
789 not the plain register. */
790 if (GET_CODE (in) == REG)
797 /* Return nonzero if X is a SUBREG which will require reloading of its
798 SUBREG_REG expression. */
801 reload_inner_reg_of_subreg (x, mode)
803 enum machine_mode mode;
807 /* Only SUBREGs are problematical. */
808 if (GET_CODE (x) != SUBREG)
811 inner = SUBREG_REG (x);
813 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
814 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
817 /* If INNER is not a hard register, then INNER will not need to
819 if (GET_CODE (inner) != REG
820 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
823 /* If INNER is not ok for MODE, then INNER will need reloading. */
824 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
827 /* If the outer part is a word or smaller, INNER larger than a
828 word and the number of regs for INNER is not the same as the
829 number of words in INNER, then INNER will need reloading. */
830 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
831 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
832 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
833 != HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
836 /* Record one reload that needs to be performed.
837 IN is an rtx saying where the data are to be found before this instruction.
838 OUT says where they must be stored after the instruction.
839 (IN is zero for data not read, and OUT is zero for data not written.)
840 INLOC and OUTLOC point to the places in the instructions where
841 IN and OUT were found.
842 If IN and OUT are both non-zero, it means the same register must be used
843 to reload both IN and OUT.
845 CLASS is a register class required for the reloaded data.
846 INMODE is the machine mode that the instruction requires
847 for the reg that replaces IN and OUTMODE is likewise for OUT.
849 If IN is zero, then OUT's location and mode should be passed as
852 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
854 OPTIONAL nonzero means this reload does not need to be performed:
855 it can be discarded if that is more convenient.
857 OPNUM and TYPE say what the purpose of this reload is.
859 The return value is the reload-number for this reload.
861 If both IN and OUT are nonzero, in some rare cases we might
862 want to make two separate reloads. (Actually we never do this now.)
863 Therefore, the reload-number for OUT is stored in
864 output_reloadnum when we return; the return value applies to IN.
865 Usually (presently always), when IN and OUT are nonzero,
866 the two reload-numbers are equal, but the caller should be careful to
870 push_reload (in, out, inloc, outloc, class,
871 inmode, outmode, strict_low, optional, opnum, type)
874 enum reg_class class;
875 enum machine_mode inmode, outmode;
879 enum reload_type type;
883 int dont_remove_subreg = 0;
884 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
885 int secondary_in_reload = -1, secondary_out_reload = -1;
886 enum insn_code secondary_in_icode = CODE_FOR_nothing;
887 enum insn_code secondary_out_icode = CODE_FOR_nothing;
889 /* INMODE and/or OUTMODE could be VOIDmode if no mode
890 has been specified for the operand. In that case,
891 use the operand's mode as the mode to reload. */
892 if (inmode == VOIDmode && in != 0)
893 inmode = GET_MODE (in);
894 if (outmode == VOIDmode && out != 0)
895 outmode = GET_MODE (out);
897 /* If IN is a pseudo register everywhere-equivalent to a constant, and
898 it is not in a hard register, reload straight from the constant,
899 since we want to get rid of such pseudo registers.
900 Often this is done earlier, but not always in find_reloads_address. */
901 if (in != 0 && GET_CODE (in) == REG)
903 int regno = REGNO (in);
905 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
906 && reg_equiv_constant[regno] != 0)
907 in = reg_equiv_constant[regno];
910 /* Likewise for OUT. Of course, OUT will never be equivalent to
911 an actual constant, but it might be equivalent to a memory location
912 (in the case of a parameter). */
913 if (out != 0 && GET_CODE (out) == REG)
915 int regno = REGNO (out);
917 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
918 && reg_equiv_constant[regno] != 0)
919 out = reg_equiv_constant[regno];
922 /* If we have a read-write operand with an address side-effect,
923 change either IN or OUT so the side-effect happens only once. */
924 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
925 switch (GET_CODE (XEXP (in, 0)))
927 case POST_INC: case POST_DEC: case POST_MODIFY:
928 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
931 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
932 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
939 /* If we are reloading a (SUBREG constant ...), really reload just the
940 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
941 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
942 a pseudo and hence will become a MEM) with M1 wider than M2 and the
943 register is a pseudo, also reload the inside expression.
944 For machines that extend byte loads, do this for any SUBREG of a pseudo
945 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
946 M2 is an integral mode that gets extended when loaded.
947 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
948 either M1 is not valid for R or M2 is wider than a word but we only
949 need one word to store an M2-sized quantity in R.
950 (However, if OUT is nonzero, we need to reload the reg *and*
951 the subreg, so do nothing here, and let following statement handle it.)
953 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
954 we can't handle it here because CONST_INT does not indicate a mode.
956 Similarly, we must reload the inside expression if we have a
957 STRICT_LOW_PART (presumably, in == out in the cas).
959 Also reload the inner expression if it does not require a secondary
960 reload but the SUBREG does.
962 Finally, reload the inner expression if it is a register that is in
963 the class whose registers cannot be referenced in a different size
964 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
965 cannot reload just the inside since we might end up with the wrong
966 register class. But if it is inside a STRICT_LOW_PART, we have
967 no choice, so we hope we do get the right register class there. */
969 if (in != 0 && GET_CODE (in) == SUBREG
970 && (subreg_lowpart_p (in) || strict_low)
971 #ifdef CLASS_CANNOT_CHANGE_MODE
972 && (class != CLASS_CANNOT_CHANGE_MODE
973 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)), inmode))
975 && (CONSTANT_P (SUBREG_REG (in))
976 || GET_CODE (SUBREG_REG (in)) == PLUS
978 || (((GET_CODE (SUBREG_REG (in)) == REG
979 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
980 || GET_CODE (SUBREG_REG (in)) == MEM)
981 && ((GET_MODE_SIZE (inmode)
982 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
983 #ifdef LOAD_EXTEND_OP
984 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
985 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
987 && (GET_MODE_SIZE (inmode)
988 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
989 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
990 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
992 #ifdef WORD_REGISTER_OPERATIONS
993 || ((GET_MODE_SIZE (inmode)
994 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
995 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
996 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1000 || (GET_CODE (SUBREG_REG (in)) == REG
1001 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1002 /* The case where out is nonzero
1003 is handled differently in the following statement. */
1004 && (out == 0 || subreg_lowpart_p (in))
1005 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1006 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1008 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1010 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1011 GET_MODE (SUBREG_REG (in)))))
1012 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1013 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1014 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1015 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1016 GET_MODE (SUBREG_REG (in)),
1020 #ifdef CLASS_CANNOT_CHANGE_MODE
1021 || (GET_CODE (SUBREG_REG (in)) == REG
1022 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1023 && (TEST_HARD_REG_BIT
1024 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
1025 REGNO (SUBREG_REG (in))))
1026 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in)),
1031 in_subreg_loc = inloc;
1032 inloc = &SUBREG_REG (in);
1034 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1035 if (GET_CODE (in) == MEM)
1036 /* This is supposed to happen only for paradoxical subregs made by
1037 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1038 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
1041 inmode = GET_MODE (in);
1044 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1045 either M1 is not valid for R or M2 is wider than a word but we only
1046 need one word to store an M2-sized quantity in R.
1048 However, we must reload the inner reg *as well as* the subreg in
1051 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1052 code above. This can happen if SUBREG_BYTE != 0. */
1054 if (in != 0 && reload_inner_reg_of_subreg (in, inmode))
1056 enum reg_class in_class = class;
1058 if (GET_CODE (SUBREG_REG (in)) == REG)
1060 = find_valid_class (inmode,
1061 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1062 GET_MODE (SUBREG_REG (in)),
1065 REGNO (SUBREG_REG (in)));
1067 /* This relies on the fact that emit_reload_insns outputs the
1068 instructions for input reloads of type RELOAD_OTHER in the same
1069 order as the reloads. Thus if the outer reload is also of type
1070 RELOAD_OTHER, we are guaranteed that this inner reload will be
1071 output before the outer reload. */
1072 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1073 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1074 dont_remove_subreg = 1;
1077 /* Similarly for paradoxical and problematical SUBREGs on the output.
1078 Note that there is no reason we need worry about the previous value
1079 of SUBREG_REG (out); even if wider than out,
1080 storing in a subreg is entitled to clobber it all
1081 (except in the case of STRICT_LOW_PART,
1082 and in that case the constraint should label it input-output.) */
1083 if (out != 0 && GET_CODE (out) == SUBREG
1084 && (subreg_lowpart_p (out) || strict_low)
1085 #ifdef CLASS_CANNOT_CHANGE_MODE
1086 && (class != CLASS_CANNOT_CHANGE_MODE
1087 || ! CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)),
1090 && (CONSTANT_P (SUBREG_REG (out))
1092 || (((GET_CODE (SUBREG_REG (out)) == REG
1093 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1094 || GET_CODE (SUBREG_REG (out)) == MEM)
1095 && ((GET_MODE_SIZE (outmode)
1096 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1097 #ifdef WORD_REGISTER_OPERATIONS
1098 || ((GET_MODE_SIZE (outmode)
1099 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1100 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1101 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1105 || (GET_CODE (SUBREG_REG (out)) == REG
1106 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1107 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1108 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1110 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1112 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1113 GET_MODE (SUBREG_REG (out)))))
1114 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1115 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1116 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1117 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1118 GET_MODE (SUBREG_REG (out)),
1122 #ifdef CLASS_CANNOT_CHANGE_MODE
1123 || (GET_CODE (SUBREG_REG (out)) == REG
1124 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1125 && (TEST_HARD_REG_BIT
1126 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
1127 REGNO (SUBREG_REG (out))))
1128 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out)),
1133 out_subreg_loc = outloc;
1134 outloc = &SUBREG_REG (out);
1136 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1137 if (GET_CODE (out) == MEM
1138 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1141 outmode = GET_MODE (out);
1144 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1145 either M1 is not valid for R or M2 is wider than a word but we only
1146 need one word to store an M2-sized quantity in R.
1148 However, we must reload the inner reg *as well as* the subreg in
1149 that case. In this case, the inner reg is an in-out reload. */
1151 if (out != 0 && reload_inner_reg_of_subreg (out, outmode))
1153 /* This relies on the fact that emit_reload_insns outputs the
1154 instructions for output reloads of type RELOAD_OTHER in reverse
1155 order of the reloads. Thus if the outer reload is also of type
1156 RELOAD_OTHER, we are guaranteed that this inner reload will be
1157 output after the outer reload. */
1158 dont_remove_subreg = 1;
1159 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1161 find_valid_class (outmode,
1162 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1163 GET_MODE (SUBREG_REG (out)),
1166 REGNO (SUBREG_REG (out))),
1167 VOIDmode, VOIDmode, 0, 0,
1168 opnum, RELOAD_OTHER);
1171 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1172 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1173 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1174 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1177 /* If IN is a SUBREG of a hard register, make a new REG. This
1178 simplifies some of the cases below. */
1180 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1181 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1182 && ! dont_remove_subreg)
1183 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1185 /* Similarly for OUT. */
1186 if (out != 0 && GET_CODE (out) == SUBREG
1187 && GET_CODE (SUBREG_REG (out)) == REG
1188 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1189 && ! dont_remove_subreg)
1190 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1192 /* Narrow down the class of register wanted if that is
1193 desirable on this machine for efficiency. */
1195 class = PREFERRED_RELOAD_CLASS (in, class);
1197 /* Output reloads may need analogous treatment, different in detail. */
1198 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1200 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1203 /* Make sure we use a class that can handle the actual pseudo
1204 inside any subreg. For example, on the 386, QImode regs
1205 can appear within SImode subregs. Although GENERAL_REGS
1206 can handle SImode, QImode needs a smaller class. */
1207 #ifdef LIMIT_RELOAD_CLASS
1209 class = LIMIT_RELOAD_CLASS (inmode, class);
1210 else if (in != 0 && GET_CODE (in) == SUBREG)
1211 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1214 class = LIMIT_RELOAD_CLASS (outmode, class);
1215 if (out != 0 && GET_CODE (out) == SUBREG)
1216 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1219 /* Verify that this class is at least possible for the mode that
1221 if (this_insn_is_asm)
1223 enum machine_mode mode;
1224 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1228 if (mode == VOIDmode)
1230 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1235 outmode = word_mode;
1237 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1238 if (HARD_REGNO_MODE_OK (i, mode)
1239 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1241 int nregs = HARD_REGNO_NREGS (i, mode);
1244 for (j = 1; j < nregs; j++)
1245 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1250 if (i == FIRST_PSEUDO_REGISTER)
1252 error_for_asm (this_insn, "impossible register constraint in `asm'");
1257 /* Optional output reloads are always OK even if we have no register class,
1258 since the function of these reloads is only to have spill_reg_store etc.
1259 set, so that the storing insn can be deleted later. */
1260 if (class == NO_REGS
1261 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1264 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1268 /* See if we need a secondary reload register to move between CLASS
1269 and IN or CLASS and OUT. Get the icode and push any required reloads
1270 needed for each of them if so. */
1272 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1275 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1276 &secondary_in_icode);
1279 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1280 if (out != 0 && GET_CODE (out) != SCRATCH)
1281 secondary_out_reload
1282 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1283 type, &secondary_out_icode);
1286 /* We found no existing reload suitable for re-use.
1287 So add an additional reload. */
1289 #ifdef SECONDARY_MEMORY_NEEDED
1290 /* If a memory location is needed for the copy, make one. */
1291 if (in != 0 && GET_CODE (in) == REG
1292 && REGNO (in) < FIRST_PSEUDO_REGISTER
1293 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)),
1295 get_secondary_mem (in, inmode, opnum, type);
1301 rld[i].class = class;
1302 rld[i].inmode = inmode;
1303 rld[i].outmode = outmode;
1305 rld[i].optional = optional;
1307 rld[i].nocombine = 0;
1308 rld[i].in_reg = inloc ? *inloc : 0;
1309 rld[i].out_reg = outloc ? *outloc : 0;
1310 rld[i].opnum = opnum;
1311 rld[i].when_needed = type;
1312 rld[i].secondary_in_reload = secondary_in_reload;
1313 rld[i].secondary_out_reload = secondary_out_reload;
1314 rld[i].secondary_in_icode = secondary_in_icode;
1315 rld[i].secondary_out_icode = secondary_out_icode;
1316 rld[i].secondary_p = 0;
1320 #ifdef SECONDARY_MEMORY_NEEDED
1321 if (out != 0 && GET_CODE (out) == REG
1322 && REGNO (out) < FIRST_PSEUDO_REGISTER
1323 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)),
1325 get_secondary_mem (out, outmode, opnum, type);
1330 /* We are reusing an existing reload,
1331 but we may have additional information for it.
1332 For example, we may now have both IN and OUT
1333 while the old one may have just one of them. */
1335 /* The modes can be different. If they are, we want to reload in
1336 the larger mode, so that the value is valid for both modes. */
1337 if (inmode != VOIDmode
1338 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1339 rld[i].inmode = inmode;
1340 if (outmode != VOIDmode
1341 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1342 rld[i].outmode = outmode;
1345 rtx in_reg = inloc ? *inloc : 0;
1346 /* If we merge reloads for two distinct rtl expressions that
1347 are identical in content, there might be duplicate address
1348 reloads. Remove the extra set now, so that if we later find
1349 that we can inherit this reload, we can get rid of the
1350 address reloads altogether.
1352 Do not do this if both reloads are optional since the result
1353 would be an optional reload which could potentially leave
1354 unresolved address replacements.
1356 It is not sufficient to call transfer_replacements since
1357 choose_reload_regs will remove the replacements for address
1358 reloads of inherited reloads which results in the same
1360 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1361 && ! (rld[i].optional && optional))
1363 /* We must keep the address reload with the lower operand
1365 if (opnum > rld[i].opnum)
1367 remove_address_replacements (in);
1369 in_reg = rld[i].in_reg;
1372 remove_address_replacements (rld[i].in);
1375 rld[i].in_reg = in_reg;
1380 rld[i].out_reg = outloc ? *outloc : 0;
1382 if (reg_class_subset_p (class, rld[i].class))
1383 rld[i].class = class;
1384 rld[i].optional &= optional;
1385 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1386 opnum, rld[i].opnum))
1387 rld[i].when_needed = RELOAD_OTHER;
1388 rld[i].opnum = MIN (rld[i].opnum, opnum);
1391 /* If the ostensible rtx being reloaded differs from the rtx found
1392 in the location to substitute, this reload is not safe to combine
1393 because we cannot reliably tell whether it appears in the insn. */
1395 if (in != 0 && in != *inloc)
1396 rld[i].nocombine = 1;
1399 /* This was replaced by changes in find_reloads_address_1 and the new
1400 function inc_for_reload, which go with a new meaning of reload_inc. */
1402 /* If this is an IN/OUT reload in an insn that sets the CC,
1403 it must be for an autoincrement. It doesn't work to store
1404 the incremented value after the insn because that would clobber the CC.
1405 So we must do the increment of the value reloaded from,
1406 increment it, store it back, then decrement again. */
1407 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1411 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1412 /* If we did not find a nonzero amount-to-increment-by,
1413 that contradicts the belief that IN is being incremented
1414 in an address in this insn. */
1415 if (rld[i].inc == 0)
1420 /* If we will replace IN and OUT with the reload-reg,
1421 record where they are located so that substitution need
1422 not do a tree walk. */
1424 if (replace_reloads)
1428 struct replacement *r = &replacements[n_replacements++];
1430 r->subreg_loc = in_subreg_loc;
1434 if (outloc != 0 && outloc != inloc)
1436 struct replacement *r = &replacements[n_replacements++];
1439 r->subreg_loc = out_subreg_loc;
1444 /* If this reload is just being introduced and it has both
1445 an incoming quantity and an outgoing quantity that are
1446 supposed to be made to match, see if either one of the two
1447 can serve as the place to reload into.
1449 If one of them is acceptable, set rld[i].reg_rtx
1452 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1454 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1457 earlyclobber_operand_p (out));
1459 /* If the outgoing register already contains the same value
1460 as the incoming one, we can dispense with loading it.
1461 The easiest way to tell the caller that is to give a phony
1462 value for the incoming operand (same as outgoing one). */
1463 if (rld[i].reg_rtx == out
1464 && (GET_CODE (in) == REG || CONSTANT_P (in))
1465 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1466 static_reload_reg_p, i, inmode))
1470 /* If this is an input reload and the operand contains a register that
1471 dies in this insn and is used nowhere else, see if it is the right class
1472 to be used for this reload. Use it if so. (This occurs most commonly
1473 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1474 this if it is also an output reload that mentions the register unless
1475 the output is a SUBREG that clobbers an entire register.
1477 Note that the operand might be one of the spill regs, if it is a
1478 pseudo reg and we are in a block where spilling has not taken place.
1479 But if there is no spilling in this block, that is OK.
1480 An explicitly used hard reg cannot be a spill reg. */
1482 if (rld[i].reg_rtx == 0 && in != 0)
1486 enum machine_mode rel_mode = inmode;
1488 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1491 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1492 if (REG_NOTE_KIND (note) == REG_DEAD
1493 && GET_CODE (XEXP (note, 0)) == REG
1494 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1495 && reg_mentioned_p (XEXP (note, 0), in)
1496 && ! refers_to_regno_for_reload_p (regno,
1498 + HARD_REGNO_NREGS (regno,
1500 PATTERN (this_insn), inloc)
1501 /* If this is also an output reload, IN cannot be used as
1502 the reload register if it is set in this insn unless IN
1504 && (out == 0 || in == out
1505 || ! hard_reg_set_here_p (regno,
1507 + HARD_REGNO_NREGS (regno,
1509 PATTERN (this_insn)))
1510 /* ??? Why is this code so different from the previous?
1511 Is there any simple coherent way to describe the two together?
1512 What's going on here. */
1514 || (GET_CODE (in) == SUBREG
1515 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1517 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1518 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1519 /* Make sure the operand fits in the reg that dies. */
1520 && (GET_MODE_SIZE (rel_mode)
1521 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1522 && HARD_REGNO_MODE_OK (regno, inmode)
1523 && HARD_REGNO_MODE_OK (regno, outmode))
1526 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode),
1527 HARD_REGNO_NREGS (regno, outmode));
1529 for (offs = 0; offs < nregs; offs++)
1530 if (fixed_regs[regno + offs]
1531 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1537 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1544 output_reloadnum = i;
1549 /* Record an additional place we must replace a value
1550 for which we have already recorded a reload.
1551 RELOADNUM is the value returned by push_reload
1552 when the reload was recorded.
1553 This is used in insn patterns that use match_dup. */
1556 push_replacement (loc, reloadnum, mode)
1559 enum machine_mode mode;
1561 if (replace_reloads)
1563 struct replacement *r = &replacements[n_replacements++];
1564 r->what = reloadnum;
1571 /* Transfer all replacements that used to be in reload FROM to be in
1575 transfer_replacements (to, from)
1580 for (i = 0; i < n_replacements; i++)
1581 if (replacements[i].what == from)
1582 replacements[i].what = to;
1585 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1586 or a subpart of it. If we have any replacements registered for IN_RTX,
1587 cancel the reloads that were supposed to load them.
1588 Return non-zero if we canceled any reloads. */
1590 remove_address_replacements (in_rtx)
1594 char reload_flags[MAX_RELOADS];
1595 int something_changed = 0;
1597 memset (reload_flags, 0, sizeof reload_flags);
1598 for (i = 0, j = 0; i < n_replacements; i++)
1600 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1601 reload_flags[replacements[i].what] |= 1;
1604 replacements[j++] = replacements[i];
1605 reload_flags[replacements[i].what] |= 2;
1608 /* Note that the following store must be done before the recursive calls. */
1611 for (i = n_reloads - 1; i >= 0; i--)
1613 if (reload_flags[i] == 1)
1615 deallocate_reload_reg (i);
1616 remove_address_replacements (rld[i].in);
1618 something_changed = 1;
1621 return something_changed;
1624 /* If there is only one output reload, and it is not for an earlyclobber
1625 operand, try to combine it with a (logically unrelated) input reload
1626 to reduce the number of reload registers needed.
1628 This is safe if the input reload does not appear in
1629 the value being output-reloaded, because this implies
1630 it is not needed any more once the original insn completes.
1632 If that doesn't work, see we can use any of the registers that
1633 die in this insn as a reload register. We can if it is of the right
1634 class and does not appear in the value being output-reloaded. */
1640 int output_reload = -1;
1641 int secondary_out = -1;
1644 /* Find the output reload; return unless there is exactly one
1645 and that one is mandatory. */
1647 for (i = 0; i < n_reloads; i++)
1648 if (rld[i].out != 0)
1650 if (output_reload >= 0)
1655 if (output_reload < 0 || rld[output_reload].optional)
1658 /* An input-output reload isn't combinable. */
1660 if (rld[output_reload].in != 0)
1663 /* If this reload is for an earlyclobber operand, we can't do anything. */
1664 if (earlyclobber_operand_p (rld[output_reload].out))
1667 /* If there is a reload for part of the address of this operand, we would
1668 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1669 its life to the point where doing this combine would not lower the
1670 number of spill registers needed. */
1671 for (i = 0; i < n_reloads; i++)
1672 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1673 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1674 && rld[i].opnum == rld[output_reload].opnum)
1677 /* Check each input reload; can we combine it? */
1679 for (i = 0; i < n_reloads; i++)
1680 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1681 /* Life span of this reload must not extend past main insn. */
1682 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1683 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1684 && rld[i].when_needed != RELOAD_OTHER
1685 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1686 == CLASS_MAX_NREGS (rld[output_reload].class,
1687 rld[output_reload].outmode))
1689 && rld[i].reg_rtx == 0
1690 #ifdef SECONDARY_MEMORY_NEEDED
1691 /* Don't combine two reloads with different secondary
1692 memory locations. */
1693 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1694 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1695 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1696 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1698 && (SMALL_REGISTER_CLASSES
1699 ? (rld[i].class == rld[output_reload].class)
1700 : (reg_class_subset_p (rld[i].class,
1701 rld[output_reload].class)
1702 || reg_class_subset_p (rld[output_reload].class,
1704 && (MATCHES (rld[i].in, rld[output_reload].out)
1705 /* Args reversed because the first arg seems to be
1706 the one that we imagine being modified
1707 while the second is the one that might be affected. */
1708 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1710 /* However, if the input is a register that appears inside
1711 the output, then we also can't share.
1712 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1713 If the same reload reg is used for both reg 69 and the
1714 result to be stored in memory, then that result
1715 will clobber the address of the memory ref. */
1716 && ! (GET_CODE (rld[i].in) == REG
1717 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1718 rld[output_reload].out))))
1719 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode)
1720 && (reg_class_size[(int) rld[i].class]
1721 || SMALL_REGISTER_CLASSES)
1722 /* We will allow making things slightly worse by combining an
1723 input and an output, but no worse than that. */
1724 && (rld[i].when_needed == RELOAD_FOR_INPUT
1725 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1729 /* We have found a reload to combine with! */
1730 rld[i].out = rld[output_reload].out;
1731 rld[i].out_reg = rld[output_reload].out_reg;
1732 rld[i].outmode = rld[output_reload].outmode;
1733 /* Mark the old output reload as inoperative. */
1734 rld[output_reload].out = 0;
1735 /* The combined reload is needed for the entire insn. */
1736 rld[i].when_needed = RELOAD_OTHER;
1737 /* If the output reload had a secondary reload, copy it. */
1738 if (rld[output_reload].secondary_out_reload != -1)
1740 rld[i].secondary_out_reload
1741 = rld[output_reload].secondary_out_reload;
1742 rld[i].secondary_out_icode
1743 = rld[output_reload].secondary_out_icode;
1746 #ifdef SECONDARY_MEMORY_NEEDED
1747 /* Copy any secondary MEM. */
1748 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1749 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1750 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1752 /* If required, minimize the register class. */
1753 if (reg_class_subset_p (rld[output_reload].class,
1755 rld[i].class = rld[output_reload].class;
1757 /* Transfer all replacements from the old reload to the combined. */
1758 for (j = 0; j < n_replacements; j++)
1759 if (replacements[j].what == output_reload)
1760 replacements[j].what = i;
1765 /* If this insn has only one operand that is modified or written (assumed
1766 to be the first), it must be the one corresponding to this reload. It
1767 is safe to use anything that dies in this insn for that output provided
1768 that it does not occur in the output (we already know it isn't an
1769 earlyclobber. If this is an asm insn, give up. */
1771 if (INSN_CODE (this_insn) == -1)
1774 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1775 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1776 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1779 /* See if some hard register that dies in this insn and is not used in
1780 the output is the right class. Only works if the register we pick
1781 up can fully hold our output reload. */
1782 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1783 if (REG_NOTE_KIND (note) == REG_DEAD
1784 && GET_CODE (XEXP (note, 0)) == REG
1785 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1786 rld[output_reload].out)
1787 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1788 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1789 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1790 REGNO (XEXP (note, 0)))
1791 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1792 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1793 /* Ensure that a secondary or tertiary reload for this output
1794 won't want this register. */
1795 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1796 || (! (TEST_HARD_REG_BIT
1797 (reg_class_contents[(int) rld[secondary_out].class],
1798 REGNO (XEXP (note, 0))))
1799 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1800 || ! (TEST_HARD_REG_BIT
1801 (reg_class_contents[(int) rld[secondary_out].class],
1802 REGNO (XEXP (note, 0)))))))
1803 && ! fixed_regs[REGNO (XEXP (note, 0))])
1805 rld[output_reload].reg_rtx
1806 = gen_rtx_REG (rld[output_reload].outmode,
1807 REGNO (XEXP (note, 0)));
1812 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1813 See if one of IN and OUT is a register that may be used;
1814 this is desirable since a spill-register won't be needed.
1815 If so, return the register rtx that proves acceptable.
1817 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1818 CLASS is the register class required for the reload.
1820 If FOR_REAL is >= 0, it is the number of the reload,
1821 and in some cases when it can be discovered that OUT doesn't need
1822 to be computed, clear out rld[FOR_REAL].out.
1824 If FOR_REAL is -1, this should not be done, because this call
1825 is just to see if a register can be found, not to find and install it.
1827 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1828 puts an additional constraint on being able to use IN for OUT since
1829 IN must not appear elsewhere in the insn (it is assumed that IN itself
1830 is safe from the earlyclobber). */
1833 find_dummy_reload (real_in, real_out, inloc, outloc,
1834 inmode, outmode, class, for_real, earlyclobber)
1835 rtx real_in, real_out;
1836 rtx *inloc, *outloc;
1837 enum machine_mode inmode, outmode;
1838 enum reg_class class;
1848 /* If operands exceed a word, we can't use either of them
1849 unless they have the same size. */
1850 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1851 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1852 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1855 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1856 respectively refers to a hard register. */
1858 /* Find the inside of any subregs. */
1859 while (GET_CODE (out) == SUBREG)
1861 if (GET_CODE (SUBREG_REG (out)) == REG
1862 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1863 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1864 GET_MODE (SUBREG_REG (out)),
1867 out = SUBREG_REG (out);
1869 while (GET_CODE (in) == SUBREG)
1871 if (GET_CODE (SUBREG_REG (in)) == REG
1872 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1873 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1874 GET_MODE (SUBREG_REG (in)),
1877 in = SUBREG_REG (in);
1880 /* Narrow down the reg class, the same way push_reload will;
1881 otherwise we might find a dummy now, but push_reload won't. */
1882 class = PREFERRED_RELOAD_CLASS (in, class);
1884 /* See if OUT will do. */
1885 if (GET_CODE (out) == REG
1886 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1888 unsigned int regno = REGNO (out) + out_offset;
1889 unsigned int nwords = HARD_REGNO_NREGS (regno, outmode);
1892 /* When we consider whether the insn uses OUT,
1893 ignore references within IN. They don't prevent us
1894 from copying IN into OUT, because those refs would
1895 move into the insn that reloads IN.
1897 However, we only ignore IN in its role as this reload.
1898 If the insn uses IN elsewhere and it contains OUT,
1899 that counts. We can't be sure it's the "same" operand
1900 so it might not go through this reload. */
1902 *inloc = const0_rtx;
1904 if (regno < FIRST_PSEUDO_REGISTER
1905 && HARD_REGNO_MODE_OK (regno, outmode)
1906 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1907 PATTERN (this_insn), outloc))
1911 for (i = 0; i < nwords; i++)
1912 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1918 if (GET_CODE (real_out) == REG)
1921 value = gen_rtx_REG (outmode, regno);
1928 /* Consider using IN if OUT was not acceptable
1929 or if OUT dies in this insn (like the quotient in a divmod insn).
1930 We can't use IN unless it is dies in this insn,
1931 which means we must know accurately which hard regs are live.
1932 Also, the result can't go in IN if IN is used within OUT,
1933 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1934 if (hard_regs_live_known
1935 && GET_CODE (in) == REG
1936 && REGNO (in) < FIRST_PSEUDO_REGISTER
1938 || find_reg_note (this_insn, REG_UNUSED, real_out))
1939 && find_reg_note (this_insn, REG_DEAD, real_in)
1940 && !fixed_regs[REGNO (in)]
1941 && HARD_REGNO_MODE_OK (REGNO (in),
1942 /* The only case where out and real_out might
1943 have different modes is where real_out
1944 is a subreg, and in that case, out
1946 (GET_MODE (out) != VOIDmode
1947 ? GET_MODE (out) : outmode)))
1949 unsigned int regno = REGNO (in) + in_offset;
1950 unsigned int nwords = HARD_REGNO_NREGS (regno, inmode);
1952 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
1953 && ! hard_reg_set_here_p (regno, regno + nwords,
1954 PATTERN (this_insn))
1956 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1957 PATTERN (this_insn), inloc)))
1961 for (i = 0; i < nwords; i++)
1962 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1968 /* If we were going to use OUT as the reload reg
1969 and changed our mind, it means OUT is a dummy that
1970 dies here. So don't bother copying value to it. */
1971 if (for_real >= 0 && value == real_out)
1972 rld[for_real].out = 0;
1973 if (GET_CODE (real_in) == REG)
1976 value = gen_rtx_REG (inmode, regno);
1984 /* This page contains subroutines used mainly for determining
1985 whether the IN or an OUT of a reload can serve as the
1988 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1991 earlyclobber_operand_p (x)
1996 for (i = 0; i < n_earlyclobbers; i++)
1997 if (reload_earlyclobbers[i] == x)
2003 /* Return 1 if expression X alters a hard reg in the range
2004 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2005 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2006 X should be the body of an instruction. */
2009 hard_reg_set_here_p (beg_regno, end_regno, x)
2010 unsigned int beg_regno, end_regno;
2013 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2015 rtx op0 = SET_DEST (x);
2017 while (GET_CODE (op0) == SUBREG)
2018 op0 = SUBREG_REG (op0);
2019 if (GET_CODE (op0) == REG)
2021 unsigned int r = REGNO (op0);
2023 /* See if this reg overlaps range under consideration. */
2025 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
2029 else if (GET_CODE (x) == PARALLEL)
2031 int i = XVECLEN (x, 0) - 1;
2034 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2041 /* Return 1 if ADDR is a valid memory address for mode MODE,
2042 and check that each pseudo reg has the proper kind of
2046 strict_memory_address_p (mode, addr)
2047 enum machine_mode mode ATTRIBUTE_UNUSED;
2050 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2057 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2058 if they are the same hard reg, and has special hacks for
2059 autoincrement and autodecrement.
2060 This is specifically intended for find_reloads to use
2061 in determining whether two operands match.
2062 X is the operand whose number is the lower of the two.
2064 The value is 2 if Y contains a pre-increment that matches
2065 a non-incrementing address in X. */
2067 /* ??? To be completely correct, we should arrange to pass
2068 for X the output operand and for Y the input operand.
2069 For now, we assume that the output operand has the lower number
2070 because that is natural in (SET output (... input ...)). */
2073 operands_match_p (x, y)
2077 RTX_CODE code = GET_CODE (x);
2083 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2084 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2085 && GET_CODE (SUBREG_REG (y)) == REG)))
2091 i = REGNO (SUBREG_REG (x));
2092 if (i >= FIRST_PSEUDO_REGISTER)
2094 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2095 GET_MODE (SUBREG_REG (x)),
2102 if (GET_CODE (y) == SUBREG)
2104 j = REGNO (SUBREG_REG (y));
2105 if (j >= FIRST_PSEUDO_REGISTER)
2107 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2108 GET_MODE (SUBREG_REG (y)),
2115 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2116 multiple hard register group, so that for example (reg:DI 0) and
2117 (reg:SI 1) will be considered the same register. */
2118 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2119 && i < FIRST_PSEUDO_REGISTER)
2120 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
2121 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2122 && j < FIRST_PSEUDO_REGISTER)
2123 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2127 /* If two operands must match, because they are really a single
2128 operand of an assembler insn, then two postincrements are invalid
2129 because the assembler insn would increment only once.
2130 On the other hand, an postincrement matches ordinary indexing
2131 if the postincrement is the output operand. */
2132 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2133 return operands_match_p (XEXP (x, 0), y);
2134 /* Two preincrements are invalid
2135 because the assembler insn would increment only once.
2136 On the other hand, an preincrement matches ordinary indexing
2137 if the preincrement is the input operand.
2138 In this case, return 2, since some callers need to do special
2139 things when this happens. */
2140 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2141 || GET_CODE (y) == PRE_MODIFY)
2142 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2146 /* Now we have disposed of all the cases
2147 in which different rtx codes can match. */
2148 if (code != GET_CODE (y))
2150 if (code == LABEL_REF)
2151 return XEXP (x, 0) == XEXP (y, 0);
2152 if (code == SYMBOL_REF)
2153 return XSTR (x, 0) == XSTR (y, 0);
2155 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2157 if (GET_MODE (x) != GET_MODE (y))
2160 /* Compare the elements. If any pair of corresponding elements
2161 fail to match, return 0 for the whole things. */
2164 fmt = GET_RTX_FORMAT (code);
2165 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2171 if (XWINT (x, i) != XWINT (y, i))
2176 if (XINT (x, i) != XINT (y, i))
2181 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2184 /* If any subexpression returns 2,
2185 we should return 2 if we are successful. */
2194 if (XVECLEN (x, i) != XVECLEN (y, i))
2196 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2198 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2206 /* It is believed that rtx's at this level will never
2207 contain anything but integers and other rtx's,
2208 except for within LABEL_REFs and SYMBOL_REFs. */
2213 return 1 + success_2;
2216 /* Describe the range of registers or memory referenced by X.
2217 If X is a register, set REG_FLAG and put the first register
2218 number into START and the last plus one into END.
2219 If X is a memory reference, put a base address into BASE
2220 and a range of integer offsets into START and END.
2221 If X is pushing on the stack, we can assume it causes no trouble,
2222 so we set the SAFE field. */
2224 static struct decomposition
2228 struct decomposition val;
2234 if (GET_CODE (x) == MEM)
2236 rtx base = NULL_RTX, offset = 0;
2237 rtx addr = XEXP (x, 0);
2239 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2240 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2242 val.base = XEXP (addr, 0);
2243 val.start = -GET_MODE_SIZE (GET_MODE (x));
2244 val.end = GET_MODE_SIZE (GET_MODE (x));
2245 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2249 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2251 if (GET_CODE (XEXP (addr, 1)) == PLUS
2252 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2253 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2255 val.base = XEXP (addr, 0);
2256 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2257 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2258 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2263 if (GET_CODE (addr) == CONST)
2265 addr = XEXP (addr, 0);
2268 if (GET_CODE (addr) == PLUS)
2270 if (CONSTANT_P (XEXP (addr, 0)))
2272 base = XEXP (addr, 1);
2273 offset = XEXP (addr, 0);
2275 else if (CONSTANT_P (XEXP (addr, 1)))
2277 base = XEXP (addr, 0);
2278 offset = XEXP (addr, 1);
2285 offset = const0_rtx;
2287 if (GET_CODE (offset) == CONST)
2288 offset = XEXP (offset, 0);
2289 if (GET_CODE (offset) == PLUS)
2291 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2293 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2294 offset = XEXP (offset, 0);
2296 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2298 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2299 offset = XEXP (offset, 1);
2303 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2304 offset = const0_rtx;
2307 else if (GET_CODE (offset) != CONST_INT)
2309 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2310 offset = const0_rtx;
2313 if (all_const && GET_CODE (base) == PLUS)
2314 base = gen_rtx_CONST (GET_MODE (base), base);
2316 if (GET_CODE (offset) != CONST_INT)
2319 val.start = INTVAL (offset);
2320 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2324 else if (GET_CODE (x) == REG)
2327 val.start = true_regnum (x);
2330 /* A pseudo with no hard reg. */
2331 val.start = REGNO (x);
2332 val.end = val.start + 1;
2336 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2338 else if (GET_CODE (x) == SUBREG)
2340 if (GET_CODE (SUBREG_REG (x)) != REG)
2341 /* This could be more precise, but it's good enough. */
2342 return decompose (SUBREG_REG (x));
2344 val.start = true_regnum (x);
2346 return decompose (SUBREG_REG (x));
2349 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2351 else if (CONSTANT_P (x)
2352 /* This hasn't been assigned yet, so it can't conflict yet. */
2353 || GET_CODE (x) == SCRATCH)
2360 /* Return 1 if altering Y will not modify the value of X.
2361 Y is also described by YDATA, which should be decompose (Y). */
2364 immune_p (x, y, ydata)
2366 struct decomposition ydata;
2368 struct decomposition xdata;
2371 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2375 if (GET_CODE (y) != MEM)
2377 /* If Y is memory and X is not, Y can't affect X. */
2378 if (GET_CODE (x) != MEM)
2381 xdata = decompose (x);
2383 if (! rtx_equal_p (xdata.base, ydata.base))
2385 /* If bases are distinct symbolic constants, there is no overlap. */
2386 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2388 /* Constants and stack slots never overlap. */
2389 if (CONSTANT_P (xdata.base)
2390 && (ydata.base == frame_pointer_rtx
2391 || ydata.base == hard_frame_pointer_rtx
2392 || ydata.base == stack_pointer_rtx))
2394 if (CONSTANT_P (ydata.base)
2395 && (xdata.base == frame_pointer_rtx
2396 || xdata.base == hard_frame_pointer_rtx
2397 || xdata.base == stack_pointer_rtx))
2399 /* If either base is variable, we don't know anything. */
2403 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2406 /* Similar, but calls decompose. */
2409 safe_from_earlyclobber (op, clobber)
2412 struct decomposition early_data;
2414 early_data = decompose (clobber);
2415 return immune_p (op, clobber, early_data);
2418 /* Main entry point of this file: search the body of INSN
2419 for values that need reloading and record them with push_reload.
2420 REPLACE nonzero means record also where the values occur
2421 so that subst_reloads can be used.
2423 IND_LEVELS says how many levels of indirection are supported by this
2424 machine; a value of zero means that a memory reference is not a valid
2427 LIVE_KNOWN says we have valid information about which hard
2428 regs are live at each point in the program; this is true when
2429 we are called from global_alloc but false when stupid register
2430 allocation has been done.
2432 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2433 which is nonnegative if the reg has been commandeered for reloading into.
2434 It is copied into STATIC_RELOAD_REG_P and referenced from there
2435 by various subroutines.
2437 Return TRUE if some operands need to be changed, because of swapping
2438 commutative operands, reg_equiv_address substitution, or whatever. */
2441 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2443 int replace, ind_levels;
2445 short *reload_reg_p;
2447 int insn_code_number;
2450 /* These start out as the constraints for the insn
2451 and they are chewed up as we consider alternatives. */
2452 char *constraints[MAX_RECOG_OPERANDS];
2453 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2455 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2456 char pref_or_nothing[MAX_RECOG_OPERANDS];
2457 /* Nonzero for a MEM operand whose entire address needs a reload. */
2458 int address_reloaded[MAX_RECOG_OPERANDS];
2459 /* Value of enum reload_type to use for operand. */
2460 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2461 /* Value of enum reload_type to use within address of operand. */
2462 enum reload_type address_type[MAX_RECOG_OPERANDS];
2463 /* Save the usage of each operand. */
2464 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2465 int no_input_reloads = 0, no_output_reloads = 0;
2467 int this_alternative[MAX_RECOG_OPERANDS];
2468 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2469 char this_alternative_win[MAX_RECOG_OPERANDS];
2470 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2471 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2472 int this_alternative_matches[MAX_RECOG_OPERANDS];
2474 int goal_alternative[MAX_RECOG_OPERANDS];
2475 int this_alternative_number;
2476 int goal_alternative_number = 0;
2477 int operand_reloadnum[MAX_RECOG_OPERANDS];
2478 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2479 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2480 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2481 char goal_alternative_win[MAX_RECOG_OPERANDS];
2482 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2483 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2484 int goal_alternative_swapped;
2487 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2488 rtx substed_operand[MAX_RECOG_OPERANDS];
2489 rtx body = PATTERN (insn);
2490 rtx set = single_set (insn);
2491 int goal_earlyclobber = 0, this_earlyclobber;
2492 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2498 n_earlyclobbers = 0;
2499 replace_reloads = replace;
2500 hard_regs_live_known = live_known;
2501 static_reload_reg_p = reload_reg_p;
2503 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2504 neither are insns that SET cc0. Insns that use CC0 are not allowed
2505 to have any input reloads. */
2506 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2507 no_output_reloads = 1;
2510 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2511 no_input_reloads = 1;
2512 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2513 no_output_reloads = 1;
2516 #ifdef SECONDARY_MEMORY_NEEDED
2517 /* The eliminated forms of any secondary memory locations are per-insn, so
2518 clear them out here. */
2520 memset ((char *) secondary_memlocs_elim, 0, sizeof secondary_memlocs_elim);
2523 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2524 is cheap to move between them. If it is not, there may not be an insn
2525 to do the copy, so we may need a reload. */
2526 if (GET_CODE (body) == SET
2527 && GET_CODE (SET_DEST (body)) == REG
2528 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2529 && GET_CODE (SET_SRC (body)) == REG
2530 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2531 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2532 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2533 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2536 extract_insn (insn);
2538 noperands = reload_n_operands = recog_data.n_operands;
2539 n_alternatives = recog_data.n_alternatives;
2541 /* Just return "no reloads" if insn has no operands with constraints. */
2542 if (noperands == 0 || n_alternatives == 0)
2545 insn_code_number = INSN_CODE (insn);
2546 this_insn_is_asm = insn_code_number < 0;
2548 memcpy (operand_mode, recog_data.operand_mode,
2549 noperands * sizeof (enum machine_mode));
2550 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2554 /* If we will need to know, later, whether some pair of operands
2555 are the same, we must compare them now and save the result.
2556 Reloading the base and index registers will clobber them
2557 and afterward they will fail to match. */
2559 for (i = 0; i < noperands; i++)
2564 substed_operand[i] = recog_data.operand[i];
2567 modified[i] = RELOAD_READ;
2569 /* Scan this operand's constraint to see if it is an output operand,
2570 an in-out operand, is commutative, or should match another. */
2575 modified[i] = RELOAD_WRITE;
2577 modified[i] = RELOAD_READ_WRITE;
2580 /* The last operand should not be marked commutative. */
2581 if (i == noperands - 1)
2586 else if (ISDIGIT (c))
2588 c = strtoul (p - 1, &p, 10);
2590 operands_match[c][i]
2591 = operands_match_p (recog_data.operand[c],
2592 recog_data.operand[i]);
2594 /* An operand may not match itself. */
2598 /* If C can be commuted with C+1, and C might need to match I,
2599 then C+1 might also need to match I. */
2600 if (commutative >= 0)
2602 if (c == commutative || c == commutative + 1)
2604 int other = c + (c == commutative ? 1 : -1);
2605 operands_match[other][i]
2606 = operands_match_p (recog_data.operand[other],
2607 recog_data.operand[i]);
2609 if (i == commutative || i == commutative + 1)
2611 int other = i + (i == commutative ? 1 : -1);
2612 operands_match[c][other]
2613 = operands_match_p (recog_data.operand[c],
2614 recog_data.operand[other]);
2616 /* Note that C is supposed to be less than I.
2617 No need to consider altering both C and I because in
2618 that case we would alter one into the other. */
2624 /* Examine each operand that is a memory reference or memory address
2625 and reload parts of the addresses into index registers.
2626 Also here any references to pseudo regs that didn't get hard regs
2627 but are equivalent to constants get replaced in the insn itself
2628 with those constants. Nobody will ever see them again.
2630 Finally, set up the preferred classes of each operand. */
2632 for (i = 0; i < noperands; i++)
2634 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2636 address_reloaded[i] = 0;
2637 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2638 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2641 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2642 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2645 if (*constraints[i] == 0)
2646 /* Ignore things like match_operator operands. */
2648 else if (constraints[i][0] == 'p')
2650 find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2651 recog_data.operand[i],
2652 recog_data.operand_loc[i],
2653 i, operand_type[i], ind_levels, insn);
2655 /* If we now have a simple operand where we used to have a
2656 PLUS or MULT, re-recognize and try again. */
2657 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2658 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2659 && (GET_CODE (recog_data.operand[i]) == MULT
2660 || GET_CODE (recog_data.operand[i]) == PLUS))
2662 INSN_CODE (insn) = -1;
2663 retval = find_reloads (insn, replace, ind_levels, live_known,
2668 recog_data.operand[i] = *recog_data.operand_loc[i];
2669 substed_operand[i] = recog_data.operand[i];
2671 else if (code == MEM)
2674 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2675 recog_data.operand_loc[i],
2676 XEXP (recog_data.operand[i], 0),
2677 &XEXP (recog_data.operand[i], 0),
2678 i, address_type[i], ind_levels, insn);
2679 recog_data.operand[i] = *recog_data.operand_loc[i];
2680 substed_operand[i] = recog_data.operand[i];
2682 else if (code == SUBREG)
2684 rtx reg = SUBREG_REG (recog_data.operand[i]);
2686 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2689 && &SET_DEST (set) == recog_data.operand_loc[i],
2691 &address_reloaded[i]);
2693 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2694 that didn't get a hard register, emit a USE with a REG_EQUAL
2695 note in front so that we might inherit a previous, possibly
2699 && GET_CODE (op) == MEM
2700 && GET_CODE (reg) == REG
2701 && (GET_MODE_SIZE (GET_MODE (reg))
2702 >= GET_MODE_SIZE (GET_MODE (op))))
2703 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2705 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2707 substed_operand[i] = recog_data.operand[i] = op;
2709 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2710 /* We can get a PLUS as an "operand" as a result of register
2711 elimination. See eliminate_regs and gen_reload. We handle
2712 a unary operator by reloading the operand. */
2713 substed_operand[i] = recog_data.operand[i]
2714 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2715 ind_levels, 0, insn,
2716 &address_reloaded[i]);
2717 else if (code == REG)
2719 /* This is equivalent to calling find_reloads_toplev.
2720 The code is duplicated for speed.
2721 When we find a pseudo always equivalent to a constant,
2722 we replace it by the constant. We must be sure, however,
2723 that we don't try to replace it in the insn in which it
2725 int regno = REGNO (recog_data.operand[i]);
2726 if (reg_equiv_constant[regno] != 0
2727 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2729 /* Record the existing mode so that the check if constants are
2730 allowed will work when operand_mode isn't specified. */
2732 if (operand_mode[i] == VOIDmode)
2733 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2735 substed_operand[i] = recog_data.operand[i]
2736 = reg_equiv_constant[regno];
2738 if (reg_equiv_memory_loc[regno] != 0
2739 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2740 /* We need not give a valid is_set_dest argument since the case
2741 of a constant equivalence was checked above. */
2742 substed_operand[i] = recog_data.operand[i]
2743 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2744 ind_levels, 0, insn,
2745 &address_reloaded[i]);
2747 /* If the operand is still a register (we didn't replace it with an
2748 equivalent), get the preferred class to reload it into. */
2749 code = GET_CODE (recog_data.operand[i]);
2751 = ((code == REG && REGNO (recog_data.operand[i])
2752 >= FIRST_PSEUDO_REGISTER)
2753 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2757 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2758 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2761 /* If this is simply a copy from operand 1 to operand 0, merge the
2762 preferred classes for the operands. */
2763 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2764 && recog_data.operand[1] == SET_SRC (set))
2766 preferred_class[0] = preferred_class[1]
2767 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2768 pref_or_nothing[0] |= pref_or_nothing[1];
2769 pref_or_nothing[1] |= pref_or_nothing[0];
2772 /* Now see what we need for pseudo-regs that didn't get hard regs
2773 or got the wrong kind of hard reg. For this, we must consider
2774 all the operands together against the register constraints. */
2776 best = MAX_RECOG_OPERANDS * 2 + 600;
2779 goal_alternative_swapped = 0;
2782 /* The constraints are made of several alternatives.
2783 Each operand's constraint looks like foo,bar,... with commas
2784 separating the alternatives. The first alternatives for all
2785 operands go together, the second alternatives go together, etc.
2787 First loop over alternatives. */
2789 for (this_alternative_number = 0;
2790 this_alternative_number < n_alternatives;
2791 this_alternative_number++)
2793 /* Loop over operands for one constraint alternative. */
2794 /* LOSERS counts those that don't fit this alternative
2795 and would require loading. */
2797 /* BAD is set to 1 if it some operand can't fit this alternative
2798 even after reloading. */
2800 /* REJECT is a count of how undesirable this alternative says it is
2801 if any reloading is required. If the alternative matches exactly
2802 then REJECT is ignored, but otherwise it gets this much
2803 counted against it in addition to the reloading needed. Each
2804 ? counts three times here since we want the disparaging caused by
2805 a bad register class to only count 1/3 as much. */
2808 this_earlyclobber = 0;
2810 for (i = 0; i < noperands; i++)
2812 char *p = constraints[i];
2815 /* 0 => this operand can be reloaded somehow for this alternative. */
2817 /* 0 => this operand can be reloaded if the alternative allows regs. */
2820 rtx operand = recog_data.operand[i];
2822 /* Nonzero means this is a MEM that must be reloaded into a reg
2823 regardless of what the constraint says. */
2824 int force_reload = 0;
2826 /* Nonzero if a constant forced into memory would be OK for this
2829 int earlyclobber = 0;
2831 /* If the predicate accepts a unary operator, it means that
2832 we need to reload the operand, but do not do this for
2833 match_operator and friends. */
2834 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2835 operand = XEXP (operand, 0);
2837 /* If the operand is a SUBREG, extract
2838 the REG or MEM (or maybe even a constant) within.
2839 (Constants can occur as a result of reg_equiv_constant.) */
2841 while (GET_CODE (operand) == SUBREG)
2843 /* Offset only matters when operand is a REG and
2844 it is a hard reg. This is because it is passed
2845 to reg_fits_class_p if it is a REG and all pseudos
2846 return 0 from that function. */
2847 if (GET_CODE (SUBREG_REG (operand)) == REG
2848 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2850 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2851 GET_MODE (SUBREG_REG (operand)),
2852 SUBREG_BYTE (operand),
2853 GET_MODE (operand));
2855 operand = SUBREG_REG (operand);
2856 /* Force reload if this is a constant or PLUS or if there may
2857 be a problem accessing OPERAND in the outer mode. */
2858 if (CONSTANT_P (operand)
2859 || GET_CODE (operand) == PLUS
2860 /* We must force a reload of paradoxical SUBREGs
2861 of a MEM because the alignment of the inner value
2862 may not be enough to do the outer reference. On
2863 big-endian machines, it may also reference outside
2866 On machines that extend byte operations and we have a
2867 SUBREG where both the inner and outer modes are no wider
2868 than a word and the inner mode is narrower, is integral,
2869 and gets extended when loaded from memory, combine.c has
2870 made assumptions about the behavior of the machine in such
2871 register access. If the data is, in fact, in memory we
2872 must always load using the size assumed to be in the
2873 register and let the insn do the different-sized
2876 This is doubly true if WORD_REGISTER_OPERATIONS. In
2877 this case eliminate_regs has left non-paradoxical
2878 subregs for push_reloads to see. Make sure it does
2879 by forcing the reload.
2881 ??? When is it right at this stage to have a subreg
2882 of a mem that is _not_ to be handled specialy? IMO
2883 those should have been reduced to just a mem. */
2884 || ((GET_CODE (operand) == MEM
2885 || (GET_CODE (operand)== REG
2886 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2887 #ifndef WORD_REGISTER_OPERATIONS
2888 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2889 < BIGGEST_ALIGNMENT)
2890 && (GET_MODE_SIZE (operand_mode[i])
2891 > GET_MODE_SIZE (GET_MODE (operand))))
2892 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2893 #ifdef LOAD_EXTEND_OP
2894 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2895 && (GET_MODE_SIZE (GET_MODE (operand))
2897 && (GET_MODE_SIZE (operand_mode[i])
2898 > GET_MODE_SIZE (GET_MODE (operand)))
2899 && INTEGRAL_MODE_P (GET_MODE (operand))
2900 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2905 /* This following hunk of code should no longer be
2906 needed at all with SUBREG_BYTE. If you need this
2907 code back, please explain to me why so I can
2908 fix the real problem. -DaveM */
2910 /* Subreg of a hard reg which can't handle the subreg's mode
2911 or which would handle that mode in the wrong number of
2912 registers for subregging to work. */
2913 || (GET_CODE (operand) == REG
2914 && REGNO (operand) < FIRST_PSEUDO_REGISTER
2915 && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2916 && (GET_MODE_SIZE (GET_MODE (operand))
2918 && ((GET_MODE_SIZE (GET_MODE (operand))
2920 != HARD_REGNO_NREGS (REGNO (operand),
2921 GET_MODE (operand))))
2922 || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset,
2929 this_alternative[i] = (int) NO_REGS;
2930 this_alternative_win[i] = 0;
2931 this_alternative_match_win[i] = 0;
2932 this_alternative_offmemok[i] = 0;
2933 this_alternative_earlyclobber[i] = 0;
2934 this_alternative_matches[i] = -1;
2936 /* An empty constraint or empty alternative
2937 allows anything which matched the pattern. */
2938 if (*p == 0 || *p == ',')
2941 /* Scan this alternative's specs for this operand;
2942 set WIN if the operand fits any letter in this alternative.
2943 Otherwise, clear BADOP if this operand could
2944 fit some letter after reloads,
2945 or set WINREG if this operand could fit after reloads
2946 provided the constraint allows some registers. */
2948 while (*p && (c = *p++) != ',')
2951 case '=': case '+': case '*':
2955 /* The last operand should not be marked commutative. */
2956 if (i != noperands - 1)
2969 /* Ignore rest of this alternative as far as
2970 reloading is concerned. */
2971 while (*p && *p != ',')
2975 case '0': case '1': case '2': case '3': case '4':
2976 case '5': case '6': case '7': case '8': case '9':
2977 c = strtoul (p - 1, &p, 10);
2979 this_alternative_matches[i] = c;
2980 /* We are supposed to match a previous operand.
2981 If we do, we win if that one did.
2982 If we do not, count both of the operands as losers.
2983 (This is too conservative, since most of the time
2984 only a single reload insn will be needed to make
2985 the two operands win. As a result, this alternative
2986 may be rejected when it is actually desirable.) */
2987 if ((swapped && (c != commutative || i != commutative + 1))
2988 /* If we are matching as if two operands were swapped,
2989 also pretend that operands_match had been computed
2991 But if I is the second of those and C is the first,
2992 don't exchange them, because operands_match is valid
2993 only on one side of its diagonal. */
2995 [(c == commutative || c == commutative + 1)
2996 ? 2 * commutative + 1 - c : c]
2997 [(i == commutative || i == commutative + 1)
2998 ? 2 * commutative + 1 - i : i])
2999 : operands_match[c][i])
3001 /* If we are matching a non-offsettable address where an
3002 offsettable address was expected, then we must reject
3003 this combination, because we can't reload it. */
3004 if (this_alternative_offmemok[c]
3005 && GET_CODE (recog_data.operand[c]) == MEM
3006 && this_alternative[c] == (int) NO_REGS
3007 && ! this_alternative_win[c])
3010 did_match = this_alternative_win[c];
3014 /* Operands don't match. */
3016 /* Retroactively mark the operand we had to match
3017 as a loser, if it wasn't already. */
3018 if (this_alternative_win[c])
3020 this_alternative_win[c] = 0;
3021 if (this_alternative[c] == (int) NO_REGS)
3023 /* But count the pair only once in the total badness of
3024 this alternative, if the pair can be a dummy reload. */
3026 = find_dummy_reload (recog_data.operand[i],
3027 recog_data.operand[c],
3028 recog_data.operand_loc[i],
3029 recog_data.operand_loc[c],
3030 operand_mode[i], operand_mode[c],
3031 this_alternative[c], -1,
3032 this_alternative_earlyclobber[c]);
3037 /* This can be fixed with reloads if the operand
3038 we are supposed to match can be fixed with reloads. */
3040 this_alternative[i] = this_alternative[c];
3042 /* If we have to reload this operand and some previous
3043 operand also had to match the same thing as this
3044 operand, we don't know how to do that. So reject this
3046 if (! did_match || force_reload)
3047 for (j = 0; j < i; j++)
3048 if (this_alternative_matches[j]
3049 == this_alternative_matches[i])
3054 /* All necessary reloads for an address_operand
3055 were handled in find_reloads_address. */
3056 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3064 if (GET_CODE (operand) == MEM
3065 || (GET_CODE (operand) == REG
3066 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3067 && reg_renumber[REGNO (operand)] < 0))
3069 if (CONSTANT_P (operand)
3070 /* force_const_mem does not accept HIGH. */
3071 && GET_CODE (operand) != HIGH)
3077 if (GET_CODE (operand) == MEM
3078 && ! address_reloaded[i]
3079 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3080 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3085 if (GET_CODE (operand) == MEM
3086 && ! address_reloaded[i]
3087 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3088 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3092 /* Memory operand whose address is not offsettable. */
3096 if (GET_CODE (operand) == MEM
3097 && ! (ind_levels ? offsettable_memref_p (operand)
3098 : offsettable_nonstrict_memref_p (operand))
3099 /* Certain mem addresses will become offsettable
3100 after they themselves are reloaded. This is important;
3101 we don't want our own handling of unoffsettables
3102 to override the handling of reg_equiv_address. */
3103 && !(GET_CODE (XEXP (operand, 0)) == REG
3105 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3109 /* Memory operand whose address is offsettable. */
3113 if ((GET_CODE (operand) == MEM
3114 /* If IND_LEVELS, find_reloads_address won't reload a
3115 pseudo that didn't get a hard reg, so we have to
3116 reject that case. */
3117 && ((ind_levels ? offsettable_memref_p (operand)
3118 : offsettable_nonstrict_memref_p (operand))
3119 /* A reloaded address is offsettable because it is now
3120 just a simple register indirect. */
3121 || address_reloaded[i]))
3122 || (GET_CODE (operand) == REG
3123 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3124 && reg_renumber[REGNO (operand)] < 0
3125 /* If reg_equiv_address is nonzero, we will be
3126 loading it into a register; hence it will be
3127 offsettable, but we cannot say that reg_equiv_mem
3128 is offsettable without checking. */
3129 && ((reg_equiv_mem[REGNO (operand)] != 0
3130 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3131 || (reg_equiv_address[REGNO (operand)] != 0))))
3133 /* force_const_mem does not accept HIGH. */
3134 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3135 || GET_CODE (operand) == MEM)
3142 /* Output operand that is stored before the need for the
3143 input operands (and their index registers) is over. */
3144 earlyclobber = 1, this_earlyclobber = 1;
3148 #ifndef REAL_ARITHMETIC
3149 /* Match any floating double constant, but only if
3150 we can examine the bits of it reliably. */
3151 if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
3152 || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD)
3153 && GET_MODE (operand) != VOIDmode && ! flag_pretend_float)
3156 if (GET_CODE (operand) == CONST_DOUBLE)
3161 if (GET_CODE (operand) == CONST_DOUBLE)
3167 if (GET_CODE (operand) == CONST_DOUBLE
3168 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3173 if (GET_CODE (operand) == CONST_INT
3174 || (GET_CODE (operand) == CONST_DOUBLE
3175 && GET_MODE (operand) == VOIDmode))
3178 if (CONSTANT_P (operand)
3179 #ifdef LEGITIMATE_PIC_OPERAND_P
3180 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3187 if (GET_CODE (operand) == CONST_INT
3188 || (GET_CODE (operand) == CONST_DOUBLE
3189 && GET_MODE (operand) == VOIDmode))
3201 if (GET_CODE (operand) == CONST_INT
3202 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3212 /* A PLUS is never a valid operand, but reload can make
3213 it from a register when eliminating registers. */
3214 && GET_CODE (operand) != PLUS
3215 /* A SCRATCH is not a valid operand. */
3216 && GET_CODE (operand) != SCRATCH
3217 #ifdef LEGITIMATE_PIC_OPERAND_P
3218 && (! CONSTANT_P (operand)
3220 || LEGITIMATE_PIC_OPERAND_P (operand))
3222 && (GENERAL_REGS == ALL_REGS
3223 || GET_CODE (operand) != REG
3224 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3225 && reg_renumber[REGNO (operand)] < 0)))
3227 /* Drop through into 'r' case. */
3231 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3235 if (REG_CLASS_FROM_LETTER (c) == NO_REGS)
3237 #ifdef EXTRA_CONSTRAINT
3238 if (EXTRA_CONSTRAINT (operand, c))
3245 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3247 if (GET_MODE (operand) == BLKmode)
3250 if (GET_CODE (operand) == REG
3251 && reg_fits_class_p (operand, this_alternative[i],
3252 offset, GET_MODE (recog_data.operand[i])))
3259 /* If this operand could be handled with a reg,
3260 and some reg is allowed, then this operand can be handled. */
3261 if (winreg && this_alternative[i] != (int) NO_REGS)
3264 /* Record which operands fit this alternative. */
3265 this_alternative_earlyclobber[i] = earlyclobber;
3266 if (win && ! force_reload)
3267 this_alternative_win[i] = 1;
3268 else if (did_match && ! force_reload)
3269 this_alternative_match_win[i] = 1;
3272 int const_to_mem = 0;
3274 this_alternative_offmemok[i] = offmemok;
3278 /* Alternative loses if it has no regs for a reg operand. */
3279 if (GET_CODE (operand) == REG
3280 && this_alternative[i] == (int) NO_REGS
3281 && this_alternative_matches[i] < 0)
3284 /* If this is a constant that is reloaded into the desired
3285 class by copying it to memory first, count that as another
3286 reload. This is consistent with other code and is
3287 required to avoid choosing another alternative when
3288 the constant is moved into memory by this function on
3289 an early reload pass. Note that the test here is
3290 precisely the same as in the code below that calls
3292 if (CONSTANT_P (operand)
3293 /* force_const_mem does not accept HIGH. */
3294 && GET_CODE (operand) != HIGH
3295 && ((PREFERRED_RELOAD_CLASS (operand,
3296 (enum reg_class) this_alternative[i])
3298 || no_input_reloads)
3299 && operand_mode[i] != VOIDmode)
3302 if (this_alternative[i] != (int) NO_REGS)
3306 /* If we can't reload this value at all, reject this
3307 alternative. Note that we could also lose due to
3308 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3311 if (! CONSTANT_P (operand)
3312 && (enum reg_class) this_alternative[i] != NO_REGS
3313 && (PREFERRED_RELOAD_CLASS (operand,
3314 (enum reg_class) this_alternative[i])
3318 /* Alternative loses if it requires a type of reload not
3319 permitted for this insn. We can always reload SCRATCH
3320 and objects with a REG_UNUSED note. */
3321 else if (GET_CODE (operand) != SCRATCH
3322 && modified[i] != RELOAD_READ && no_output_reloads
3323 && ! find_reg_note (insn, REG_UNUSED, operand))
3325 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3329 /* We prefer to reload pseudos over reloading other things,
3330 since such reloads may be able to be eliminated later.
3331 If we are reloading a SCRATCH, we won't be generating any
3332 insns, just using a register, so it is also preferred.
3333 So bump REJECT in other cases. Don't do this in the
3334 case where we are forcing a constant into memory and
3335 it will then win since we don't want to have a different
3336 alternative match then. */
3337 if (! (GET_CODE (operand) == REG
3338 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3339 && GET_CODE (operand) != SCRATCH
3340 && ! (const_to_mem && constmemok))
3343 /* Input reloads can be inherited more often than output
3344 reloads can be removed, so penalize output reloads. */
3345 if (operand_type[i] != RELOAD_FOR_INPUT
3346 && GET_CODE (operand) != SCRATCH)
3350 /* If this operand is a pseudo register that didn't get a hard
3351 reg and this alternative accepts some register, see if the
3352 class that we want is a subset of the preferred class for this
3353 register. If not, but it intersects that class, use the
3354 preferred class instead. If it does not intersect the preferred
3355 class, show that usage of this alternative should be discouraged;
3356 it will be discouraged more still if the register is `preferred
3357 or nothing'. We do this because it increases the chance of
3358 reusing our spill register in a later insn and avoiding a pair
3359 of memory stores and loads.
3361 Don't bother with this if this alternative will accept this
3364 Don't do this for a multiword operand, since it is only a
3365 small win and has the risk of requiring more spill registers,
3366 which could cause a large loss.
3368 Don't do this if the preferred class has only one register
3369 because we might otherwise exhaust the class. */
3371 if (! win && ! did_match
3372 && this_alternative[i] != (int) NO_REGS
3373 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3374 && reg_class_size[(int) preferred_class[i]] > 1)
3376 if (! reg_class_subset_p (this_alternative[i],
3377 preferred_class[i]))
3379 /* Since we don't have a way of forming the intersection,
3380 we just do something special if the preferred class
3381 is a subset of the class we have; that's the most
3382 common case anyway. */
3383 if (reg_class_subset_p (preferred_class[i],
3384 this_alternative[i]))
3385 this_alternative[i] = (int) preferred_class[i];
3387 reject += (2 + 2 * pref_or_nothing[i]);
3392 /* Now see if any output operands that are marked "earlyclobber"
3393 in this alternative conflict with any input operands
3394 or any memory addresses. */
3396 for (i = 0; i < noperands; i++)
3397 if (this_alternative_earlyclobber[i]
3398 && (this_alternative_win[i] || this_alternative_match_win[i]))
3400 struct decomposition early_data;
3402 early_data = decompose (recog_data.operand[i]);
3404 if (modified[i] == RELOAD_READ)
3407 if (this_alternative[i] == NO_REGS)
3409 this_alternative_earlyclobber[i] = 0;
3410 if (this_insn_is_asm)
3411 error_for_asm (this_insn,
3412 "`&' constraint used with no register class");
3417 for (j = 0; j < noperands; j++)
3418 /* Is this an input operand or a memory ref? */
3419 if ((GET_CODE (recog_data.operand[j]) == MEM
3420 || modified[j] != RELOAD_WRITE)
3422 /* Ignore things like match_operator operands. */
3423 && *recog_data.constraints[j] != 0
3424 /* Don't count an input operand that is constrained to match
3425 the early clobber operand. */
3426 && ! (this_alternative_matches[j] == i
3427 && rtx_equal_p (recog_data.operand[i],
3428 recog_data.operand[j]))
3429 /* Is it altered by storing the earlyclobber operand? */
3430 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3433 /* If the output is in a single-reg class,
3434 it's costly to reload it, so reload the input instead. */
3435 if (reg_class_size[this_alternative[i]] == 1
3436 && (GET_CODE (recog_data.operand[j]) == REG
3437 || GET_CODE (recog_data.operand[j]) == SUBREG))
3440 this_alternative_win[j] = 0;
3441 this_alternative_match_win[j] = 0;
3446 /* If an earlyclobber operand conflicts with something,
3447 it must be reloaded, so request this and count the cost. */
3451 this_alternative_win[i] = 0;
3452 this_alternative_match_win[j] = 0;
3453 for (j = 0; j < noperands; j++)
3454 if (this_alternative_matches[j] == i
3455 && this_alternative_match_win[j])
3457 this_alternative_win[j] = 0;
3458 this_alternative_match_win[j] = 0;
3464 /* If one alternative accepts all the operands, no reload required,
3465 choose that alternative; don't consider the remaining ones. */
3468 /* Unswap these so that they are never swapped at `finish'. */
3469 if (commutative >= 0)
3471 recog_data.operand[commutative] = substed_operand[commutative];
3472 recog_data.operand[commutative + 1]
3473 = substed_operand[commutative + 1];
3475 for (i = 0; i < noperands; i++)
3477 goal_alternative_win[i] = this_alternative_win[i];
3478 goal_alternative_match_win[i] = this_alternative_match_win[i];
3479 goal_alternative[i] = this_alternative[i];
3480 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3481 goal_alternative_matches[i] = this_alternative_matches[i];
3482 goal_alternative_earlyclobber[i]
3483 = this_alternative_earlyclobber[i];
3485 goal_alternative_number = this_alternative_number;
3486 goal_alternative_swapped = swapped;
3487 goal_earlyclobber = this_earlyclobber;
3491 /* REJECT, set by the ! and ? constraint characters and when a register
3492 would be reloaded into a non-preferred class, discourages the use of
3493 this alternative for a reload goal. REJECT is incremented by six
3494 for each ? and two for each non-preferred class. */
3495 losers = losers * 6 + reject;
3497 /* If this alternative can be made to work by reloading,
3498 and it needs less reloading than the others checked so far,
3499 record it as the chosen goal for reloading. */
3500 if (! bad && best > losers)
3502 for (i = 0; i < noperands; i++)
3504 goal_alternative[i] = this_alternative[i];
3505 goal_alternative_win[i] = this_alternative_win[i];
3506 goal_alternative_match_win[i] = this_alternative_match_win[i];
3507 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3508 goal_alternative_matches[i] = this_alternative_matches[i];
3509 goal_alternative_earlyclobber[i]
3510 = this_alternative_earlyclobber[i];
3512 goal_alternative_swapped = swapped;
3514 goal_alternative_number = this_alternative_number;
3515 goal_earlyclobber = this_earlyclobber;
3519 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3520 then we need to try each alternative twice,
3521 the second time matching those two operands
3522 as if we had exchanged them.
3523 To do this, really exchange them in operands.
3525 If we have just tried the alternatives the second time,
3526 return operands to normal and drop through. */
3528 if (commutative >= 0)
3533 enum reg_class tclass;
3536 recog_data.operand[commutative] = substed_operand[commutative + 1];
3537 recog_data.operand[commutative + 1] = substed_operand[commutative];
3538 /* Swap the duplicates too. */
3539 for (i = 0; i < recog_data.n_dups; i++)
3540 if (recog_data.dup_num[i] == commutative
3541 || recog_data.dup_num[i] == commutative + 1)
3542 *recog_data.dup_loc[i]
3543 = recog_data.operand[(int) recog_data.dup_num[i]];
3545 tclass = preferred_class[commutative];
3546 preferred_class[commutative] = preferred_class[commutative + 1];
3547 preferred_class[commutative + 1] = tclass;
3549 t = pref_or_nothing[commutative];
3550 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3551 pref_or_nothing[commutative + 1] = t;
3553 memcpy (constraints, recog_data.constraints,
3554 noperands * sizeof (char *));
3559 recog_data.operand[commutative] = substed_operand[commutative];
3560 recog_data.operand[commutative + 1]
3561 = substed_operand[commutative + 1];
3562 /* Unswap the duplicates too. */
3563 for (i = 0; i < recog_data.n_dups; i++)
3564 if (recog_data.dup_num[i] == commutative
3565 || recog_data.dup_num[i] == commutative + 1)
3566 *recog_data.dup_loc[i]
3567 = recog_data.operand[(int) recog_data.dup_num[i]];
3571 /* The operands don't meet the constraints.
3572 goal_alternative describes the alternative
3573 that we could reach by reloading the fewest operands.
3574 Reload so as to fit it. */
3576 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3578 /* No alternative works with reloads?? */
3579 if (insn_code_number >= 0)
3580 fatal_insn ("unable to generate reloads for:", insn);
3581 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3582 /* Avoid further trouble with this insn. */
3583 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3588 /* Jump to `finish' from above if all operands are valid already.
3589 In that case, goal_alternative_win is all 1. */
3592 /* Right now, for any pair of operands I and J that are required to match,
3594 goal_alternative_matches[J] is I.
3595 Set up goal_alternative_matched as the inverse function:
3596 goal_alternative_matched[I] = J. */
3598 for (i = 0; i < noperands; i++)
3599 goal_alternative_matched[i] = -1;
3601 for (i = 0; i < noperands; i++)
3602 if (! goal_alternative_win[i]
3603 && goal_alternative_matches[i] >= 0)
3604 goal_alternative_matched[goal_alternative_matches[i]] = i;
3606 for (i = 0; i < noperands; i++)
3607 goal_alternative_win[i] |= goal_alternative_match_win[i];
3609 /* If the best alternative is with operands 1 and 2 swapped,
3610 consider them swapped before reporting the reloads. Update the
3611 operand numbers of any reloads already pushed. */
3613 if (goal_alternative_swapped)
3617 tem = substed_operand[commutative];
3618 substed_operand[commutative] = substed_operand[commutative + 1];
3619 substed_operand[commutative + 1] = tem;
3620 tem = recog_data.operand[commutative];
3621 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3622 recog_data.operand[commutative + 1] = tem;
3623 tem = *recog_data.operand_loc[commutative];
3624 *recog_data.operand_loc[commutative]
3625 = *recog_data.operand_loc[commutative + 1];
3626 *recog_data.operand_loc[commutative + 1] = tem;
3628 for (i = 0; i < n_reloads; i++)
3630 if (rld[i].opnum == commutative)
3631 rld[i].opnum = commutative + 1;
3632 else if (rld[i].opnum == commutative + 1)
3633 rld[i].opnum = commutative;
3637 for (i = 0; i < noperands; i++)
3639 operand_reloadnum[i] = -1;
3641 /* If this is an earlyclobber operand, we need to widen the scope.
3642 The reload must remain valid from the start of the insn being
3643 reloaded until after the operand is stored into its destination.
3644 We approximate this with RELOAD_OTHER even though we know that we
3645 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3647 One special case that is worth checking is when we have an
3648 output that is earlyclobber but isn't used past the insn (typically
3649 a SCRATCH). In this case, we only need have the reload live
3650 through the insn itself, but not for any of our input or output
3652 But we must not accidentally narrow the scope of an existing
3653 RELOAD_OTHER reload - leave these alone.
3655 In any case, anything needed to address this operand can remain
3656 however they were previously categorized. */
3658 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3660 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3661 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3664 /* Any constants that aren't allowed and can't be reloaded
3665 into registers are here changed into memory references. */
3666 for (i = 0; i < noperands; i++)
3667 if (! goal_alternative_win[i]
3668 && CONSTANT_P (recog_data.operand[i])
3669 /* force_const_mem does not accept HIGH. */
3670 && GET_CODE (recog_data.operand[i]) != HIGH
3671 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3672 (enum reg_class) goal_alternative[i])
3674 || no_input_reloads)
3675 && operand_mode[i] != VOIDmode)
3677 substed_operand[i] = recog_data.operand[i]
3678 = find_reloads_toplev (force_const_mem (operand_mode[i],
3679 recog_data.operand[i]),
3680 i, address_type[i], ind_levels, 0, insn,
3682 if (alternative_allows_memconst (recog_data.constraints[i],
3683 goal_alternative_number))
3684 goal_alternative_win[i] = 1;
3687 /* Record the values of the earlyclobber operands for the caller. */
3688 if (goal_earlyclobber)
3689 for (i = 0; i < noperands; i++)
3690 if (goal_alternative_earlyclobber[i])
3691 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3693 /* Now record reloads for all the operands that need them. */
3694 for (i = 0; i < noperands; i++)
3695 if (! goal_alternative_win[i])
3697 /* Operands that match previous ones have already been handled. */
3698 if (goal_alternative_matches[i] >= 0)
3700 /* Handle an operand with a nonoffsettable address
3701 appearing where an offsettable address will do
3702 by reloading the address into a base register.
3704 ??? We can also do this when the operand is a register and
3705 reg_equiv_mem is not offsettable, but this is a bit tricky,
3706 so we don't bother with it. It may not be worth doing. */
3707 else if (goal_alternative_matched[i] == -1
3708 && goal_alternative_offmemok[i]
3709 && GET_CODE (recog_data.operand[i]) == MEM)
3711 operand_reloadnum[i]
3712 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3713 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3714 MODE_BASE_REG_CLASS (VOIDmode),
3715 GET_MODE (XEXP (recog_data.operand[i], 0)),
3716 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3717 rld[operand_reloadnum[i]].inc
3718 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3720 /* If this operand is an output, we will have made any
3721 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3722 now we are treating part of the operand as an input, so
3723 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3725 if (modified[i] == RELOAD_WRITE)
3727 for (j = 0; j < n_reloads; j++)
3729 if (rld[j].opnum == i)
3731 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3732 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3733 else if (rld[j].when_needed
3734 == RELOAD_FOR_OUTADDR_ADDRESS)
3735 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3740 else if (goal_alternative_matched[i] == -1)
3742 operand_reloadnum[i]
3743 = push_reload ((modified[i] != RELOAD_WRITE
3744 ? recog_data.operand[i] : 0),
3745 (modified[i] != RELOAD_READ
3746 ? recog_data.operand[i] : 0),
3747 (modified[i] != RELOAD_WRITE
3748 ? recog_data.operand_loc[i] : 0),
3749 (modified[i] != RELOAD_READ
3750 ? recog_data.operand_loc[i] : 0),
3751 (enum reg_class) goal_alternative[i],
3752 (modified[i] == RELOAD_WRITE
3753 ? VOIDmode : operand_mode[i]),
3754 (modified[i] == RELOAD_READ
3755 ? VOIDmode : operand_mode[i]),
3756 (insn_code_number < 0 ? 0
3757 : insn_data[insn_code_number].operand[i].strict_low),
3758 0, i, operand_type[i]);
3760 /* In a matching pair of operands, one must be input only
3761 and the other must be output only.
3762 Pass the input operand as IN and the other as OUT. */
3763 else if (modified[i] == RELOAD_READ
3764 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3766 operand_reloadnum[i]
3767 = push_reload (recog_data.operand[i],
3768 recog_data.operand[goal_alternative_matched[i]],
3769 recog_data.operand_loc[i],
3770 recog_data.operand_loc[goal_alternative_matched[i]],
3771 (enum reg_class) goal_alternative[i],
3773 operand_mode[goal_alternative_matched[i]],
3774 0, 0, i, RELOAD_OTHER);
3775 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3777 else if (modified[i] == RELOAD_WRITE
3778 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3780 operand_reloadnum[goal_alternative_matched[i]]
3781 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3782 recog_data.operand[i],
3783 recog_data.operand_loc[goal_alternative_matched[i]],
3784 recog_data.operand_loc[i],
3785 (enum reg_class) goal_alternative[i],
3786 operand_mode[goal_alternative_matched[i]],
3788 0, 0, i, RELOAD_OTHER);
3789 operand_reloadnum[i] = output_reloadnum;
3791 else if (insn_code_number >= 0)
3795 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3796 /* Avoid further trouble with this insn. */
3797 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3802 else if (goal_alternative_matched[i] < 0
3803 && goal_alternative_matches[i] < 0
3806 /* For each non-matching operand that's a MEM or a pseudo-register
3807 that didn't get a hard register, make an optional reload.
3808 This may get done even if the insn needs no reloads otherwise. */
3810 rtx operand = recog_data.operand[i];
3812 while (GET_CODE (operand) == SUBREG)
3813 operand = SUBREG_REG (operand);
3814 if ((GET_CODE (operand) == MEM
3815 || (GET_CODE (operand) == REG
3816 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3817 /* If this is only for an output, the optional reload would not
3818 actually cause us to use a register now, just note that
3819 something is stored here. */
3820 && ((enum reg_class) goal_alternative[i] != NO_REGS
3821 || modified[i] == RELOAD_WRITE)
3822 && ! no_input_reloads
3823 /* An optional output reload might allow to delete INSN later.
3824 We mustn't make in-out reloads on insns that are not permitted
3826 If this is an asm, we can't delete it; we must not even call
3827 push_reload for an optional output reload in this case,
3828 because we can't be sure that the constraint allows a register,
3829 and push_reload verifies the constraints for asms. */
3830 && (modified[i] == RELOAD_READ
3831 || (! no_output_reloads && ! this_insn_is_asm)))
3832 operand_reloadnum[i]
3833 = push_reload ((modified[i] != RELOAD_WRITE
3834 ? recog_data.operand[i] : 0),
3835 (modified[i] != RELOAD_READ
3836 ? recog_data.operand[i] : 0),
3837 (modified[i] != RELOAD_WRITE
3838 ? recog_data.operand_loc[i] : 0),
3839 (modified[i] != RELOAD_READ
3840 ? recog_data.operand_loc[i] : 0),
3841 (enum reg_class) goal_alternative[i],
3842 (modified[i] == RELOAD_WRITE
3843 ? VOIDmode : operand_mode[i]),
3844 (modified[i] == RELOAD_READ
3845 ? VOIDmode : operand_mode[i]),
3846 (insn_code_number < 0 ? 0
3847 : insn_data[insn_code_number].operand[i].strict_low),
3848 1, i, operand_type[i]);
3849 /* If a memory reference remains (either as a MEM or a pseudo that
3850 did not get a hard register), yet we can't make an optional
3851 reload, check if this is actually a pseudo register reference;
3852 we then need to emit a USE and/or a CLOBBER so that reload
3853 inheritance will do the right thing. */
3855 && (GET_CODE (operand) == MEM
3856 || (GET_CODE (operand) == REG
3857 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3858 && reg_renumber [REGNO (operand)] < 0)))
3860 operand = *recog_data.operand_loc[i];
3862 while (GET_CODE (operand) == SUBREG)
3863 operand = SUBREG_REG (operand);
3864 if (GET_CODE (operand) == REG)
3866 if (modified[i] != RELOAD_WRITE)
3867 /* We mark the USE with QImode so that we recognize
3868 it as one that can be safely deleted at the end
3870 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
3872 if (modified[i] != RELOAD_READ)
3873 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3877 else if (goal_alternative_matches[i] >= 0
3878 && goal_alternative_win[goal_alternative_matches[i]]
3879 && modified[i] == RELOAD_READ
3880 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3881 && ! no_input_reloads && ! no_output_reloads
3884 /* Similarly, make an optional reload for a pair of matching
3885 objects that are in MEM or a pseudo that didn't get a hard reg. */
3887 rtx operand = recog_data.operand[i];
3889 while (GET_CODE (operand) == SUBREG)
3890 operand = SUBREG_REG (operand);
3891 if ((GET_CODE (operand) == MEM
3892 || (GET_CODE (operand) == REG
3893 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3894 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3896 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3897 = push_reload (recog_data.operand[goal_alternative_matches[i]],
3898 recog_data.operand[i],
3899 recog_data.operand_loc[goal_alternative_matches[i]],
3900 recog_data.operand_loc[i],
3901 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3902 operand_mode[goal_alternative_matches[i]],
3904 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3907 /* Perform whatever substitutions on the operands we are supposed
3908 to make due to commutativity or replacement of registers
3909 with equivalent constants or memory slots. */
3911 for (i = 0; i < noperands; i++)
3913 /* We only do this on the last pass through reload, because it is
3914 possible for some data (like reg_equiv_address) to be changed during
3915 later passes. Moreover, we loose the opportunity to get a useful
3916 reload_{in,out}_reg when we do these replacements. */
3920 rtx substitution = substed_operand[i];
3922 *recog_data.operand_loc[i] = substitution;
3924 /* If we're replacing an operand with a LABEL_REF, we need
3925 to make sure that there's a REG_LABEL note attached to
3926 this instruction. */
3927 if (GET_CODE (insn) != JUMP_INSN
3928 && GET_CODE (substitution) == LABEL_REF
3929 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
3930 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
3931 XEXP (substitution, 0),
3935 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
3938 /* If this insn pattern contains any MATCH_DUP's, make sure that
3939 they will be substituted if the operands they match are substituted.
3940 Also do now any substitutions we already did on the operands.
3942 Don't do this if we aren't making replacements because we might be
3943 propagating things allocated by frame pointer elimination into places
3944 it doesn't expect. */
3946 if (insn_code_number >= 0 && replace)
3947 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
3949 int opno = recog_data.dup_num[i];
3950 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
3951 if (operand_reloadnum[opno] >= 0)
3952 push_replacement (recog_data.dup_loc[i], operand_reloadnum[opno],
3953 insn_data[insn_code_number].operand[opno].mode);
3957 /* This loses because reloading of prior insns can invalidate the equivalence
3958 (or at least find_equiv_reg isn't smart enough to find it any more),
3959 causing this insn to need more reload regs than it needed before.
3960 It may be too late to make the reload regs available.
3961 Now this optimization is done safely in choose_reload_regs. */
3963 /* For each reload of a reg into some other class of reg,
3964 search for an existing equivalent reg (same value now) in the right class.
3965 We can use it as long as we don't need to change its contents. */
3966 for (i = 0; i < n_reloads; i++)
3967 if (rld[i].reg_rtx == 0
3969 && GET_CODE (rld[i].in) == REG
3973 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
3974 static_reload_reg_p, 0, rld[i].inmode);
3975 /* Prevent generation of insn to load the value
3976 because the one we found already has the value. */
3978 rld[i].in = rld[i].reg_rtx;
3982 /* Perhaps an output reload can be combined with another
3983 to reduce needs by one. */
3984 if (!goal_earlyclobber)
3987 /* If we have a pair of reloads for parts of an address, they are reloading
3988 the same object, the operands themselves were not reloaded, and they
3989 are for two operands that are supposed to match, merge the reloads and
3990 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3992 for (i = 0; i < n_reloads; i++)
3996 for (j = i + 1; j < n_reloads; j++)
3997 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
3998 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
3999 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4000 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4001 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4002 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4003 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4004 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4005 && rtx_equal_p (rld[i].in, rld[j].in)
4006 && (operand_reloadnum[rld[i].opnum] < 0
4007 || rld[operand_reloadnum[rld[i].opnum]].optional)
4008 && (operand_reloadnum[rld[j].opnum] < 0
4009 || rld[operand_reloadnum[rld[j].opnum]].optional)
4010 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4011 || (goal_alternative_matches[rld[j].opnum]
4014 for (k = 0; k < n_replacements; k++)
4015 if (replacements[k].what == j)
4016 replacements[k].what = i;
4018 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4019 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4020 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4022 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4027 /* Scan all the reloads and update their type.
4028 If a reload is for the address of an operand and we didn't reload
4029 that operand, change the type. Similarly, change the operand number
4030 of a reload when two operands match. If a reload is optional, treat it
4031 as though the operand isn't reloaded.
4033 ??? This latter case is somewhat odd because if we do the optional
4034 reload, it means the object is hanging around. Thus we need only
4035 do the address reload if the optional reload was NOT done.
4037 Change secondary reloads to be the address type of their operand, not
4040 If an operand's reload is now RELOAD_OTHER, change any
4041 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4042 RELOAD_FOR_OTHER_ADDRESS. */
4044 for (i = 0; i < n_reloads; i++)
4046 if (rld[i].secondary_p
4047 && rld[i].when_needed == operand_type[rld[i].opnum])
4048 rld[i].when_needed = address_type[rld[i].opnum];
4050 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4051 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4052 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4053 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4054 && (operand_reloadnum[rld[i].opnum] < 0
4055 || rld[operand_reloadnum[rld[i].opnum]].optional))
4057 /* If we have a secondary reload to go along with this reload,
4058 change its type to RELOAD_FOR_OPADDR_ADDR. */
4060 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4061 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4062 && rld[i].secondary_in_reload != -1)
4064 int secondary_in_reload = rld[i].secondary_in_reload;
4066 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4068 /* If there's a tertiary reload we have to change it also. */
4069 if (secondary_in_reload > 0
4070 && rld[secondary_in_reload].secondary_in_reload != -1)
4071 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4072 = RELOAD_FOR_OPADDR_ADDR;
4075 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4076 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4077 && rld[i].secondary_out_reload != -1)
4079 int secondary_out_reload = rld[i].secondary_out_reload;
4081 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4083 /* If there's a tertiary reload we have to change it also. */
4084 if (secondary_out_reload
4085 && rld[secondary_out_reload].secondary_out_reload != -1)
4086 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4087 = RELOAD_FOR_OPADDR_ADDR;
4090 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4091 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4092 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4094 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4097 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4098 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4099 && operand_reloadnum[rld[i].opnum] >= 0
4100 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4102 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4104 if (goal_alternative_matches[rld[i].opnum] >= 0)
4105 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4108 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4109 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4110 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4112 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4113 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4114 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4115 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4116 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4117 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4118 This is complicated by the fact that a single operand can have more
4119 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4120 choose_reload_regs without affecting code quality, and cases that
4121 actually fail are extremely rare, so it turns out to be better to fix
4122 the problem here by not generating cases that choose_reload_regs will
4124 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4125 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4127 We can reduce the register pressure by exploiting that a
4128 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4129 does not conflict with any of them, if it is only used for the first of
4130 the RELOAD_FOR_X_ADDRESS reloads. */
4132 int first_op_addr_num = -2;
4133 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4134 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4135 int need_change = 0;
4136 /* We use last_op_addr_reload and the contents of the above arrays
4137 first as flags - -2 means no instance encountered, -1 means exactly
4138 one instance encountered.
4139 If more than one instance has been encountered, we store the reload
4140 number of the first reload of the kind in question; reload numbers
4141 are known to be non-negative. */
4142 for (i = 0; i < noperands; i++)
4143 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4144 for (i = n_reloads - 1; i >= 0; i--)
4146 switch (rld[i].when_needed)
4148 case RELOAD_FOR_OPERAND_ADDRESS:
4149 if (++first_op_addr_num >= 0)
4151 first_op_addr_num = i;
4155 case RELOAD_FOR_INPUT_ADDRESS:
4156 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4158 first_inpaddr_num[rld[i].opnum] = i;
4162 case RELOAD_FOR_OUTPUT_ADDRESS:
4163 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4165 first_outpaddr_num[rld[i].opnum] = i;
4176 for (i = 0; i < n_reloads; i++)
4179 enum reload_type type;
4181 switch (rld[i].when_needed)
4183 case RELOAD_FOR_OPADDR_ADDR:
4184 first_num = first_op_addr_num;
4185 type = RELOAD_FOR_OPERAND_ADDRESS;
4187 case RELOAD_FOR_INPADDR_ADDRESS:
4188 first_num = first_inpaddr_num[rld[i].opnum];
4189 type = RELOAD_FOR_INPUT_ADDRESS;
4191 case RELOAD_FOR_OUTADDR_ADDRESS:
4192 first_num = first_outpaddr_num[rld[i].opnum];
4193 type = RELOAD_FOR_OUTPUT_ADDRESS;
4200 else if (i > first_num)
4201 rld[i].when_needed = type;
4204 /* Check if the only TYPE reload that uses reload I is
4205 reload FIRST_NUM. */
4206 for (j = n_reloads - 1; j > first_num; j--)
4208 if (rld[j].when_needed == type
4209 && (rld[i].secondary_p
4210 ? rld[j].secondary_in_reload == i
4211 : reg_mentioned_p (rld[i].in, rld[j].in)))
4213 rld[i].when_needed = type;
4222 /* See if we have any reloads that are now allowed to be merged
4223 because we've changed when the reload is needed to
4224 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4225 check for the most common cases. */
4227 for (i = 0; i < n_reloads; i++)
4228 if (rld[i].in != 0 && rld[i].out == 0
4229 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4230 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4231 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4232 for (j = 0; j < n_reloads; j++)
4233 if (i != j && rld[j].in != 0 && rld[j].out == 0
4234 && rld[j].when_needed == rld[i].when_needed
4235 && MATCHES (rld[i].in, rld[j].in)
4236 && rld[i].class == rld[j].class
4237 && !rld[i].nocombine && !rld[j].nocombine
4238 && rld[i].reg_rtx == rld[j].reg_rtx)
4240 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4241 transfer_replacements (i, j);
4246 /* If we made any reloads for addresses, see if they violate a
4247 "no input reloads" requirement for this insn. But loads that we
4248 do after the insn (such as for output addresses) are fine. */
4249 if (no_input_reloads)
4250 for (i = 0; i < n_reloads; i++)
4252 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
4253 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS)
4257 /* Compute reload_mode and reload_nregs. */
4258 for (i = 0; i < n_reloads; i++)
4261 = (rld[i].inmode == VOIDmode
4262 || (GET_MODE_SIZE (rld[i].outmode)
4263 > GET_MODE_SIZE (rld[i].inmode)))
4264 ? rld[i].outmode : rld[i].inmode;
4266 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4269 /* Special case a simple move with an input reload and a
4270 destination of a hard reg, if the hard reg is ok, use it. */
4271 for (i = 0; i < n_reloads; i++)
4272 if (rld[i].when_needed == RELOAD_FOR_INPUT
4273 && GET_CODE (PATTERN (insn)) == SET
4274 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
4275 && SET_SRC (PATTERN (insn)) == rld[i].in)
4277 rtx dest = SET_DEST (PATTERN (insn));
4278 unsigned int regno = REGNO (dest);
4280 if (regno < FIRST_PSEUDO_REGISTER
4281 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4282 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4283 rld[i].reg_rtx = dest;
4289 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4290 accepts a memory operand with constant address. */
4293 alternative_allows_memconst (constraint, altnum)
4294 const char *constraint;
4298 /* Skip alternatives before the one requested. */
4301 while (*constraint++ != ',');
4304 /* Scan the requested alternative for 'm' or 'o'.
4305 If one of them is present, this alternative accepts memory constants. */
4306 while ((c = *constraint++) && c != ',' && c != '#')
4307 if (c == 'm' || c == 'o')
4312 /* Scan X for memory references and scan the addresses for reloading.
4313 Also checks for references to "constant" regs that we want to eliminate
4314 and replaces them with the values they stand for.
4315 We may alter X destructively if it contains a reference to such.
4316 If X is just a constant reg, we return the equivalent value
4319 IND_LEVELS says how many levels of indirect addressing this machine
4322 OPNUM and TYPE identify the purpose of the reload.
4324 IS_SET_DEST is true if X is the destination of a SET, which is not
4325 appropriate to be replaced by a constant.
4327 INSN, if nonzero, is the insn in which we do the reload. It is used
4328 to determine if we may generate output reloads, and where to put USEs
4329 for pseudos that we have to replace with stack slots.
4331 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4332 result of find_reloads_address. */
4335 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn,
4339 enum reload_type type;
4343 int *address_reloaded;
4345 RTX_CODE code = GET_CODE (x);
4347 const char *fmt = GET_RTX_FORMAT (code);
4353 /* This code is duplicated for speed in find_reloads. */
4354 int regno = REGNO (x);
4355 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4356 x = reg_equiv_constant[regno];
4358 /* This creates (subreg (mem...)) which would cause an unnecessary
4359 reload of the mem. */
4360 else if (reg_equiv_mem[regno] != 0)
4361 x = reg_equiv_mem[regno];
4363 else if (reg_equiv_memory_loc[regno]
4364 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4366 rtx mem = make_memloc (x, regno);
4367 if (reg_equiv_address[regno]
4368 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4370 /* If this is not a toplevel operand, find_reloads doesn't see
4371 this substitution. We have to emit a USE of the pseudo so
4372 that delete_output_reload can see it. */
4373 if (replace_reloads && recog_data.operand[opnum] != x)
4374 /* We mark the USE with QImode so that we recognize it
4375 as one that can be safely deleted at the end of
4377 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4380 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4381 opnum, type, ind_levels, insn);
4382 if (address_reloaded)
4383 *address_reloaded = i;
4392 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4393 opnum, type, ind_levels, insn);
4394 if (address_reloaded)
4395 *address_reloaded = i;
4400 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4402 /* Check for SUBREG containing a REG that's equivalent to a constant.
4403 If the constant has a known value, truncate it right now.
4404 Similarly if we are extracting a single-word of a multi-word
4405 constant. If the constant is symbolic, allow it to be substituted
4406 normally. push_reload will strip the subreg later. If the
4407 constant is VOIDmode, abort because we will lose the mode of
4408 the register (this should never happen because one of the cases
4409 above should handle it). */
4411 int regno = REGNO (SUBREG_REG (x));
4414 if (subreg_lowpart_p (x)
4415 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4416 && reg_equiv_constant[regno] != 0
4417 && (tem = gen_lowpart_common (GET_MODE (x),
4418 reg_equiv_constant[regno])) != 0)
4421 if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD
4422 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4423 && reg_equiv_constant[regno] != 0
4424 && (tem = operand_subword (reg_equiv_constant[regno],
4425 SUBREG_BYTE (x) / UNITS_PER_WORD, 0,
4426 GET_MODE (SUBREG_REG (x)))) != 0)
4428 /* TEM is now a word sized constant for the bits from X that
4429 we wanted. However, TEM may be the wrong representation.
4431 Use gen_lowpart_common to convert a CONST_INT into a
4432 CONST_DOUBLE and vice versa as needed according to by the mode
4434 tem = gen_lowpart_common (GET_MODE (x), tem);
4440 /* If the SUBREG is wider than a word, the above test will fail.
4441 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4442 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4443 a 32 bit target. We still can - and have to - handle this
4444 for non-paradoxical subregs of CONST_INTs. */
4445 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4446 && reg_equiv_constant[regno] != 0
4447 && GET_CODE (reg_equiv_constant[regno]) == CONST_INT
4448 && (GET_MODE_SIZE (GET_MODE (x))
4449 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
4451 int shift = SUBREG_BYTE (x) * BITS_PER_UNIT;
4452 if (WORDS_BIG_ENDIAN)
4453 shift = (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))
4454 - GET_MODE_BITSIZE (GET_MODE (x))
4456 /* Here we use the knowledge that CONST_INTs have a
4457 HOST_WIDE_INT field. */
4458 if (shift >= HOST_BITS_PER_WIDE_INT)
4459 shift = HOST_BITS_PER_WIDE_INT - 1;
4460 return GEN_INT (INTVAL (reg_equiv_constant[regno]) >> shift);
4463 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4464 && reg_equiv_constant[regno] != 0
4465 && GET_MODE (reg_equiv_constant[regno]) == VOIDmode)
4468 /* If the subreg contains a reg that will be converted to a mem,
4469 convert the subreg to a narrower memref now.
4470 Otherwise, we would get (subreg (mem ...) ...),
4471 which would force reload of the mem.
4473 We also need to do this if there is an equivalent MEM that is
4474 not offsettable. In that case, alter_subreg would produce an
4475 invalid address on big-endian machines.
4477 For machines that extend byte loads, we must not reload using
4478 a wider mode if we have a paradoxical SUBREG. find_reloads will
4479 force a reload in that case. So we should not do anything here. */
4481 else if (regno >= FIRST_PSEUDO_REGISTER
4482 #ifdef LOAD_EXTEND_OP
4483 && (GET_MODE_SIZE (GET_MODE (x))
4484 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4486 && (reg_equiv_address[regno] != 0
4487 || (reg_equiv_mem[regno] != 0
4488 && (! strict_memory_address_p (GET_MODE (x),
4489 XEXP (reg_equiv_mem[regno], 0))
4490 || ! offsettable_memref_p (reg_equiv_mem[regno])
4491 || num_not_at_initial_offset))))
4492 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4496 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4500 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4501 ind_levels, is_set_dest, insn,
4503 /* If we have replaced a reg with it's equivalent memory loc -
4504 that can still be handled here e.g. if it's in a paradoxical
4505 subreg - we must make the change in a copy, rather than using
4506 a destructive change. This way, find_reloads can still elect
4507 not to do the change. */
4508 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4510 x = shallow_copy_rtx (x);
4513 XEXP (x, i) = new_part;
4519 /* Return a mem ref for the memory equivalent of reg REGNO.
4520 This mem ref is not shared with anything. */
4523 make_memloc (ad, regno)
4527 /* We must rerun eliminate_regs, in case the elimination
4528 offsets have changed. */
4530 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4532 /* If TEM might contain a pseudo, we must copy it to avoid
4533 modifying it when we do the substitution for the reload. */
4534 if (rtx_varies_p (tem, 0))
4535 tem = copy_rtx (tem);
4537 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4538 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4540 /* Copy the result if it's still the same as the equivalence, to avoid
4541 modifying it when we do the substitution for the reload. */
4542 if (tem == reg_equiv_memory_loc[regno])
4543 tem = copy_rtx (tem);
4547 /* Record all reloads needed for handling memory address AD
4548 which appears in *LOC in a memory reference to mode MODE
4549 which itself is found in location *MEMREFLOC.
4550 Note that we take shortcuts assuming that no multi-reg machine mode
4551 occurs as part of an address.
4553 OPNUM and TYPE specify the purpose of this reload.
4555 IND_LEVELS says how many levels of indirect addressing this machine
4558 INSN, if nonzero, is the insn in which we do the reload. It is used
4559 to determine if we may generate output reloads, and where to put USEs
4560 for pseudos that we have to replace with stack slots.
4562 Value is nonzero if this address is reloaded or replaced as a whole.
4563 This is interesting to the caller if the address is an autoincrement.
4565 Note that there is no verification that the address will be valid after
4566 this routine does its work. Instead, we rely on the fact that the address
4567 was valid when reload started. So we need only undo things that reload
4568 could have broken. These are wrong register types, pseudos not allocated
4569 to a hard register, and frame pointer elimination. */
4572 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4573 enum machine_mode mode;
4578 enum reload_type type;
4583 int removed_and = 0;
4586 /* If the address is a register, see if it is a legitimate address and
4587 reload if not. We first handle the cases where we need not reload
4588 or where we must reload in a non-standard way. */
4590 if (GET_CODE (ad) == REG)
4594 /* If the register is equivalent to an invariant expression, substitute
4595 the invariant, and eliminate any eliminable register references. */
4596 tem = reg_equiv_constant[regno];
4598 && (tem = eliminate_regs (tem, mode, insn))
4599 && strict_memory_address_p (mode, tem))
4605 tem = reg_equiv_memory_loc[regno];
4608 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4610 tem = make_memloc (ad, regno);
4611 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4613 find_reloads_address (GET_MODE (tem), (rtx*) 0, XEXP (tem, 0),
4614 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
4617 /* We can avoid a reload if the register's equivalent memory
4618 expression is valid as an indirect memory address.
4619 But not all addresses are valid in a mem used as an indirect
4620 address: only reg or reg+constant. */
4623 && strict_memory_address_p (mode, tem)
4624 && (GET_CODE (XEXP (tem, 0)) == REG
4625 || (GET_CODE (XEXP (tem, 0)) == PLUS
4626 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4627 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4629 /* TEM is not the same as what we'll be replacing the
4630 pseudo with after reload, put a USE in front of INSN
4631 in the final reload pass. */
4633 && num_not_at_initial_offset
4634 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4637 /* We mark the USE with QImode so that we
4638 recognize it as one that can be safely
4639 deleted at the end of reload. */
4640 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4643 /* This doesn't really count as replacing the address
4644 as a whole, since it is still a memory access. */
4652 /* The only remaining case where we can avoid a reload is if this is a
4653 hard register that is valid as a base register and which is not the
4654 subject of a CLOBBER in this insn. */
4656 else if (regno < FIRST_PSEUDO_REGISTER
4657 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4658 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4661 /* If we do not have one of the cases above, we must do the reload. */
4662 push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode),
4663 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4667 if (strict_memory_address_p (mode, ad))
4669 /* The address appears valid, so reloads are not needed.
4670 But the address may contain an eliminable register.
4671 This can happen because a machine with indirect addressing
4672 may consider a pseudo register by itself a valid address even when
4673 it has failed to get a hard reg.
4674 So do a tree-walk to find and eliminate all such regs. */
4676 /* But first quickly dispose of a common case. */
4677 if (GET_CODE (ad) == PLUS
4678 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4679 && GET_CODE (XEXP (ad, 0)) == REG
4680 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4683 subst_reg_equivs_changed = 0;
4684 *loc = subst_reg_equivs (ad, insn);
4686 if (! subst_reg_equivs_changed)
4689 /* Check result for validity after substitution. */
4690 if (strict_memory_address_p (mode, ad))
4694 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4699 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4704 *memrefloc = copy_rtx (*memrefloc);
4705 XEXP (*memrefloc, 0) = ad;
4706 move_replacements (&ad, &XEXP (*memrefloc, 0));
4712 /* The address is not valid. We have to figure out why. First see if
4713 we have an outer AND and remove it if so. Then analyze what's inside. */
4715 if (GET_CODE (ad) == AND)
4718 loc = &XEXP (ad, 0);
4722 /* One possibility for why the address is invalid is that it is itself
4723 a MEM. This can happen when the frame pointer is being eliminated, a
4724 pseudo is not allocated to a hard register, and the offset between the
4725 frame and stack pointers is not its initial value. In that case the
4726 pseudo will have been replaced by a MEM referring to the
4728 if (GET_CODE (ad) == MEM)
4730 /* First ensure that the address in this MEM is valid. Then, unless
4731 indirect addresses are valid, reload the MEM into a register. */
4733 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4734 opnum, ADDR_TYPE (type),
4735 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4737 /* If tem was changed, then we must create a new memory reference to
4738 hold it and store it back into memrefloc. */
4739 if (tem != ad && memrefloc)
4741 *memrefloc = copy_rtx (*memrefloc);
4742 copy_replacements (tem, XEXP (*memrefloc, 0));
4743 loc = &XEXP (*memrefloc, 0);
4745 loc = &XEXP (*loc, 0);
4748 /* Check similar cases as for indirect addresses as above except
4749 that we can allow pseudos and a MEM since they should have been
4750 taken care of above. */
4753 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4754 || GET_CODE (XEXP (tem, 0)) == MEM
4755 || ! (GET_CODE (XEXP (tem, 0)) == REG
4756 || (GET_CODE (XEXP (tem, 0)) == PLUS
4757 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4758 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4760 /* Must use TEM here, not AD, since it is the one that will
4761 have any subexpressions reloaded, if needed. */
4762 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4763 MODE_BASE_REG_CLASS (mode), GET_MODE (tem),
4766 return ! removed_and;
4772 /* If we have address of a stack slot but it's not valid because the
4773 displacement is too large, compute the sum in a register.
4774 Handle all base registers here, not just fp/ap/sp, because on some
4775 targets (namely SH) we can also get too large displacements from
4776 big-endian corrections. */
4777 else if (GET_CODE (ad) == PLUS
4778 && GET_CODE (XEXP (ad, 0)) == REG
4779 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4780 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4781 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4783 /* Unshare the MEM rtx so we can safely alter it. */
4786 *memrefloc = copy_rtx (*memrefloc);
4787 loc = &XEXP (*memrefloc, 0);
4789 loc = &XEXP (*loc, 0);
4792 if (double_reg_address_ok)
4794 /* Unshare the sum as well. */
4795 *loc = ad = copy_rtx (ad);
4797 /* Reload the displacement into an index reg.
4798 We assume the frame pointer or arg pointer is a base reg. */
4799 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4800 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4806 /* If the sum of two regs is not necessarily valid,
4807 reload the sum into a base reg.
4808 That will at least work. */
4809 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4810 Pmode, opnum, type, ind_levels);
4812 return ! removed_and;
4815 /* If we have an indexed stack slot, there are three possible reasons why
4816 it might be invalid: The index might need to be reloaded, the address
4817 might have been made by frame pointer elimination and hence have a
4818 constant out of range, or both reasons might apply.
4820 We can easily check for an index needing reload, but even if that is the
4821 case, we might also have an invalid constant. To avoid making the
4822 conservative assumption and requiring two reloads, we see if this address
4823 is valid when not interpreted strictly. If it is, the only problem is
4824 that the index needs a reload and find_reloads_address_1 will take care
4827 If we decide to do something here, it must be that
4828 `double_reg_address_ok' is true and that this address rtl was made by
4829 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4830 rework the sum so that the reload register will be added to the index.
4831 This is safe because we know the address isn't shared.
4833 We check for fp/ap/sp as both the first and second operand of the
4836 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4837 && GET_CODE (XEXP (ad, 0)) == PLUS
4838 && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx
4839 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4840 || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx
4842 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4843 || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx
4845 || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx)
4846 && ! memory_address_p (mode, ad))
4848 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4849 plus_constant (XEXP (XEXP (ad, 0), 0),
4850 INTVAL (XEXP (ad, 1))),
4851 XEXP (XEXP (ad, 0), 1));
4852 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4853 MODE_BASE_REG_CLASS (mode),
4854 GET_MODE (ad), opnum, type, ind_levels);
4855 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4861 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4862 && GET_CODE (XEXP (ad, 0)) == PLUS
4863 && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx
4864 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4865 || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx
4867 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4868 || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx
4870 || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx)
4871 && ! memory_address_p (mode, ad))
4873 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4874 XEXP (XEXP (ad, 0), 0),
4875 plus_constant (XEXP (XEXP (ad, 0), 1),
4876 INTVAL (XEXP (ad, 1))));
4877 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4878 MODE_BASE_REG_CLASS (mode),
4879 GET_MODE (ad), opnum, type, ind_levels);
4880 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4886 /* See if address becomes valid when an eliminable register
4887 in a sum is replaced. */
4890 if (GET_CODE (ad) == PLUS)
4891 tem = subst_indexed_address (ad);
4892 if (tem != ad && strict_memory_address_p (mode, tem))
4894 /* Ok, we win that way. Replace any additional eliminable
4897 subst_reg_equivs_changed = 0;
4898 tem = subst_reg_equivs (tem, insn);
4900 /* Make sure that didn't make the address invalid again. */
4902 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4909 /* If constants aren't valid addresses, reload the constant address
4911 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4913 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4914 Unshare it so we can safely alter it. */
4915 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4916 && CONSTANT_POOL_ADDRESS_P (ad))
4918 *memrefloc = copy_rtx (*memrefloc);
4919 loc = &XEXP (*memrefloc, 0);
4921 loc = &XEXP (*loc, 0);
4924 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4925 Pmode, opnum, type, ind_levels);
4926 return ! removed_and;
4929 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4933 /* Find all pseudo regs appearing in AD
4934 that are eliminable in favor of equivalent values
4935 and do not have hard regs; replace them by their equivalents.
4936 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4937 front of it for pseudos that we have to replace with stack slots. */
4940 subst_reg_equivs (ad, insn)
4944 RTX_CODE code = GET_CODE (ad);
4963 int regno = REGNO (ad);
4965 if (reg_equiv_constant[regno] != 0)
4967 subst_reg_equivs_changed = 1;
4968 return reg_equiv_constant[regno];
4970 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
4972 rtx mem = make_memloc (ad, regno);
4973 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
4975 subst_reg_equivs_changed = 1;
4976 /* We mark the USE with QImode so that we recognize it
4977 as one that can be safely deleted at the end of
4979 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
4988 /* Quickly dispose of a common case. */
4989 if (XEXP (ad, 0) == frame_pointer_rtx
4990 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4998 fmt = GET_RTX_FORMAT (code);
4999 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5001 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5005 /* Compute the sum of X and Y, making canonicalizations assumed in an
5006 address, namely: sum constant integers, surround the sum of two
5007 constants with a CONST, put the constant as the second operand, and
5008 group the constant on the outermost sum.
5010 This routine assumes both inputs are already in canonical form. */
5017 enum machine_mode mode = GET_MODE (x);
5019 if (mode == VOIDmode)
5020 mode = GET_MODE (y);
5022 if (mode == VOIDmode)
5025 if (GET_CODE (x) == CONST_INT)
5026 return plus_constant (y, INTVAL (x));
5027 else if (GET_CODE (y) == CONST_INT)
5028 return plus_constant (x, INTVAL (y));
5029 else if (CONSTANT_P (x))
5030 tem = x, x = y, y = tem;
5032 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5033 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5035 /* Note that if the operands of Y are specified in the opposite
5036 order in the recursive calls below, infinite recursion will occur. */
5037 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5038 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5040 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5041 constant will have been placed second. */
5042 if (CONSTANT_P (x) && CONSTANT_P (y))
5044 if (GET_CODE (x) == CONST)
5046 if (GET_CODE (y) == CONST)
5049 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5052 return gen_rtx_PLUS (mode, x, y);
5055 /* If ADDR is a sum containing a pseudo register that should be
5056 replaced with a constant (from reg_equiv_constant),
5057 return the result of doing so, and also apply the associative
5058 law so that the result is more likely to be a valid address.
5059 (But it is not guaranteed to be one.)
5061 Note that at most one register is replaced, even if more are
5062 replaceable. Also, we try to put the result into a canonical form
5063 so it is more likely to be a valid address.
5065 In all other cases, return ADDR. */
5068 subst_indexed_address (addr)
5071 rtx op0 = 0, op1 = 0, op2 = 0;
5075 if (GET_CODE (addr) == PLUS)
5077 /* Try to find a register to replace. */
5078 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5079 if (GET_CODE (op0) == REG
5080 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5081 && reg_renumber[regno] < 0
5082 && reg_equiv_constant[regno] != 0)
5083 op0 = reg_equiv_constant[regno];
5084 else if (GET_CODE (op1) == REG
5085 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5086 && reg_renumber[regno] < 0
5087 && reg_equiv_constant[regno] != 0)
5088 op1 = reg_equiv_constant[regno];
5089 else if (GET_CODE (op0) == PLUS
5090 && (tem = subst_indexed_address (op0)) != op0)
5092 else if (GET_CODE (op1) == PLUS
5093 && (tem = subst_indexed_address (op1)) != op1)
5098 /* Pick out up to three things to add. */
5099 if (GET_CODE (op1) == PLUS)
5100 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5101 else if (GET_CODE (op0) == PLUS)
5102 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5104 /* Compute the sum. */
5106 op1 = form_sum (op1, op2);
5108 op0 = form_sum (op0, op1);
5115 /* Update the REG_INC notes for an insn. It updates all REG_INC
5116 notes for the instruction which refer to REGNO the to refer
5117 to the reload number.
5119 INSN is the insn for which any REG_INC notes need updating.
5121 REGNO is the register number which has been reloaded.
5123 RELOADNUM is the reload number. */
5126 update_auto_inc_notes (insn, regno, reloadnum)
5127 rtx insn ATTRIBUTE_UNUSED;
5128 int regno ATTRIBUTE_UNUSED;
5129 int reloadnum ATTRIBUTE_UNUSED;
5134 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5135 if (REG_NOTE_KIND (link) == REG_INC
5136 && REGNO (XEXP (link, 0)) == regno)
5137 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5141 /* Record the pseudo registers we must reload into hard registers in a
5142 subexpression of a would-be memory address, X referring to a value
5143 in mode MODE. (This function is not called if the address we find
5146 CONTEXT = 1 means we are considering regs as index regs,
5147 = 0 means we are considering them as base regs.
5149 OPNUM and TYPE specify the purpose of any reloads made.
5151 IND_LEVELS says how many levels of indirect addressing are
5152 supported at this point in the address.
5154 INSN, if nonzero, is the insn in which we do the reload. It is used
5155 to determine if we may generate output reloads.
5157 We return nonzero if X, as a whole, is reloaded or replaced. */
5159 /* Note that we take shortcuts assuming that no multi-reg machine mode
5160 occurs as part of an address.
5161 Also, this is not fully machine-customizable; it works for machines
5162 such as VAXen and 68000's and 32000's, but other possible machines
5163 could have addressing modes that this does not handle right. */
5166 find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
5167 enum machine_mode mode;
5172 enum reload_type type;
5176 RTX_CODE code = GET_CODE (x);
5182 rtx orig_op0 = XEXP (x, 0);
5183 rtx orig_op1 = XEXP (x, 1);
5184 RTX_CODE code0 = GET_CODE (orig_op0);
5185 RTX_CODE code1 = GET_CODE (orig_op1);
5189 if (GET_CODE (op0) == SUBREG)
5191 op0 = SUBREG_REG (op0);
5192 code0 = GET_CODE (op0);
5193 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5194 op0 = gen_rtx_REG (word_mode,
5196 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5197 GET_MODE (SUBREG_REG (orig_op0)),
5198 SUBREG_BYTE (orig_op0),
5199 GET_MODE (orig_op0))));
5202 if (GET_CODE (op1) == SUBREG)
5204 op1 = SUBREG_REG (op1);
5205 code1 = GET_CODE (op1);
5206 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5207 /* ??? Why is this given op1's mode and above for
5208 ??? op0 SUBREGs we use word_mode? */
5209 op1 = gen_rtx_REG (GET_MODE (op1),
5211 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5212 GET_MODE (SUBREG_REG (orig_op1)),
5213 SUBREG_BYTE (orig_op1),
5214 GET_MODE (orig_op1))));
5217 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5218 || code0 == ZERO_EXTEND || code1 == MEM)
5220 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5221 type, ind_levels, insn);
5222 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5223 type, ind_levels, insn);
5226 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5227 || code1 == ZERO_EXTEND || code0 == MEM)
5229 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5230 type, ind_levels, insn);
5231 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5232 type, ind_levels, insn);
5235 else if (code0 == CONST_INT || code0 == CONST
5236 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5237 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5238 type, ind_levels, insn);
5240 else if (code1 == CONST_INT || code1 == CONST
5241 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5242 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5243 type, ind_levels, insn);
5245 else if (code0 == REG && code1 == REG)
5247 if (REG_OK_FOR_INDEX_P (op0)
5248 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5250 else if (REG_OK_FOR_INDEX_P (op1)
5251 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5253 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5254 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5255 type, ind_levels, insn);
5256 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5257 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5258 type, ind_levels, insn);
5259 else if (REG_OK_FOR_INDEX_P (op1))
5260 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5261 type, ind_levels, insn);
5262 else if (REG_OK_FOR_INDEX_P (op0))
5263 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5264 type, ind_levels, insn);
5267 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5268 type, ind_levels, insn);
5269 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5270 type, ind_levels, insn);
5274 else if (code0 == REG)
5276 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5277 type, ind_levels, insn);
5278 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5279 type, ind_levels, insn);
5282 else if (code1 == REG)
5284 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5285 type, ind_levels, insn);
5286 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5287 type, ind_levels, insn);
5296 rtx op0 = XEXP (x, 0);
5297 rtx op1 = XEXP (x, 1);
5299 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5302 /* Currently, we only support {PRE,POST}_MODIFY constructs
5303 where a base register is {inc,dec}remented by the contents
5304 of another register or by a constant value. Thus, these
5305 operands must match. */
5306 if (op0 != XEXP (op1, 0))
5309 /* Require index register (or constant). Let's just handle the
5310 register case in the meantime... If the target allows
5311 auto-modify by a constant then we could try replacing a pseudo
5312 register with its equivalent constant where applicable. */
5313 if (REG_P (XEXP (op1, 1)))
5314 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5315 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1),
5316 opnum, type, ind_levels, insn);
5318 if (REG_P (XEXP (op1, 0)))
5320 int regno = REGNO (XEXP (op1, 0));
5323 /* A register that is incremented cannot be constant! */
5324 if (regno >= FIRST_PSEUDO_REGISTER
5325 && reg_equiv_constant[regno] != 0)
5328 /* Handle a register that is equivalent to a memory location
5329 which cannot be addressed directly. */
5330 if (reg_equiv_memory_loc[regno] != 0
5331 && (reg_equiv_address[regno] != 0
5332 || num_not_at_initial_offset))
5334 rtx tem = make_memloc (XEXP (x, 0), regno);
5336 if (reg_equiv_address[regno]
5337 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5339 /* First reload the memory location's address.
5340 We can't use ADDR_TYPE (type) here, because we need to
5341 write back the value after reading it, hence we actually
5342 need two registers. */
5343 find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0),
5344 &XEXP (tem, 0), opnum,
5348 /* Then reload the memory location into a base
5350 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5352 MODE_BASE_REG_CLASS (mode),
5353 GET_MODE (x), GET_MODE (x), 0,
5354 0, opnum, RELOAD_OTHER);
5356 update_auto_inc_notes (this_insn, regno, reloadnum);
5361 if (reg_renumber[regno] >= 0)
5362 regno = reg_renumber[regno];
5364 /* We require a base register here... */
5365 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x)))
5367 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5368 &XEXP (op1, 0), &XEXP (x, 0),
5369 MODE_BASE_REG_CLASS (mode),
5370 GET_MODE (x), GET_MODE (x), 0, 0,
5371 opnum, RELOAD_OTHER);
5373 update_auto_inc_notes (this_insn, regno, reloadnum);
5386 if (GET_CODE (XEXP (x, 0)) == REG)
5388 int regno = REGNO (XEXP (x, 0));
5392 /* A register that is incremented cannot be constant! */
5393 if (regno >= FIRST_PSEUDO_REGISTER
5394 && reg_equiv_constant[regno] != 0)
5397 /* Handle a register that is equivalent to a memory location
5398 which cannot be addressed directly. */
5399 if (reg_equiv_memory_loc[regno] != 0
5400 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5402 rtx tem = make_memloc (XEXP (x, 0), regno);
5403 if (reg_equiv_address[regno]
5404 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5406 /* First reload the memory location's address.
5407 We can't use ADDR_TYPE (type) here, because we need to
5408 write back the value after reading it, hence we actually
5409 need two registers. */
5410 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5411 &XEXP (tem, 0), opnum, type,
5413 /* Put this inside a new increment-expression. */
5414 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5415 /* Proceed to reload that, as if it contained a register. */
5419 /* If we have a hard register that is ok as an index,
5420 don't make a reload. If an autoincrement of a nice register
5421 isn't "valid", it must be that no autoincrement is "valid".
5422 If that is true and something made an autoincrement anyway,
5423 this must be a special context where one is allowed.
5424 (For example, a "push" instruction.)
5425 We can't improve this address, so leave it alone. */
5427 /* Otherwise, reload the autoincrement into a suitable hard reg
5428 and record how much to increment by. */
5430 if (reg_renumber[regno] >= 0)
5431 regno = reg_renumber[regno];
5432 if ((regno >= FIRST_PSEUDO_REGISTER
5433 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5434 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5438 /* If we can output the register afterwards, do so, this
5439 saves the extra update.
5440 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5441 CALL_INSN - and it does not set CC0.
5442 But don't do this if we cannot directly address the
5443 memory location, since this will make it harder to
5444 reuse address reloads, and increases register pressure.
5445 Also don't do this if we can probably update x directly. */
5446 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5448 : reg_equiv_mem[regno]);
5449 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5450 if (insn && GET_CODE (insn) == INSN && equiv
5451 && memory_operand (equiv, GET_MODE (equiv))
5453 && ! sets_cc0_p (PATTERN (insn))
5455 && ! (icode != CODE_FOR_nothing
5456 && ((*insn_data[icode].operand[0].predicate)
5458 && ((*insn_data[icode].operand[1].predicate)
5461 /* We use the original pseudo for loc, so that
5462 emit_reload_insns() knows which pseudo this
5463 reload refers to and updates the pseudo rtx, not
5464 its equivalent memory location, as well as the
5465 corresponding entry in reg_last_reload_reg. */
5466 loc = &XEXP (x_orig, 0);
5469 = push_reload (x, x, loc, loc,
5470 (context ? INDEX_REG_CLASS :
5471 MODE_BASE_REG_CLASS (mode)),
5472 GET_MODE (x), GET_MODE (x), 0, 0,
5473 opnum, RELOAD_OTHER);
5478 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5479 (context ? INDEX_REG_CLASS :
5480 MODE_BASE_REG_CLASS (mode)),
5481 GET_MODE (x), GET_MODE (x), 0, 0,
5484 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5489 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5495 else if (GET_CODE (XEXP (x, 0)) == MEM)
5497 /* This is probably the result of a substitution, by eliminate_regs,
5498 of an equivalent address for a pseudo that was not allocated to a
5499 hard register. Verify that the specified address is valid and
5500 reload it into a register. */
5501 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5502 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5506 /* Since we know we are going to reload this item, don't decrement
5507 for the indirection level.
5509 Note that this is actually conservative: it would be slightly
5510 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5512 /* We can't use ADDR_TYPE (type) here, because we need to
5513 write back the value after reading it, hence we actually
5514 need two registers. */
5515 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5516 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5517 opnum, type, ind_levels, insn);
5519 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5520 (context ? INDEX_REG_CLASS :
5521 MODE_BASE_REG_CLASS (mode)),
5522 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5524 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5526 link = FIND_REG_INC_NOTE (this_insn, tem);
5528 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5535 /* This is probably the result of a substitution, by eliminate_regs, of
5536 an equivalent address for a pseudo that was not allocated to a hard
5537 register. Verify that the specified address is valid and reload it
5540 Since we know we are going to reload this item, don't decrement for
5541 the indirection level.
5543 Note that this is actually conservative: it would be slightly more
5544 efficient to use the value of SPILL_INDIRECT_LEVELS from
5547 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5548 opnum, ADDR_TYPE (type), ind_levels, insn);
5549 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5550 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5551 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5556 int regno = REGNO (x);
5558 if (reg_equiv_constant[regno] != 0)
5560 find_reloads_address_part (reg_equiv_constant[regno], loc,
5561 (context ? INDEX_REG_CLASS :
5562 MODE_BASE_REG_CLASS (mode)),
5563 GET_MODE (x), opnum, type, ind_levels);
5567 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5568 that feeds this insn. */
5569 if (reg_equiv_mem[regno] != 0)
5571 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5572 (context ? INDEX_REG_CLASS :
5573 MODE_BASE_REG_CLASS (mode)),
5574 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5579 if (reg_equiv_memory_loc[regno]
5580 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5582 rtx tem = make_memloc (x, regno);
5583 if (reg_equiv_address[regno] != 0
5584 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5587 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5588 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5593 if (reg_renumber[regno] >= 0)
5594 regno = reg_renumber[regno];
5596 if ((regno >= FIRST_PSEUDO_REGISTER
5597 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5598 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5600 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5601 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5602 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5606 /* If a register appearing in an address is the subject of a CLOBBER
5607 in this insn, reload it into some other register to be safe.
5608 The CLOBBER is supposed to make the register unavailable
5609 from before this insn to after it. */
5610 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5612 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5613 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5614 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5621 if (GET_CODE (SUBREG_REG (x)) == REG)
5623 /* If this is a SUBREG of a hard register and the resulting register
5624 is of the wrong class, reload the whole SUBREG. This avoids
5625 needless copies if SUBREG_REG is multi-word. */
5626 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5628 int regno = subreg_regno (x);
5630 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5631 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5633 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5634 (context ? INDEX_REG_CLASS :
5635 MODE_BASE_REG_CLASS (mode)),
5636 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5640 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5641 is larger than the class size, then reload the whole SUBREG. */
5644 enum reg_class class = (context ? INDEX_REG_CLASS
5645 : MODE_BASE_REG_CLASS (mode));
5646 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5647 > reg_class_size[class])
5649 x = find_reloads_subreg_address (x, 0, opnum, type,
5651 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5652 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5664 const char *fmt = GET_RTX_FORMAT (code);
5667 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5670 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5671 opnum, type, ind_levels, insn);
5678 /* X, which is found at *LOC, is a part of an address that needs to be
5679 reloaded into a register of class CLASS. If X is a constant, or if
5680 X is a PLUS that contains a constant, check that the constant is a
5681 legitimate operand and that we are supposed to be able to load
5682 it into the register.
5684 If not, force the constant into memory and reload the MEM instead.
5686 MODE is the mode to use, in case X is an integer constant.
5688 OPNUM and TYPE describe the purpose of any reloads made.
5690 IND_LEVELS says how many levels of indirect addressing this machine
5694 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5697 enum reg_class class;
5698 enum machine_mode mode;
5700 enum reload_type type;
5704 && (! LEGITIMATE_CONSTANT_P (x)
5705 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5709 tem = x = force_const_mem (mode, x);
5710 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5711 opnum, type, ind_levels, 0);
5714 else if (GET_CODE (x) == PLUS
5715 && CONSTANT_P (XEXP (x, 1))
5716 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5717 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5721 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5722 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5723 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5724 opnum, type, ind_levels, 0);
5727 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5728 mode, VOIDmode, 0, 0, opnum, type);
5731 /* X, a subreg of a pseudo, is a part of an address that needs to be
5734 If the pseudo is equivalent to a memory location that cannot be directly
5735 addressed, make the necessary address reloads.
5737 If address reloads have been necessary, or if the address is changed
5738 by register elimination, return the rtx of the memory location;
5739 otherwise, return X.
5741 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5744 OPNUM and TYPE identify the purpose of the reload.
5746 IND_LEVELS says how many levels of indirect addressing are
5747 supported at this point in the address.
5749 INSN, if nonzero, is the insn in which we do the reload. It is used
5750 to determine where to put USEs for pseudos that we have to replace with
5754 find_reloads_subreg_address (x, force_replace, opnum, type,
5759 enum reload_type type;
5763 int regno = REGNO (SUBREG_REG (x));
5765 if (reg_equiv_memory_loc[regno])
5767 /* If the address is not directly addressable, or if the address is not
5768 offsettable, then it must be replaced. */
5770 && (reg_equiv_address[regno]
5771 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5774 if (force_replace || num_not_at_initial_offset)
5776 rtx tem = make_memloc (SUBREG_REG (x), regno);
5778 /* If the address changes because of register elimination, then
5779 it must be replaced. */
5781 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5783 int offset = SUBREG_BYTE (x);
5784 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
5785 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5787 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5788 PUT_MODE (tem, GET_MODE (x));
5790 /* If this was a paradoxical subreg that we replaced, the
5791 resulting memory must be sufficiently aligned to allow
5792 us to widen the mode of the memory. */
5793 if (outer_size > inner_size && STRICT_ALIGNMENT)
5797 base = XEXP (tem, 0);
5798 if (GET_CODE (base) == PLUS)
5800 if (GET_CODE (XEXP (base, 1)) == CONST_INT
5801 && INTVAL (XEXP (base, 1)) % outer_size != 0)
5803 base = XEXP (base, 0);
5805 if (GET_CODE (base) != REG
5806 || (REGNO_POINTER_ALIGN (REGNO (base))
5807 < outer_size * BITS_PER_UNIT))
5811 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5812 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5815 /* If this is not a toplevel operand, find_reloads doesn't see
5816 this substitution. We have to emit a USE of the pseudo so
5817 that delete_output_reload can see it. */
5818 if (replace_reloads && recog_data.operand[opnum] != x)
5819 /* We mark the USE with QImode so that we recognize it
5820 as one that can be safely deleted at the end of
5822 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
5832 /* Substitute into the current INSN the registers into which we have reloaded
5833 the things that need reloading. The array `replacements'
5834 contains the locations of all pointers that must be changed
5835 and says what to replace them with.
5837 Return the rtx that X translates into; usually X, but modified. */
5840 subst_reloads (insn)
5845 for (i = 0; i < n_replacements; i++)
5847 struct replacement *r = &replacements[i];
5848 rtx reloadreg = rld[r->what].reg_rtx;
5851 #ifdef ENABLE_CHECKING
5852 /* Internal consistency test. Check that we don't modify
5853 anything in the equivalence arrays. Whenever something from
5854 those arrays needs to be reloaded, it must be unshared before
5855 being substituted into; the equivalence must not be modified.
5856 Otherwise, if the equivalence is used after that, it will
5857 have been modified, and the thing substituted (probably a
5858 register) is likely overwritten and not a usable equivalence. */
5861 for (check_regno = 0; check_regno < max_regno; check_regno++)
5863 #define CHECK_MODF(ARRAY) \
5864 if (ARRAY[check_regno] \
5865 && loc_mentioned_in_p (r->where, \
5866 ARRAY[check_regno])) \
5869 CHECK_MODF (reg_equiv_constant);
5870 CHECK_MODF (reg_equiv_memory_loc);
5871 CHECK_MODF (reg_equiv_address);
5872 CHECK_MODF (reg_equiv_mem);
5875 #endif /* ENABLE_CHECKING */
5877 /* If we're replacing a LABEL_REF with a register, add a
5878 REG_LABEL note to indicate to flow which label this
5879 register refers to. */
5880 if (GET_CODE (*r->where) == LABEL_REF
5881 && GET_CODE (insn) == JUMP_INSN)
5882 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
5883 XEXP (*r->where, 0),
5886 /* Encapsulate RELOADREG so its machine mode matches what
5887 used to be there. Note that gen_lowpart_common will
5888 do the wrong thing if RELOADREG is multi-word. RELOADREG
5889 will always be a REG here. */
5890 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5891 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5893 /* If we are putting this into a SUBREG and RELOADREG is a
5894 SUBREG, we would be making nested SUBREGs, so we have to fix
5895 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5897 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5899 if (GET_MODE (*r->subreg_loc)
5900 == GET_MODE (SUBREG_REG (reloadreg)))
5901 *r->subreg_loc = SUBREG_REG (reloadreg);
5905 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
5907 /* When working with SUBREGs the rule is that the byte
5908 offset must be a multiple of the SUBREG's mode. */
5909 final_offset = (final_offset /
5910 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5911 final_offset = (final_offset *
5912 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5914 *r->where = SUBREG_REG (reloadreg);
5915 SUBREG_BYTE (*r->subreg_loc) = final_offset;
5919 *r->where = reloadreg;
5921 /* If reload got no reg and isn't optional, something's wrong. */
5922 else if (! rld[r->what].optional)
5927 /* Make a copy of any replacements being done into X and move those
5928 copies to locations in Y, a copy of X. */
5931 copy_replacements (x, y)
5934 /* We can't support X being a SUBREG because we might then need to know its
5935 location if something inside it was replaced. */
5936 if (GET_CODE (x) == SUBREG)
5939 copy_replacements_1 (&x, &y, n_replacements);
5943 copy_replacements_1 (px, py, orig_replacements)
5946 int orig_replacements;
5950 struct replacement *r;
5954 for (j = 0; j < orig_replacements; j++)
5956 if (replacements[j].subreg_loc == px)
5958 r = &replacements[n_replacements++];
5959 r->where = replacements[j].where;
5961 r->what = replacements[j].what;
5962 r->mode = replacements[j].mode;
5964 else if (replacements[j].where == px)
5966 r = &replacements[n_replacements++];
5969 r->what = replacements[j].what;
5970 r->mode = replacements[j].mode;
5976 code = GET_CODE (x);
5977 fmt = GET_RTX_FORMAT (code);
5979 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5982 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
5983 else if (fmt[i] == 'E')
5984 for (j = XVECLEN (x, i); --j >= 0; )
5985 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
5990 /* Change any replacements being done to *X to be done to *Y */
5993 move_replacements (x, y)
5999 for (i = 0; i < n_replacements; i++)
6000 if (replacements[i].subreg_loc == x)
6001 replacements[i].subreg_loc = y;
6002 else if (replacements[i].where == x)
6004 replacements[i].where = y;
6005 replacements[i].subreg_loc = 0;
6009 /* If LOC was scheduled to be replaced by something, return the replacement.
6010 Otherwise, return *LOC. */
6013 find_replacement (loc)
6016 struct replacement *r;
6018 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6020 rtx reloadreg = rld[r->what].reg_rtx;
6022 if (reloadreg && r->where == loc)
6024 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6025 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6029 else if (reloadreg && r->subreg_loc == loc)
6031 /* RELOADREG must be either a REG or a SUBREG.
6033 ??? Is it actually still ever a SUBREG? If so, why? */
6035 if (GET_CODE (reloadreg) == REG)
6036 return gen_rtx_REG (GET_MODE (*loc),
6037 (REGNO (reloadreg) +
6038 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6039 GET_MODE (SUBREG_REG (*loc)),
6042 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6046 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6048 /* When working with SUBREGs the rule is that the byte
6049 offset must be a multiple of the SUBREG's mode. */
6050 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6051 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6052 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6058 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6059 what's inside and make a new rtl if so. */
6060 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6061 || GET_CODE (*loc) == MULT)
6063 rtx x = find_replacement (&XEXP (*loc, 0));
6064 rtx y = find_replacement (&XEXP (*loc, 1));
6066 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6067 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6073 /* Return nonzero if register in range [REGNO, ENDREGNO)
6074 appears either explicitly or implicitly in X
6075 other than being stored into (except for earlyclobber operands).
6077 References contained within the substructure at LOC do not count.
6078 LOC may be zero, meaning don't ignore anything.
6080 This is similar to refers_to_regno_p in rtlanal.c except that we
6081 look at equivalences for pseudos that didn't get hard registers. */
6084 refers_to_regno_for_reload_p (regno, endregno, x, loc)
6085 unsigned int regno, endregno;
6098 code = GET_CODE (x);
6105 /* If this is a pseudo, a hard register must not have been allocated.
6106 X must therefore either be a constant or be in memory. */
6107 if (r >= FIRST_PSEUDO_REGISTER)
6109 if (reg_equiv_memory_loc[r])
6110 return refers_to_regno_for_reload_p (regno, endregno,
6111 reg_equiv_memory_loc[r],
6114 if (reg_equiv_constant[r])
6120 return (endregno > r
6121 && regno < r + (r < FIRST_PSEUDO_REGISTER
6122 ? HARD_REGNO_NREGS (r, GET_MODE (x))
6126 /* If this is a SUBREG of a hard reg, we can see exactly which
6127 registers are being modified. Otherwise, handle normally. */
6128 if (GET_CODE (SUBREG_REG (x)) == REG
6129 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6131 unsigned int inner_regno = subreg_regno (x);
6132 unsigned int inner_endregno
6133 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6134 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6136 return endregno > inner_regno && regno < inner_endregno;
6142 if (&SET_DEST (x) != loc
6143 /* Note setting a SUBREG counts as referring to the REG it is in for
6144 a pseudo but not for hard registers since we can
6145 treat each word individually. */
6146 && ((GET_CODE (SET_DEST (x)) == SUBREG
6147 && loc != &SUBREG_REG (SET_DEST (x))
6148 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
6149 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6150 && refers_to_regno_for_reload_p (regno, endregno,
6151 SUBREG_REG (SET_DEST (x)),
6153 /* If the output is an earlyclobber operand, this is
6155 || ((GET_CODE (SET_DEST (x)) != REG
6156 || earlyclobber_operand_p (SET_DEST (x)))
6157 && refers_to_regno_for_reload_p (regno, endregno,
6158 SET_DEST (x), loc))))
6161 if (code == CLOBBER || loc == &SET_SRC (x))
6170 /* X does not match, so try its subexpressions. */
6172 fmt = GET_RTX_FORMAT (code);
6173 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6175 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6183 if (refers_to_regno_for_reload_p (regno, endregno,
6187 else if (fmt[i] == 'E')
6190 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6191 if (loc != &XVECEXP (x, i, j)
6192 && refers_to_regno_for_reload_p (regno, endregno,
6193 XVECEXP (x, i, j), loc))
6200 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6201 we check if any register number in X conflicts with the relevant register
6202 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6203 contains a MEM (we don't bother checking for memory addresses that can't
6204 conflict because we expect this to be a rare case.
6206 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6207 that we look at equivalences for pseudos that didn't get hard registers. */
6210 reg_overlap_mentioned_for_reload_p (x, in)
6213 int regno, endregno;
6215 /* Overly conservative. */
6216 if (GET_CODE (x) == STRICT_LOW_PART
6217 || GET_RTX_CLASS (GET_CODE (x)) == 'a')
6220 /* If either argument is a constant, then modifying X can not affect IN. */
6221 if (CONSTANT_P (x) || CONSTANT_P (in))
6223 else if (GET_CODE (x) == SUBREG)
6225 regno = REGNO (SUBREG_REG (x));
6226 if (regno < FIRST_PSEUDO_REGISTER)
6227 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6228 GET_MODE (SUBREG_REG (x)),
6232 else if (GET_CODE (x) == REG)
6236 /* If this is a pseudo, it must not have been assigned a hard register.
6237 Therefore, it must either be in memory or be a constant. */
6239 if (regno >= FIRST_PSEUDO_REGISTER)
6241 if (reg_equiv_memory_loc[regno])
6242 return refers_to_mem_for_reload_p (in);
6243 else if (reg_equiv_constant[regno])
6248 else if (GET_CODE (x) == MEM)
6249 return refers_to_mem_for_reload_p (in);
6250 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6251 || GET_CODE (x) == CC0)
6252 return reg_mentioned_p (x, in);
6253 else if (GET_CODE (x) == PLUS)
6254 return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6255 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6259 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6260 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6262 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6265 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6269 refers_to_mem_for_reload_p (x)
6275 if (GET_CODE (x) == MEM)
6278 if (GET_CODE (x) == REG)
6279 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6280 && reg_equiv_memory_loc[REGNO (x)]);
6282 fmt = GET_RTX_FORMAT (GET_CODE (x));
6283 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6285 && (GET_CODE (XEXP (x, i)) == MEM
6286 || refers_to_mem_for_reload_p (XEXP (x, i))))
6292 /* Check the insns before INSN to see if there is a suitable register
6293 containing the same value as GOAL.
6294 If OTHER is -1, look for a register in class CLASS.
6295 Otherwise, just see if register number OTHER shares GOAL's value.
6297 Return an rtx for the register found, or zero if none is found.
6299 If RELOAD_REG_P is (short *)1,
6300 we reject any hard reg that appears in reload_reg_rtx
6301 because such a hard reg is also needed coming into this insn.
6303 If RELOAD_REG_P is any other nonzero value,
6304 it is a vector indexed by hard reg number
6305 and we reject any hard reg whose element in the vector is nonnegative
6306 as well as any that appears in reload_reg_rtx.
6308 If GOAL is zero, then GOALREG is a register number; we look
6309 for an equivalent for that register.
6311 MODE is the machine mode of the value we want an equivalence for.
6312 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6314 This function is used by jump.c as well as in the reload pass.
6316 If GOAL is the sum of the stack pointer and a constant, we treat it
6317 as if it were a constant except that sp is required to be unchanging. */
6320 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
6323 enum reg_class class;
6325 short *reload_reg_p;
6327 enum machine_mode mode;
6330 rtx goaltry, valtry, value, where;
6336 int goal_mem_addr_varies = 0;
6337 int need_stable_sp = 0;
6343 else if (GET_CODE (goal) == REG)
6344 regno = REGNO (goal);
6345 else if (GET_CODE (goal) == MEM)
6347 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6348 if (MEM_VOLATILE_P (goal))
6350 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6352 /* An address with side effects must be reexecuted. */
6367 else if (CONSTANT_P (goal))
6369 else if (GET_CODE (goal) == PLUS
6370 && XEXP (goal, 0) == stack_pointer_rtx
6371 && CONSTANT_P (XEXP (goal, 1)))
6372 goal_const = need_stable_sp = 1;
6373 else if (GET_CODE (goal) == PLUS
6374 && XEXP (goal, 0) == frame_pointer_rtx
6375 && CONSTANT_P (XEXP (goal, 1)))
6380 /* Scan insns back from INSN, looking for one that copies
6381 a value into or out of GOAL.
6382 Stop and give up if we reach a label. */
6387 if (p == 0 || GET_CODE (p) == CODE_LABEL)
6390 if (GET_CODE (p) == INSN
6391 /* If we don't want spill regs ... */
6392 && (! (reload_reg_p != 0
6393 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6394 /* ... then ignore insns introduced by reload; they aren't
6395 useful and can cause results in reload_as_needed to be
6396 different from what they were when calculating the need for
6397 spills. If we notice an input-reload insn here, we will
6398 reject it below, but it might hide a usable equivalent.
6399 That makes bad code. It may even abort: perhaps no reg was
6400 spilled for this insn because it was assumed we would find
6402 || INSN_UID (p) < reload_first_uid))
6405 pat = single_set (p);
6407 /* First check for something that sets some reg equal to GOAL. */
6410 && true_regnum (SET_SRC (pat)) == regno
6411 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6414 && true_regnum (SET_DEST (pat)) == regno
6415 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6417 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6418 /* When looking for stack pointer + const,
6419 make sure we don't use a stack adjust. */
6420 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6421 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6423 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6424 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6426 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6427 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6428 /* If we are looking for a constant,
6429 and something equivalent to that constant was copied
6430 into a reg, we can use that reg. */
6431 || (goal_const && REG_NOTES (p) != 0
6432 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6433 && ((rtx_equal_p (XEXP (tem, 0), goal)
6435 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6436 || (GET_CODE (SET_DEST (pat)) == REG
6437 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6438 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6440 && GET_CODE (goal) == CONST_INT
6442 = operand_subword (XEXP (tem, 0), 0, 0,
6444 && rtx_equal_p (goal, goaltry)
6446 = operand_subword (SET_DEST (pat), 0, 0,
6448 && (valueno = true_regnum (valtry)) >= 0)))
6449 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6451 && GET_CODE (SET_DEST (pat)) == REG
6452 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6453 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6455 && GET_CODE (goal) == CONST_INT
6456 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6458 && rtx_equal_p (goal, goaltry)
6460 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6461 && (valueno = true_regnum (valtry)) >= 0)))
6465 if (valueno != other)
6468 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6474 for (i = HARD_REGNO_NREGS (valueno, mode) - 1; i >= 0; i--)
6475 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6488 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6489 (or copying VALUE into GOAL, if GOAL is also a register).
6490 Now verify that VALUE is really valid. */
6492 /* VALUENO is the register number of VALUE; a hard register. */
6494 /* Don't try to re-use something that is killed in this insn. We want
6495 to be able to trust REG_UNUSED notes. */
6496 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6499 /* If we propose to get the value from the stack pointer or if GOAL is
6500 a MEM based on the stack pointer, we need a stable SP. */
6501 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6502 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6506 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6507 if (GET_MODE (value) != mode)
6510 /* Reject VALUE if it was loaded from GOAL
6511 and is also a register that appears in the address of GOAL. */
6513 if (goal_mem && value == SET_DEST (single_set (where))
6514 && refers_to_regno_for_reload_p (valueno,
6516 + HARD_REGNO_NREGS (valueno, mode)),
6520 /* Reject registers that overlap GOAL. */
6522 if (!goal_mem && !goal_const
6523 && regno + (int) HARD_REGNO_NREGS (regno, mode) > valueno
6524 && regno < valueno + (int) HARD_REGNO_NREGS (valueno, mode))
6527 nregs = HARD_REGNO_NREGS (regno, mode);
6528 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6530 /* Reject VALUE if it is one of the regs reserved for reloads.
6531 Reload1 knows how to reuse them anyway, and it would get
6532 confused if we allocated one without its knowledge.
6533 (Now that insns introduced by reload are ignored above,
6534 this case shouldn't happen, but I'm not positive.) */
6536 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6539 for (i = 0; i < valuenregs; ++i)
6540 if (reload_reg_p[valueno + i] >= 0)
6544 /* Reject VALUE if it is a register being used for an input reload
6545 even if it is not one of those reserved. */
6547 if (reload_reg_p != 0)
6550 for (i = 0; i < n_reloads; i++)
6551 if (rld[i].reg_rtx != 0 && rld[i].in)
6553 int regno1 = REGNO (rld[i].reg_rtx);
6554 int nregs1 = HARD_REGNO_NREGS (regno1,
6555 GET_MODE (rld[i].reg_rtx));
6556 if (regno1 < valueno + valuenregs
6557 && regno1 + nregs1 > valueno)
6563 /* We must treat frame pointer as varying here,
6564 since it can vary--in a nonlocal goto as generated by expand_goto. */
6565 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6567 /* Now verify that the values of GOAL and VALUE remain unaltered
6568 until INSN is reached. */
6577 /* Don't trust the conversion past a function call
6578 if either of the two is in a call-clobbered register, or memory. */
6579 if (GET_CODE (p) == CALL_INSN)
6583 if (goal_mem || need_stable_sp)
6586 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6587 for (i = 0; i < nregs; ++i)
6588 if (call_used_regs[regno + i])
6591 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6592 for (i = 0; i < valuenregs; ++i)
6593 if (call_used_regs[valueno + i])
6595 #ifdef NON_SAVING_SETJMP
6596 if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL))
6605 /* Watch out for unspec_volatile, and volatile asms. */
6606 if (volatile_insn_p (pat))
6609 /* If this insn P stores in either GOAL or VALUE, return 0.
6610 If GOAL is a memory ref and this insn writes memory, return 0.
6611 If GOAL is a memory ref and its address is not constant,
6612 and this insn P changes a register used in GOAL, return 0. */
6614 if (GET_CODE (pat) == COND_EXEC)
6615 pat = COND_EXEC_CODE (pat);
6616 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6618 rtx dest = SET_DEST (pat);
6619 while (GET_CODE (dest) == SUBREG
6620 || GET_CODE (dest) == ZERO_EXTRACT
6621 || GET_CODE (dest) == SIGN_EXTRACT
6622 || GET_CODE (dest) == STRICT_LOW_PART)
6623 dest = XEXP (dest, 0);
6624 if (GET_CODE (dest) == REG)
6626 int xregno = REGNO (dest);
6628 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6629 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6632 if (xregno < regno + nregs && xregno + xnregs > regno)
6634 if (xregno < valueno + valuenregs
6635 && xregno + xnregs > valueno)
6637 if (goal_mem_addr_varies
6638 && reg_overlap_mentioned_for_reload_p (dest, goal))
6640 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6643 else if (goal_mem && GET_CODE (dest) == MEM
6644 && ! push_operand (dest, GET_MODE (dest)))
6646 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6647 && reg_equiv_memory_loc[regno] != 0)
6649 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6652 else if (GET_CODE (pat) == PARALLEL)
6655 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6657 rtx v1 = XVECEXP (pat, 0, i);
6658 if (GET_CODE (v1) == COND_EXEC)
6659 v1 = COND_EXEC_CODE (v1);
6660 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6662 rtx dest = SET_DEST (v1);
6663 while (GET_CODE (dest) == SUBREG
6664 || GET_CODE (dest) == ZERO_EXTRACT
6665 || GET_CODE (dest) == SIGN_EXTRACT
6666 || GET_CODE (dest) == STRICT_LOW_PART)
6667 dest = XEXP (dest, 0);
6668 if (GET_CODE (dest) == REG)
6670 int xregno = REGNO (dest);
6672 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6673 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6676 if (xregno < regno + nregs
6677 && xregno + xnregs > regno)
6679 if (xregno < valueno + valuenregs
6680 && xregno + xnregs > valueno)
6682 if (goal_mem_addr_varies
6683 && reg_overlap_mentioned_for_reload_p (dest,
6686 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6689 else if (goal_mem && GET_CODE (dest) == MEM
6690 && ! push_operand (dest, GET_MODE (dest)))
6692 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6693 && reg_equiv_memory_loc[regno] != 0)
6695 else if (need_stable_sp
6696 && push_operand (dest, GET_MODE (dest)))
6702 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6706 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6707 link = XEXP (link, 1))
6709 pat = XEXP (link, 0);
6710 if (GET_CODE (pat) == CLOBBER)
6712 rtx dest = SET_DEST (pat);
6714 if (GET_CODE (dest) == REG)
6716 int xregno = REGNO (dest);
6718 = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6720 if (xregno < regno + nregs
6721 && xregno + xnregs > regno)
6723 else if (xregno < valueno + valuenregs
6724 && xregno + xnregs > valueno)
6726 else if (goal_mem_addr_varies
6727 && reg_overlap_mentioned_for_reload_p (dest,
6732 else if (goal_mem && GET_CODE (dest) == MEM
6733 && ! push_operand (dest, GET_MODE (dest)))
6735 else if (need_stable_sp
6736 && push_operand (dest, GET_MODE (dest)))
6743 /* If this insn auto-increments or auto-decrements
6744 either regno or valueno, return 0 now.
6745 If GOAL is a memory ref and its address is not constant,
6746 and this insn P increments a register used in GOAL, return 0. */
6750 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6751 if (REG_NOTE_KIND (link) == REG_INC
6752 && GET_CODE (XEXP (link, 0)) == REG)
6754 int incno = REGNO (XEXP (link, 0));
6755 if (incno < regno + nregs && incno >= regno)
6757 if (incno < valueno + valuenregs && incno >= valueno)
6759 if (goal_mem_addr_varies
6760 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6770 /* Find a place where INCED appears in an increment or decrement operator
6771 within X, and return the amount INCED is incremented or decremented by.
6772 The value is always positive. */
6775 find_inc_amount (x, inced)
6778 enum rtx_code code = GET_CODE (x);
6784 rtx addr = XEXP (x, 0);
6785 if ((GET_CODE (addr) == PRE_DEC
6786 || GET_CODE (addr) == POST_DEC
6787 || GET_CODE (addr) == PRE_INC
6788 || GET_CODE (addr) == POST_INC)
6789 && XEXP (addr, 0) == inced)
6790 return GET_MODE_SIZE (GET_MODE (x));
6791 else if ((GET_CODE (addr) == PRE_MODIFY
6792 || GET_CODE (addr) == POST_MODIFY)
6793 && GET_CODE (XEXP (addr, 1)) == PLUS
6794 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
6795 && XEXP (addr, 0) == inced
6796 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
6798 i = INTVAL (XEXP (XEXP (addr, 1), 1));
6799 return i < 0 ? -i : i;
6803 fmt = GET_RTX_FORMAT (code);
6804 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6808 int tem = find_inc_amount (XEXP (x, i), inced);
6815 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6817 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6827 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6828 If SETS is nonzero, also consider SETs. */
6831 regno_clobbered_p (regno, insn, mode, sets)
6834 enum machine_mode mode;
6837 unsigned int nregs = HARD_REGNO_NREGS (regno, mode);
6838 unsigned int endregno = regno + nregs;
6840 if ((GET_CODE (PATTERN (insn)) == CLOBBER
6841 || (sets && GET_CODE (PATTERN (insn)) == SET))
6842 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6844 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
6846 return test >= regno && test < endregno;
6849 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6851 int i = XVECLEN (PATTERN (insn), 0) - 1;
6855 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6856 if ((GET_CODE (elt) == CLOBBER
6857 || (sets && GET_CODE (PATTERN (insn)) == SET))
6858 && GET_CODE (XEXP (elt, 0)) == REG)
6860 unsigned int test = REGNO (XEXP (elt, 0));
6862 if (test >= regno && test < endregno)
6871 static const char *const reload_when_needed_name[] =
6874 "RELOAD_FOR_OUTPUT",
6876 "RELOAD_FOR_INPUT_ADDRESS",
6877 "RELOAD_FOR_INPADDR_ADDRESS",
6878 "RELOAD_FOR_OUTPUT_ADDRESS",
6879 "RELOAD_FOR_OUTADDR_ADDRESS",
6880 "RELOAD_FOR_OPERAND_ADDRESS",
6881 "RELOAD_FOR_OPADDR_ADDR",
6883 "RELOAD_FOR_OTHER_ADDRESS"
6886 static const char * const reg_class_names[] = REG_CLASS_NAMES;
6888 /* These functions are used to print the variables set by 'find_reloads' */
6891 debug_reload_to_stream (f)
6899 for (r = 0; r < n_reloads; r++)
6901 fprintf (f, "Reload %d: ", r);
6905 fprintf (f, "reload_in (%s) = ",
6906 GET_MODE_NAME (rld[r].inmode));
6907 print_inline_rtx (f, rld[r].in, 24);
6908 fprintf (f, "\n\t");
6911 if (rld[r].out != 0)
6913 fprintf (f, "reload_out (%s) = ",
6914 GET_MODE_NAME (rld[r].outmode));
6915 print_inline_rtx (f, rld[r].out, 24);
6916 fprintf (f, "\n\t");
6919 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
6921 fprintf (f, "%s (opnum = %d)",
6922 reload_when_needed_name[(int) rld[r].when_needed],
6925 if (rld[r].optional)
6926 fprintf (f, ", optional");
6928 if (rld[r].nongroup)
6929 fprintf (f, ", nongroup");
6931 if (rld[r].inc != 0)
6932 fprintf (f, ", inc by %d", rld[r].inc);
6934 if (rld[r].nocombine)
6935 fprintf (f, ", can't combine");
6937 if (rld[r].secondary_p)
6938 fprintf (f, ", secondary_reload_p");
6940 if (rld[r].in_reg != 0)
6942 fprintf (f, "\n\treload_in_reg: ");
6943 print_inline_rtx (f, rld[r].in_reg, 24);
6946 if (rld[r].out_reg != 0)
6948 fprintf (f, "\n\treload_out_reg: ");
6949 print_inline_rtx (f, rld[r].out_reg, 24);
6952 if (rld[r].reg_rtx != 0)
6954 fprintf (f, "\n\treload_reg_rtx: ");
6955 print_inline_rtx (f, rld[r].reg_rtx, 24);
6959 if (rld[r].secondary_in_reload != -1)
6961 fprintf (f, "%ssecondary_in_reload = %d",
6962 prefix, rld[r].secondary_in_reload);
6966 if (rld[r].secondary_out_reload != -1)
6967 fprintf (f, "%ssecondary_out_reload = %d\n",
6968 prefix, rld[r].secondary_out_reload);
6971 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
6973 fprintf (f, "%ssecondary_in_icode = %s", prefix,
6974 insn_data[rld[r].secondary_in_icode].name);
6978 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
6979 fprintf (f, "%ssecondary_out_icode = %s", prefix,
6980 insn_data[rld[r].secondary_out_icode].name);
6989 debug_reload_to_stream (stderr);