1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* This file contains subroutines used only from the file reload1.c.
23 It knows how to scan one insn for operands and values
24 that need to be copied into registers to make valid code.
25 It also finds other operands and values which are valid
26 but for which equivalent values in registers exist and
27 ought to be used instead.
29 Before processing the first insn of the function, call `init_reload'.
31 To scan an insn, call `find_reloads'. This does two things:
32 1. sets up tables describing which values must be reloaded
33 for this insn, and what kind of hard regs they must be reloaded into;
34 2. optionally record the locations where those values appear in
35 the data, so they can be replaced properly later.
36 This is done only if the second arg to `find_reloads' is nonzero.
38 The third arg to `find_reloads' specifies the number of levels
39 of indirect addressing supported by the machine. If it is zero,
40 indirect addressing is not valid. If it is one, (MEM (REG n))
41 is valid even if (REG n) did not get a hard register; if it is two,
42 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
43 hard register, and similarly for higher values.
45 Then you must choose the hard regs to reload those pseudo regs into,
46 and generate appropriate load insns before this insn and perhaps
47 also store insns after this insn. Set up the array `reload_reg_rtx'
48 to contain the REG rtx's for the registers you used. In some
49 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
50 for certain reloads. Then that tells you which register to use,
51 so you do not need to allocate one. But you still do need to add extra
52 instructions to copy the value into and out of that register.
54 Finally you must call `subst_reloads' to substitute the reload reg rtx's
55 into the locations already recorded.
59 find_reloads can alter the operands of the instruction it is called on.
61 1. Two operands of any sort may be interchanged, if they are in a
62 commutative instruction.
63 This happens only if find_reloads thinks the instruction will compile
66 2. Pseudo-registers that are equivalent to constants are replaced
67 with those constants if they are not in hard registers.
69 1 happens every time find_reloads is called.
70 2 happens only when REPLACE is 1, which is only when
71 actually doing the reloads, not when just counting them.
73 Using a reload register for several reloads in one insn:
75 When an insn has reloads, it is considered as having three parts:
76 the input reloads, the insn itself after reloading, and the output reloads.
77 Reloads of values used in memory addresses are often needed for only one part.
79 When this is so, reload_when_needed records which part needs the reload.
80 Two reloads for different parts of the insn can share the same reload
83 When a reload is used for addresses in multiple parts, or when it is
84 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
85 a register with any other reload. */
93 #include "insn-config.h"
99 #include "hard-reg-set.h"
103 #include "function.h"
106 #ifndef REGISTER_MOVE_COST
107 #define REGISTER_MOVE_COST(m, x, y) 2
110 #ifndef REGNO_MODE_OK_FOR_BASE_P
111 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
114 #ifndef REG_MODE_OK_FOR_BASE_P
115 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
118 /* All reloads of the current insn are recorded here. See reload.h for
121 struct reload rld[MAX_RELOADS];
123 /* All the "earlyclobber" operands of the current insn
124 are recorded here. */
126 rtx reload_earlyclobbers[MAX_RECOG_OPERANDS];
128 int reload_n_operands;
130 /* Replacing reloads.
132 If `replace_reloads' is nonzero, then as each reload is recorded
133 an entry is made for it in the table `replacements'.
134 Then later `subst_reloads' can look through that table and
135 perform all the replacements needed. */
137 /* Nonzero means record the places to replace. */
138 static int replace_reloads;
140 /* Each replacement is recorded with a structure like this. */
143 rtx *where; /* Location to store in */
144 rtx *subreg_loc; /* Location of SUBREG if WHERE is inside
145 a SUBREG; 0 otherwise. */
146 int what; /* which reload this is for */
147 enum machine_mode mode; /* mode it must have */
150 static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)];
152 /* Number of replacements currently recorded. */
153 static int n_replacements;
155 /* Used to track what is modified by an operand. */
158 int reg_flag; /* Nonzero if referencing a register. */
159 int safe; /* Nonzero if this can't conflict with anything. */
160 rtx base; /* Base address for MEM. */
161 HOST_WIDE_INT start; /* Starting offset or register number. */
162 HOST_WIDE_INT end; /* Ending offset or register number. */
165 #ifdef SECONDARY_MEMORY_NEEDED
167 /* Save MEMs needed to copy from one class of registers to another. One MEM
168 is used per mode, but normally only one or two modes are ever used.
170 We keep two versions, before and after register elimination. The one
171 after register elimination is record separately for each operand. This
172 is done in case the address is not valid to be sure that we separately
175 static rtx secondary_memlocs[NUM_MACHINE_MODES];
176 static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS];
179 /* The instruction we are doing reloads for;
180 so we can test whether a register dies in it. */
181 static rtx this_insn;
183 /* Nonzero if this instruction is a user-specified asm with operands. */
184 static int this_insn_is_asm;
186 /* If hard_regs_live_known is nonzero,
187 we can tell which hard regs are currently live,
188 at least enough to succeed in choosing dummy reloads. */
189 static int hard_regs_live_known;
191 /* Indexed by hard reg number,
192 element is nonnegative if hard reg has been spilled.
193 This vector is passed to `find_reloads' as an argument
194 and is not changed here. */
195 static short *static_reload_reg_p;
197 /* Set to 1 in subst_reg_equivs if it changes anything. */
198 static int subst_reg_equivs_changed;
200 /* On return from push_reload, holds the reload-number for the OUT
201 operand, which can be different for that from the input operand. */
202 static int output_reloadnum;
204 /* Compare two RTX's. */
205 #define MATCHES(x, y) \
206 (x == y || (x != 0 && (GET_CODE (x) == REG \
207 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
208 : rtx_equal_p (x, y) && ! side_effects_p (x))))
210 /* Indicates if two reloads purposes are for similar enough things that we
211 can merge their reloads. */
212 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
213 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
214 || ((when1) == (when2) && (op1) == (op2)) \
215 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
216 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
217 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
218 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
219 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
221 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
222 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
223 ((when1) != (when2) \
224 || ! ((op1) == (op2) \
225 || (when1) == RELOAD_FOR_INPUT \
226 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
227 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
229 /* If we are going to reload an address, compute the reload type to
231 #define ADDR_TYPE(type) \
232 ((type) == RELOAD_FOR_INPUT_ADDRESS \
233 ? RELOAD_FOR_INPADDR_ADDRESS \
234 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
235 ? RELOAD_FOR_OUTADDR_ADDRESS \
238 #ifdef HAVE_SECONDARY_RELOADS
239 static int push_secondary_reload PARAMS ((int, rtx, int, int, enum reg_class,
240 enum machine_mode, enum reload_type,
243 static enum reg_class find_valid_class PARAMS ((enum machine_mode, int,
245 static int reload_inner_reg_of_subreg PARAMS ((rtx, enum machine_mode, int));
246 static void push_replacement PARAMS ((rtx *, int, enum machine_mode));
247 static void dup_replacements PARAMS ((rtx *, rtx *));
248 static void combine_reloads PARAMS ((void));
249 static int find_reusable_reload PARAMS ((rtx *, rtx, enum reg_class,
250 enum reload_type, int, int));
251 static rtx find_dummy_reload PARAMS ((rtx, rtx, rtx *, rtx *,
252 enum machine_mode, enum machine_mode,
253 enum reg_class, int, int));
254 static int hard_reg_set_here_p PARAMS ((unsigned int, unsigned int, rtx));
255 static struct decomposition decompose PARAMS ((rtx));
256 static int immune_p PARAMS ((rtx, rtx, struct decomposition));
257 static int alternative_allows_memconst PARAMS ((const char *, int));
258 static rtx find_reloads_toplev PARAMS ((rtx, int, enum reload_type, int,
260 static rtx make_memloc PARAMS ((rtx, int));
261 static int maybe_memory_address_p PARAMS ((enum machine_mode, rtx, rtx *));
262 static int find_reloads_address PARAMS ((enum machine_mode, rtx *, rtx, rtx *,
263 int, enum reload_type, int, rtx));
264 static rtx subst_reg_equivs PARAMS ((rtx, rtx));
265 static rtx subst_indexed_address PARAMS ((rtx));
266 static void update_auto_inc_notes PARAMS ((rtx, int, int));
267 static int find_reloads_address_1 PARAMS ((enum machine_mode, rtx, int, rtx *,
268 int, enum reload_type,int, rtx));
269 static void find_reloads_address_part PARAMS ((rtx, rtx *, enum reg_class,
270 enum machine_mode, int,
271 enum reload_type, int));
272 static rtx find_reloads_subreg_address PARAMS ((rtx, int, int,
273 enum reload_type, int, rtx));
274 static void copy_replacements_1 PARAMS ((rtx *, rtx *, int));
275 static int find_inc_amount PARAMS ((rtx, rtx));
277 #ifdef HAVE_SECONDARY_RELOADS
279 /* Determine if any secondary reloads are needed for loading (if IN_P is
280 nonzero) or storing (if IN_P is zero) X to or from a reload register of
281 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
282 are needed, push them.
284 Return the reload number of the secondary reload we made, or -1 if
285 we didn't need one. *PICODE is set to the insn_code to use if we do
286 need a secondary reload. */
289 push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode,
295 enum reg_class reload_class;
296 enum machine_mode reload_mode;
297 enum reload_type type;
298 enum insn_code *picode;
300 enum reg_class class = NO_REGS;
301 enum machine_mode mode = reload_mode;
302 enum insn_code icode = CODE_FOR_nothing;
303 enum reg_class t_class = NO_REGS;
304 enum machine_mode t_mode = VOIDmode;
305 enum insn_code t_icode = CODE_FOR_nothing;
306 enum reload_type secondary_type;
307 int s_reload, t_reload = -1;
309 if (type == RELOAD_FOR_INPUT_ADDRESS
310 || type == RELOAD_FOR_OUTPUT_ADDRESS
311 || type == RELOAD_FOR_INPADDR_ADDRESS
312 || type == RELOAD_FOR_OUTADDR_ADDRESS)
313 secondary_type = type;
315 secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS;
317 *picode = CODE_FOR_nothing;
319 /* If X is a paradoxical SUBREG, use the inner value to determine both the
320 mode and object being reloaded. */
321 if (GET_CODE (x) == SUBREG
322 && (GET_MODE_SIZE (GET_MODE (x))
323 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))))
326 reload_mode = GET_MODE (x);
329 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
330 is still a pseudo-register by now, it *must* have an equivalent MEM
331 but we don't want to assume that), use that equivalent when seeing if
332 a secondary reload is needed since whether or not a reload is needed
333 might be sensitive to the form of the MEM. */
335 if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER
336 && reg_equiv_mem[REGNO (x)] != 0)
337 x = reg_equiv_mem[REGNO (x)];
339 #ifdef SECONDARY_INPUT_RELOAD_CLASS
341 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x);
344 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
346 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x);
349 /* If we don't need any secondary registers, done. */
350 if (class == NO_REGS)
353 /* Get a possible insn to use. If the predicate doesn't accept X, don't
356 icode = (in_p ? reload_in_optab[(int) reload_mode]
357 : reload_out_optab[(int) reload_mode]);
359 if (icode != CODE_FOR_nothing
360 && insn_data[(int) icode].operand[in_p].predicate
361 && (! (insn_data[(int) icode].operand[in_p].predicate) (x, reload_mode)))
362 icode = CODE_FOR_nothing;
364 /* If we will be using an insn, see if it can directly handle the reload
365 register we will be using. If it can, the secondary reload is for a
366 scratch register. If it can't, we will use the secondary reload for
367 an intermediate register and require a tertiary reload for the scratch
370 if (icode != CODE_FOR_nothing)
372 /* If IN_P is nonzero, the reload register will be the output in
373 operand 0. If IN_P is zero, the reload register will be the input
374 in operand 1. Outputs should have an initial "=", which we must
377 enum reg_class insn_class;
379 if (insn_data[(int) icode].operand[!in_p].constraint[0] == 0)
380 insn_class = ALL_REGS;
384 = insn_data[(int) icode].operand[!in_p].constraint[in_p];
386 = (insn_letter == 'r' ? GENERAL_REGS
387 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter));
389 if (insn_class == NO_REGS)
392 && insn_data[(int) icode].operand[!in_p].constraint[0] != '=')
396 /* The scratch register's constraint must start with "=&". */
397 if (insn_data[(int) icode].operand[2].constraint[0] != '='
398 || insn_data[(int) icode].operand[2].constraint[1] != '&')
401 if (reg_class_subset_p (reload_class, insn_class))
402 mode = insn_data[(int) icode].operand[2].mode;
405 char t_letter = insn_data[(int) icode].operand[2].constraint[2];
407 t_mode = insn_data[(int) icode].operand[2].mode;
408 t_class = (t_letter == 'r' ? GENERAL_REGS
409 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter));
411 icode = CODE_FOR_nothing;
415 /* This case isn't valid, so fail. Reload is allowed to use the same
416 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
417 in the case of a secondary register, we actually need two different
418 registers for correct code. We fail here to prevent the possibility of
419 silently generating incorrect code later.
421 The convention is that secondary input reloads are valid only if the
422 secondary_class is different from class. If you have such a case, you
423 can not use secondary reloads, you must work around the problem some
426 Allow this when a reload_in/out pattern is being used. I.e. assume
427 that the generated code handles this case. */
429 if (in_p && class == reload_class && icode == CODE_FOR_nothing
430 && t_icode == CODE_FOR_nothing)
433 /* If we need a tertiary reload, see if we have one we can reuse or else
436 if (t_class != NO_REGS)
438 for (t_reload = 0; t_reload < n_reloads; t_reload++)
439 if (rld[t_reload].secondary_p
440 && (reg_class_subset_p (t_class, rld[t_reload].class)
441 || reg_class_subset_p (rld[t_reload].class, t_class))
442 && ((in_p && rld[t_reload].inmode == t_mode)
443 || (! in_p && rld[t_reload].outmode == t_mode))
444 && ((in_p && (rld[t_reload].secondary_in_icode
445 == CODE_FOR_nothing))
446 || (! in_p &&(rld[t_reload].secondary_out_icode
447 == CODE_FOR_nothing)))
448 && (reg_class_size[(int) t_class] == 1 || SMALL_REGISTER_CLASSES)
449 && MERGABLE_RELOADS (secondary_type,
450 rld[t_reload].when_needed,
451 opnum, rld[t_reload].opnum))
454 rld[t_reload].inmode = t_mode;
456 rld[t_reload].outmode = t_mode;
458 if (reg_class_subset_p (t_class, rld[t_reload].class))
459 rld[t_reload].class = t_class;
461 rld[t_reload].opnum = MIN (rld[t_reload].opnum, opnum);
462 rld[t_reload].optional &= optional;
463 rld[t_reload].secondary_p = 1;
464 if (MERGE_TO_OTHER (secondary_type, rld[t_reload].when_needed,
465 opnum, rld[t_reload].opnum))
466 rld[t_reload].when_needed = RELOAD_OTHER;
469 if (t_reload == n_reloads)
471 /* We need to make a new tertiary reload for this register class. */
472 rld[t_reload].in = rld[t_reload].out = 0;
473 rld[t_reload].class = t_class;
474 rld[t_reload].inmode = in_p ? t_mode : VOIDmode;
475 rld[t_reload].outmode = ! in_p ? t_mode : VOIDmode;
476 rld[t_reload].reg_rtx = 0;
477 rld[t_reload].optional = optional;
478 rld[t_reload].inc = 0;
479 /* Maybe we could combine these, but it seems too tricky. */
480 rld[t_reload].nocombine = 1;
481 rld[t_reload].in_reg = 0;
482 rld[t_reload].out_reg = 0;
483 rld[t_reload].opnum = opnum;
484 rld[t_reload].when_needed = secondary_type;
485 rld[t_reload].secondary_in_reload = -1;
486 rld[t_reload].secondary_out_reload = -1;
487 rld[t_reload].secondary_in_icode = CODE_FOR_nothing;
488 rld[t_reload].secondary_out_icode = CODE_FOR_nothing;
489 rld[t_reload].secondary_p = 1;
495 /* See if we can reuse an existing secondary reload. */
496 for (s_reload = 0; s_reload < n_reloads; s_reload++)
497 if (rld[s_reload].secondary_p
498 && (reg_class_subset_p (class, rld[s_reload].class)
499 || reg_class_subset_p (rld[s_reload].class, class))
500 && ((in_p && rld[s_reload].inmode == mode)
501 || (! in_p && rld[s_reload].outmode == mode))
502 && ((in_p && rld[s_reload].secondary_in_reload == t_reload)
503 || (! in_p && rld[s_reload].secondary_out_reload == t_reload))
504 && ((in_p && rld[s_reload].secondary_in_icode == t_icode)
505 || (! in_p && rld[s_reload].secondary_out_icode == t_icode))
506 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
507 && MERGABLE_RELOADS (secondary_type, rld[s_reload].when_needed,
508 opnum, rld[s_reload].opnum))
511 rld[s_reload].inmode = mode;
513 rld[s_reload].outmode = mode;
515 if (reg_class_subset_p (class, rld[s_reload].class))
516 rld[s_reload].class = class;
518 rld[s_reload].opnum = MIN (rld[s_reload].opnum, opnum);
519 rld[s_reload].optional &= optional;
520 rld[s_reload].secondary_p = 1;
521 if (MERGE_TO_OTHER (secondary_type, rld[s_reload].when_needed,
522 opnum, rld[s_reload].opnum))
523 rld[s_reload].when_needed = RELOAD_OTHER;
526 if (s_reload == n_reloads)
528 #ifdef SECONDARY_MEMORY_NEEDED
529 /* If we need a memory location to copy between the two reload regs,
530 set it up now. Note that we do the input case before making
531 the reload and the output case after. This is due to the
532 way reloads are output. */
534 if (in_p && icode == CODE_FOR_nothing
535 && SECONDARY_MEMORY_NEEDED (class, reload_class, mode))
537 get_secondary_mem (x, reload_mode, opnum, type);
539 /* We may have just added new reloads. Make sure we add
540 the new reload at the end. */
541 s_reload = n_reloads;
545 /* We need to make a new secondary reload for this register class. */
546 rld[s_reload].in = rld[s_reload].out = 0;
547 rld[s_reload].class = class;
549 rld[s_reload].inmode = in_p ? mode : VOIDmode;
550 rld[s_reload].outmode = ! in_p ? mode : VOIDmode;
551 rld[s_reload].reg_rtx = 0;
552 rld[s_reload].optional = optional;
553 rld[s_reload].inc = 0;
554 /* Maybe we could combine these, but it seems too tricky. */
555 rld[s_reload].nocombine = 1;
556 rld[s_reload].in_reg = 0;
557 rld[s_reload].out_reg = 0;
558 rld[s_reload].opnum = opnum;
559 rld[s_reload].when_needed = secondary_type;
560 rld[s_reload].secondary_in_reload = in_p ? t_reload : -1;
561 rld[s_reload].secondary_out_reload = ! in_p ? t_reload : -1;
562 rld[s_reload].secondary_in_icode = in_p ? t_icode : CODE_FOR_nothing;
563 rld[s_reload].secondary_out_icode
564 = ! in_p ? t_icode : CODE_FOR_nothing;
565 rld[s_reload].secondary_p = 1;
569 #ifdef SECONDARY_MEMORY_NEEDED
570 if (! in_p && icode == CODE_FOR_nothing
571 && SECONDARY_MEMORY_NEEDED (reload_class, class, mode))
572 get_secondary_mem (x, mode, opnum, type);
579 #endif /* HAVE_SECONDARY_RELOADS */
581 #ifdef SECONDARY_MEMORY_NEEDED
583 /* Return a memory location that will be used to copy X in mode MODE.
584 If we haven't already made a location for this mode in this insn,
585 call find_reloads_address on the location being returned. */
588 get_secondary_mem (x, mode, opnum, type)
589 rtx x ATTRIBUTE_UNUSED;
590 enum machine_mode mode;
592 enum reload_type type;
597 /* By default, if MODE is narrower than a word, widen it to a word.
598 This is required because most machines that require these memory
599 locations do not support short load and stores from all registers
600 (e.g., FP registers). */
602 #ifdef SECONDARY_MEMORY_NEEDED_MODE
603 mode = SECONDARY_MEMORY_NEEDED_MODE (mode);
605 if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD && INTEGRAL_MODE_P (mode))
606 mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0);
609 /* If we already have made a MEM for this operand in MODE, return it. */
610 if (secondary_memlocs_elim[(int) mode][opnum] != 0)
611 return secondary_memlocs_elim[(int) mode][opnum];
613 /* If this is the first time we've tried to get a MEM for this mode,
614 allocate a new one. `something_changed' in reload will get set
615 by noticing that the frame size has changed. */
617 if (secondary_memlocs[(int) mode] == 0)
619 #ifdef SECONDARY_MEMORY_NEEDED_RTX
620 secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode);
622 secondary_memlocs[(int) mode]
623 = assign_stack_local (mode, GET_MODE_SIZE (mode), 0);
627 /* Get a version of the address doing any eliminations needed. If that
628 didn't give us a new MEM, make a new one if it isn't valid. */
630 loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX);
631 mem_valid = strict_memory_address_p (mode, XEXP (loc, 0));
633 if (! mem_valid && loc == secondary_memlocs[(int) mode])
634 loc = copy_rtx (loc);
636 /* The only time the call below will do anything is if the stack
637 offset is too large. In that case IND_LEVELS doesn't matter, so we
638 can just pass a zero. Adjust the type to be the address of the
639 corresponding object. If the address was valid, save the eliminated
640 address. If it wasn't valid, we need to make a reload each time, so
645 type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS
646 : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS
649 find_reloads_address (mode, &loc, XEXP (loc, 0), &XEXP (loc, 0),
653 secondary_memlocs_elim[(int) mode][opnum] = loc;
657 /* Clear any secondary memory locations we've made. */
660 clear_secondary_mem ()
662 memset ((char *) secondary_memlocs, 0, sizeof secondary_memlocs);
664 #endif /* SECONDARY_MEMORY_NEEDED */
666 /* Find the largest class for which every register number plus N is valid in
667 M1 (if in range) and is cheap to move into REGNO.
668 Abort if no such class exists. */
670 static enum reg_class
671 find_valid_class (m1, n, dest_regno)
672 enum machine_mode m1 ATTRIBUTE_UNUSED;
674 unsigned int dest_regno;
679 enum reg_class best_class = NO_REGS;
680 enum reg_class dest_class = REGNO_REG_CLASS (dest_regno);
681 unsigned int best_size = 0;
684 for (class = 1; class < N_REG_CLASSES; class++)
687 for (regno = 0; regno < FIRST_PSEUDO_REGISTER && ! bad; regno++)
688 if (TEST_HARD_REG_BIT (reg_class_contents[class], regno)
689 && TEST_HARD_REG_BIT (reg_class_contents[class], regno + n)
690 && ! HARD_REGNO_MODE_OK (regno + n, m1))
695 cost = REGISTER_MOVE_COST (m1, class, dest_class);
697 if ((reg_class_size[class] > best_size
698 && (best_cost < 0 || best_cost >= cost))
702 best_size = reg_class_size[class];
703 best_cost = REGISTER_MOVE_COST (m1, class, dest_class);
713 /* Return the number of a previously made reload that can be combined with
714 a new one, or n_reloads if none of the existing reloads can be used.
715 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
716 push_reload, they determine the kind of the new reload that we try to
717 combine. P_IN points to the corresponding value of IN, which can be
718 modified by this function.
719 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
722 find_reusable_reload (p_in, out, class, type, opnum, dont_share)
724 enum reg_class class;
725 enum reload_type type;
726 int opnum, dont_share;
730 /* We can't merge two reloads if the output of either one is
733 if (earlyclobber_operand_p (out))
736 /* We can use an existing reload if the class is right
737 and at least one of IN and OUT is a match
738 and the other is at worst neutral.
739 (A zero compared against anything is neutral.)
741 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
742 for the same thing since that can cause us to need more reload registers
743 than we otherwise would. */
745 for (i = 0; i < n_reloads; i++)
746 if ((reg_class_subset_p (class, rld[i].class)
747 || reg_class_subset_p (rld[i].class, class))
748 /* If the existing reload has a register, it must fit our class. */
749 && (rld[i].reg_rtx == 0
750 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
751 true_regnum (rld[i].reg_rtx)))
752 && ((in != 0 && MATCHES (rld[i].in, in) && ! dont_share
753 && (out == 0 || rld[i].out == 0 || MATCHES (rld[i].out, out)))
754 || (out != 0 && MATCHES (rld[i].out, out)
755 && (in == 0 || rld[i].in == 0 || MATCHES (rld[i].in, in))))
756 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
757 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
758 && MERGABLE_RELOADS (type, rld[i].when_needed, opnum, rld[i].opnum))
761 /* Reloading a plain reg for input can match a reload to postincrement
762 that reg, since the postincrement's value is the right value.
763 Likewise, it can match a preincrement reload, since we regard
764 the preincrementation as happening before any ref in this insn
766 for (i = 0; i < n_reloads; i++)
767 if ((reg_class_subset_p (class, rld[i].class)
768 || reg_class_subset_p (rld[i].class, class))
769 /* If the existing reload has a register, it must fit our
771 && (rld[i].reg_rtx == 0
772 || TEST_HARD_REG_BIT (reg_class_contents[(int) class],
773 true_regnum (rld[i].reg_rtx)))
774 && out == 0 && rld[i].out == 0 && rld[i].in != 0
775 && ((GET_CODE (in) == REG
776 && GET_RTX_CLASS (GET_CODE (rld[i].in)) == 'a'
777 && MATCHES (XEXP (rld[i].in, 0), in))
778 || (GET_CODE (rld[i].in) == REG
779 && GET_RTX_CLASS (GET_CODE (in)) == 'a'
780 && MATCHES (XEXP (in, 0), rld[i].in)))
781 && (rld[i].out == 0 || ! earlyclobber_operand_p (rld[i].out))
782 && (reg_class_size[(int) class] == 1 || SMALL_REGISTER_CLASSES)
783 && MERGABLE_RELOADS (type, rld[i].when_needed,
784 opnum, rld[i].opnum))
786 /* Make sure reload_in ultimately has the increment,
787 not the plain register. */
788 if (GET_CODE (in) == REG)
795 /* Return nonzero if X is a SUBREG which will require reloading of its
796 SUBREG_REG expression. */
799 reload_inner_reg_of_subreg (x, mode, output)
801 enum machine_mode mode;
806 /* Only SUBREGs are problematical. */
807 if (GET_CODE (x) != SUBREG)
810 inner = SUBREG_REG (x);
812 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
813 if (CONSTANT_P (inner) || GET_CODE (inner) == PLUS)
816 /* If INNER is not a hard register, then INNER will not need to
818 if (GET_CODE (inner) != REG
819 || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
822 if (!subreg_offset_representable_p
823 (REGNO (SUBREG_REG (x)),
824 GET_MODE (SUBREG_REG (x)),
829 /* If INNER is not ok for MODE, then INNER will need reloading. */
830 if (! HARD_REGNO_MODE_OK (subreg_regno (x), mode))
833 /* If the outer part is a word or smaller, INNER larger than a
834 word and the number of regs for INNER is not the same as the
835 number of words in INNER, then INNER will need reloading. */
836 return (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
838 && GET_MODE_SIZE (GET_MODE (inner)) > UNITS_PER_WORD
839 && ((GET_MODE_SIZE (GET_MODE (inner)) / UNITS_PER_WORD)
840 != (int) HARD_REGNO_NREGS (REGNO (inner), GET_MODE (inner))));
843 /* Record one reload that needs to be performed.
844 IN is an rtx saying where the data are to be found before this instruction.
845 OUT says where they must be stored after the instruction.
846 (IN is zero for data not read, and OUT is zero for data not written.)
847 INLOC and OUTLOC point to the places in the instructions where
848 IN and OUT were found.
849 If IN and OUT are both nonzero, it means the same register must be used
850 to reload both IN and OUT.
852 CLASS is a register class required for the reloaded data.
853 INMODE is the machine mode that the instruction requires
854 for the reg that replaces IN and OUTMODE is likewise for OUT.
856 If IN is zero, then OUT's location and mode should be passed as
859 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
861 OPTIONAL nonzero means this reload does not need to be performed:
862 it can be discarded if that is more convenient.
864 OPNUM and TYPE say what the purpose of this reload is.
866 The return value is the reload-number for this reload.
868 If both IN and OUT are nonzero, in some rare cases we might
869 want to make two separate reloads. (Actually we never do this now.)
870 Therefore, the reload-number for OUT is stored in
871 output_reloadnum when we return; the return value applies to IN.
872 Usually (presently always), when IN and OUT are nonzero,
873 the two reload-numbers are equal, but the caller should be careful to
877 push_reload (in, out, inloc, outloc, class,
878 inmode, outmode, strict_low, optional, opnum, type)
881 enum reg_class class;
882 enum machine_mode inmode, outmode;
886 enum reload_type type;
890 int dont_remove_subreg = 0;
891 rtx *in_subreg_loc = 0, *out_subreg_loc = 0;
892 int secondary_in_reload = -1, secondary_out_reload = -1;
893 enum insn_code secondary_in_icode = CODE_FOR_nothing;
894 enum insn_code secondary_out_icode = CODE_FOR_nothing;
896 /* INMODE and/or OUTMODE could be VOIDmode if no mode
897 has been specified for the operand. In that case,
898 use the operand's mode as the mode to reload. */
899 if (inmode == VOIDmode && in != 0)
900 inmode = GET_MODE (in);
901 if (outmode == VOIDmode && out != 0)
902 outmode = GET_MODE (out);
904 /* If IN is a pseudo register everywhere-equivalent to a constant, and
905 it is not in a hard register, reload straight from the constant,
906 since we want to get rid of such pseudo registers.
907 Often this is done earlier, but not always in find_reloads_address. */
908 if (in != 0 && GET_CODE (in) == REG)
910 int regno = REGNO (in);
912 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
913 && reg_equiv_constant[regno] != 0)
914 in = reg_equiv_constant[regno];
917 /* Likewise for OUT. Of course, OUT will never be equivalent to
918 an actual constant, but it might be equivalent to a memory location
919 (in the case of a parameter). */
920 if (out != 0 && GET_CODE (out) == REG)
922 int regno = REGNO (out);
924 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
925 && reg_equiv_constant[regno] != 0)
926 out = reg_equiv_constant[regno];
929 /* If we have a read-write operand with an address side-effect,
930 change either IN or OUT so the side-effect happens only once. */
931 if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out))
932 switch (GET_CODE (XEXP (in, 0)))
934 case POST_INC: case POST_DEC: case POST_MODIFY:
935 in = replace_equiv_address_nv (in, XEXP (XEXP (in, 0), 0));
938 case PRE_INC: case PRE_DEC: case PRE_MODIFY:
939 out = replace_equiv_address_nv (out, XEXP (XEXP (out, 0), 0));
946 /* If we are reloading a (SUBREG constant ...), really reload just the
947 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
948 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
949 a pseudo and hence will become a MEM) with M1 wider than M2 and the
950 register is a pseudo, also reload the inside expression.
951 For machines that extend byte loads, do this for any SUBREG of a pseudo
952 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
953 M2 is an integral mode that gets extended when loaded.
954 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
955 either M1 is not valid for R or M2 is wider than a word but we only
956 need one word to store an M2-sized quantity in R.
957 (However, if OUT is nonzero, we need to reload the reg *and*
958 the subreg, so do nothing here, and let following statement handle it.)
960 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
961 we can't handle it here because CONST_INT does not indicate a mode.
963 Similarly, we must reload the inside expression if we have a
964 STRICT_LOW_PART (presumably, in == out in the cas).
966 Also reload the inner expression if it does not require a secondary
967 reload but the SUBREG does.
969 Finally, reload the inner expression if it is a register that is in
970 the class whose registers cannot be referenced in a different size
971 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
972 cannot reload just the inside since we might end up with the wrong
973 register class. But if it is inside a STRICT_LOW_PART, we have
974 no choice, so we hope we do get the right register class there. */
976 if (in != 0 && GET_CODE (in) == SUBREG
977 && (subreg_lowpart_p (in) || strict_low)
978 #ifdef CANNOT_CHANGE_MODE_CLASS
979 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in)), inmode, class)
981 && (CONSTANT_P (SUBREG_REG (in))
982 || GET_CODE (SUBREG_REG (in)) == PLUS
984 || (((GET_CODE (SUBREG_REG (in)) == REG
985 && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER)
986 || GET_CODE (SUBREG_REG (in)) == MEM)
987 && ((GET_MODE_SIZE (inmode)
988 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
989 #ifdef LOAD_EXTEND_OP
990 || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
991 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
993 && (GET_MODE_SIZE (inmode)
994 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
995 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in)))
996 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL)
998 #ifdef WORD_REGISTER_OPERATIONS
999 || ((GET_MODE_SIZE (inmode)
1000 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))))
1001 && ((GET_MODE_SIZE (inmode) - 1) / UNITS_PER_WORD ==
1002 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) - 1)
1006 || (GET_CODE (SUBREG_REG (in)) == REG
1007 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1008 /* The case where out is nonzero
1009 is handled differently in the following statement. */
1010 && (out == 0 || subreg_lowpart_p (in))
1011 && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD
1012 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1014 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1016 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)),
1017 GET_MODE (SUBREG_REG (in)))))
1018 || ! HARD_REGNO_MODE_OK (subreg_regno (in), inmode)))
1019 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1020 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS
1021 && (SECONDARY_INPUT_RELOAD_CLASS (class,
1022 GET_MODE (SUBREG_REG (in)),
1026 #ifdef CANNOT_CHANGE_MODE_CLASS
1027 || (GET_CODE (SUBREG_REG (in)) == REG
1028 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1029 && REG_CANNOT_CHANGE_MODE_P
1030 (REGNO (SUBREG_REG (in)), GET_MODE (SUBREG_REG (in)), inmode))
1034 in_subreg_loc = inloc;
1035 inloc = &SUBREG_REG (in);
1037 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1038 if (GET_CODE (in) == MEM)
1039 /* This is supposed to happen only for paradoxical subregs made by
1040 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1041 if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode))
1044 inmode = GET_MODE (in);
1047 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1048 either M1 is not valid for R or M2 is wider than a word but we only
1049 need one word to store an M2-sized quantity in R.
1051 However, we must reload the inner reg *as well as* the subreg in
1054 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1055 code above. This can happen if SUBREG_BYTE != 0. */
1057 if (in != 0 && reload_inner_reg_of_subreg (in, inmode, 0))
1059 enum reg_class in_class = class;
1061 if (GET_CODE (SUBREG_REG (in)) == REG)
1063 = find_valid_class (inmode,
1064 subreg_regno_offset (REGNO (SUBREG_REG (in)),
1065 GET_MODE (SUBREG_REG (in)),
1068 REGNO (SUBREG_REG (in)));
1070 /* This relies on the fact that emit_reload_insns outputs the
1071 instructions for input reloads of type RELOAD_OTHER in the same
1072 order as the reloads. Thus if the outer reload is also of type
1073 RELOAD_OTHER, we are guaranteed that this inner reload will be
1074 output before the outer reload. */
1075 push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), (rtx *) 0,
1076 in_class, VOIDmode, VOIDmode, 0, 0, opnum, type);
1077 dont_remove_subreg = 1;
1080 /* Similarly for paradoxical and problematical SUBREGs on the output.
1081 Note that there is no reason we need worry about the previous value
1082 of SUBREG_REG (out); even if wider than out,
1083 storing in a subreg is entitled to clobber it all
1084 (except in the case of STRICT_LOW_PART,
1085 and in that case the constraint should label it input-output.) */
1086 if (out != 0 && GET_CODE (out) == SUBREG
1087 && (subreg_lowpart_p (out) || strict_low)
1088 #ifdef CANNOT_CHANGE_MODE_CLASS
1089 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out)), outmode, class)
1091 && (CONSTANT_P (SUBREG_REG (out))
1093 || (((GET_CODE (SUBREG_REG (out)) == REG
1094 && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER)
1095 || GET_CODE (SUBREG_REG (out)) == MEM)
1096 && ((GET_MODE_SIZE (outmode)
1097 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1098 #ifdef WORD_REGISTER_OPERATIONS
1099 || ((GET_MODE_SIZE (outmode)
1100 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))))
1101 && ((GET_MODE_SIZE (outmode) - 1) / UNITS_PER_WORD ==
1102 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) - 1)
1106 || (GET_CODE (SUBREG_REG (out)) == REG
1107 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1108 && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD
1109 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1111 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))
1113 != (int) HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)),
1114 GET_MODE (SUBREG_REG (out)))))
1115 || ! HARD_REGNO_MODE_OK (subreg_regno (out), outmode)))
1116 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1117 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS
1118 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1119 GET_MODE (SUBREG_REG (out)),
1123 #ifdef CANNOT_CHANGE_MODE_CLASS
1124 || (GET_CODE (SUBREG_REG (out)) == REG
1125 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1126 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out)),
1127 GET_MODE (SUBREG_REG (out)),
1132 out_subreg_loc = outloc;
1133 outloc = &SUBREG_REG (out);
1135 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1136 if (GET_CODE (out) == MEM
1137 && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode))
1140 outmode = GET_MODE (out);
1143 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1144 either M1 is not valid for R or M2 is wider than a word but we only
1145 need one word to store an M2-sized quantity in R.
1147 However, we must reload the inner reg *as well as* the subreg in
1148 that case. In this case, the inner reg is an in-out reload. */
1150 if (out != 0 && reload_inner_reg_of_subreg (out, outmode, 1))
1152 /* This relies on the fact that emit_reload_insns outputs the
1153 instructions for output reloads of type RELOAD_OTHER in reverse
1154 order of the reloads. Thus if the outer reload is also of type
1155 RELOAD_OTHER, we are guaranteed that this inner reload will be
1156 output after the outer reload. */
1157 dont_remove_subreg = 1;
1158 push_reload (SUBREG_REG (out), SUBREG_REG (out), &SUBREG_REG (out),
1160 find_valid_class (outmode,
1161 subreg_regno_offset (REGNO (SUBREG_REG (out)),
1162 GET_MODE (SUBREG_REG (out)),
1165 REGNO (SUBREG_REG (out))),
1166 VOIDmode, VOIDmode, 0, 0,
1167 opnum, RELOAD_OTHER);
1170 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1171 if (in != 0 && out != 0 && GET_CODE (out) == MEM
1172 && (GET_CODE (in) == REG || GET_CODE (in) == MEM)
1173 && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0)))
1176 /* If IN is a SUBREG of a hard register, make a new REG. This
1177 simplifies some of the cases below. */
1179 if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG
1180 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER
1181 && ! dont_remove_subreg)
1182 in = gen_rtx_REG (GET_MODE (in), subreg_regno (in));
1184 /* Similarly for OUT. */
1185 if (out != 0 && GET_CODE (out) == SUBREG
1186 && GET_CODE (SUBREG_REG (out)) == REG
1187 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER
1188 && ! dont_remove_subreg)
1189 out = gen_rtx_REG (GET_MODE (out), subreg_regno (out));
1191 /* Narrow down the class of register wanted if that is
1192 desirable on this machine for efficiency. */
1194 class = PREFERRED_RELOAD_CLASS (in, class);
1196 /* Output reloads may need analogous treatment, different in detail. */
1197 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1199 class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class);
1202 /* Make sure we use a class that can handle the actual pseudo
1203 inside any subreg. For example, on the 386, QImode regs
1204 can appear within SImode subregs. Although GENERAL_REGS
1205 can handle SImode, QImode needs a smaller class. */
1206 #ifdef LIMIT_RELOAD_CLASS
1208 class = LIMIT_RELOAD_CLASS (inmode, class);
1209 else if (in != 0 && GET_CODE (in) == SUBREG)
1210 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class);
1213 class = LIMIT_RELOAD_CLASS (outmode, class);
1214 if (out != 0 && GET_CODE (out) == SUBREG)
1215 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class);
1218 /* Verify that this class is at least possible for the mode that
1220 if (this_insn_is_asm)
1222 enum machine_mode mode;
1223 if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode))
1227 if (mode == VOIDmode)
1229 error_for_asm (this_insn, "cannot reload integer constant operand in `asm'");
1234 outmode = word_mode;
1236 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1237 if (HARD_REGNO_MODE_OK (i, mode)
1238 && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i))
1240 int nregs = HARD_REGNO_NREGS (i, mode);
1243 for (j = 1; j < nregs; j++)
1244 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j))
1249 if (i == FIRST_PSEUDO_REGISTER)
1251 error_for_asm (this_insn, "impossible register constraint in `asm'");
1256 /* Optional output reloads are always OK even if we have no register class,
1257 since the function of these reloads is only to have spill_reg_store etc.
1258 set, so that the storing insn can be deleted later. */
1259 if (class == NO_REGS
1260 && (optional == 0 || type != RELOAD_FOR_OUTPUT))
1263 i = find_reusable_reload (&in, out, class, type, opnum, dont_share);
1267 /* See if we need a secondary reload register to move between CLASS
1268 and IN or CLASS and OUT. Get the icode and push any required reloads
1269 needed for each of them if so. */
1271 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1274 = push_secondary_reload (1, in, opnum, optional, class, inmode, type,
1275 &secondary_in_icode);
1278 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1279 if (out != 0 && GET_CODE (out) != SCRATCH)
1280 secondary_out_reload
1281 = push_secondary_reload (0, out, opnum, optional, class, outmode,
1282 type, &secondary_out_icode);
1285 /* We found no existing reload suitable for re-use.
1286 So add an additional reload. */
1288 #ifdef SECONDARY_MEMORY_NEEDED
1289 /* If a memory location is needed for the copy, make one. */
1290 if (in != 0 && (GET_CODE (in) == REG || GET_CODE (in) == SUBREG)
1291 && reg_or_subregno (in) < FIRST_PSEUDO_REGISTER
1292 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in)),
1294 get_secondary_mem (in, inmode, opnum, type);
1300 rld[i].class = class;
1301 rld[i].inmode = inmode;
1302 rld[i].outmode = outmode;
1304 rld[i].optional = optional;
1306 rld[i].nocombine = 0;
1307 rld[i].in_reg = inloc ? *inloc : 0;
1308 rld[i].out_reg = outloc ? *outloc : 0;
1309 rld[i].opnum = opnum;
1310 rld[i].when_needed = type;
1311 rld[i].secondary_in_reload = secondary_in_reload;
1312 rld[i].secondary_out_reload = secondary_out_reload;
1313 rld[i].secondary_in_icode = secondary_in_icode;
1314 rld[i].secondary_out_icode = secondary_out_icode;
1315 rld[i].secondary_p = 0;
1319 #ifdef SECONDARY_MEMORY_NEEDED
1320 if (out != 0 && (GET_CODE (out) == REG || GET_CODE (out) == SUBREG)
1321 && reg_or_subregno (out) < FIRST_PSEUDO_REGISTER
1322 && SECONDARY_MEMORY_NEEDED (class,
1323 REGNO_REG_CLASS (reg_or_subregno (out)),
1325 get_secondary_mem (out, outmode, opnum, type);
1330 /* We are reusing an existing reload,
1331 but we may have additional information for it.
1332 For example, we may now have both IN and OUT
1333 while the old one may have just one of them. */
1335 /* The modes can be different. If they are, we want to reload in
1336 the larger mode, so that the value is valid for both modes. */
1337 if (inmode != VOIDmode
1338 && GET_MODE_SIZE (inmode) > GET_MODE_SIZE (rld[i].inmode))
1339 rld[i].inmode = inmode;
1340 if (outmode != VOIDmode
1341 && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (rld[i].outmode))
1342 rld[i].outmode = outmode;
1345 rtx in_reg = inloc ? *inloc : 0;
1346 /* If we merge reloads for two distinct rtl expressions that
1347 are identical in content, there might be duplicate address
1348 reloads. Remove the extra set now, so that if we later find
1349 that we can inherit this reload, we can get rid of the
1350 address reloads altogether.
1352 Do not do this if both reloads are optional since the result
1353 would be an optional reload which could potentially leave
1354 unresolved address replacements.
1356 It is not sufficient to call transfer_replacements since
1357 choose_reload_regs will remove the replacements for address
1358 reloads of inherited reloads which results in the same
1360 if (rld[i].in != in && rtx_equal_p (in, rld[i].in)
1361 && ! (rld[i].optional && optional))
1363 /* We must keep the address reload with the lower operand
1365 if (opnum > rld[i].opnum)
1367 remove_address_replacements (in);
1369 in_reg = rld[i].in_reg;
1372 remove_address_replacements (rld[i].in);
1375 rld[i].in_reg = in_reg;
1380 rld[i].out_reg = outloc ? *outloc : 0;
1382 if (reg_class_subset_p (class, rld[i].class))
1383 rld[i].class = class;
1384 rld[i].optional &= optional;
1385 if (MERGE_TO_OTHER (type, rld[i].when_needed,
1386 opnum, rld[i].opnum))
1387 rld[i].when_needed = RELOAD_OTHER;
1388 rld[i].opnum = MIN (rld[i].opnum, opnum);
1391 /* If the ostensible rtx being reloaded differs from the rtx found
1392 in the location to substitute, this reload is not safe to combine
1393 because we cannot reliably tell whether it appears in the insn. */
1395 if (in != 0 && in != *inloc)
1396 rld[i].nocombine = 1;
1399 /* This was replaced by changes in find_reloads_address_1 and the new
1400 function inc_for_reload, which go with a new meaning of reload_inc. */
1402 /* If this is an IN/OUT reload in an insn that sets the CC,
1403 it must be for an autoincrement. It doesn't work to store
1404 the incremented value after the insn because that would clobber the CC.
1405 So we must do the increment of the value reloaded from,
1406 increment it, store it back, then decrement again. */
1407 if (out != 0 && sets_cc0_p (PATTERN (this_insn)))
1411 rld[i].inc = find_inc_amount (PATTERN (this_insn), in);
1412 /* If we did not find a nonzero amount-to-increment-by,
1413 that contradicts the belief that IN is being incremented
1414 in an address in this insn. */
1415 if (rld[i].inc == 0)
1420 /* If we will replace IN and OUT with the reload-reg,
1421 record where they are located so that substitution need
1422 not do a tree walk. */
1424 if (replace_reloads)
1428 struct replacement *r = &replacements[n_replacements++];
1430 r->subreg_loc = in_subreg_loc;
1434 if (outloc != 0 && outloc != inloc)
1436 struct replacement *r = &replacements[n_replacements++];
1439 r->subreg_loc = out_subreg_loc;
1444 /* If this reload is just being introduced and it has both
1445 an incoming quantity and an outgoing quantity that are
1446 supposed to be made to match, see if either one of the two
1447 can serve as the place to reload into.
1449 If one of them is acceptable, set rld[i].reg_rtx
1452 if (in != 0 && out != 0 && in != out && rld[i].reg_rtx == 0)
1454 rld[i].reg_rtx = find_dummy_reload (in, out, inloc, outloc,
1457 earlyclobber_operand_p (out));
1459 /* If the outgoing register already contains the same value
1460 as the incoming one, we can dispense with loading it.
1461 The easiest way to tell the caller that is to give a phony
1462 value for the incoming operand (same as outgoing one). */
1463 if (rld[i].reg_rtx == out
1464 && (GET_CODE (in) == REG || CONSTANT_P (in))
1465 && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out),
1466 static_reload_reg_p, i, inmode))
1470 /* If this is an input reload and the operand contains a register that
1471 dies in this insn and is used nowhere else, see if it is the right class
1472 to be used for this reload. Use it if so. (This occurs most commonly
1473 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1474 this if it is also an output reload that mentions the register unless
1475 the output is a SUBREG that clobbers an entire register.
1477 Note that the operand might be one of the spill regs, if it is a
1478 pseudo reg and we are in a block where spilling has not taken place.
1479 But if there is no spilling in this block, that is OK.
1480 An explicitly used hard reg cannot be a spill reg. */
1482 if (rld[i].reg_rtx == 0 && in != 0)
1486 enum machine_mode rel_mode = inmode;
1488 if (out && GET_MODE_SIZE (outmode) > GET_MODE_SIZE (inmode))
1491 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1492 if (REG_NOTE_KIND (note) == REG_DEAD
1493 && GET_CODE (XEXP (note, 0)) == REG
1494 && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER
1495 && reg_mentioned_p (XEXP (note, 0), in)
1496 && ! refers_to_regno_for_reload_p (regno,
1498 + HARD_REGNO_NREGS (regno,
1500 PATTERN (this_insn), inloc)
1501 /* If this is also an output reload, IN cannot be used as
1502 the reload register if it is set in this insn unless IN
1504 && (out == 0 || in == out
1505 || ! hard_reg_set_here_p (regno,
1507 + HARD_REGNO_NREGS (regno,
1509 PATTERN (this_insn)))
1510 /* ??? Why is this code so different from the previous?
1511 Is there any simple coherent way to describe the two together?
1512 What's going on here. */
1514 || (GET_CODE (in) == SUBREG
1515 && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1))
1517 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))
1518 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))))
1519 /* Make sure the operand fits in the reg that dies. */
1520 && (GET_MODE_SIZE (rel_mode)
1521 <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))))
1522 && HARD_REGNO_MODE_OK (regno, inmode)
1523 && HARD_REGNO_MODE_OK (regno, outmode))
1526 unsigned int nregs = MAX (HARD_REGNO_NREGS (regno, inmode),
1527 HARD_REGNO_NREGS (regno, outmode));
1529 for (offs = 0; offs < nregs; offs++)
1530 if (fixed_regs[regno + offs]
1531 || ! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1537 rld[i].reg_rtx = gen_rtx_REG (rel_mode, regno);
1544 output_reloadnum = i;
1549 /* Record an additional place we must replace a value
1550 for which we have already recorded a reload.
1551 RELOADNUM is the value returned by push_reload
1552 when the reload was recorded.
1553 This is used in insn patterns that use match_dup. */
1556 push_replacement (loc, reloadnum, mode)
1559 enum machine_mode mode;
1561 if (replace_reloads)
1563 struct replacement *r = &replacements[n_replacements++];
1564 r->what = reloadnum;
1571 /* Duplicate any replacement we have recorded to apply at
1572 location ORIG_LOC to also be performed at DUP_LOC.
1573 This is used in insn patterns that use match_dup. */
1576 dup_replacements (dup_loc, orig_loc)
1580 int i, n = n_replacements;
1582 for (i = 0; i < n; i++)
1584 struct replacement *r = &replacements[i];
1585 if (r->where == orig_loc)
1586 push_replacement (dup_loc, r->what, r->mode);
1590 /* Transfer all replacements that used to be in reload FROM to be in
1594 transfer_replacements (to, from)
1599 for (i = 0; i < n_replacements; i++)
1600 if (replacements[i].what == from)
1601 replacements[i].what = to;
1604 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1605 or a subpart of it. If we have any replacements registered for IN_RTX,
1606 cancel the reloads that were supposed to load them.
1607 Return nonzero if we canceled any reloads. */
1609 remove_address_replacements (in_rtx)
1613 char reload_flags[MAX_RELOADS];
1614 int something_changed = 0;
1616 memset (reload_flags, 0, sizeof reload_flags);
1617 for (i = 0, j = 0; i < n_replacements; i++)
1619 if (loc_mentioned_in_p (replacements[i].where, in_rtx))
1620 reload_flags[replacements[i].what] |= 1;
1623 replacements[j++] = replacements[i];
1624 reload_flags[replacements[i].what] |= 2;
1627 /* Note that the following store must be done before the recursive calls. */
1630 for (i = n_reloads - 1; i >= 0; i--)
1632 if (reload_flags[i] == 1)
1634 deallocate_reload_reg (i);
1635 remove_address_replacements (rld[i].in);
1637 something_changed = 1;
1640 return something_changed;
1643 /* If there is only one output reload, and it is not for an earlyclobber
1644 operand, try to combine it with a (logically unrelated) input reload
1645 to reduce the number of reload registers needed.
1647 This is safe if the input reload does not appear in
1648 the value being output-reloaded, because this implies
1649 it is not needed any more once the original insn completes.
1651 If that doesn't work, see we can use any of the registers that
1652 die in this insn as a reload register. We can if it is of the right
1653 class and does not appear in the value being output-reloaded. */
1659 int output_reload = -1;
1660 int secondary_out = -1;
1663 /* Find the output reload; return unless there is exactly one
1664 and that one is mandatory. */
1666 for (i = 0; i < n_reloads; i++)
1667 if (rld[i].out != 0)
1669 if (output_reload >= 0)
1674 if (output_reload < 0 || rld[output_reload].optional)
1677 /* An input-output reload isn't combinable. */
1679 if (rld[output_reload].in != 0)
1682 /* If this reload is for an earlyclobber operand, we can't do anything. */
1683 if (earlyclobber_operand_p (rld[output_reload].out))
1686 /* If there is a reload for part of the address of this operand, we would
1687 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1688 its life to the point where doing this combine would not lower the
1689 number of spill registers needed. */
1690 for (i = 0; i < n_reloads; i++)
1691 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
1692 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
1693 && rld[i].opnum == rld[output_reload].opnum)
1696 /* Check each input reload; can we combine it? */
1698 for (i = 0; i < n_reloads; i++)
1699 if (rld[i].in && ! rld[i].optional && ! rld[i].nocombine
1700 /* Life span of this reload must not extend past main insn. */
1701 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS
1702 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
1703 && rld[i].when_needed != RELOAD_OTHER
1704 && (CLASS_MAX_NREGS (rld[i].class, rld[i].inmode)
1705 == CLASS_MAX_NREGS (rld[output_reload].class,
1706 rld[output_reload].outmode))
1708 && rld[i].reg_rtx == 0
1709 #ifdef SECONDARY_MEMORY_NEEDED
1710 /* Don't combine two reloads with different secondary
1711 memory locations. */
1712 && (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum] == 0
1713 || secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] == 0
1714 || rtx_equal_p (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum],
1715 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum]))
1717 && (SMALL_REGISTER_CLASSES
1718 ? (rld[i].class == rld[output_reload].class)
1719 : (reg_class_subset_p (rld[i].class,
1720 rld[output_reload].class)
1721 || reg_class_subset_p (rld[output_reload].class,
1723 && (MATCHES (rld[i].in, rld[output_reload].out)
1724 /* Args reversed because the first arg seems to be
1725 the one that we imagine being modified
1726 while the second is the one that might be affected. */
1727 || (! reg_overlap_mentioned_for_reload_p (rld[output_reload].out,
1729 /* However, if the input is a register that appears inside
1730 the output, then we also can't share.
1731 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1732 If the same reload reg is used for both reg 69 and the
1733 result to be stored in memory, then that result
1734 will clobber the address of the memory ref. */
1735 && ! (GET_CODE (rld[i].in) == REG
1736 && reg_overlap_mentioned_for_reload_p (rld[i].in,
1737 rld[output_reload].out))))
1738 && ! reload_inner_reg_of_subreg (rld[i].in, rld[i].inmode,
1739 rld[i].when_needed != RELOAD_FOR_INPUT)
1740 && (reg_class_size[(int) rld[i].class]
1741 || SMALL_REGISTER_CLASSES)
1742 /* We will allow making things slightly worse by combining an
1743 input and an output, but no worse than that. */
1744 && (rld[i].when_needed == RELOAD_FOR_INPUT
1745 || rld[i].when_needed == RELOAD_FOR_OUTPUT))
1749 /* We have found a reload to combine with! */
1750 rld[i].out = rld[output_reload].out;
1751 rld[i].out_reg = rld[output_reload].out_reg;
1752 rld[i].outmode = rld[output_reload].outmode;
1753 /* Mark the old output reload as inoperative. */
1754 rld[output_reload].out = 0;
1755 /* The combined reload is needed for the entire insn. */
1756 rld[i].when_needed = RELOAD_OTHER;
1757 /* If the output reload had a secondary reload, copy it. */
1758 if (rld[output_reload].secondary_out_reload != -1)
1760 rld[i].secondary_out_reload
1761 = rld[output_reload].secondary_out_reload;
1762 rld[i].secondary_out_icode
1763 = rld[output_reload].secondary_out_icode;
1766 #ifdef SECONDARY_MEMORY_NEEDED
1767 /* Copy any secondary MEM. */
1768 if (secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum] != 0)
1769 secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[i].opnum]
1770 = secondary_memlocs_elim[(int) rld[output_reload].outmode][rld[output_reload].opnum];
1772 /* If required, minimize the register class. */
1773 if (reg_class_subset_p (rld[output_reload].class,
1775 rld[i].class = rld[output_reload].class;
1777 /* Transfer all replacements from the old reload to the combined. */
1778 for (j = 0; j < n_replacements; j++)
1779 if (replacements[j].what == output_reload)
1780 replacements[j].what = i;
1785 /* If this insn has only one operand that is modified or written (assumed
1786 to be the first), it must be the one corresponding to this reload. It
1787 is safe to use anything that dies in this insn for that output provided
1788 that it does not occur in the output (we already know it isn't an
1789 earlyclobber. If this is an asm insn, give up. */
1791 if (INSN_CODE (this_insn) == -1)
1794 for (i = 1; i < insn_data[INSN_CODE (this_insn)].n_operands; i++)
1795 if (insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '='
1796 || insn_data[INSN_CODE (this_insn)].operand[i].constraint[0] == '+')
1799 /* See if some hard register that dies in this insn and is not used in
1800 the output is the right class. Only works if the register we pick
1801 up can fully hold our output reload. */
1802 for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1))
1803 if (REG_NOTE_KIND (note) == REG_DEAD
1804 && GET_CODE (XEXP (note, 0)) == REG
1805 && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0),
1806 rld[output_reload].out)
1807 && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER
1808 && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1809 && TEST_HARD_REG_BIT (reg_class_contents[(int) rld[output_reload].class],
1810 REGNO (XEXP (note, 0)))
1811 && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), rld[output_reload].outmode)
1812 <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0))))
1813 /* Ensure that a secondary or tertiary reload for this output
1814 won't want this register. */
1815 && ((secondary_out = rld[output_reload].secondary_out_reload) == -1
1816 || (! (TEST_HARD_REG_BIT
1817 (reg_class_contents[(int) rld[secondary_out].class],
1818 REGNO (XEXP (note, 0))))
1819 && ((secondary_out = rld[secondary_out].secondary_out_reload) == -1
1820 || ! (TEST_HARD_REG_BIT
1821 (reg_class_contents[(int) rld[secondary_out].class],
1822 REGNO (XEXP (note, 0)))))))
1823 && ! fixed_regs[REGNO (XEXP (note, 0))])
1825 rld[output_reload].reg_rtx
1826 = gen_rtx_REG (rld[output_reload].outmode,
1827 REGNO (XEXP (note, 0)));
1832 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1833 See if one of IN and OUT is a register that may be used;
1834 this is desirable since a spill-register won't be needed.
1835 If so, return the register rtx that proves acceptable.
1837 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1838 CLASS is the register class required for the reload.
1840 If FOR_REAL is >= 0, it is the number of the reload,
1841 and in some cases when it can be discovered that OUT doesn't need
1842 to be computed, clear out rld[FOR_REAL].out.
1844 If FOR_REAL is -1, this should not be done, because this call
1845 is just to see if a register can be found, not to find and install it.
1847 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1848 puts an additional constraint on being able to use IN for OUT since
1849 IN must not appear elsewhere in the insn (it is assumed that IN itself
1850 is safe from the earlyclobber). */
1853 find_dummy_reload (real_in, real_out, inloc, outloc,
1854 inmode, outmode, class, for_real, earlyclobber)
1855 rtx real_in, real_out;
1856 rtx *inloc, *outloc;
1857 enum machine_mode inmode, outmode;
1858 enum reg_class class;
1868 /* If operands exceed a word, we can't use either of them
1869 unless they have the same size. */
1870 if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode)
1871 && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD
1872 || GET_MODE_SIZE (inmode) > UNITS_PER_WORD))
1875 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1876 respectively refers to a hard register. */
1878 /* Find the inside of any subregs. */
1879 while (GET_CODE (out) == SUBREG)
1881 if (GET_CODE (SUBREG_REG (out)) == REG
1882 && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER)
1883 out_offset += subreg_regno_offset (REGNO (SUBREG_REG (out)),
1884 GET_MODE (SUBREG_REG (out)),
1887 out = SUBREG_REG (out);
1889 while (GET_CODE (in) == SUBREG)
1891 if (GET_CODE (SUBREG_REG (in)) == REG
1892 && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER)
1893 in_offset += subreg_regno_offset (REGNO (SUBREG_REG (in)),
1894 GET_MODE (SUBREG_REG (in)),
1897 in = SUBREG_REG (in);
1900 /* Narrow down the reg class, the same way push_reload will;
1901 otherwise we might find a dummy now, but push_reload won't. */
1902 class = PREFERRED_RELOAD_CLASS (in, class);
1904 /* See if OUT will do. */
1905 if (GET_CODE (out) == REG
1906 && REGNO (out) < FIRST_PSEUDO_REGISTER)
1908 unsigned int regno = REGNO (out) + out_offset;
1909 unsigned int nwords = HARD_REGNO_NREGS (regno, outmode);
1912 /* When we consider whether the insn uses OUT,
1913 ignore references within IN. They don't prevent us
1914 from copying IN into OUT, because those refs would
1915 move into the insn that reloads IN.
1917 However, we only ignore IN in its role as this reload.
1918 If the insn uses IN elsewhere and it contains OUT,
1919 that counts. We can't be sure it's the "same" operand
1920 so it might not go through this reload. */
1922 *inloc = const0_rtx;
1924 if (regno < FIRST_PSEUDO_REGISTER
1925 && HARD_REGNO_MODE_OK (regno, outmode)
1926 && ! refers_to_regno_for_reload_p (regno, regno + nwords,
1927 PATTERN (this_insn), outloc))
1931 for (i = 0; i < nwords; i++)
1932 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1938 if (GET_CODE (real_out) == REG)
1941 value = gen_rtx_REG (outmode, regno);
1948 /* Consider using IN if OUT was not acceptable
1949 or if OUT dies in this insn (like the quotient in a divmod insn).
1950 We can't use IN unless it is dies in this insn,
1951 which means we must know accurately which hard regs are live.
1952 Also, the result can't go in IN if IN is used within OUT,
1953 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1954 if (hard_regs_live_known
1955 && GET_CODE (in) == REG
1956 && REGNO (in) < FIRST_PSEUDO_REGISTER
1958 || find_reg_note (this_insn, REG_UNUSED, real_out))
1959 && find_reg_note (this_insn, REG_DEAD, real_in)
1960 && !fixed_regs[REGNO (in)]
1961 && HARD_REGNO_MODE_OK (REGNO (in),
1962 /* The only case where out and real_out might
1963 have different modes is where real_out
1964 is a subreg, and in that case, out
1966 (GET_MODE (out) != VOIDmode
1967 ? GET_MODE (out) : outmode)))
1969 unsigned int regno = REGNO (in) + in_offset;
1970 unsigned int nwords = HARD_REGNO_NREGS (regno, inmode);
1972 if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, (rtx*) 0)
1973 && ! hard_reg_set_here_p (regno, regno + nwords,
1974 PATTERN (this_insn))
1976 || ! refers_to_regno_for_reload_p (regno, regno + nwords,
1977 PATTERN (this_insn), inloc)))
1981 for (i = 0; i < nwords; i++)
1982 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
1988 /* If we were going to use OUT as the reload reg
1989 and changed our mind, it means OUT is a dummy that
1990 dies here. So don't bother copying value to it. */
1991 if (for_real >= 0 && value == real_out)
1992 rld[for_real].out = 0;
1993 if (GET_CODE (real_in) == REG)
1996 value = gen_rtx_REG (inmode, regno);
2004 /* This page contains subroutines used mainly for determining
2005 whether the IN or an OUT of a reload can serve as the
2008 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2011 earlyclobber_operand_p (x)
2016 for (i = 0; i < n_earlyclobbers; i++)
2017 if (reload_earlyclobbers[i] == x)
2023 /* Return 1 if expression X alters a hard reg in the range
2024 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2025 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2026 X should be the body of an instruction. */
2029 hard_reg_set_here_p (beg_regno, end_regno, x)
2030 unsigned int beg_regno, end_regno;
2033 if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER)
2035 rtx op0 = SET_DEST (x);
2037 while (GET_CODE (op0) == SUBREG)
2038 op0 = SUBREG_REG (op0);
2039 if (GET_CODE (op0) == REG)
2041 unsigned int r = REGNO (op0);
2043 /* See if this reg overlaps range under consideration. */
2045 && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno)
2049 else if (GET_CODE (x) == PARALLEL)
2051 int i = XVECLEN (x, 0) - 1;
2054 if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i)))
2061 /* Return 1 if ADDR is a valid memory address for mode MODE,
2062 and check that each pseudo reg has the proper kind of
2066 strict_memory_address_p (mode, addr)
2067 enum machine_mode mode ATTRIBUTE_UNUSED;
2070 GO_IF_LEGITIMATE_ADDRESS (mode, addr, win);
2077 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2078 if they are the same hard reg, and has special hacks for
2079 autoincrement and autodecrement.
2080 This is specifically intended for find_reloads to use
2081 in determining whether two operands match.
2082 X is the operand whose number is the lower of the two.
2084 The value is 2 if Y contains a pre-increment that matches
2085 a non-incrementing address in X. */
2087 /* ??? To be completely correct, we should arrange to pass
2088 for X the output operand and for Y the input operand.
2089 For now, we assume that the output operand has the lower number
2090 because that is natural in (SET output (... input ...)). */
2093 operands_match_p (x, y)
2097 RTX_CODE code = GET_CODE (x);
2103 if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG))
2104 && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG
2105 && GET_CODE (SUBREG_REG (y)) == REG)))
2111 i = REGNO (SUBREG_REG (x));
2112 if (i >= FIRST_PSEUDO_REGISTER)
2114 i += subreg_regno_offset (REGNO (SUBREG_REG (x)),
2115 GET_MODE (SUBREG_REG (x)),
2122 if (GET_CODE (y) == SUBREG)
2124 j = REGNO (SUBREG_REG (y));
2125 if (j >= FIRST_PSEUDO_REGISTER)
2127 j += subreg_regno_offset (REGNO (SUBREG_REG (y)),
2128 GET_MODE (SUBREG_REG (y)),
2135 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2136 multiple hard register group, so that for example (reg:DI 0) and
2137 (reg:SI 1) will be considered the same register. */
2138 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD
2139 && i < FIRST_PSEUDO_REGISTER)
2140 i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1;
2141 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD
2142 && j < FIRST_PSEUDO_REGISTER)
2143 j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1;
2147 /* If two operands must match, because they are really a single
2148 operand of an assembler insn, then two postincrements are invalid
2149 because the assembler insn would increment only once.
2150 On the other hand, a postincrement matches ordinary indexing
2151 if the postincrement is the output operand. */
2152 if (code == POST_DEC || code == POST_INC || code == POST_MODIFY)
2153 return operands_match_p (XEXP (x, 0), y);
2154 /* Two preincrements are invalid
2155 because the assembler insn would increment only once.
2156 On the other hand, a preincrement matches ordinary indexing
2157 if the preincrement is the input operand.
2158 In this case, return 2, since some callers need to do special
2159 things when this happens. */
2160 if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC
2161 || GET_CODE (y) == PRE_MODIFY)
2162 return operands_match_p (x, XEXP (y, 0)) ? 2 : 0;
2166 /* Now we have disposed of all the cases
2167 in which different rtx codes can match. */
2168 if (code != GET_CODE (y))
2170 if (code == LABEL_REF)
2171 return XEXP (x, 0) == XEXP (y, 0);
2172 if (code == SYMBOL_REF)
2173 return XSTR (x, 0) == XSTR (y, 0);
2175 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2177 if (GET_MODE (x) != GET_MODE (y))
2180 /* Compare the elements. If any pair of corresponding elements
2181 fail to match, return 0 for the whole things. */
2184 fmt = GET_RTX_FORMAT (code);
2185 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2191 if (XWINT (x, i) != XWINT (y, i))
2196 if (XINT (x, i) != XINT (y, i))
2201 val = operands_match_p (XEXP (x, i), XEXP (y, i));
2204 /* If any subexpression returns 2,
2205 we should return 2 if we are successful. */
2214 if (XVECLEN (x, i) != XVECLEN (y, i))
2216 for (j = XVECLEN (x, i) - 1; j >= 0; --j)
2218 val = operands_match_p (XVECEXP (x, i, j), XVECEXP (y, i, j));
2226 /* It is believed that rtx's at this level will never
2227 contain anything but integers and other rtx's,
2228 except for within LABEL_REFs and SYMBOL_REFs. */
2233 return 1 + success_2;
2236 /* Describe the range of registers or memory referenced by X.
2237 If X is a register, set REG_FLAG and put the first register
2238 number into START and the last plus one into END.
2239 If X is a memory reference, put a base address into BASE
2240 and a range of integer offsets into START and END.
2241 If X is pushing on the stack, we can assume it causes no trouble,
2242 so we set the SAFE field. */
2244 static struct decomposition
2248 struct decomposition val;
2254 if (GET_CODE (x) == MEM)
2256 rtx base = NULL_RTX, offset = 0;
2257 rtx addr = XEXP (x, 0);
2259 if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
2260 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
2262 val.base = XEXP (addr, 0);
2263 val.start = -GET_MODE_SIZE (GET_MODE (x));
2264 val.end = GET_MODE_SIZE (GET_MODE (x));
2265 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2269 if (GET_CODE (addr) == PRE_MODIFY || GET_CODE (addr) == POST_MODIFY)
2271 if (GET_CODE (XEXP (addr, 1)) == PLUS
2272 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
2273 && CONSTANT_P (XEXP (XEXP (addr, 1), 1)))
2275 val.base = XEXP (addr, 0);
2276 val.start = -INTVAL (XEXP (XEXP (addr, 1), 1));
2277 val.end = INTVAL (XEXP (XEXP (addr, 1), 1));
2278 val.safe = REGNO (val.base) == STACK_POINTER_REGNUM;
2283 if (GET_CODE (addr) == CONST)
2285 addr = XEXP (addr, 0);
2288 if (GET_CODE (addr) == PLUS)
2290 if (CONSTANT_P (XEXP (addr, 0)))
2292 base = XEXP (addr, 1);
2293 offset = XEXP (addr, 0);
2295 else if (CONSTANT_P (XEXP (addr, 1)))
2297 base = XEXP (addr, 0);
2298 offset = XEXP (addr, 1);
2305 offset = const0_rtx;
2307 if (GET_CODE (offset) == CONST)
2308 offset = XEXP (offset, 0);
2309 if (GET_CODE (offset) == PLUS)
2311 if (GET_CODE (XEXP (offset, 0)) == CONST_INT)
2313 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 1));
2314 offset = XEXP (offset, 0);
2316 else if (GET_CODE (XEXP (offset, 1)) == CONST_INT)
2318 base = gen_rtx_PLUS (GET_MODE (base), base, XEXP (offset, 0));
2319 offset = XEXP (offset, 1);
2323 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2324 offset = const0_rtx;
2327 else if (GET_CODE (offset) != CONST_INT)
2329 base = gen_rtx_PLUS (GET_MODE (base), base, offset);
2330 offset = const0_rtx;
2333 if (all_const && GET_CODE (base) == PLUS)
2334 base = gen_rtx_CONST (GET_MODE (base), base);
2336 if (GET_CODE (offset) != CONST_INT)
2339 val.start = INTVAL (offset);
2340 val.end = val.start + GET_MODE_SIZE (GET_MODE (x));
2344 else if (GET_CODE (x) == REG)
2347 val.start = true_regnum (x);
2350 /* A pseudo with no hard reg. */
2351 val.start = REGNO (x);
2352 val.end = val.start + 1;
2356 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2358 else if (GET_CODE (x) == SUBREG)
2360 if (GET_CODE (SUBREG_REG (x)) != REG)
2361 /* This could be more precise, but it's good enough. */
2362 return decompose (SUBREG_REG (x));
2364 val.start = true_regnum (x);
2366 return decompose (SUBREG_REG (x));
2369 val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x));
2371 else if (CONSTANT_P (x)
2372 /* This hasn't been assigned yet, so it can't conflict yet. */
2373 || GET_CODE (x) == SCRATCH)
2380 /* Return 1 if altering Y will not modify the value of X.
2381 Y is also described by YDATA, which should be decompose (Y). */
2384 immune_p (x, y, ydata)
2386 struct decomposition ydata;
2388 struct decomposition xdata;
2391 return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, (rtx*) 0);
2395 if (GET_CODE (y) != MEM)
2397 /* If Y is memory and X is not, Y can't affect X. */
2398 if (GET_CODE (x) != MEM)
2401 xdata = decompose (x);
2403 if (! rtx_equal_p (xdata.base, ydata.base))
2405 /* If bases are distinct symbolic constants, there is no overlap. */
2406 if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base))
2408 /* Constants and stack slots never overlap. */
2409 if (CONSTANT_P (xdata.base)
2410 && (ydata.base == frame_pointer_rtx
2411 || ydata.base == hard_frame_pointer_rtx
2412 || ydata.base == stack_pointer_rtx))
2414 if (CONSTANT_P (ydata.base)
2415 && (xdata.base == frame_pointer_rtx
2416 || xdata.base == hard_frame_pointer_rtx
2417 || xdata.base == stack_pointer_rtx))
2419 /* If either base is variable, we don't know anything. */
2423 return (xdata.start >= ydata.end || ydata.start >= xdata.end);
2426 /* Similar, but calls decompose. */
2429 safe_from_earlyclobber (op, clobber)
2432 struct decomposition early_data;
2434 early_data = decompose (clobber);
2435 return immune_p (op, clobber, early_data);
2438 /* Main entry point of this file: search the body of INSN
2439 for values that need reloading and record them with push_reload.
2440 REPLACE nonzero means record also where the values occur
2441 so that subst_reloads can be used.
2443 IND_LEVELS says how many levels of indirection are supported by this
2444 machine; a value of zero means that a memory reference is not a valid
2447 LIVE_KNOWN says we have valid information about which hard
2448 regs are live at each point in the program; this is true when
2449 we are called from global_alloc but false when stupid register
2450 allocation has been done.
2452 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2453 which is nonnegative if the reg has been commandeered for reloading into.
2454 It is copied into STATIC_RELOAD_REG_P and referenced from there
2455 by various subroutines.
2457 Return TRUE if some operands need to be changed, because of swapping
2458 commutative operands, reg_equiv_address substitution, or whatever. */
2461 find_reloads (insn, replace, ind_levels, live_known, reload_reg_p)
2463 int replace, ind_levels;
2465 short *reload_reg_p;
2467 int insn_code_number;
2470 /* These start out as the constraints for the insn
2471 and they are chewed up as we consider alternatives. */
2472 char *constraints[MAX_RECOG_OPERANDS];
2473 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2475 enum reg_class preferred_class[MAX_RECOG_OPERANDS];
2476 char pref_or_nothing[MAX_RECOG_OPERANDS];
2477 /* Nonzero for a MEM operand whose entire address needs a reload. */
2478 int address_reloaded[MAX_RECOG_OPERANDS];
2479 /* Nonzero for an address operand that needs to be completely reloaded. */
2480 int address_operand_reloaded[MAX_RECOG_OPERANDS];
2481 /* Value of enum reload_type to use for operand. */
2482 enum reload_type operand_type[MAX_RECOG_OPERANDS];
2483 /* Value of enum reload_type to use within address of operand. */
2484 enum reload_type address_type[MAX_RECOG_OPERANDS];
2485 /* Save the usage of each operand. */
2486 enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS];
2487 int no_input_reloads = 0, no_output_reloads = 0;
2489 int this_alternative[MAX_RECOG_OPERANDS];
2490 char this_alternative_match_win[MAX_RECOG_OPERANDS];
2491 char this_alternative_win[MAX_RECOG_OPERANDS];
2492 char this_alternative_offmemok[MAX_RECOG_OPERANDS];
2493 char this_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2494 int this_alternative_matches[MAX_RECOG_OPERANDS];
2496 int goal_alternative[MAX_RECOG_OPERANDS];
2497 int this_alternative_number;
2498 int goal_alternative_number = 0;
2499 int operand_reloadnum[MAX_RECOG_OPERANDS];
2500 int goal_alternative_matches[MAX_RECOG_OPERANDS];
2501 int goal_alternative_matched[MAX_RECOG_OPERANDS];
2502 char goal_alternative_match_win[MAX_RECOG_OPERANDS];
2503 char goal_alternative_win[MAX_RECOG_OPERANDS];
2504 char goal_alternative_offmemok[MAX_RECOG_OPERANDS];
2505 char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS];
2506 int goal_alternative_swapped;
2509 char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS];
2510 rtx substed_operand[MAX_RECOG_OPERANDS];
2511 rtx body = PATTERN (insn);
2512 rtx set = single_set (insn);
2513 int goal_earlyclobber = 0, this_earlyclobber;
2514 enum machine_mode operand_mode[MAX_RECOG_OPERANDS];
2520 n_earlyclobbers = 0;
2521 replace_reloads = replace;
2522 hard_regs_live_known = live_known;
2523 static_reload_reg_p = reload_reg_p;
2525 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2526 neither are insns that SET cc0. Insns that use CC0 are not allowed
2527 to have any input reloads. */
2528 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN)
2529 no_output_reloads = 1;
2532 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
2533 no_input_reloads = 1;
2534 if (reg_set_p (cc0_rtx, PATTERN (insn)))
2535 no_output_reloads = 1;
2538 #ifdef SECONDARY_MEMORY_NEEDED
2539 /* The eliminated forms of any secondary memory locations are per-insn, so
2540 clear them out here. */
2542 memset ((char *) secondary_memlocs_elim, 0, sizeof secondary_memlocs_elim);
2545 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2546 is cheap to move between them. If it is not, there may not be an insn
2547 to do the copy, so we may need a reload. */
2548 if (GET_CODE (body) == SET
2549 && GET_CODE (SET_DEST (body)) == REG
2550 && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER
2551 && GET_CODE (SET_SRC (body)) == REG
2552 && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER
2553 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body)),
2554 REGNO_REG_CLASS (REGNO (SET_SRC (body))),
2555 REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2)
2558 extract_insn (insn);
2560 noperands = reload_n_operands = recog_data.n_operands;
2561 n_alternatives = recog_data.n_alternatives;
2563 /* Just return "no reloads" if insn has no operands with constraints. */
2564 if (noperands == 0 || n_alternatives == 0)
2567 insn_code_number = INSN_CODE (insn);
2568 this_insn_is_asm = insn_code_number < 0;
2570 memcpy (operand_mode, recog_data.operand_mode,
2571 noperands * sizeof (enum machine_mode));
2572 memcpy (constraints, recog_data.constraints, noperands * sizeof (char *));
2576 /* If we will need to know, later, whether some pair of operands
2577 are the same, we must compare them now and save the result.
2578 Reloading the base and index registers will clobber them
2579 and afterward they will fail to match. */
2581 for (i = 0; i < noperands; i++)
2586 substed_operand[i] = recog_data.operand[i];
2589 modified[i] = RELOAD_READ;
2591 /* Scan this operand's constraint to see if it is an output operand,
2592 an in-out operand, is commutative, or should match another. */
2597 modified[i] = RELOAD_WRITE;
2599 modified[i] = RELOAD_READ_WRITE;
2602 /* The last operand should not be marked commutative. */
2603 if (i == noperands - 1)
2608 else if (ISDIGIT (c))
2610 c = strtoul (p - 1, &p, 10);
2612 operands_match[c][i]
2613 = operands_match_p (recog_data.operand[c],
2614 recog_data.operand[i]);
2616 /* An operand may not match itself. */
2620 /* If C can be commuted with C+1, and C might need to match I,
2621 then C+1 might also need to match I. */
2622 if (commutative >= 0)
2624 if (c == commutative || c == commutative + 1)
2626 int other = c + (c == commutative ? 1 : -1);
2627 operands_match[other][i]
2628 = operands_match_p (recog_data.operand[other],
2629 recog_data.operand[i]);
2631 if (i == commutative || i == commutative + 1)
2633 int other = i + (i == commutative ? 1 : -1);
2634 operands_match[c][other]
2635 = operands_match_p (recog_data.operand[c],
2636 recog_data.operand[other]);
2638 /* Note that C is supposed to be less than I.
2639 No need to consider altering both C and I because in
2640 that case we would alter one into the other. */
2646 /* Examine each operand that is a memory reference or memory address
2647 and reload parts of the addresses into index registers.
2648 Also here any references to pseudo regs that didn't get hard regs
2649 but are equivalent to constants get replaced in the insn itself
2650 with those constants. Nobody will ever see them again.
2652 Finally, set up the preferred classes of each operand. */
2654 for (i = 0; i < noperands; i++)
2656 RTX_CODE code = GET_CODE (recog_data.operand[i]);
2658 address_reloaded[i] = 0;
2659 address_operand_reloaded[i] = 0;
2660 operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT
2661 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT
2664 = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS
2665 : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS
2668 if (*constraints[i] == 0)
2669 /* Ignore things like match_operator operands. */
2671 else if (constraints[i][0] == 'p'
2672 || EXTRA_ADDRESS_CONSTRAINT (constraints[i][0]))
2674 address_operand_reloaded[i]
2675 = find_reloads_address (recog_data.operand_mode[i], (rtx*) 0,
2676 recog_data.operand[i],
2677 recog_data.operand_loc[i],
2678 i, operand_type[i], ind_levels, insn);
2680 /* If we now have a simple operand where we used to have a
2681 PLUS or MULT, re-recognize and try again. */
2682 if ((GET_RTX_CLASS (GET_CODE (*recog_data.operand_loc[i])) == 'o'
2683 || GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2684 && (GET_CODE (recog_data.operand[i]) == MULT
2685 || GET_CODE (recog_data.operand[i]) == PLUS))
2687 INSN_CODE (insn) = -1;
2688 retval = find_reloads (insn, replace, ind_levels, live_known,
2693 recog_data.operand[i] = *recog_data.operand_loc[i];
2694 substed_operand[i] = recog_data.operand[i];
2696 /* Address operands are reloaded in their existing mode,
2697 no matter what is specified in the machine description. */
2698 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2700 else if (code == MEM)
2703 = find_reloads_address (GET_MODE (recog_data.operand[i]),
2704 recog_data.operand_loc[i],
2705 XEXP (recog_data.operand[i], 0),
2706 &XEXP (recog_data.operand[i], 0),
2707 i, address_type[i], ind_levels, insn);
2708 recog_data.operand[i] = *recog_data.operand_loc[i];
2709 substed_operand[i] = recog_data.operand[i];
2711 else if (code == SUBREG)
2713 rtx reg = SUBREG_REG (recog_data.operand[i]);
2715 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2718 && &SET_DEST (set) == recog_data.operand_loc[i],
2720 &address_reloaded[i]);
2722 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2723 that didn't get a hard register, emit a USE with a REG_EQUAL
2724 note in front so that we might inherit a previous, possibly
2728 && GET_CODE (op) == MEM
2729 && GET_CODE (reg) == REG
2730 && (GET_MODE_SIZE (GET_MODE (reg))
2731 >= GET_MODE_SIZE (GET_MODE (op))))
2732 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode, reg),
2734 REG_EQUAL, reg_equiv_memory_loc[REGNO (reg)]);
2736 substed_operand[i] = recog_data.operand[i] = op;
2738 else if (code == PLUS || GET_RTX_CLASS (code) == '1')
2739 /* We can get a PLUS as an "operand" as a result of register
2740 elimination. See eliminate_regs and gen_reload. We handle
2741 a unary operator by reloading the operand. */
2742 substed_operand[i] = recog_data.operand[i]
2743 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2744 ind_levels, 0, insn,
2745 &address_reloaded[i]);
2746 else if (code == REG)
2748 /* This is equivalent to calling find_reloads_toplev.
2749 The code is duplicated for speed.
2750 When we find a pseudo always equivalent to a constant,
2751 we replace it by the constant. We must be sure, however,
2752 that we don't try to replace it in the insn in which it
2754 int regno = REGNO (recog_data.operand[i]);
2755 if (reg_equiv_constant[regno] != 0
2756 && (set == 0 || &SET_DEST (set) != recog_data.operand_loc[i]))
2758 /* Record the existing mode so that the check if constants are
2759 allowed will work when operand_mode isn't specified. */
2761 if (operand_mode[i] == VOIDmode)
2762 operand_mode[i] = GET_MODE (recog_data.operand[i]);
2764 substed_operand[i] = recog_data.operand[i]
2765 = reg_equiv_constant[regno];
2767 if (reg_equiv_memory_loc[regno] != 0
2768 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
2769 /* We need not give a valid is_set_dest argument since the case
2770 of a constant equivalence was checked above. */
2771 substed_operand[i] = recog_data.operand[i]
2772 = find_reloads_toplev (recog_data.operand[i], i, address_type[i],
2773 ind_levels, 0, insn,
2774 &address_reloaded[i]);
2776 /* If the operand is still a register (we didn't replace it with an
2777 equivalent), get the preferred class to reload it into. */
2778 code = GET_CODE (recog_data.operand[i]);
2780 = ((code == REG && REGNO (recog_data.operand[i])
2781 >= FIRST_PSEUDO_REGISTER)
2782 ? reg_preferred_class (REGNO (recog_data.operand[i]))
2786 && REGNO (recog_data.operand[i]) >= FIRST_PSEUDO_REGISTER
2787 && reg_alternate_class (REGNO (recog_data.operand[i])) == NO_REGS);
2790 /* If this is simply a copy from operand 1 to operand 0, merge the
2791 preferred classes for the operands. */
2792 if (set != 0 && noperands >= 2 && recog_data.operand[0] == SET_DEST (set)
2793 && recog_data.operand[1] == SET_SRC (set))
2795 preferred_class[0] = preferred_class[1]
2796 = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]];
2797 pref_or_nothing[0] |= pref_or_nothing[1];
2798 pref_or_nothing[1] |= pref_or_nothing[0];
2801 /* Now see what we need for pseudo-regs that didn't get hard regs
2802 or got the wrong kind of hard reg. For this, we must consider
2803 all the operands together against the register constraints. */
2805 best = MAX_RECOG_OPERANDS * 2 + 600;
2808 goal_alternative_swapped = 0;
2811 /* The constraints are made of several alternatives.
2812 Each operand's constraint looks like foo,bar,... with commas
2813 separating the alternatives. The first alternatives for all
2814 operands go together, the second alternatives go together, etc.
2816 First loop over alternatives. */
2818 for (this_alternative_number = 0;
2819 this_alternative_number < n_alternatives;
2820 this_alternative_number++)
2822 /* Loop over operands for one constraint alternative. */
2823 /* LOSERS counts those that don't fit this alternative
2824 and would require loading. */
2826 /* BAD is set to 1 if it some operand can't fit this alternative
2827 even after reloading. */
2829 /* REJECT is a count of how undesirable this alternative says it is
2830 if any reloading is required. If the alternative matches exactly
2831 then REJECT is ignored, but otherwise it gets this much
2832 counted against it in addition to the reloading needed. Each
2833 ? counts three times here since we want the disparaging caused by
2834 a bad register class to only count 1/3 as much. */
2837 this_earlyclobber = 0;
2839 for (i = 0; i < noperands; i++)
2841 char *p = constraints[i];
2844 /* 0 => this operand can be reloaded somehow for this alternative. */
2846 /* 0 => this operand can be reloaded if the alternative allows regs. */
2849 rtx operand = recog_data.operand[i];
2851 /* Nonzero means this is a MEM that must be reloaded into a reg
2852 regardless of what the constraint says. */
2853 int force_reload = 0;
2855 /* Nonzero if a constant forced into memory would be OK for this
2858 int earlyclobber = 0;
2860 /* If the predicate accepts a unary operator, it means that
2861 we need to reload the operand, but do not do this for
2862 match_operator and friends. */
2863 if (GET_RTX_CLASS (GET_CODE (operand)) == '1' && *p != 0)
2864 operand = XEXP (operand, 0);
2866 /* If the operand is a SUBREG, extract
2867 the REG or MEM (or maybe even a constant) within.
2868 (Constants can occur as a result of reg_equiv_constant.) */
2870 while (GET_CODE (operand) == SUBREG)
2872 /* Offset only matters when operand is a REG and
2873 it is a hard reg. This is because it is passed
2874 to reg_fits_class_p if it is a REG and all pseudos
2875 return 0 from that function. */
2876 if (GET_CODE (SUBREG_REG (operand)) == REG
2877 && REGNO (SUBREG_REG (operand)) < FIRST_PSEUDO_REGISTER)
2879 if (!subreg_offset_representable_p
2880 (REGNO (SUBREG_REG (operand)),
2881 GET_MODE (SUBREG_REG (operand)),
2882 SUBREG_BYTE (operand),
2883 GET_MODE (operand)))
2885 offset += subreg_regno_offset (REGNO (SUBREG_REG (operand)),
2886 GET_MODE (SUBREG_REG (operand)),
2887 SUBREG_BYTE (operand),
2888 GET_MODE (operand));
2890 operand = SUBREG_REG (operand);
2891 /* Force reload if this is a constant or PLUS or if there may
2892 be a problem accessing OPERAND in the outer mode. */
2893 if (CONSTANT_P (operand)
2894 || GET_CODE (operand) == PLUS
2895 /* We must force a reload of paradoxical SUBREGs
2896 of a MEM because the alignment of the inner value
2897 may not be enough to do the outer reference. On
2898 big-endian machines, it may also reference outside
2901 On machines that extend byte operations and we have a
2902 SUBREG where both the inner and outer modes are no wider
2903 than a word and the inner mode is narrower, is integral,
2904 and gets extended when loaded from memory, combine.c has
2905 made assumptions about the behavior of the machine in such
2906 register access. If the data is, in fact, in memory we
2907 must always load using the size assumed to be in the
2908 register and let the insn do the different-sized
2911 This is doubly true if WORD_REGISTER_OPERATIONS. In
2912 this case eliminate_regs has left non-paradoxical
2913 subregs for push_reloads to see. Make sure it does
2914 by forcing the reload.
2916 ??? When is it right at this stage to have a subreg
2917 of a mem that is _not_ to be handled specialy? IMO
2918 those should have been reduced to just a mem. */
2919 || ((GET_CODE (operand) == MEM
2920 || (GET_CODE (operand)== REG
2921 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
2922 #ifndef WORD_REGISTER_OPERATIONS
2923 && (((GET_MODE_BITSIZE (GET_MODE (operand))
2924 < BIGGEST_ALIGNMENT)
2925 && (GET_MODE_SIZE (operand_mode[i])
2926 > GET_MODE_SIZE (GET_MODE (operand))))
2927 || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN)
2928 #ifdef LOAD_EXTEND_OP
2929 || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
2930 && (GET_MODE_SIZE (GET_MODE (operand))
2932 && (GET_MODE_SIZE (operand_mode[i])
2933 > GET_MODE_SIZE (GET_MODE (operand)))
2934 && INTEGRAL_MODE_P (GET_MODE (operand))
2935 && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL)
2944 this_alternative[i] = (int) NO_REGS;
2945 this_alternative_win[i] = 0;
2946 this_alternative_match_win[i] = 0;
2947 this_alternative_offmemok[i] = 0;
2948 this_alternative_earlyclobber[i] = 0;
2949 this_alternative_matches[i] = -1;
2951 /* An empty constraint or empty alternative
2952 allows anything which matched the pattern. */
2953 if (*p == 0 || *p == ',')
2956 /* Scan this alternative's specs for this operand;
2957 set WIN if the operand fits any letter in this alternative.
2958 Otherwise, clear BADOP if this operand could
2959 fit some letter after reloads,
2960 or set WINREG if this operand could fit after reloads
2961 provided the constraint allows some registers. */
2963 while (*p && (c = *p++) != ',')
2966 case '=': case '+': case '*':
2970 /* The last operand should not be marked commutative. */
2971 if (i != noperands - 1)
2984 /* Ignore rest of this alternative as far as
2985 reloading is concerned. */
2986 while (*p && *p != ',')
2990 case '0': case '1': case '2': case '3': case '4':
2991 case '5': case '6': case '7': case '8': case '9':
2992 c = strtoul (p - 1, &p, 10);
2994 this_alternative_matches[i] = c;
2995 /* We are supposed to match a previous operand.
2996 If we do, we win if that one did.
2997 If we do not, count both of the operands as losers.
2998 (This is too conservative, since most of the time
2999 only a single reload insn will be needed to make
3000 the two operands win. As a result, this alternative
3001 may be rejected when it is actually desirable.) */
3002 if ((swapped && (c != commutative || i != commutative + 1))
3003 /* If we are matching as if two operands were swapped,
3004 also pretend that operands_match had been computed
3006 But if I is the second of those and C is the first,
3007 don't exchange them, because operands_match is valid
3008 only on one side of its diagonal. */
3010 [(c == commutative || c == commutative + 1)
3011 ? 2 * commutative + 1 - c : c]
3012 [(i == commutative || i == commutative + 1)
3013 ? 2 * commutative + 1 - i : i])
3014 : operands_match[c][i])
3016 /* If we are matching a non-offsettable address where an
3017 offsettable address was expected, then we must reject
3018 this combination, because we can't reload it. */
3019 if (this_alternative_offmemok[c]
3020 && GET_CODE (recog_data.operand[c]) == MEM
3021 && this_alternative[c] == (int) NO_REGS
3022 && ! this_alternative_win[c])
3025 did_match = this_alternative_win[c];
3029 /* Operands don't match. */
3031 /* Retroactively mark the operand we had to match
3032 as a loser, if it wasn't already. */
3033 if (this_alternative_win[c])
3035 this_alternative_win[c] = 0;
3036 if (this_alternative[c] == (int) NO_REGS)
3038 /* But count the pair only once in the total badness of
3039 this alternative, if the pair can be a dummy reload. */
3041 = find_dummy_reload (recog_data.operand[i],
3042 recog_data.operand[c],
3043 recog_data.operand_loc[i],
3044 recog_data.operand_loc[c],
3045 operand_mode[i], operand_mode[c],
3046 this_alternative[c], -1,
3047 this_alternative_earlyclobber[c]);
3052 /* This can be fixed with reloads if the operand
3053 we are supposed to match can be fixed with reloads. */
3055 this_alternative[i] = this_alternative[c];
3057 /* If we have to reload this operand and some previous
3058 operand also had to match the same thing as this
3059 operand, we don't know how to do that. So reject this
3061 if (! did_match || force_reload)
3062 for (j = 0; j < i; j++)
3063 if (this_alternative_matches[j]
3064 == this_alternative_matches[i])
3069 /* All necessary reloads for an address_operand
3070 were handled in find_reloads_address. */
3071 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3079 if (GET_CODE (operand) == MEM
3080 || (GET_CODE (operand) == REG
3081 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3082 && reg_renumber[REGNO (operand)] < 0))
3084 if (CONSTANT_P (operand)
3085 /* force_const_mem does not accept HIGH. */
3086 && GET_CODE (operand) != HIGH)
3092 if (GET_CODE (operand) == MEM
3093 && ! address_reloaded[i]
3094 && (GET_CODE (XEXP (operand, 0)) == PRE_DEC
3095 || GET_CODE (XEXP (operand, 0)) == POST_DEC))
3100 if (GET_CODE (operand) == MEM
3101 && ! address_reloaded[i]
3102 && (GET_CODE (XEXP (operand, 0)) == PRE_INC
3103 || GET_CODE (XEXP (operand, 0)) == POST_INC))
3107 /* Memory operand whose address is not offsettable. */
3111 if (GET_CODE (operand) == MEM
3112 && ! (ind_levels ? offsettable_memref_p (operand)
3113 : offsettable_nonstrict_memref_p (operand))
3114 /* Certain mem addresses will become offsettable
3115 after they themselves are reloaded. This is important;
3116 we don't want our own handling of unoffsettables
3117 to override the handling of reg_equiv_address. */
3118 && !(GET_CODE (XEXP (operand, 0)) == REG
3120 || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)))
3124 /* Memory operand whose address is offsettable. */
3128 if ((GET_CODE (operand) == MEM
3129 /* If IND_LEVELS, find_reloads_address won't reload a
3130 pseudo that didn't get a hard reg, so we have to
3131 reject that case. */
3132 && ((ind_levels ? offsettable_memref_p (operand)
3133 : offsettable_nonstrict_memref_p (operand))
3134 /* A reloaded address is offsettable because it is now
3135 just a simple register indirect. */
3136 || address_reloaded[i]))
3137 || (GET_CODE (operand) == REG
3138 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3139 && reg_renumber[REGNO (operand)] < 0
3140 /* If reg_equiv_address is nonzero, we will be
3141 loading it into a register; hence it will be
3142 offsettable, but we cannot say that reg_equiv_mem
3143 is offsettable without checking. */
3144 && ((reg_equiv_mem[REGNO (operand)] != 0
3145 && offsettable_memref_p (reg_equiv_mem[REGNO (operand)]))
3146 || (reg_equiv_address[REGNO (operand)] != 0))))
3148 /* force_const_mem does not accept HIGH. */
3149 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3150 || GET_CODE (operand) == MEM)
3157 /* Output operand that is stored before the need for the
3158 input operands (and their index registers) is over. */
3159 earlyclobber = 1, this_earlyclobber = 1;
3164 if (GET_CODE (operand) == CONST_DOUBLE
3165 || (GET_CODE (operand) == CONST_VECTOR
3166 && (GET_MODE_CLASS (GET_MODE (operand))
3167 == MODE_VECTOR_FLOAT)))
3173 if (GET_CODE (operand) == CONST_DOUBLE
3174 && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c))
3179 if (GET_CODE (operand) == CONST_INT
3180 || (GET_CODE (operand) == CONST_DOUBLE
3181 && GET_MODE (operand) == VOIDmode))
3184 if (CONSTANT_P (operand)
3185 #ifdef LEGITIMATE_PIC_OPERAND_P
3186 && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand))
3193 if (GET_CODE (operand) == CONST_INT
3194 || (GET_CODE (operand) == CONST_DOUBLE
3195 && GET_MODE (operand) == VOIDmode))
3207 if (GET_CODE (operand) == CONST_INT
3208 && CONST_OK_FOR_LETTER_P (INTVAL (operand), c))
3218 /* A PLUS is never a valid operand, but reload can make
3219 it from a register when eliminating registers. */
3220 && GET_CODE (operand) != PLUS
3221 /* A SCRATCH is not a valid operand. */
3222 && GET_CODE (operand) != SCRATCH
3223 #ifdef LEGITIMATE_PIC_OPERAND_P
3224 && (! CONSTANT_P (operand)
3226 || LEGITIMATE_PIC_OPERAND_P (operand))
3228 && (GENERAL_REGS == ALL_REGS
3229 || GET_CODE (operand) != REG
3230 || (REGNO (operand) >= FIRST_PSEUDO_REGISTER
3231 && reg_renumber[REGNO (operand)] < 0)))
3233 /* Drop through into 'r' case. */
3237 = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS];
3241 if (REG_CLASS_FROM_LETTER (c) == NO_REGS)
3243 #ifdef EXTRA_CONSTRAINT
3244 if (EXTRA_MEMORY_CONSTRAINT (c))
3248 if (EXTRA_CONSTRAINT (operand, c))
3250 /* If the address was already reloaded,
3252 if (GET_CODE (operand) == MEM && address_reloaded[i])
3254 /* Likewise if the address will be reloaded because
3255 reg_equiv_address is nonzero. For reg_equiv_mem
3256 we have to check. */
3257 if (GET_CODE (operand) == REG
3258 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3259 && reg_renumber[REGNO (operand)] < 0
3260 && ((reg_equiv_mem[REGNO (operand)] != 0
3261 && EXTRA_CONSTRAINT (reg_equiv_mem[REGNO (operand)], c))
3262 || (reg_equiv_address[REGNO (operand)] != 0)))
3265 /* If we didn't already win, we can reload
3266 constants via force_const_mem, and other
3267 MEMs by reloading the address like for 'o'. */
3268 if ((CONSTANT_P (operand) && GET_CODE (operand) != HIGH)
3269 || GET_CODE (operand) == MEM)
3275 if (EXTRA_ADDRESS_CONSTRAINT (c))
3277 if (EXTRA_CONSTRAINT (operand, c))
3280 /* If we didn't already win, we can reload
3281 the address into a base register. */
3282 this_alternative[i] = (int) MODE_BASE_REG_CLASS (VOIDmode);
3287 if (EXTRA_CONSTRAINT (operand, c))
3294 = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)];
3296 if (GET_MODE (operand) == BLKmode)
3299 if (GET_CODE (operand) == REG
3300 && reg_fits_class_p (operand, this_alternative[i],
3301 offset, GET_MODE (recog_data.operand[i])))
3308 /* If this operand could be handled with a reg,
3309 and some reg is allowed, then this operand can be handled. */
3310 if (winreg && this_alternative[i] != (int) NO_REGS)
3313 /* Record which operands fit this alternative. */
3314 this_alternative_earlyclobber[i] = earlyclobber;
3315 if (win && ! force_reload)
3316 this_alternative_win[i] = 1;
3317 else if (did_match && ! force_reload)
3318 this_alternative_match_win[i] = 1;
3321 int const_to_mem = 0;
3323 this_alternative_offmemok[i] = offmemok;
3327 /* Alternative loses if it has no regs for a reg operand. */
3328 if (GET_CODE (operand) == REG
3329 && this_alternative[i] == (int) NO_REGS
3330 && this_alternative_matches[i] < 0)
3333 /* If this is a constant that is reloaded into the desired
3334 class by copying it to memory first, count that as another
3335 reload. This is consistent with other code and is
3336 required to avoid choosing another alternative when
3337 the constant is moved into memory by this function on
3338 an early reload pass. Note that the test here is
3339 precisely the same as in the code below that calls
3341 if (CONSTANT_P (operand)
3342 /* force_const_mem does not accept HIGH. */
3343 && GET_CODE (operand) != HIGH
3344 && ((PREFERRED_RELOAD_CLASS (operand,
3345 (enum reg_class) this_alternative[i])
3347 || no_input_reloads)
3348 && operand_mode[i] != VOIDmode)
3351 if (this_alternative[i] != (int) NO_REGS)
3355 /* If we can't reload this value at all, reject this
3356 alternative. Note that we could also lose due to
3357 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3360 if (! CONSTANT_P (operand)
3361 && (enum reg_class) this_alternative[i] != NO_REGS
3362 && (PREFERRED_RELOAD_CLASS (operand,
3363 (enum reg_class) this_alternative[i])
3367 /* Alternative loses if it requires a type of reload not
3368 permitted for this insn. We can always reload SCRATCH
3369 and objects with a REG_UNUSED note. */
3370 else if (GET_CODE (operand) != SCRATCH
3371 && modified[i] != RELOAD_READ && no_output_reloads
3372 && ! find_reg_note (insn, REG_UNUSED, operand))
3374 else if (modified[i] != RELOAD_WRITE && no_input_reloads
3378 /* We prefer to reload pseudos over reloading other things,
3379 since such reloads may be able to be eliminated later.
3380 If we are reloading a SCRATCH, we won't be generating any
3381 insns, just using a register, so it is also preferred.
3382 So bump REJECT in other cases. Don't do this in the
3383 case where we are forcing a constant into memory and
3384 it will then win since we don't want to have a different
3385 alternative match then. */
3386 if (! (GET_CODE (operand) == REG
3387 && REGNO (operand) >= FIRST_PSEUDO_REGISTER)
3388 && GET_CODE (operand) != SCRATCH
3389 && ! (const_to_mem && constmemok))
3392 /* Input reloads can be inherited more often than output
3393 reloads can be removed, so penalize output reloads. */
3394 if (operand_type[i] != RELOAD_FOR_INPUT
3395 && GET_CODE (operand) != SCRATCH)
3399 /* If this operand is a pseudo register that didn't get a hard
3400 reg and this alternative accepts some register, see if the
3401 class that we want is a subset of the preferred class for this
3402 register. If not, but it intersects that class, use the
3403 preferred class instead. If it does not intersect the preferred
3404 class, show that usage of this alternative should be discouraged;
3405 it will be discouraged more still if the register is `preferred
3406 or nothing'. We do this because it increases the chance of
3407 reusing our spill register in a later insn and avoiding a pair
3408 of memory stores and loads.
3410 Don't bother with this if this alternative will accept this
3413 Don't do this for a multiword operand, since it is only a
3414 small win and has the risk of requiring more spill registers,
3415 which could cause a large loss.
3417 Don't do this if the preferred class has only one register
3418 because we might otherwise exhaust the class. */
3420 if (! win && ! did_match
3421 && this_alternative[i] != (int) NO_REGS
3422 && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD
3423 && reg_class_size[(int) preferred_class[i]] > 1)
3425 if (! reg_class_subset_p (this_alternative[i],
3426 preferred_class[i]))
3428 /* Since we don't have a way of forming the intersection,
3429 we just do something special if the preferred class
3430 is a subset of the class we have; that's the most
3431 common case anyway. */
3432 if (reg_class_subset_p (preferred_class[i],
3433 this_alternative[i]))
3434 this_alternative[i] = (int) preferred_class[i];
3436 reject += (2 + 2 * pref_or_nothing[i]);
3441 /* Now see if any output operands that are marked "earlyclobber"
3442 in this alternative conflict with any input operands
3443 or any memory addresses. */
3445 for (i = 0; i < noperands; i++)
3446 if (this_alternative_earlyclobber[i]
3447 && (this_alternative_win[i] || this_alternative_match_win[i]))
3449 struct decomposition early_data;
3451 early_data = decompose (recog_data.operand[i]);
3453 if (modified[i] == RELOAD_READ)
3456 if (this_alternative[i] == NO_REGS)
3458 this_alternative_earlyclobber[i] = 0;
3459 if (this_insn_is_asm)
3460 error_for_asm (this_insn,
3461 "`&' constraint used with no register class");
3466 for (j = 0; j < noperands; j++)
3467 /* Is this an input operand or a memory ref? */
3468 if ((GET_CODE (recog_data.operand[j]) == MEM
3469 || modified[j] != RELOAD_WRITE)
3471 /* Ignore things like match_operator operands. */
3472 && *recog_data.constraints[j] != 0
3473 /* Don't count an input operand that is constrained to match
3474 the early clobber operand. */
3475 && ! (this_alternative_matches[j] == i
3476 && rtx_equal_p (recog_data.operand[i],
3477 recog_data.operand[j]))
3478 /* Is it altered by storing the earlyclobber operand? */
3479 && !immune_p (recog_data.operand[j], recog_data.operand[i],
3482 /* If the output is in a single-reg class,
3483 it's costly to reload it, so reload the input instead. */
3484 if (reg_class_size[this_alternative[i]] == 1
3485 && (GET_CODE (recog_data.operand[j]) == REG
3486 || GET_CODE (recog_data.operand[j]) == SUBREG))
3489 this_alternative_win[j] = 0;
3490 this_alternative_match_win[j] = 0;
3495 /* If an earlyclobber operand conflicts with something,
3496 it must be reloaded, so request this and count the cost. */
3500 this_alternative_win[i] = 0;
3501 this_alternative_match_win[j] = 0;
3502 for (j = 0; j < noperands; j++)
3503 if (this_alternative_matches[j] == i
3504 && this_alternative_match_win[j])
3506 this_alternative_win[j] = 0;
3507 this_alternative_match_win[j] = 0;
3513 /* If one alternative accepts all the operands, no reload required,
3514 choose that alternative; don't consider the remaining ones. */
3517 /* Unswap these so that they are never swapped at `finish'. */
3518 if (commutative >= 0)
3520 recog_data.operand[commutative] = substed_operand[commutative];
3521 recog_data.operand[commutative + 1]
3522 = substed_operand[commutative + 1];
3524 for (i = 0; i < noperands; i++)
3526 goal_alternative_win[i] = this_alternative_win[i];
3527 goal_alternative_match_win[i] = this_alternative_match_win[i];
3528 goal_alternative[i] = this_alternative[i];
3529 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3530 goal_alternative_matches[i] = this_alternative_matches[i];
3531 goal_alternative_earlyclobber[i]
3532 = this_alternative_earlyclobber[i];
3534 goal_alternative_number = this_alternative_number;
3535 goal_alternative_swapped = swapped;
3536 goal_earlyclobber = this_earlyclobber;
3540 /* REJECT, set by the ! and ? constraint characters and when a register
3541 would be reloaded into a non-preferred class, discourages the use of
3542 this alternative for a reload goal. REJECT is incremented by six
3543 for each ? and two for each non-preferred class. */
3544 losers = losers * 6 + reject;
3546 /* If this alternative can be made to work by reloading,
3547 and it needs less reloading than the others checked so far,
3548 record it as the chosen goal for reloading. */
3549 if (! bad && best > losers)
3551 for (i = 0; i < noperands; i++)
3553 goal_alternative[i] = this_alternative[i];
3554 goal_alternative_win[i] = this_alternative_win[i];
3555 goal_alternative_match_win[i] = this_alternative_match_win[i];
3556 goal_alternative_offmemok[i] = this_alternative_offmemok[i];
3557 goal_alternative_matches[i] = this_alternative_matches[i];
3558 goal_alternative_earlyclobber[i]
3559 = this_alternative_earlyclobber[i];
3561 goal_alternative_swapped = swapped;
3563 goal_alternative_number = this_alternative_number;
3564 goal_earlyclobber = this_earlyclobber;
3568 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3569 then we need to try each alternative twice,
3570 the second time matching those two operands
3571 as if we had exchanged them.
3572 To do this, really exchange them in operands.
3574 If we have just tried the alternatives the second time,
3575 return operands to normal and drop through. */
3577 if (commutative >= 0)
3582 enum reg_class tclass;
3585 recog_data.operand[commutative] = substed_operand[commutative + 1];
3586 recog_data.operand[commutative + 1] = substed_operand[commutative];
3587 /* Swap the duplicates too. */
3588 for (i = 0; i < recog_data.n_dups; i++)
3589 if (recog_data.dup_num[i] == commutative
3590 || recog_data.dup_num[i] == commutative + 1)
3591 *recog_data.dup_loc[i]
3592 = recog_data.operand[(int) recog_data.dup_num[i]];
3594 tclass = preferred_class[commutative];
3595 preferred_class[commutative] = preferred_class[commutative + 1];
3596 preferred_class[commutative + 1] = tclass;
3598 t = pref_or_nothing[commutative];
3599 pref_or_nothing[commutative] = pref_or_nothing[commutative + 1];
3600 pref_or_nothing[commutative + 1] = t;
3602 memcpy (constraints, recog_data.constraints,
3603 noperands * sizeof (char *));
3608 recog_data.operand[commutative] = substed_operand[commutative];
3609 recog_data.operand[commutative + 1]
3610 = substed_operand[commutative + 1];
3611 /* Unswap the duplicates too. */
3612 for (i = 0; i < recog_data.n_dups; i++)
3613 if (recog_data.dup_num[i] == commutative
3614 || recog_data.dup_num[i] == commutative + 1)
3615 *recog_data.dup_loc[i]
3616 = recog_data.operand[(int) recog_data.dup_num[i]];
3620 /* The operands don't meet the constraints.
3621 goal_alternative describes the alternative
3622 that we could reach by reloading the fewest operands.
3623 Reload so as to fit it. */
3625 if (best == MAX_RECOG_OPERANDS * 2 + 600)
3627 /* No alternative works with reloads?? */
3628 if (insn_code_number >= 0)
3629 fatal_insn ("unable to generate reloads for:", insn);
3630 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3631 /* Avoid further trouble with this insn. */
3632 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3637 /* Jump to `finish' from above if all operands are valid already.
3638 In that case, goal_alternative_win is all 1. */
3641 /* Right now, for any pair of operands I and J that are required to match,
3643 goal_alternative_matches[J] is I.
3644 Set up goal_alternative_matched as the inverse function:
3645 goal_alternative_matched[I] = J. */
3647 for (i = 0; i < noperands; i++)
3648 goal_alternative_matched[i] = -1;
3650 for (i = 0; i < noperands; i++)
3651 if (! goal_alternative_win[i]
3652 && goal_alternative_matches[i] >= 0)
3653 goal_alternative_matched[goal_alternative_matches[i]] = i;
3655 for (i = 0; i < noperands; i++)
3656 goal_alternative_win[i] |= goal_alternative_match_win[i];
3658 /* If the best alternative is with operands 1 and 2 swapped,
3659 consider them swapped before reporting the reloads. Update the
3660 operand numbers of any reloads already pushed. */
3662 if (goal_alternative_swapped)
3666 tem = substed_operand[commutative];
3667 substed_operand[commutative] = substed_operand[commutative + 1];
3668 substed_operand[commutative + 1] = tem;
3669 tem = recog_data.operand[commutative];
3670 recog_data.operand[commutative] = recog_data.operand[commutative + 1];
3671 recog_data.operand[commutative + 1] = tem;
3672 tem = *recog_data.operand_loc[commutative];
3673 *recog_data.operand_loc[commutative]
3674 = *recog_data.operand_loc[commutative + 1];
3675 *recog_data.operand_loc[commutative + 1] = tem;
3677 for (i = 0; i < n_reloads; i++)
3679 if (rld[i].opnum == commutative)
3680 rld[i].opnum = commutative + 1;
3681 else if (rld[i].opnum == commutative + 1)
3682 rld[i].opnum = commutative;
3686 for (i = 0; i < noperands; i++)
3688 operand_reloadnum[i] = -1;
3690 /* If this is an earlyclobber operand, we need to widen the scope.
3691 The reload must remain valid from the start of the insn being
3692 reloaded until after the operand is stored into its destination.
3693 We approximate this with RELOAD_OTHER even though we know that we
3694 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3696 One special case that is worth checking is when we have an
3697 output that is earlyclobber but isn't used past the insn (typically
3698 a SCRATCH). In this case, we only need have the reload live
3699 through the insn itself, but not for any of our input or output
3701 But we must not accidentally narrow the scope of an existing
3702 RELOAD_OTHER reload - leave these alone.
3704 In any case, anything needed to address this operand can remain
3705 however they were previously categorized. */
3707 if (goal_alternative_earlyclobber[i] && operand_type[i] != RELOAD_OTHER)
3709 = (find_reg_note (insn, REG_UNUSED, recog_data.operand[i])
3710 ? RELOAD_FOR_INSN : RELOAD_OTHER);
3713 /* Any constants that aren't allowed and can't be reloaded
3714 into registers are here changed into memory references. */
3715 for (i = 0; i < noperands; i++)
3716 if (! goal_alternative_win[i]
3717 && CONSTANT_P (recog_data.operand[i])
3718 /* force_const_mem does not accept HIGH. */
3719 && GET_CODE (recog_data.operand[i]) != HIGH
3720 && ((PREFERRED_RELOAD_CLASS (recog_data.operand[i],
3721 (enum reg_class) goal_alternative[i])
3723 || no_input_reloads)
3724 && operand_mode[i] != VOIDmode)
3726 substed_operand[i] = recog_data.operand[i]
3727 = find_reloads_toplev (force_const_mem (operand_mode[i],
3728 recog_data.operand[i]),
3729 i, address_type[i], ind_levels, 0, insn,
3731 if (alternative_allows_memconst (recog_data.constraints[i],
3732 goal_alternative_number))
3733 goal_alternative_win[i] = 1;
3736 /* Record the values of the earlyclobber operands for the caller. */
3737 if (goal_earlyclobber)
3738 for (i = 0; i < noperands; i++)
3739 if (goal_alternative_earlyclobber[i])
3740 reload_earlyclobbers[n_earlyclobbers++] = recog_data.operand[i];
3742 /* Now record reloads for all the operands that need them. */
3743 for (i = 0; i < noperands; i++)
3744 if (! goal_alternative_win[i])
3746 /* Operands that match previous ones have already been handled. */
3747 if (goal_alternative_matches[i] >= 0)
3749 /* Handle an operand with a nonoffsettable address
3750 appearing where an offsettable address will do
3751 by reloading the address into a base register.
3753 ??? We can also do this when the operand is a register and
3754 reg_equiv_mem is not offsettable, but this is a bit tricky,
3755 so we don't bother with it. It may not be worth doing. */
3756 else if (goal_alternative_matched[i] == -1
3757 && goal_alternative_offmemok[i]
3758 && GET_CODE (recog_data.operand[i]) == MEM)
3760 operand_reloadnum[i]
3761 = push_reload (XEXP (recog_data.operand[i], 0), NULL_RTX,
3762 &XEXP (recog_data.operand[i], 0), (rtx*) 0,
3763 MODE_BASE_REG_CLASS (VOIDmode),
3764 GET_MODE (XEXP (recog_data.operand[i], 0)),
3765 VOIDmode, 0, 0, i, RELOAD_FOR_INPUT);
3766 rld[operand_reloadnum[i]].inc
3767 = GET_MODE_SIZE (GET_MODE (recog_data.operand[i]));
3769 /* If this operand is an output, we will have made any
3770 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3771 now we are treating part of the operand as an input, so
3772 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3774 if (modified[i] == RELOAD_WRITE)
3776 for (j = 0; j < n_reloads; j++)
3778 if (rld[j].opnum == i)
3780 if (rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS)
3781 rld[j].when_needed = RELOAD_FOR_INPUT_ADDRESS;
3782 else if (rld[j].when_needed
3783 == RELOAD_FOR_OUTADDR_ADDRESS)
3784 rld[j].when_needed = RELOAD_FOR_INPADDR_ADDRESS;
3789 else if (goal_alternative_matched[i] == -1)
3791 operand_reloadnum[i]
3792 = push_reload ((modified[i] != RELOAD_WRITE
3793 ? recog_data.operand[i] : 0),
3794 (modified[i] != RELOAD_READ
3795 ? recog_data.operand[i] : 0),
3796 (modified[i] != RELOAD_WRITE
3797 ? recog_data.operand_loc[i] : 0),
3798 (modified[i] != RELOAD_READ
3799 ? recog_data.operand_loc[i] : 0),
3800 (enum reg_class) goal_alternative[i],
3801 (modified[i] == RELOAD_WRITE
3802 ? VOIDmode : operand_mode[i]),
3803 (modified[i] == RELOAD_READ
3804 ? VOIDmode : operand_mode[i]),
3805 (insn_code_number < 0 ? 0
3806 : insn_data[insn_code_number].operand[i].strict_low),
3807 0, i, operand_type[i]);
3809 /* In a matching pair of operands, one must be input only
3810 and the other must be output only.
3811 Pass the input operand as IN and the other as OUT. */
3812 else if (modified[i] == RELOAD_READ
3813 && modified[goal_alternative_matched[i]] == RELOAD_WRITE)
3815 operand_reloadnum[i]
3816 = push_reload (recog_data.operand[i],
3817 recog_data.operand[goal_alternative_matched[i]],
3818 recog_data.operand_loc[i],
3819 recog_data.operand_loc[goal_alternative_matched[i]],
3820 (enum reg_class) goal_alternative[i],
3822 operand_mode[goal_alternative_matched[i]],
3823 0, 0, i, RELOAD_OTHER);
3824 operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum;
3826 else if (modified[i] == RELOAD_WRITE
3827 && modified[goal_alternative_matched[i]] == RELOAD_READ)
3829 operand_reloadnum[goal_alternative_matched[i]]
3830 = push_reload (recog_data.operand[goal_alternative_matched[i]],
3831 recog_data.operand[i],
3832 recog_data.operand_loc[goal_alternative_matched[i]],
3833 recog_data.operand_loc[i],
3834 (enum reg_class) goal_alternative[i],
3835 operand_mode[goal_alternative_matched[i]],
3837 0, 0, i, RELOAD_OTHER);
3838 operand_reloadnum[i] = output_reloadnum;
3840 else if (insn_code_number >= 0)
3844 error_for_asm (insn, "inconsistent operand constraints in an `asm'");
3845 /* Avoid further trouble with this insn. */
3846 PATTERN (insn) = gen_rtx_USE (VOIDmode, const0_rtx);
3851 else if (goal_alternative_matched[i] < 0
3852 && goal_alternative_matches[i] < 0
3853 && !address_operand_reloaded[i]
3856 /* For each non-matching operand that's a MEM or a pseudo-register
3857 that didn't get a hard register, make an optional reload.
3858 This may get done even if the insn needs no reloads otherwise. */
3860 rtx operand = recog_data.operand[i];
3862 while (GET_CODE (operand) == SUBREG)
3863 operand = SUBREG_REG (operand);
3864 if ((GET_CODE (operand) == MEM
3865 || (GET_CODE (operand) == REG
3866 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3867 /* If this is only for an output, the optional reload would not
3868 actually cause us to use a register now, just note that
3869 something is stored here. */
3870 && ((enum reg_class) goal_alternative[i] != NO_REGS
3871 || modified[i] == RELOAD_WRITE)
3872 && ! no_input_reloads
3873 /* An optional output reload might allow to delete INSN later.
3874 We mustn't make in-out reloads on insns that are not permitted
3876 If this is an asm, we can't delete it; we must not even call
3877 push_reload for an optional output reload in this case,
3878 because we can't be sure that the constraint allows a register,
3879 and push_reload verifies the constraints for asms. */
3880 && (modified[i] == RELOAD_READ
3881 || (! no_output_reloads && ! this_insn_is_asm)))
3882 operand_reloadnum[i]
3883 = push_reload ((modified[i] != RELOAD_WRITE
3884 ? recog_data.operand[i] : 0),
3885 (modified[i] != RELOAD_READ
3886 ? recog_data.operand[i] : 0),
3887 (modified[i] != RELOAD_WRITE
3888 ? recog_data.operand_loc[i] : 0),
3889 (modified[i] != RELOAD_READ
3890 ? recog_data.operand_loc[i] : 0),
3891 (enum reg_class) goal_alternative[i],
3892 (modified[i] == RELOAD_WRITE
3893 ? VOIDmode : operand_mode[i]),
3894 (modified[i] == RELOAD_READ
3895 ? VOIDmode : operand_mode[i]),
3896 (insn_code_number < 0 ? 0
3897 : insn_data[insn_code_number].operand[i].strict_low),
3898 1, i, operand_type[i]);
3899 /* If a memory reference remains (either as a MEM or a pseudo that
3900 did not get a hard register), yet we can't make an optional
3901 reload, check if this is actually a pseudo register reference;
3902 we then need to emit a USE and/or a CLOBBER so that reload
3903 inheritance will do the right thing. */
3905 && (GET_CODE (operand) == MEM
3906 || (GET_CODE (operand) == REG
3907 && REGNO (operand) >= FIRST_PSEUDO_REGISTER
3908 && reg_renumber [REGNO (operand)] < 0)))
3910 operand = *recog_data.operand_loc[i];
3912 while (GET_CODE (operand) == SUBREG)
3913 operand = SUBREG_REG (operand);
3914 if (GET_CODE (operand) == REG)
3916 if (modified[i] != RELOAD_WRITE)
3917 /* We mark the USE with QImode so that we recognize
3918 it as one that can be safely deleted at the end
3920 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, operand),
3922 if (modified[i] != RELOAD_READ)
3923 emit_insn_after (gen_rtx_CLOBBER (VOIDmode, operand), insn);
3927 else if (goal_alternative_matches[i] >= 0
3928 && goal_alternative_win[goal_alternative_matches[i]]
3929 && modified[i] == RELOAD_READ
3930 && modified[goal_alternative_matches[i]] == RELOAD_WRITE
3931 && ! no_input_reloads && ! no_output_reloads
3934 /* Similarly, make an optional reload for a pair of matching
3935 objects that are in MEM or a pseudo that didn't get a hard reg. */
3937 rtx operand = recog_data.operand[i];
3939 while (GET_CODE (operand) == SUBREG)
3940 operand = SUBREG_REG (operand);
3941 if ((GET_CODE (operand) == MEM
3942 || (GET_CODE (operand) == REG
3943 && REGNO (operand) >= FIRST_PSEUDO_REGISTER))
3944 && ((enum reg_class) goal_alternative[goal_alternative_matches[i]]
3946 operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]]
3947 = push_reload (recog_data.operand[goal_alternative_matches[i]],
3948 recog_data.operand[i],
3949 recog_data.operand_loc[goal_alternative_matches[i]],
3950 recog_data.operand_loc[i],
3951 (enum reg_class) goal_alternative[goal_alternative_matches[i]],
3952 operand_mode[goal_alternative_matches[i]],
3954 0, 1, goal_alternative_matches[i], RELOAD_OTHER);
3957 /* Perform whatever substitutions on the operands we are supposed
3958 to make due to commutativity or replacement of registers
3959 with equivalent constants or memory slots. */
3961 for (i = 0; i < noperands; i++)
3963 /* We only do this on the last pass through reload, because it is
3964 possible for some data (like reg_equiv_address) to be changed during
3965 later passes. Moreover, we loose the opportunity to get a useful
3966 reload_{in,out}_reg when we do these replacements. */
3970 rtx substitution = substed_operand[i];
3972 *recog_data.operand_loc[i] = substitution;
3974 /* If we're replacing an operand with a LABEL_REF, we need
3975 to make sure that there's a REG_LABEL note attached to
3976 this instruction. */
3977 if (GET_CODE (insn) != JUMP_INSN
3978 && GET_CODE (substitution) == LABEL_REF
3979 && !find_reg_note (insn, REG_LABEL, XEXP (substitution, 0)))
3980 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
3981 XEXP (substitution, 0),
3985 retval |= (substed_operand[i] != *recog_data.operand_loc[i]);
3988 /* If this insn pattern contains any MATCH_DUP's, make sure that
3989 they will be substituted if the operands they match are substituted.
3990 Also do now any substitutions we already did on the operands.
3992 Don't do this if we aren't making replacements because we might be
3993 propagating things allocated by frame pointer elimination into places
3994 it doesn't expect. */
3996 if (insn_code_number >= 0 && replace)
3997 for (i = insn_data[insn_code_number].n_dups - 1; i >= 0; i--)
3999 int opno = recog_data.dup_num[i];
4000 *recog_data.dup_loc[i] = *recog_data.operand_loc[opno];
4001 dup_replacements (recog_data.dup_loc[i], recog_data.operand_loc[opno]);
4005 /* This loses because reloading of prior insns can invalidate the equivalence
4006 (or at least find_equiv_reg isn't smart enough to find it any more),
4007 causing this insn to need more reload regs than it needed before.
4008 It may be too late to make the reload regs available.
4009 Now this optimization is done safely in choose_reload_regs. */
4011 /* For each reload of a reg into some other class of reg,
4012 search for an existing equivalent reg (same value now) in the right class.
4013 We can use it as long as we don't need to change its contents. */
4014 for (i = 0; i < n_reloads; i++)
4015 if (rld[i].reg_rtx == 0
4017 && GET_CODE (rld[i].in) == REG
4021 = find_equiv_reg (rld[i].in, insn, rld[i].class, -1,
4022 static_reload_reg_p, 0, rld[i].inmode);
4023 /* Prevent generation of insn to load the value
4024 because the one we found already has the value. */
4026 rld[i].in = rld[i].reg_rtx;
4030 /* Perhaps an output reload can be combined with another
4031 to reduce needs by one. */
4032 if (!goal_earlyclobber)
4035 /* If we have a pair of reloads for parts of an address, they are reloading
4036 the same object, the operands themselves were not reloaded, and they
4037 are for two operands that are supposed to match, merge the reloads and
4038 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4040 for (i = 0; i < n_reloads; i++)
4044 for (j = i + 1; j < n_reloads; j++)
4045 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4046 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4047 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4048 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4049 && (rld[j].when_needed == RELOAD_FOR_INPUT_ADDRESS
4050 || rld[j].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4051 || rld[j].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4052 || rld[j].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4053 && rtx_equal_p (rld[i].in, rld[j].in)
4054 && (operand_reloadnum[rld[i].opnum] < 0
4055 || rld[operand_reloadnum[rld[i].opnum]].optional)
4056 && (operand_reloadnum[rld[j].opnum] < 0
4057 || rld[operand_reloadnum[rld[j].opnum]].optional)
4058 && (goal_alternative_matches[rld[i].opnum] == rld[j].opnum
4059 || (goal_alternative_matches[rld[j].opnum]
4062 for (k = 0; k < n_replacements; k++)
4063 if (replacements[k].what == j)
4064 replacements[k].what = i;
4066 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4067 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4068 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4070 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4075 /* Scan all the reloads and update their type.
4076 If a reload is for the address of an operand and we didn't reload
4077 that operand, change the type. Similarly, change the operand number
4078 of a reload when two operands match. If a reload is optional, treat it
4079 as though the operand isn't reloaded.
4081 ??? This latter case is somewhat odd because if we do the optional
4082 reload, it means the object is hanging around. Thus we need only
4083 do the address reload if the optional reload was NOT done.
4085 Change secondary reloads to be the address type of their operand, not
4088 If an operand's reload is now RELOAD_OTHER, change any
4089 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4090 RELOAD_FOR_OTHER_ADDRESS. */
4092 for (i = 0; i < n_reloads; i++)
4094 if (rld[i].secondary_p
4095 && rld[i].when_needed == operand_type[rld[i].opnum])
4096 rld[i].when_needed = address_type[rld[i].opnum];
4098 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4099 || rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4100 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4101 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4102 && (operand_reloadnum[rld[i].opnum] < 0
4103 || rld[operand_reloadnum[rld[i].opnum]].optional))
4105 /* If we have a secondary reload to go along with this reload,
4106 change its type to RELOAD_FOR_OPADDR_ADDR. */
4108 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4109 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4110 && rld[i].secondary_in_reload != -1)
4112 int secondary_in_reload = rld[i].secondary_in_reload;
4114 rld[secondary_in_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4116 /* If there's a tertiary reload we have to change it also. */
4117 if (secondary_in_reload > 0
4118 && rld[secondary_in_reload].secondary_in_reload != -1)
4119 rld[rld[secondary_in_reload].secondary_in_reload].when_needed
4120 = RELOAD_FOR_OPADDR_ADDR;
4123 if ((rld[i].when_needed == RELOAD_FOR_OUTPUT_ADDRESS
4124 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4125 && rld[i].secondary_out_reload != -1)
4127 int secondary_out_reload = rld[i].secondary_out_reload;
4129 rld[secondary_out_reload].when_needed = RELOAD_FOR_OPADDR_ADDR;
4131 /* If there's a tertiary reload we have to change it also. */
4132 if (secondary_out_reload
4133 && rld[secondary_out_reload].secondary_out_reload != -1)
4134 rld[rld[secondary_out_reload].secondary_out_reload].when_needed
4135 = RELOAD_FOR_OPADDR_ADDR;
4138 if (rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS
4139 || rld[i].when_needed == RELOAD_FOR_OUTADDR_ADDRESS)
4140 rld[i].when_needed = RELOAD_FOR_OPADDR_ADDR;
4142 rld[i].when_needed = RELOAD_FOR_OPERAND_ADDRESS;
4145 if ((rld[i].when_needed == RELOAD_FOR_INPUT_ADDRESS
4146 || rld[i].when_needed == RELOAD_FOR_INPADDR_ADDRESS)
4147 && operand_reloadnum[rld[i].opnum] >= 0
4148 && (rld[operand_reloadnum[rld[i].opnum]].when_needed
4150 rld[i].when_needed = RELOAD_FOR_OTHER_ADDRESS;
4152 if (goal_alternative_matches[rld[i].opnum] >= 0)
4153 rld[i].opnum = goal_alternative_matches[rld[i].opnum];
4156 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4157 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4158 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4160 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4161 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4162 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4163 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4164 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4165 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4166 This is complicated by the fact that a single operand can have more
4167 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4168 choose_reload_regs without affecting code quality, and cases that
4169 actually fail are extremely rare, so it turns out to be better to fix
4170 the problem here by not generating cases that choose_reload_regs will
4172 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4173 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4175 We can reduce the register pressure by exploiting that a
4176 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4177 does not conflict with any of them, if it is only used for the first of
4178 the RELOAD_FOR_X_ADDRESS reloads. */
4180 int first_op_addr_num = -2;
4181 int first_inpaddr_num[MAX_RECOG_OPERANDS];
4182 int first_outpaddr_num[MAX_RECOG_OPERANDS];
4183 int need_change = 0;
4184 /* We use last_op_addr_reload and the contents of the above arrays
4185 first as flags - -2 means no instance encountered, -1 means exactly
4186 one instance encountered.
4187 If more than one instance has been encountered, we store the reload
4188 number of the first reload of the kind in question; reload numbers
4189 are known to be non-negative. */
4190 for (i = 0; i < noperands; i++)
4191 first_inpaddr_num[i] = first_outpaddr_num[i] = -2;
4192 for (i = n_reloads - 1; i >= 0; i--)
4194 switch (rld[i].when_needed)
4196 case RELOAD_FOR_OPERAND_ADDRESS:
4197 if (++first_op_addr_num >= 0)
4199 first_op_addr_num = i;
4203 case RELOAD_FOR_INPUT_ADDRESS:
4204 if (++first_inpaddr_num[rld[i].opnum] >= 0)
4206 first_inpaddr_num[rld[i].opnum] = i;
4210 case RELOAD_FOR_OUTPUT_ADDRESS:
4211 if (++first_outpaddr_num[rld[i].opnum] >= 0)
4213 first_outpaddr_num[rld[i].opnum] = i;
4224 for (i = 0; i < n_reloads; i++)
4227 enum reload_type type;
4229 switch (rld[i].when_needed)
4231 case RELOAD_FOR_OPADDR_ADDR:
4232 first_num = first_op_addr_num;
4233 type = RELOAD_FOR_OPERAND_ADDRESS;
4235 case RELOAD_FOR_INPADDR_ADDRESS:
4236 first_num = first_inpaddr_num[rld[i].opnum];
4237 type = RELOAD_FOR_INPUT_ADDRESS;
4239 case RELOAD_FOR_OUTADDR_ADDRESS:
4240 first_num = first_outpaddr_num[rld[i].opnum];
4241 type = RELOAD_FOR_OUTPUT_ADDRESS;
4248 else if (i > first_num)
4249 rld[i].when_needed = type;
4252 /* Check if the only TYPE reload that uses reload I is
4253 reload FIRST_NUM. */
4254 for (j = n_reloads - 1; j > first_num; j--)
4256 if (rld[j].when_needed == type
4257 && (rld[i].secondary_p
4258 ? rld[j].secondary_in_reload == i
4259 : reg_mentioned_p (rld[i].in, rld[j].in)))
4261 rld[i].when_needed = type;
4270 /* See if we have any reloads that are now allowed to be merged
4271 because we've changed when the reload is needed to
4272 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4273 check for the most common cases. */
4275 for (i = 0; i < n_reloads; i++)
4276 if (rld[i].in != 0 && rld[i].out == 0
4277 && (rld[i].when_needed == RELOAD_FOR_OPERAND_ADDRESS
4278 || rld[i].when_needed == RELOAD_FOR_OPADDR_ADDR
4279 || rld[i].when_needed == RELOAD_FOR_OTHER_ADDRESS))
4280 for (j = 0; j < n_reloads; j++)
4281 if (i != j && rld[j].in != 0 && rld[j].out == 0
4282 && rld[j].when_needed == rld[i].when_needed
4283 && MATCHES (rld[i].in, rld[j].in)
4284 && rld[i].class == rld[j].class
4285 && !rld[i].nocombine && !rld[j].nocombine
4286 && rld[i].reg_rtx == rld[j].reg_rtx)
4288 rld[i].opnum = MIN (rld[i].opnum, rld[j].opnum);
4289 transfer_replacements (i, j);
4294 /* If we made any reloads for addresses, see if they violate a
4295 "no input reloads" requirement for this insn. But loads that we
4296 do after the insn (such as for output addresses) are fine. */
4297 if (no_input_reloads)
4298 for (i = 0; i < n_reloads; i++)
4300 && rld[i].when_needed != RELOAD_FOR_OUTADDR_ADDRESS
4301 && rld[i].when_needed != RELOAD_FOR_OUTPUT_ADDRESS)
4305 /* Compute reload_mode and reload_nregs. */
4306 for (i = 0; i < n_reloads; i++)
4309 = (rld[i].inmode == VOIDmode
4310 || (GET_MODE_SIZE (rld[i].outmode)
4311 > GET_MODE_SIZE (rld[i].inmode)))
4312 ? rld[i].outmode : rld[i].inmode;
4314 rld[i].nregs = CLASS_MAX_NREGS (rld[i].class, rld[i].mode);
4317 /* Special case a simple move with an input reload and a
4318 destination of a hard reg, if the hard reg is ok, use it. */
4319 for (i = 0; i < n_reloads; i++)
4320 if (rld[i].when_needed == RELOAD_FOR_INPUT
4321 && GET_CODE (PATTERN (insn)) == SET
4322 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
4323 && SET_SRC (PATTERN (insn)) == rld[i].in)
4325 rtx dest = SET_DEST (PATTERN (insn));
4326 unsigned int regno = REGNO (dest);
4328 if (regno < FIRST_PSEUDO_REGISTER
4329 && TEST_HARD_REG_BIT (reg_class_contents[rld[i].class], regno)
4330 && HARD_REGNO_MODE_OK (regno, rld[i].mode))
4331 rld[i].reg_rtx = dest;
4337 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4338 accepts a memory operand with constant address. */
4341 alternative_allows_memconst (constraint, altnum)
4342 const char *constraint;
4346 /* Skip alternatives before the one requested. */
4349 while (*constraint++ != ',');
4352 /* Scan the requested alternative for 'm' or 'o'.
4353 If one of them is present, this alternative accepts memory constants. */
4354 while ((c = *constraint++) && c != ',' && c != '#')
4355 if (c == 'm' || c == 'o' || EXTRA_MEMORY_CONSTRAINT (c))
4360 /* Scan X for memory references and scan the addresses for reloading.
4361 Also checks for references to "constant" regs that we want to eliminate
4362 and replaces them with the values they stand for.
4363 We may alter X destructively if it contains a reference to such.
4364 If X is just a constant reg, we return the equivalent value
4367 IND_LEVELS says how many levels of indirect addressing this machine
4370 OPNUM and TYPE identify the purpose of the reload.
4372 IS_SET_DEST is true if X is the destination of a SET, which is not
4373 appropriate to be replaced by a constant.
4375 INSN, if nonzero, is the insn in which we do the reload. It is used
4376 to determine if we may generate output reloads, and where to put USEs
4377 for pseudos that we have to replace with stack slots.
4379 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4380 result of find_reloads_address. */
4383 find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest, insn,
4387 enum reload_type type;
4391 int *address_reloaded;
4393 RTX_CODE code = GET_CODE (x);
4395 const char *fmt = GET_RTX_FORMAT (code);
4401 /* This code is duplicated for speed in find_reloads. */
4402 int regno = REGNO (x);
4403 if (reg_equiv_constant[regno] != 0 && !is_set_dest)
4404 x = reg_equiv_constant[regno];
4406 /* This creates (subreg (mem...)) which would cause an unnecessary
4407 reload of the mem. */
4408 else if (reg_equiv_mem[regno] != 0)
4409 x = reg_equiv_mem[regno];
4411 else if (reg_equiv_memory_loc[regno]
4412 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
4414 rtx mem = make_memloc (x, regno);
4415 if (reg_equiv_address[regno]
4416 || ! rtx_equal_p (mem, reg_equiv_mem[regno]))
4418 /* If this is not a toplevel operand, find_reloads doesn't see
4419 this substitution. We have to emit a USE of the pseudo so
4420 that delete_output_reload can see it. */
4421 if (replace_reloads && recog_data.operand[opnum] != x)
4422 /* We mark the USE with QImode so that we recognize it
4423 as one that can be safely deleted at the end of
4425 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, x), insn),
4428 i = find_reloads_address (GET_MODE (x), &x, XEXP (x, 0), &XEXP (x, 0),
4429 opnum, type, ind_levels, insn);
4430 if (address_reloaded)
4431 *address_reloaded = i;
4440 i = find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0),
4441 opnum, type, ind_levels, insn);
4442 if (address_reloaded)
4443 *address_reloaded = i;
4448 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)
4450 /* Check for SUBREG containing a REG that's equivalent to a constant.
4451 If the constant has a known value, truncate it right now.
4452 Similarly if we are extracting a single-word of a multi-word
4453 constant. If the constant is symbolic, allow it to be substituted
4454 normally. push_reload will strip the subreg later. If the
4455 constant is VOIDmode, abort because we will lose the mode of
4456 the register (this should never happen because one of the cases
4457 above should handle it). */
4459 int regno = REGNO (SUBREG_REG (x));
4462 if (subreg_lowpart_p (x)
4463 && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4464 && reg_equiv_constant[regno] != 0
4465 && (tem = gen_lowpart_common (GET_MODE (x),
4466 reg_equiv_constant[regno])) != 0)
4469 if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0
4470 && reg_equiv_constant[regno] != 0)
4473 simplify_gen_subreg (GET_MODE (x), reg_equiv_constant[regno],
4474 GET_MODE (SUBREG_REG (x)), SUBREG_BYTE (x));
4480 /* If the subreg contains a reg that will be converted to a mem,
4481 convert the subreg to a narrower memref now.
4482 Otherwise, we would get (subreg (mem ...) ...),
4483 which would force reload of the mem.
4485 We also need to do this if there is an equivalent MEM that is
4486 not offsettable. In that case, alter_subreg would produce an
4487 invalid address on big-endian machines.
4489 For machines that extend byte loads, we must not reload using
4490 a wider mode if we have a paradoxical SUBREG. find_reloads will
4491 force a reload in that case. So we should not do anything here. */
4493 else if (regno >= FIRST_PSEUDO_REGISTER
4494 #ifdef LOAD_EXTEND_OP
4495 && (GET_MODE_SIZE (GET_MODE (x))
4496 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
4498 && (reg_equiv_address[regno] != 0
4499 || (reg_equiv_mem[regno] != 0
4500 && (! strict_memory_address_p (GET_MODE (x),
4501 XEXP (reg_equiv_mem[regno], 0))
4502 || ! offsettable_memref_p (reg_equiv_mem[regno])
4503 || num_not_at_initial_offset))))
4504 x = find_reloads_subreg_address (x, 1, opnum, type, ind_levels,
4508 for (copied = 0, i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4512 rtx new_part = find_reloads_toplev (XEXP (x, i), opnum, type,
4513 ind_levels, is_set_dest, insn,
4515 /* If we have replaced a reg with it's equivalent memory loc -
4516 that can still be handled here e.g. if it's in a paradoxical
4517 subreg - we must make the change in a copy, rather than using
4518 a destructive change. This way, find_reloads can still elect
4519 not to do the change. */
4520 if (new_part != XEXP (x, i) && ! CONSTANT_P (new_part) && ! copied)
4522 x = shallow_copy_rtx (x);
4525 XEXP (x, i) = new_part;
4531 /* Return a mem ref for the memory equivalent of reg REGNO.
4532 This mem ref is not shared with anything. */
4535 make_memloc (ad, regno)
4539 /* We must rerun eliminate_regs, in case the elimination
4540 offsets have changed. */
4542 = XEXP (eliminate_regs (reg_equiv_memory_loc[regno], 0, NULL_RTX), 0);
4544 /* If TEM might contain a pseudo, we must copy it to avoid
4545 modifying it when we do the substitution for the reload. */
4546 if (rtx_varies_p (tem, 0))
4547 tem = copy_rtx (tem);
4549 tem = replace_equiv_address_nv (reg_equiv_memory_loc[regno], tem);
4550 tem = adjust_address_nv (tem, GET_MODE (ad), 0);
4552 /* Copy the result if it's still the same as the equivalence, to avoid
4553 modifying it when we do the substitution for the reload. */
4554 if (tem == reg_equiv_memory_loc[regno])
4555 tem = copy_rtx (tem);
4559 /* Returns true if AD could be turned into a valid memory reference
4560 to mode MODE by reloading the part pointed to by PART into a
4564 maybe_memory_address_p (mode, ad, part)
4565 enum machine_mode mode;
4571 rtx reg = gen_rtx_REG (GET_MODE (tem), max_reg_num ());
4574 retv = memory_address_p (mode, ad);
4580 /* Record all reloads needed for handling memory address AD
4581 which appears in *LOC in a memory reference to mode MODE
4582 which itself is found in location *MEMREFLOC.
4583 Note that we take shortcuts assuming that no multi-reg machine mode
4584 occurs as part of an address.
4586 OPNUM and TYPE specify the purpose of this reload.
4588 IND_LEVELS says how many levels of indirect addressing this machine
4591 INSN, if nonzero, is the insn in which we do the reload. It is used
4592 to determine if we may generate output reloads, and where to put USEs
4593 for pseudos that we have to replace with stack slots.
4595 Value is nonzero if this address is reloaded or replaced as a whole.
4596 This is interesting to the caller if the address is an autoincrement.
4598 Note that there is no verification that the address will be valid after
4599 this routine does its work. Instead, we rely on the fact that the address
4600 was valid when reload started. So we need only undo things that reload
4601 could have broken. These are wrong register types, pseudos not allocated
4602 to a hard register, and frame pointer elimination. */
4605 find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels, insn)
4606 enum machine_mode mode;
4611 enum reload_type type;
4616 int removed_and = 0;
4619 /* If the address is a register, see if it is a legitimate address and
4620 reload if not. We first handle the cases where we need not reload
4621 or where we must reload in a non-standard way. */
4623 if (GET_CODE (ad) == REG)
4627 /* If the register is equivalent to an invariant expression, substitute
4628 the invariant, and eliminate any eliminable register references. */
4629 tem = reg_equiv_constant[regno];
4631 && (tem = eliminate_regs (tem, mode, insn))
4632 && strict_memory_address_p (mode, tem))
4638 tem = reg_equiv_memory_loc[regno];
4641 if (reg_equiv_address[regno] != 0 || num_not_at_initial_offset)
4643 tem = make_memloc (ad, regno);
4644 if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))
4646 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
4647 &XEXP (tem, 0), opnum,
4648 ADDR_TYPE (type), ind_levels, insn);
4650 /* We can avoid a reload if the register's equivalent memory
4651 expression is valid as an indirect memory address.
4652 But not all addresses are valid in a mem used as an indirect
4653 address: only reg or reg+constant. */
4656 && strict_memory_address_p (mode, tem)
4657 && (GET_CODE (XEXP (tem, 0)) == REG
4658 || (GET_CODE (XEXP (tem, 0)) == PLUS
4659 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4660 && CONSTANT_P (XEXP (XEXP (tem, 0), 1)))))
4662 /* TEM is not the same as what we'll be replacing the
4663 pseudo with after reload, put a USE in front of INSN
4664 in the final reload pass. */
4666 && num_not_at_initial_offset
4667 && ! rtx_equal_p (tem, reg_equiv_mem[regno]))
4670 /* We mark the USE with QImode so that we
4671 recognize it as one that can be safely
4672 deleted at the end of reload. */
4673 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad),
4676 /* This doesn't really count as replacing the address
4677 as a whole, since it is still a memory access. */
4685 /* The only remaining case where we can avoid a reload is if this is a
4686 hard register that is valid as a base register and which is not the
4687 subject of a CLOBBER in this insn. */
4689 else if (regno < FIRST_PSEUDO_REGISTER
4690 && REGNO_MODE_OK_FOR_BASE_P (regno, mode)
4691 && ! regno_clobbered_p (regno, this_insn, mode, 0))
4694 /* If we do not have one of the cases above, we must do the reload. */
4695 push_reload (ad, NULL_RTX, loc, (rtx*) 0, MODE_BASE_REG_CLASS (mode),
4696 GET_MODE (ad), VOIDmode, 0, 0, opnum, type);
4700 if (strict_memory_address_p (mode, ad))
4702 /* The address appears valid, so reloads are not needed.
4703 But the address may contain an eliminable register.
4704 This can happen because a machine with indirect addressing
4705 may consider a pseudo register by itself a valid address even when
4706 it has failed to get a hard reg.
4707 So do a tree-walk to find and eliminate all such regs. */
4709 /* But first quickly dispose of a common case. */
4710 if (GET_CODE (ad) == PLUS
4711 && GET_CODE (XEXP (ad, 1)) == CONST_INT
4712 && GET_CODE (XEXP (ad, 0)) == REG
4713 && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0)
4716 subst_reg_equivs_changed = 0;
4717 *loc = subst_reg_equivs (ad, insn);
4719 if (! subst_reg_equivs_changed)
4722 /* Check result for validity after substitution. */
4723 if (strict_memory_address_p (mode, ad))
4727 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4732 LEGITIMIZE_RELOAD_ADDRESS (ad, GET_MODE (*memrefloc), opnum, type,
4737 *memrefloc = copy_rtx (*memrefloc);
4738 XEXP (*memrefloc, 0) = ad;
4739 move_replacements (&ad, &XEXP (*memrefloc, 0));
4745 /* The address is not valid. We have to figure out why. First see if
4746 we have an outer AND and remove it if so. Then analyze what's inside. */
4748 if (GET_CODE (ad) == AND)
4751 loc = &XEXP (ad, 0);
4755 /* One possibility for why the address is invalid is that it is itself
4756 a MEM. This can happen when the frame pointer is being eliminated, a
4757 pseudo is not allocated to a hard register, and the offset between the
4758 frame and stack pointers is not its initial value. In that case the
4759 pseudo will have been replaced by a MEM referring to the
4761 if (GET_CODE (ad) == MEM)
4763 /* First ensure that the address in this MEM is valid. Then, unless
4764 indirect addresses are valid, reload the MEM into a register. */
4766 find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0),
4767 opnum, ADDR_TYPE (type),
4768 ind_levels == 0 ? 0 : ind_levels - 1, insn);
4770 /* If tem was changed, then we must create a new memory reference to
4771 hold it and store it back into memrefloc. */
4772 if (tem != ad && memrefloc)
4774 *memrefloc = copy_rtx (*memrefloc);
4775 copy_replacements (tem, XEXP (*memrefloc, 0));
4776 loc = &XEXP (*memrefloc, 0);
4778 loc = &XEXP (*loc, 0);
4781 /* Check similar cases as for indirect addresses as above except
4782 that we can allow pseudos and a MEM since they should have been
4783 taken care of above. */
4786 || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok)
4787 || GET_CODE (XEXP (tem, 0)) == MEM
4788 || ! (GET_CODE (XEXP (tem, 0)) == REG
4789 || (GET_CODE (XEXP (tem, 0)) == PLUS
4790 && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG
4791 && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT)))
4793 /* Must use TEM here, not AD, since it is the one that will
4794 have any subexpressions reloaded, if needed. */
4795 push_reload (tem, NULL_RTX, loc, (rtx*) 0,
4796 MODE_BASE_REG_CLASS (mode), GET_MODE (tem),
4799 return ! removed_and;
4805 /* If we have address of a stack slot but it's not valid because the
4806 displacement is too large, compute the sum in a register.
4807 Handle all base registers here, not just fp/ap/sp, because on some
4808 targets (namely SH) we can also get too large displacements from
4809 big-endian corrections. */
4810 else if (GET_CODE (ad) == PLUS
4811 && GET_CODE (XEXP (ad, 0)) == REG
4812 && REGNO (XEXP (ad, 0)) < FIRST_PSEUDO_REGISTER
4813 && REG_MODE_OK_FOR_BASE_P (XEXP (ad, 0), mode)
4814 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
4816 /* Unshare the MEM rtx so we can safely alter it. */
4819 *memrefloc = copy_rtx (*memrefloc);
4820 loc = &XEXP (*memrefloc, 0);
4822 loc = &XEXP (*loc, 0);
4825 if (double_reg_address_ok)
4827 /* Unshare the sum as well. */
4828 *loc = ad = copy_rtx (ad);
4830 /* Reload the displacement into an index reg.
4831 We assume the frame pointer or arg pointer is a base reg. */
4832 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4833 INDEX_REG_CLASS, GET_MODE (ad), opnum,
4839 /* If the sum of two regs is not necessarily valid,
4840 reload the sum into a base reg.
4841 That will at least work. */
4842 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4843 Pmode, opnum, type, ind_levels);
4845 return ! removed_and;
4848 /* If we have an indexed stack slot, there are three possible reasons why
4849 it might be invalid: The index might need to be reloaded, the address
4850 might have been made by frame pointer elimination and hence have a
4851 constant out of range, or both reasons might apply.
4853 We can easily check for an index needing reload, but even if that is the
4854 case, we might also have an invalid constant. To avoid making the
4855 conservative assumption and requiring two reloads, we see if this address
4856 is valid when not interpreted strictly. If it is, the only problem is
4857 that the index needs a reload and find_reloads_address_1 will take care
4860 Handle all base registers here, not just fp/ap/sp, because on some
4861 targets (namely Sparc) we can also get invalid addresses from preventive
4862 subreg big-endian corrections made by find_reloads_toplev.
4864 If we decide to do something, it must be that `double_reg_address_ok'
4865 is true. We generate a reload of the base register + constant and
4866 rework the sum so that the reload register will be added to the index.
4867 This is safe because we know the address isn't shared.
4869 We check for the base register as both the first and second operand of
4870 the innermost PLUS. */
4872 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4873 && GET_CODE (XEXP (ad, 0)) == PLUS
4874 && GET_CODE (XEXP (XEXP (ad, 0), 0)) == REG
4875 && REGNO (XEXP (XEXP (ad, 0), 0)) < FIRST_PSEUDO_REGISTER
4876 && REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 0), mode)
4877 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 1)))
4879 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4880 plus_constant (XEXP (XEXP (ad, 0), 0),
4881 INTVAL (XEXP (ad, 1))),
4882 XEXP (XEXP (ad, 0), 1));
4883 find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0),
4884 MODE_BASE_REG_CLASS (mode),
4885 GET_MODE (ad), opnum, type, ind_levels);
4886 find_reloads_address_1 (mode, XEXP (ad, 1), 1, &XEXP (ad, 1), opnum,
4892 else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT
4893 && GET_CODE (XEXP (ad, 0)) == PLUS
4894 && GET_CODE (XEXP (XEXP (ad, 0), 1)) == REG
4895 && REGNO (XEXP (XEXP (ad, 0), 1)) < FIRST_PSEUDO_REGISTER
4896 && REG_MODE_OK_FOR_BASE_P (XEXP (XEXP (ad, 0), 1), mode)
4897 && ! maybe_memory_address_p (mode, ad, &XEXP (XEXP (ad, 0), 0)))
4899 *loc = ad = gen_rtx_PLUS (GET_MODE (ad),
4900 XEXP (XEXP (ad, 0), 0),
4901 plus_constant (XEXP (XEXP (ad, 0), 1),
4902 INTVAL (XEXP (ad, 1))));
4903 find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1),
4904 MODE_BASE_REG_CLASS (mode),
4905 GET_MODE (ad), opnum, type, ind_levels);
4906 find_reloads_address_1 (mode, XEXP (ad, 0), 1, &XEXP (ad, 0), opnum,
4912 /* See if address becomes valid when an eliminable register
4913 in a sum is replaced. */
4916 if (GET_CODE (ad) == PLUS)
4917 tem = subst_indexed_address (ad);
4918 if (tem != ad && strict_memory_address_p (mode, tem))
4920 /* Ok, we win that way. Replace any additional eliminable
4923 subst_reg_equivs_changed = 0;
4924 tem = subst_reg_equivs (tem, insn);
4926 /* Make sure that didn't make the address invalid again. */
4928 if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem))
4935 /* If constants aren't valid addresses, reload the constant address
4937 if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad))
4939 /* If AD is an address in the constant pool, the MEM rtx may be shared.
4940 Unshare it so we can safely alter it. */
4941 if (memrefloc && GET_CODE (ad) == SYMBOL_REF
4942 && CONSTANT_POOL_ADDRESS_P (ad))
4944 *memrefloc = copy_rtx (*memrefloc);
4945 loc = &XEXP (*memrefloc, 0);
4947 loc = &XEXP (*loc, 0);
4950 find_reloads_address_part (ad, loc, MODE_BASE_REG_CLASS (mode),
4951 Pmode, opnum, type, ind_levels);
4952 return ! removed_and;
4955 return find_reloads_address_1 (mode, ad, 0, loc, opnum, type, ind_levels,
4959 /* Find all pseudo regs appearing in AD
4960 that are eliminable in favor of equivalent values
4961 and do not have hard regs; replace them by their equivalents.
4962 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4963 front of it for pseudos that we have to replace with stack slots. */
4966 subst_reg_equivs (ad, insn)
4970 RTX_CODE code = GET_CODE (ad);
4989 int regno = REGNO (ad);
4991 if (reg_equiv_constant[regno] != 0)
4993 subst_reg_equivs_changed = 1;
4994 return reg_equiv_constant[regno];
4996 if (reg_equiv_memory_loc[regno] && num_not_at_initial_offset)
4998 rtx mem = make_memloc (ad, regno);
4999 if (! rtx_equal_p (mem, reg_equiv_mem[regno]))
5001 subst_reg_equivs_changed = 1;
5002 /* We mark the USE with QImode so that we recognize it
5003 as one that can be safely deleted at the end of
5005 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode, ad), insn),
5014 /* Quickly dispose of a common case. */
5015 if (XEXP (ad, 0) == frame_pointer_rtx
5016 && GET_CODE (XEXP (ad, 1)) == CONST_INT)
5024 fmt = GET_RTX_FORMAT (code);
5025 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5027 XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i), insn);
5031 /* Compute the sum of X and Y, making canonicalizations assumed in an
5032 address, namely: sum constant integers, surround the sum of two
5033 constants with a CONST, put the constant as the second operand, and
5034 group the constant on the outermost sum.
5036 This routine assumes both inputs are already in canonical form. */
5043 enum machine_mode mode = GET_MODE (x);
5045 if (mode == VOIDmode)
5046 mode = GET_MODE (y);
5048 if (mode == VOIDmode)
5051 if (GET_CODE (x) == CONST_INT)
5052 return plus_constant (y, INTVAL (x));
5053 else if (GET_CODE (y) == CONST_INT)
5054 return plus_constant (x, INTVAL (y));
5055 else if (CONSTANT_P (x))
5056 tem = x, x = y, y = tem;
5058 if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1)))
5059 return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y));
5061 /* Note that if the operands of Y are specified in the opposite
5062 order in the recursive calls below, infinite recursion will occur. */
5063 if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1)))
5064 return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1));
5066 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5067 constant will have been placed second. */
5068 if (CONSTANT_P (x) && CONSTANT_P (y))
5070 if (GET_CODE (x) == CONST)
5072 if (GET_CODE (y) == CONST)
5075 return gen_rtx_CONST (VOIDmode, gen_rtx_PLUS (mode, x, y));
5078 return gen_rtx_PLUS (mode, x, y);
5081 /* If ADDR is a sum containing a pseudo register that should be
5082 replaced with a constant (from reg_equiv_constant),
5083 return the result of doing so, and also apply the associative
5084 law so that the result is more likely to be a valid address.
5085 (But it is not guaranteed to be one.)
5087 Note that at most one register is replaced, even if more are
5088 replaceable. Also, we try to put the result into a canonical form
5089 so it is more likely to be a valid address.
5091 In all other cases, return ADDR. */
5094 subst_indexed_address (addr)
5097 rtx op0 = 0, op1 = 0, op2 = 0;
5101 if (GET_CODE (addr) == PLUS)
5103 /* Try to find a register to replace. */
5104 op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0;
5105 if (GET_CODE (op0) == REG
5106 && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER
5107 && reg_renumber[regno] < 0
5108 && reg_equiv_constant[regno] != 0)
5109 op0 = reg_equiv_constant[regno];
5110 else if (GET_CODE (op1) == REG
5111 && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER
5112 && reg_renumber[regno] < 0
5113 && reg_equiv_constant[regno] != 0)
5114 op1 = reg_equiv_constant[regno];
5115 else if (GET_CODE (op0) == PLUS
5116 && (tem = subst_indexed_address (op0)) != op0)
5118 else if (GET_CODE (op1) == PLUS
5119 && (tem = subst_indexed_address (op1)) != op1)
5124 /* Pick out up to three things to add. */
5125 if (GET_CODE (op1) == PLUS)
5126 op2 = XEXP (op1, 1), op1 = XEXP (op1, 0);
5127 else if (GET_CODE (op0) == PLUS)
5128 op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
5130 /* Compute the sum. */
5132 op1 = form_sum (op1, op2);
5134 op0 = form_sum (op0, op1);
5141 /* Update the REG_INC notes for an insn. It updates all REG_INC
5142 notes for the instruction which refer to REGNO the to refer
5143 to the reload number.
5145 INSN is the insn for which any REG_INC notes need updating.
5147 REGNO is the register number which has been reloaded.
5149 RELOADNUM is the reload number. */
5152 update_auto_inc_notes (insn, regno, reloadnum)
5153 rtx insn ATTRIBUTE_UNUSED;
5154 int regno ATTRIBUTE_UNUSED;
5155 int reloadnum ATTRIBUTE_UNUSED;
5160 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5161 if (REG_NOTE_KIND (link) == REG_INC
5162 && REGNO (XEXP (link, 0)) == regno)
5163 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5167 /* Record the pseudo registers we must reload into hard registers in a
5168 subexpression of a would-be memory address, X referring to a value
5169 in mode MODE. (This function is not called if the address we find
5172 CONTEXT = 1 means we are considering regs as index regs,
5173 = 0 means we are considering them as base regs.
5175 OPNUM and TYPE specify the purpose of any reloads made.
5177 IND_LEVELS says how many levels of indirect addressing are
5178 supported at this point in the address.
5180 INSN, if nonzero, is the insn in which we do the reload. It is used
5181 to determine if we may generate output reloads.
5183 We return nonzero if X, as a whole, is reloaded or replaced. */
5185 /* Note that we take shortcuts assuming that no multi-reg machine mode
5186 occurs as part of an address.
5187 Also, this is not fully machine-customizable; it works for machines
5188 such as VAXen and 68000's and 32000's, but other possible machines
5189 could have addressing modes that this does not handle right. */
5192 find_reloads_address_1 (mode, x, context, loc, opnum, type, ind_levels, insn)
5193 enum machine_mode mode;
5198 enum reload_type type;
5202 RTX_CODE code = GET_CODE (x);
5208 rtx orig_op0 = XEXP (x, 0);
5209 rtx orig_op1 = XEXP (x, 1);
5210 RTX_CODE code0 = GET_CODE (orig_op0);
5211 RTX_CODE code1 = GET_CODE (orig_op1);
5215 if (GET_CODE (op0) == SUBREG)
5217 op0 = SUBREG_REG (op0);
5218 code0 = GET_CODE (op0);
5219 if (code0 == REG && REGNO (op0) < FIRST_PSEUDO_REGISTER)
5220 op0 = gen_rtx_REG (word_mode,
5222 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0)),
5223 GET_MODE (SUBREG_REG (orig_op0)),
5224 SUBREG_BYTE (orig_op0),
5225 GET_MODE (orig_op0))));
5228 if (GET_CODE (op1) == SUBREG)
5230 op1 = SUBREG_REG (op1);
5231 code1 = GET_CODE (op1);
5232 if (code1 == REG && REGNO (op1) < FIRST_PSEUDO_REGISTER)
5233 /* ??? Why is this given op1's mode and above for
5234 ??? op0 SUBREGs we use word_mode? */
5235 op1 = gen_rtx_REG (GET_MODE (op1),
5237 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1)),
5238 GET_MODE (SUBREG_REG (orig_op1)),
5239 SUBREG_BYTE (orig_op1),
5240 GET_MODE (orig_op1))));
5242 /* Plus in the index register may be created only as a result of
5243 register remateralization for expresion like &localvar*4. Reload it.
5244 It may be possible to combine the displacement on the outer level,
5245 but it is probably not worthwhile to do so. */
5248 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5249 opnum, ADDR_TYPE (type), ind_levels, insn);
5250 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5251 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5252 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5256 if (code0 == MULT || code0 == SIGN_EXTEND || code0 == TRUNCATE
5257 || code0 == ZERO_EXTEND || code1 == MEM)
5259 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5260 type, ind_levels, insn);
5261 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5262 type, ind_levels, insn);
5265 else if (code1 == MULT || code1 == SIGN_EXTEND || code1 == TRUNCATE
5266 || code1 == ZERO_EXTEND || code0 == MEM)
5268 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5269 type, ind_levels, insn);
5270 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5271 type, ind_levels, insn);
5274 else if (code0 == CONST_INT || code0 == CONST
5275 || code0 == SYMBOL_REF || code0 == LABEL_REF)
5276 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5277 type, ind_levels, insn);
5279 else if (code1 == CONST_INT || code1 == CONST
5280 || code1 == SYMBOL_REF || code1 == LABEL_REF)
5281 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5282 type, ind_levels, insn);
5284 else if (code0 == REG && code1 == REG)
5286 if (REG_OK_FOR_INDEX_P (op0)
5287 && REG_MODE_OK_FOR_BASE_P (op1, mode))
5289 else if (REG_OK_FOR_INDEX_P (op1)
5290 && REG_MODE_OK_FOR_BASE_P (op0, mode))
5292 else if (REG_MODE_OK_FOR_BASE_P (op1, mode))
5293 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5294 type, ind_levels, insn);
5295 else if (REG_MODE_OK_FOR_BASE_P (op0, mode))
5296 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5297 type, ind_levels, insn);
5298 else if (REG_OK_FOR_INDEX_P (op1))
5299 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5300 type, ind_levels, insn);
5301 else if (REG_OK_FOR_INDEX_P (op0))
5302 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5303 type, ind_levels, insn);
5306 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5307 type, ind_levels, insn);
5308 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5309 type, ind_levels, insn);
5313 else if (code0 == REG)
5315 find_reloads_address_1 (mode, orig_op0, 1, &XEXP (x, 0), opnum,
5316 type, ind_levels, insn);
5317 find_reloads_address_1 (mode, orig_op1, 0, &XEXP (x, 1), opnum,
5318 type, ind_levels, insn);
5321 else if (code1 == REG)
5323 find_reloads_address_1 (mode, orig_op1, 1, &XEXP (x, 1), opnum,
5324 type, ind_levels, insn);
5325 find_reloads_address_1 (mode, orig_op0, 0, &XEXP (x, 0), opnum,
5326 type, ind_levels, insn);
5335 rtx op0 = XEXP (x, 0);
5336 rtx op1 = XEXP (x, 1);
5338 if (GET_CODE (op1) != PLUS && GET_CODE (op1) != MINUS)
5341 /* Currently, we only support {PRE,POST}_MODIFY constructs
5342 where a base register is {inc,dec}remented by the contents
5343 of another register or by a constant value. Thus, these
5344 operands must match. */
5345 if (op0 != XEXP (op1, 0))
5348 /* Require index register (or constant). Let's just handle the
5349 register case in the meantime... If the target allows
5350 auto-modify by a constant then we could try replacing a pseudo
5351 register with its equivalent constant where applicable. */
5352 if (REG_P (XEXP (op1, 1)))
5353 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1, 1))))
5354 find_reloads_address_1 (mode, XEXP (op1, 1), 1, &XEXP (op1, 1),
5355 opnum, type, ind_levels, insn);
5357 if (REG_P (XEXP (op1, 0)))
5359 int regno = REGNO (XEXP (op1, 0));
5362 /* A register that is incremented cannot be constant! */
5363 if (regno >= FIRST_PSEUDO_REGISTER
5364 && reg_equiv_constant[regno] != 0)
5367 /* Handle a register that is equivalent to a memory location
5368 which cannot be addressed directly. */
5369 if (reg_equiv_memory_loc[regno] != 0
5370 && (reg_equiv_address[regno] != 0
5371 || num_not_at_initial_offset))
5373 rtx tem = make_memloc (XEXP (x, 0), regno);
5375 if (reg_equiv_address[regno]
5376 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5378 /* First reload the memory location's address.
5379 We can't use ADDR_TYPE (type) here, because we need to
5380 write back the value after reading it, hence we actually
5381 need two registers. */
5382 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5383 &XEXP (tem, 0), opnum,
5387 /* Then reload the memory location into a base
5389 reloadnum = push_reload (tem, tem, &XEXP (x, 0),
5391 MODE_BASE_REG_CLASS (mode),
5392 GET_MODE (x), GET_MODE (x), 0,
5393 0, opnum, RELOAD_OTHER);
5395 update_auto_inc_notes (this_insn, regno, reloadnum);
5400 if (reg_renumber[regno] >= 0)
5401 regno = reg_renumber[regno];
5403 /* We require a base register here... */
5404 if (!REGNO_MODE_OK_FOR_BASE_P (regno, GET_MODE (x)))
5406 reloadnum = push_reload (XEXP (op1, 0), XEXP (x, 0),
5407 &XEXP (op1, 0), &XEXP (x, 0),
5408 MODE_BASE_REG_CLASS (mode),
5409 GET_MODE (x), GET_MODE (x), 0, 0,
5410 opnum, RELOAD_OTHER);
5412 update_auto_inc_notes (this_insn, regno, reloadnum);
5425 if (GET_CODE (XEXP (x, 0)) == REG)
5427 int regno = REGNO (XEXP (x, 0));
5431 /* A register that is incremented cannot be constant! */
5432 if (regno >= FIRST_PSEUDO_REGISTER
5433 && reg_equiv_constant[regno] != 0)
5436 /* Handle a register that is equivalent to a memory location
5437 which cannot be addressed directly. */
5438 if (reg_equiv_memory_loc[regno] != 0
5439 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5441 rtx tem = make_memloc (XEXP (x, 0), regno);
5442 if (reg_equiv_address[regno]
5443 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5445 /* First reload the memory location's address.
5446 We can't use ADDR_TYPE (type) here, because we need to
5447 write back the value after reading it, hence we actually
5448 need two registers. */
5449 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5450 &XEXP (tem, 0), opnum, type,
5452 /* Put this inside a new increment-expression. */
5453 x = gen_rtx_fmt_e (GET_CODE (x), GET_MODE (x), tem);
5454 /* Proceed to reload that, as if it contained a register. */
5458 /* If we have a hard register that is ok as an index,
5459 don't make a reload. If an autoincrement of a nice register
5460 isn't "valid", it must be that no autoincrement is "valid".
5461 If that is true and something made an autoincrement anyway,
5462 this must be a special context where one is allowed.
5463 (For example, a "push" instruction.)
5464 We can't improve this address, so leave it alone. */
5466 /* Otherwise, reload the autoincrement into a suitable hard reg
5467 and record how much to increment by. */
5469 if (reg_renumber[regno] >= 0)
5470 regno = reg_renumber[regno];
5471 if ((regno >= FIRST_PSEUDO_REGISTER
5472 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5473 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5477 /* If we can output the register afterwards, do so, this
5478 saves the extra update.
5479 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5480 CALL_INSN - and it does not set CC0.
5481 But don't do this if we cannot directly address the
5482 memory location, since this will make it harder to
5483 reuse address reloads, and increases register pressure.
5484 Also don't do this if we can probably update x directly. */
5485 rtx equiv = (GET_CODE (XEXP (x, 0)) == MEM
5487 : reg_equiv_mem[regno]);
5488 int icode = (int) add_optab->handlers[(int) Pmode].insn_code;
5489 if (insn && GET_CODE (insn) == INSN && equiv
5490 && memory_operand (equiv, GET_MODE (equiv))
5492 && ! sets_cc0_p (PATTERN (insn))
5494 && ! (icode != CODE_FOR_nothing
5495 && ((*insn_data[icode].operand[0].predicate)
5497 && ((*insn_data[icode].operand[1].predicate)
5500 /* We use the original pseudo for loc, so that
5501 emit_reload_insns() knows which pseudo this
5502 reload refers to and updates the pseudo rtx, not
5503 its equivalent memory location, as well as the
5504 corresponding entry in reg_last_reload_reg. */
5505 loc = &XEXP (x_orig, 0);
5508 = push_reload (x, x, loc, loc,
5509 (context ? INDEX_REG_CLASS :
5510 MODE_BASE_REG_CLASS (mode)),
5511 GET_MODE (x), GET_MODE (x), 0, 0,
5512 opnum, RELOAD_OTHER);
5517 = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5518 (context ? INDEX_REG_CLASS :
5519 MODE_BASE_REG_CLASS (mode)),
5520 GET_MODE (x), GET_MODE (x), 0, 0,
5523 = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0));
5528 update_auto_inc_notes (this_insn, REGNO (XEXP (x_orig, 0)),
5534 else if (GET_CODE (XEXP (x, 0)) == MEM)
5536 /* This is probably the result of a substitution, by eliminate_regs,
5537 of an equivalent address for a pseudo that was not allocated to a
5538 hard register. Verify that the specified address is valid and
5539 reload it into a register. */
5540 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5541 rtx tem ATTRIBUTE_UNUSED = XEXP (x, 0);
5545 /* Since we know we are going to reload this item, don't decrement
5546 for the indirection level.
5548 Note that this is actually conservative: it would be slightly
5549 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5551 /* We can't use ADDR_TYPE (type) here, because we need to
5552 write back the value after reading it, hence we actually
5553 need two registers. */
5554 find_reloads_address (GET_MODE (x), &XEXP (x, 0),
5555 XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0),
5556 opnum, type, ind_levels, insn);
5558 reloadnum = push_reload (x, NULL_RTX, loc, (rtx*) 0,
5559 (context ? INDEX_REG_CLASS :
5560 MODE_BASE_REG_CLASS (mode)),
5561 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5563 = find_inc_amount (PATTERN (this_insn), XEXP (x, 0));
5565 link = FIND_REG_INC_NOTE (this_insn, tem);
5567 push_replacement (&XEXP (link, 0), reloadnum, VOIDmode);
5574 /* This is probably the result of a substitution, by eliminate_regs, of
5575 an equivalent address for a pseudo that was not allocated to a hard
5576 register. Verify that the specified address is valid and reload it
5579 Since we know we are going to reload this item, don't decrement for
5580 the indirection level.
5582 Note that this is actually conservative: it would be slightly more
5583 efficient to use the value of SPILL_INDIRECT_LEVELS from
5586 find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0),
5587 opnum, ADDR_TYPE (type), ind_levels, insn);
5588 push_reload (*loc, NULL_RTX, loc, (rtx*) 0,
5589 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5590 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5595 int regno = REGNO (x);
5597 if (reg_equiv_constant[regno] != 0)
5599 find_reloads_address_part (reg_equiv_constant[regno], loc,
5600 (context ? INDEX_REG_CLASS :
5601 MODE_BASE_REG_CLASS (mode)),
5602 GET_MODE (x), opnum, type, ind_levels);
5606 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5607 that feeds this insn. */
5608 if (reg_equiv_mem[regno] != 0)
5610 push_reload (reg_equiv_mem[regno], NULL_RTX, loc, (rtx*) 0,
5611 (context ? INDEX_REG_CLASS :
5612 MODE_BASE_REG_CLASS (mode)),
5613 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5618 if (reg_equiv_memory_loc[regno]
5619 && (reg_equiv_address[regno] != 0 || num_not_at_initial_offset))
5621 rtx tem = make_memloc (x, regno);
5622 if (reg_equiv_address[regno] != 0
5623 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5626 find_reloads_address (GET_MODE (x), &x, XEXP (x, 0),
5627 &XEXP (x, 0), opnum, ADDR_TYPE (type),
5632 if (reg_renumber[regno] >= 0)
5633 regno = reg_renumber[regno];
5635 if ((regno >= FIRST_PSEUDO_REGISTER
5636 || !(context ? REGNO_OK_FOR_INDEX_P (regno)
5637 : REGNO_MODE_OK_FOR_BASE_P (regno, mode))))
5639 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5640 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5641 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5645 /* If a register appearing in an address is the subject of a CLOBBER
5646 in this insn, reload it into some other register to be safe.
5647 The CLOBBER is supposed to make the register unavailable
5648 from before this insn to after it. */
5649 if (regno_clobbered_p (regno, this_insn, GET_MODE (x), 0))
5651 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5652 (context ? INDEX_REG_CLASS : MODE_BASE_REG_CLASS (mode)),
5653 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5660 if (GET_CODE (SUBREG_REG (x)) == REG)
5662 /* If this is a SUBREG of a hard register and the resulting register
5663 is of the wrong class, reload the whole SUBREG. This avoids
5664 needless copies if SUBREG_REG is multi-word. */
5665 if (REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
5667 int regno = subreg_regno (x);
5669 if (! (context ? REGNO_OK_FOR_INDEX_P (regno)
5670 : REGNO_MODE_OK_FOR_BASE_P (regno, mode)))
5672 push_reload (x, NULL_RTX, loc, (rtx*) 0,
5673 (context ? INDEX_REG_CLASS :
5674 MODE_BASE_REG_CLASS (mode)),
5675 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5679 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5680 is larger than the class size, then reload the whole SUBREG. */
5683 enum reg_class class = (context ? INDEX_REG_CLASS
5684 : MODE_BASE_REG_CLASS (mode));
5685 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x)))
5686 > reg_class_size[class])
5688 x = find_reloads_subreg_address (x, 0, opnum, type,
5690 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5691 GET_MODE (x), VOIDmode, 0, 0, opnum, type);
5703 const char *fmt = GET_RTX_FORMAT (code);
5706 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
5709 find_reloads_address_1 (mode, XEXP (x, i), context, &XEXP (x, i),
5710 opnum, type, ind_levels, insn);
5717 /* X, which is found at *LOC, is a part of an address that needs to be
5718 reloaded into a register of class CLASS. If X is a constant, or if
5719 X is a PLUS that contains a constant, check that the constant is a
5720 legitimate operand and that we are supposed to be able to load
5721 it into the register.
5723 If not, force the constant into memory and reload the MEM instead.
5725 MODE is the mode to use, in case X is an integer constant.
5727 OPNUM and TYPE describe the purpose of any reloads made.
5729 IND_LEVELS says how many levels of indirect addressing this machine
5733 find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels)
5736 enum reg_class class;
5737 enum machine_mode mode;
5739 enum reload_type type;
5743 && (! LEGITIMATE_CONSTANT_P (x)
5744 || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS))
5748 tem = x = force_const_mem (mode, x);
5749 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5750 opnum, type, ind_levels, 0);
5753 else if (GET_CODE (x) == PLUS
5754 && CONSTANT_P (XEXP (x, 1))
5755 && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1))
5756 || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS))
5760 tem = force_const_mem (GET_MODE (x), XEXP (x, 1));
5761 x = gen_rtx_PLUS (GET_MODE (x), XEXP (x, 0), tem);
5762 find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0),
5763 opnum, type, ind_levels, 0);
5766 push_reload (x, NULL_RTX, loc, (rtx*) 0, class,
5767 mode, VOIDmode, 0, 0, opnum, type);
5770 /* X, a subreg of a pseudo, is a part of an address that needs to be
5773 If the pseudo is equivalent to a memory location that cannot be directly
5774 addressed, make the necessary address reloads.
5776 If address reloads have been necessary, or if the address is changed
5777 by register elimination, return the rtx of the memory location;
5778 otherwise, return X.
5780 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5783 OPNUM and TYPE identify the purpose of the reload.
5785 IND_LEVELS says how many levels of indirect addressing are
5786 supported at this point in the address.
5788 INSN, if nonzero, is the insn in which we do the reload. It is used
5789 to determine where to put USEs for pseudos that we have to replace with
5793 find_reloads_subreg_address (x, force_replace, opnum, type,
5798 enum reload_type type;
5802 int regno = REGNO (SUBREG_REG (x));
5804 if (reg_equiv_memory_loc[regno])
5806 /* If the address is not directly addressable, or if the address is not
5807 offsettable, then it must be replaced. */
5809 && (reg_equiv_address[regno]
5810 || ! offsettable_memref_p (reg_equiv_mem[regno])))
5813 if (force_replace || num_not_at_initial_offset)
5815 rtx tem = make_memloc (SUBREG_REG (x), regno);
5817 /* If the address changes because of register elimination, then
5818 it must be replaced. */
5820 || ! rtx_equal_p (tem, reg_equiv_mem[regno]))
5822 int offset = SUBREG_BYTE (x);
5823 unsigned outer_size = GET_MODE_SIZE (GET_MODE (x));
5824 unsigned inner_size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)));
5826 XEXP (tem, 0) = plus_constant (XEXP (tem, 0), offset);
5827 PUT_MODE (tem, GET_MODE (x));
5829 /* If this was a paradoxical subreg that we replaced, the
5830 resulting memory must be sufficiently aligned to allow
5831 us to widen the mode of the memory. */
5832 if (outer_size > inner_size && STRICT_ALIGNMENT)
5836 base = XEXP (tem, 0);
5837 if (GET_CODE (base) == PLUS)
5839 if (GET_CODE (XEXP (base, 1)) == CONST_INT
5840 && INTVAL (XEXP (base, 1)) % outer_size != 0)
5842 base = XEXP (base, 0);
5844 if (GET_CODE (base) != REG
5845 || (REGNO_POINTER_ALIGN (REGNO (base))
5846 < outer_size * BITS_PER_UNIT))
5850 find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),
5851 &XEXP (tem, 0), opnum, ADDR_TYPE (type),
5854 /* If this is not a toplevel operand, find_reloads doesn't see
5855 this substitution. We have to emit a USE of the pseudo so
5856 that delete_output_reload can see it. */
5857 if (replace_reloads && recog_data.operand[opnum] != x)
5858 /* We mark the USE with QImode so that we recognize it
5859 as one that can be safely deleted at the end of
5861 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode,
5871 /* Substitute into the current INSN the registers into which we have reloaded
5872 the things that need reloading. The array `replacements'
5873 contains the locations of all pointers that must be changed
5874 and says what to replace them with.
5876 Return the rtx that X translates into; usually X, but modified. */
5879 subst_reloads (insn)
5884 for (i = 0; i < n_replacements; i++)
5886 struct replacement *r = &replacements[i];
5887 rtx reloadreg = rld[r->what].reg_rtx;
5890 #ifdef ENABLE_CHECKING
5891 /* Internal consistency test. Check that we don't modify
5892 anything in the equivalence arrays. Whenever something from
5893 those arrays needs to be reloaded, it must be unshared before
5894 being substituted into; the equivalence must not be modified.
5895 Otherwise, if the equivalence is used after that, it will
5896 have been modified, and the thing substituted (probably a
5897 register) is likely overwritten and not a usable equivalence. */
5900 for (check_regno = 0; check_regno < max_regno; check_regno++)
5902 #define CHECK_MODF(ARRAY) \
5903 if (ARRAY[check_regno] \
5904 && loc_mentioned_in_p (r->where, \
5905 ARRAY[check_regno])) \
5908 CHECK_MODF (reg_equiv_constant);
5909 CHECK_MODF (reg_equiv_memory_loc);
5910 CHECK_MODF (reg_equiv_address);
5911 CHECK_MODF (reg_equiv_mem);
5914 #endif /* ENABLE_CHECKING */
5916 /* If we're replacing a LABEL_REF with a register, add a
5917 REG_LABEL note to indicate to flow which label this
5918 register refers to. */
5919 if (GET_CODE (*r->where) == LABEL_REF
5920 && GET_CODE (insn) == JUMP_INSN)
5921 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_LABEL,
5922 XEXP (*r->where, 0),
5925 /* Encapsulate RELOADREG so its machine mode matches what
5926 used to be there. Note that gen_lowpart_common will
5927 do the wrong thing if RELOADREG is multi-word. RELOADREG
5928 will always be a REG here. */
5929 if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode)
5930 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
5932 /* If we are putting this into a SUBREG and RELOADREG is a
5933 SUBREG, we would be making nested SUBREGs, so we have to fix
5934 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5936 if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG)
5938 if (GET_MODE (*r->subreg_loc)
5939 == GET_MODE (SUBREG_REG (reloadreg)))
5940 *r->subreg_loc = SUBREG_REG (reloadreg);
5944 SUBREG_BYTE (*r->subreg_loc) + SUBREG_BYTE (reloadreg);
5946 /* When working with SUBREGs the rule is that the byte
5947 offset must be a multiple of the SUBREG's mode. */
5948 final_offset = (final_offset /
5949 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5950 final_offset = (final_offset *
5951 GET_MODE_SIZE (GET_MODE (*r->subreg_loc)));
5953 *r->where = SUBREG_REG (reloadreg);
5954 SUBREG_BYTE (*r->subreg_loc) = final_offset;
5958 *r->where = reloadreg;
5960 /* If reload got no reg and isn't optional, something's wrong. */
5961 else if (! rld[r->what].optional)
5966 /* Make a copy of any replacements being done into X and move those
5967 copies to locations in Y, a copy of X. */
5970 copy_replacements (x, y)
5973 /* We can't support X being a SUBREG because we might then need to know its
5974 location if something inside it was replaced. */
5975 if (GET_CODE (x) == SUBREG)
5978 copy_replacements_1 (&x, &y, n_replacements);
5982 copy_replacements_1 (px, py, orig_replacements)
5985 int orig_replacements;
5989 struct replacement *r;
5993 for (j = 0; j < orig_replacements; j++)
5995 if (replacements[j].subreg_loc == px)
5997 r = &replacements[n_replacements++];
5998 r->where = replacements[j].where;
6000 r->what = replacements[j].what;
6001 r->mode = replacements[j].mode;
6003 else if (replacements[j].where == px)
6005 r = &replacements[n_replacements++];
6008 r->what = replacements[j].what;
6009 r->mode = replacements[j].mode;
6015 code = GET_CODE (x);
6016 fmt = GET_RTX_FORMAT (code);
6018 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6021 copy_replacements_1 (&XEXP (x, i), &XEXP (y, i), orig_replacements);
6022 else if (fmt[i] == 'E')
6023 for (j = XVECLEN (x, i); --j >= 0; )
6024 copy_replacements_1 (&XVECEXP (x, i, j), &XVECEXP (y, i, j),
6029 /* Change any replacements being done to *X to be done to *Y. */
6032 move_replacements (x, y)
6038 for (i = 0; i < n_replacements; i++)
6039 if (replacements[i].subreg_loc == x)
6040 replacements[i].subreg_loc = y;
6041 else if (replacements[i].where == x)
6043 replacements[i].where = y;
6044 replacements[i].subreg_loc = 0;
6048 /* If LOC was scheduled to be replaced by something, return the replacement.
6049 Otherwise, return *LOC. */
6052 find_replacement (loc)
6055 struct replacement *r;
6057 for (r = &replacements[0]; r < &replacements[n_replacements]; r++)
6059 rtx reloadreg = rld[r->what].reg_rtx;
6061 if (reloadreg && r->where == loc)
6063 if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode)
6064 reloadreg = gen_rtx_REG (r->mode, REGNO (reloadreg));
6068 else if (reloadreg && r->subreg_loc == loc)
6070 /* RELOADREG must be either a REG or a SUBREG.
6072 ??? Is it actually still ever a SUBREG? If so, why? */
6074 if (GET_CODE (reloadreg) == REG)
6075 return gen_rtx_REG (GET_MODE (*loc),
6076 (REGNO (reloadreg) +
6077 subreg_regno_offset (REGNO (SUBREG_REG (*loc)),
6078 GET_MODE (SUBREG_REG (*loc)),
6081 else if (GET_MODE (reloadreg) == GET_MODE (*loc))
6085 int final_offset = SUBREG_BYTE (reloadreg) + SUBREG_BYTE (*loc);
6087 /* When working with SUBREGs the rule is that the byte
6088 offset must be a multiple of the SUBREG's mode. */
6089 final_offset = (final_offset / GET_MODE_SIZE (GET_MODE (*loc)));
6090 final_offset = (final_offset * GET_MODE_SIZE (GET_MODE (*loc)));
6091 return gen_rtx_SUBREG (GET_MODE (*loc), SUBREG_REG (reloadreg),
6097 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6098 what's inside and make a new rtl if so. */
6099 if (GET_CODE (*loc) == PLUS || GET_CODE (*loc) == MINUS
6100 || GET_CODE (*loc) == MULT)
6102 rtx x = find_replacement (&XEXP (*loc, 0));
6103 rtx y = find_replacement (&XEXP (*loc, 1));
6105 if (x != XEXP (*loc, 0) || y != XEXP (*loc, 1))
6106 return gen_rtx_fmt_ee (GET_CODE (*loc), GET_MODE (*loc), x, y);
6112 /* Return nonzero if register in range [REGNO, ENDREGNO)
6113 appears either explicitly or implicitly in X
6114 other than being stored into (except for earlyclobber operands).
6116 References contained within the substructure at LOC do not count.
6117 LOC may be zero, meaning don't ignore anything.
6119 This is similar to refers_to_regno_p in rtlanal.c except that we
6120 look at equivalences for pseudos that didn't get hard registers. */
6123 refers_to_regno_for_reload_p (regno, endregno, x, loc)
6124 unsigned int regno, endregno;
6137 code = GET_CODE (x);
6144 /* If this is a pseudo, a hard register must not have been allocated.
6145 X must therefore either be a constant or be in memory. */
6146 if (r >= FIRST_PSEUDO_REGISTER)
6148 if (reg_equiv_memory_loc[r])
6149 return refers_to_regno_for_reload_p (regno, endregno,
6150 reg_equiv_memory_loc[r],
6153 if (reg_equiv_constant[r])
6159 return (endregno > r
6160 && regno < r + (r < FIRST_PSEUDO_REGISTER
6161 ? HARD_REGNO_NREGS (r, GET_MODE (x))
6165 /* If this is a SUBREG of a hard reg, we can see exactly which
6166 registers are being modified. Otherwise, handle normally. */
6167 if (GET_CODE (SUBREG_REG (x)) == REG
6168 && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER)
6170 unsigned int inner_regno = subreg_regno (x);
6171 unsigned int inner_endregno
6172 = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER
6173 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6175 return endregno > inner_regno && regno < inner_endregno;
6181 if (&SET_DEST (x) != loc
6182 /* Note setting a SUBREG counts as referring to the REG it is in for
6183 a pseudo but not for hard registers since we can
6184 treat each word individually. */
6185 && ((GET_CODE (SET_DEST (x)) == SUBREG
6186 && loc != &SUBREG_REG (SET_DEST (x))
6187 && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG
6188 && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER
6189 && refers_to_regno_for_reload_p (regno, endregno,
6190 SUBREG_REG (SET_DEST (x)),
6192 /* If the output is an earlyclobber operand, this is
6194 || ((GET_CODE (SET_DEST (x)) != REG
6195 || earlyclobber_operand_p (SET_DEST (x)))
6196 && refers_to_regno_for_reload_p (regno, endregno,
6197 SET_DEST (x), loc))))
6200 if (code == CLOBBER || loc == &SET_SRC (x))
6209 /* X does not match, so try its subexpressions. */
6211 fmt = GET_RTX_FORMAT (code);
6212 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6214 if (fmt[i] == 'e' && loc != &XEXP (x, i))
6222 if (refers_to_regno_for_reload_p (regno, endregno,
6226 else if (fmt[i] == 'E')
6229 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6230 if (loc != &XVECEXP (x, i, j)
6231 && refers_to_regno_for_reload_p (regno, endregno,
6232 XVECEXP (x, i, j), loc))
6239 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6240 we check if any register number in X conflicts with the relevant register
6241 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6242 contains a MEM (we don't bother checking for memory addresses that can't
6243 conflict because we expect this to be a rare case.
6245 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6246 that we look at equivalences for pseudos that didn't get hard registers. */
6249 reg_overlap_mentioned_for_reload_p (x, in)
6252 int regno, endregno;
6254 /* Overly conservative. */
6255 if (GET_CODE (x) == STRICT_LOW_PART
6256 || GET_RTX_CLASS (GET_CODE (x)) == 'a')
6259 /* If either argument is a constant, then modifying X can not affect IN. */
6260 if (CONSTANT_P (x) || CONSTANT_P (in))
6262 else if (GET_CODE (x) == SUBREG)
6264 regno = REGNO (SUBREG_REG (x));
6265 if (regno < FIRST_PSEUDO_REGISTER)
6266 regno += subreg_regno_offset (REGNO (SUBREG_REG (x)),
6267 GET_MODE (SUBREG_REG (x)),
6271 else if (GET_CODE (x) == REG)
6275 /* If this is a pseudo, it must not have been assigned a hard register.
6276 Therefore, it must either be in memory or be a constant. */
6278 if (regno >= FIRST_PSEUDO_REGISTER)
6280 if (reg_equiv_memory_loc[regno])
6281 return refers_to_mem_for_reload_p (in);
6282 else if (reg_equiv_constant[regno])
6287 else if (GET_CODE (x) == MEM)
6288 return refers_to_mem_for_reload_p (in);
6289 else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC
6290 || GET_CODE (x) == CC0)
6291 return reg_mentioned_p (x, in);
6292 else if (GET_CODE (x) == PLUS)
6293 return (reg_overlap_mentioned_for_reload_p (XEXP (x, 0), in)
6294 || reg_overlap_mentioned_for_reload_p (XEXP (x, 1), in));
6298 endregno = regno + (regno < FIRST_PSEUDO_REGISTER
6299 ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1);
6301 return refers_to_regno_for_reload_p (regno, endregno, in, (rtx*) 0);
6304 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6308 refers_to_mem_for_reload_p (x)
6314 if (GET_CODE (x) == MEM)
6317 if (GET_CODE (x) == REG)
6318 return (REGNO (x) >= FIRST_PSEUDO_REGISTER
6319 && reg_equiv_memory_loc[REGNO (x)]);
6321 fmt = GET_RTX_FORMAT (GET_CODE (x));
6322 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
6324 && (GET_CODE (XEXP (x, i)) == MEM
6325 || refers_to_mem_for_reload_p (XEXP (x, i))))
6331 /* Check the insns before INSN to see if there is a suitable register
6332 containing the same value as GOAL.
6333 If OTHER is -1, look for a register in class CLASS.
6334 Otherwise, just see if register number OTHER shares GOAL's value.
6336 Return an rtx for the register found, or zero if none is found.
6338 If RELOAD_REG_P is (short *)1,
6339 we reject any hard reg that appears in reload_reg_rtx
6340 because such a hard reg is also needed coming into this insn.
6342 If RELOAD_REG_P is any other nonzero value,
6343 it is a vector indexed by hard reg number
6344 and we reject any hard reg whose element in the vector is nonnegative
6345 as well as any that appears in reload_reg_rtx.
6347 If GOAL is zero, then GOALREG is a register number; we look
6348 for an equivalent for that register.
6350 MODE is the machine mode of the value we want an equivalence for.
6351 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6353 This function is used by jump.c as well as in the reload pass.
6355 If GOAL is the sum of the stack pointer and a constant, we treat it
6356 as if it were a constant except that sp is required to be unchanging. */
6359 find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode)
6362 enum reg_class class;
6364 short *reload_reg_p;
6366 enum machine_mode mode;
6369 rtx goaltry, valtry, value, where;
6375 int goal_mem_addr_varies = 0;
6376 int need_stable_sp = 0;
6382 else if (GET_CODE (goal) == REG)
6383 regno = REGNO (goal);
6384 else if (GET_CODE (goal) == MEM)
6386 enum rtx_code code = GET_CODE (XEXP (goal, 0));
6387 if (MEM_VOLATILE_P (goal))
6389 if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT)
6391 /* An address with side effects must be reexecuted. */
6406 else if (CONSTANT_P (goal))
6408 else if (GET_CODE (goal) == PLUS
6409 && XEXP (goal, 0) == stack_pointer_rtx
6410 && CONSTANT_P (XEXP (goal, 1)))
6411 goal_const = need_stable_sp = 1;
6412 else if (GET_CODE (goal) == PLUS
6413 && XEXP (goal, 0) == frame_pointer_rtx
6414 && CONSTANT_P (XEXP (goal, 1)))
6419 /* Scan insns back from INSN, looking for one that copies
6420 a value into or out of GOAL.
6421 Stop and give up if we reach a label. */
6426 if (p == 0 || GET_CODE (p) == CODE_LABEL)
6429 if (GET_CODE (p) == INSN
6430 /* If we don't want spill regs ... */
6431 && (! (reload_reg_p != 0
6432 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6433 /* ... then ignore insns introduced by reload; they aren't
6434 useful and can cause results in reload_as_needed to be
6435 different from what they were when calculating the need for
6436 spills. If we notice an input-reload insn here, we will
6437 reject it below, but it might hide a usable equivalent.
6438 That makes bad code. It may even abort: perhaps no reg was
6439 spilled for this insn because it was assumed we would find
6441 || INSN_UID (p) < reload_first_uid))
6444 pat = single_set (p);
6446 /* First check for something that sets some reg equal to GOAL. */
6449 && true_regnum (SET_SRC (pat)) == regno
6450 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6453 && true_regnum (SET_DEST (pat)) == regno
6454 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0)
6456 (goal_const && rtx_equal_p (SET_SRC (pat), goal)
6457 /* When looking for stack pointer + const,
6458 make sure we don't use a stack adjust. */
6459 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat), goal)
6460 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0)
6462 && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0
6463 && rtx_renumbered_equal_p (goal, SET_SRC (pat)))
6465 && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0
6466 && rtx_renumbered_equal_p (goal, SET_DEST (pat)))
6467 /* If we are looking for a constant,
6468 and something equivalent to that constant was copied
6469 into a reg, we can use that reg. */
6470 || (goal_const && REG_NOTES (p) != 0
6471 && (tem = find_reg_note (p, REG_EQUIV, NULL_RTX))
6472 && ((rtx_equal_p (XEXP (tem, 0), goal)
6474 = true_regnum (valtry = SET_DEST (pat))) >= 0)
6475 || (GET_CODE (SET_DEST (pat)) == REG
6476 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6477 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6479 && GET_CODE (goal) == CONST_INT
6481 = operand_subword (XEXP (tem, 0), 0, 0,
6483 && rtx_equal_p (goal, goaltry)
6485 = operand_subword (SET_DEST (pat), 0, 0,
6487 && (valueno = true_regnum (valtry)) >= 0)))
6488 || (goal_const && (tem = find_reg_note (p, REG_EQUIV,
6490 && GET_CODE (SET_DEST (pat)) == REG
6491 && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE
6492 && (GET_MODE_CLASS (GET_MODE (XEXP (tem, 0)))
6494 && GET_CODE (goal) == CONST_INT
6495 && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0,
6497 && rtx_equal_p (goal, goaltry)
6499 = operand_subword (SET_DEST (pat), 1, 0, VOIDmode))
6500 && (valueno = true_regnum (valtry)) >= 0)))
6504 if (valueno != other)
6507 else if ((unsigned) valueno >= FIRST_PSEUDO_REGISTER)
6513 for (i = HARD_REGNO_NREGS (valueno, mode) - 1; i >= 0; i--)
6514 if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class],
6527 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6528 (or copying VALUE into GOAL, if GOAL is also a register).
6529 Now verify that VALUE is really valid. */
6531 /* VALUENO is the register number of VALUE; a hard register. */
6533 /* Don't try to re-use something that is killed in this insn. We want
6534 to be able to trust REG_UNUSED notes. */
6535 if (REG_NOTES (where) != 0 && find_reg_note (where, REG_UNUSED, value))
6538 /* If we propose to get the value from the stack pointer or if GOAL is
6539 a MEM based on the stack pointer, we need a stable SP. */
6540 if (valueno == STACK_POINTER_REGNUM || regno == STACK_POINTER_REGNUM
6541 || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx,
6545 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6546 if (GET_MODE (value) != mode)
6549 /* Reject VALUE if it was loaded from GOAL
6550 and is also a register that appears in the address of GOAL. */
6552 if (goal_mem && value == SET_DEST (single_set (where))
6553 && refers_to_regno_for_reload_p (valueno,
6555 + HARD_REGNO_NREGS (valueno, mode)),
6559 /* Reject registers that overlap GOAL. */
6561 if (!goal_mem && !goal_const
6562 && regno + (int) HARD_REGNO_NREGS (regno, mode) > valueno
6563 && regno < valueno + (int) HARD_REGNO_NREGS (valueno, mode))
6566 nregs = HARD_REGNO_NREGS (regno, mode);
6567 valuenregs = HARD_REGNO_NREGS (valueno, mode);
6569 /* Reject VALUE if it is one of the regs reserved for reloads.
6570 Reload1 knows how to reuse them anyway, and it would get
6571 confused if we allocated one without its knowledge.
6572 (Now that insns introduced by reload are ignored above,
6573 this case shouldn't happen, but I'm not positive.) */
6575 if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1)
6578 for (i = 0; i < valuenregs; ++i)
6579 if (reload_reg_p[valueno + i] >= 0)
6583 /* Reject VALUE if it is a register being used for an input reload
6584 even if it is not one of those reserved. */
6586 if (reload_reg_p != 0)
6589 for (i = 0; i < n_reloads; i++)
6590 if (rld[i].reg_rtx != 0 && rld[i].in)
6592 int regno1 = REGNO (rld[i].reg_rtx);
6593 int nregs1 = HARD_REGNO_NREGS (regno1,
6594 GET_MODE (rld[i].reg_rtx));
6595 if (regno1 < valueno + valuenregs
6596 && regno1 + nregs1 > valueno)
6602 /* We must treat frame pointer as varying here,
6603 since it can vary--in a nonlocal goto as generated by expand_goto. */
6604 goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0));
6606 /* Now verify that the values of GOAL and VALUE remain unaltered
6607 until INSN is reached. */
6616 /* Don't trust the conversion past a function call
6617 if either of the two is in a call-clobbered register, or memory. */
6618 if (GET_CODE (p) == CALL_INSN)
6622 if (goal_mem || need_stable_sp)
6625 if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER)
6626 for (i = 0; i < nregs; ++i)
6627 if (call_used_regs[regno + i])
6630 if (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER)
6631 for (i = 0; i < valuenregs; ++i)
6632 if (call_used_regs[valueno + i])
6634 #ifdef NON_SAVING_SETJMP
6635 if (NON_SAVING_SETJMP && find_reg_note (p, REG_SETJMP, NULL))
6644 /* Watch out for unspec_volatile, and volatile asms. */
6645 if (volatile_insn_p (pat))
6648 /* If this insn P stores in either GOAL or VALUE, return 0.
6649 If GOAL is a memory ref and this insn writes memory, return 0.
6650 If GOAL is a memory ref and its address is not constant,
6651 and this insn P changes a register used in GOAL, return 0. */
6653 if (GET_CODE (pat) == COND_EXEC)
6654 pat = COND_EXEC_CODE (pat);
6655 if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER)
6657 rtx dest = SET_DEST (pat);
6658 while (GET_CODE (dest) == SUBREG
6659 || GET_CODE (dest) == ZERO_EXTRACT
6660 || GET_CODE (dest) == SIGN_EXTRACT
6661 || GET_CODE (dest) == STRICT_LOW_PART)
6662 dest = XEXP (dest, 0);
6663 if (GET_CODE (dest) == REG)
6665 int xregno = REGNO (dest);
6667 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6668 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6671 if (xregno < regno + nregs && xregno + xnregs > regno)
6673 if (xregno < valueno + valuenregs
6674 && xregno + xnregs > valueno)
6676 if (goal_mem_addr_varies
6677 && reg_overlap_mentioned_for_reload_p (dest, goal))
6679 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6682 else if (goal_mem && GET_CODE (dest) == MEM
6683 && ! push_operand (dest, GET_MODE (dest)))
6685 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6686 && reg_equiv_memory_loc[regno] != 0)
6688 else if (need_stable_sp && push_operand (dest, GET_MODE (dest)))
6691 else if (GET_CODE (pat) == PARALLEL)
6694 for (i = XVECLEN (pat, 0) - 1; i >= 0; i--)
6696 rtx v1 = XVECEXP (pat, 0, i);
6697 if (GET_CODE (v1) == COND_EXEC)
6698 v1 = COND_EXEC_CODE (v1);
6699 if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER)
6701 rtx dest = SET_DEST (v1);
6702 while (GET_CODE (dest) == SUBREG
6703 || GET_CODE (dest) == ZERO_EXTRACT
6704 || GET_CODE (dest) == SIGN_EXTRACT
6705 || GET_CODE (dest) == STRICT_LOW_PART)
6706 dest = XEXP (dest, 0);
6707 if (GET_CODE (dest) == REG)
6709 int xregno = REGNO (dest);
6711 if (REGNO (dest) < FIRST_PSEUDO_REGISTER)
6712 xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6715 if (xregno < regno + nregs
6716 && xregno + xnregs > regno)
6718 if (xregno < valueno + valuenregs
6719 && xregno + xnregs > valueno)
6721 if (goal_mem_addr_varies
6722 && reg_overlap_mentioned_for_reload_p (dest,
6725 if (xregno == STACK_POINTER_REGNUM && need_stable_sp)
6728 else if (goal_mem && GET_CODE (dest) == MEM
6729 && ! push_operand (dest, GET_MODE (dest)))
6731 else if (GET_CODE (dest) == MEM && regno >= FIRST_PSEUDO_REGISTER
6732 && reg_equiv_memory_loc[regno] != 0)
6734 else if (need_stable_sp
6735 && push_operand (dest, GET_MODE (dest)))
6741 if (GET_CODE (p) == CALL_INSN && CALL_INSN_FUNCTION_USAGE (p))
6745 for (link = CALL_INSN_FUNCTION_USAGE (p); XEXP (link, 1) != 0;
6746 link = XEXP (link, 1))
6748 pat = XEXP (link, 0);
6749 if (GET_CODE (pat) == CLOBBER)
6751 rtx dest = SET_DEST (pat);
6753 if (GET_CODE (dest) == REG)
6755 int xregno = REGNO (dest);
6757 = HARD_REGNO_NREGS (xregno, GET_MODE (dest));
6759 if (xregno < regno + nregs
6760 && xregno + xnregs > regno)
6762 else if (xregno < valueno + valuenregs
6763 && xregno + xnregs > valueno)
6765 else if (goal_mem_addr_varies
6766 && reg_overlap_mentioned_for_reload_p (dest,
6771 else if (goal_mem && GET_CODE (dest) == MEM
6772 && ! push_operand (dest, GET_MODE (dest)))
6774 else if (need_stable_sp
6775 && push_operand (dest, GET_MODE (dest)))
6782 /* If this insn auto-increments or auto-decrements
6783 either regno or valueno, return 0 now.
6784 If GOAL is a memory ref and its address is not constant,
6785 and this insn P increments a register used in GOAL, return 0. */
6789 for (link = REG_NOTES (p); link; link = XEXP (link, 1))
6790 if (REG_NOTE_KIND (link) == REG_INC
6791 && GET_CODE (XEXP (link, 0)) == REG)
6793 int incno = REGNO (XEXP (link, 0));
6794 if (incno < regno + nregs && incno >= regno)
6796 if (incno < valueno + valuenregs && incno >= valueno)
6798 if (goal_mem_addr_varies
6799 && reg_overlap_mentioned_for_reload_p (XEXP (link, 0),
6809 /* Find a place where INCED appears in an increment or decrement operator
6810 within X, and return the amount INCED is incremented or decremented by.
6811 The value is always positive. */
6814 find_inc_amount (x, inced)
6817 enum rtx_code code = GET_CODE (x);
6823 rtx addr = XEXP (x, 0);
6824 if ((GET_CODE (addr) == PRE_DEC
6825 || GET_CODE (addr) == POST_DEC
6826 || GET_CODE (addr) == PRE_INC
6827 || GET_CODE (addr) == POST_INC)
6828 && XEXP (addr, 0) == inced)
6829 return GET_MODE_SIZE (GET_MODE (x));
6830 else if ((GET_CODE (addr) == PRE_MODIFY
6831 || GET_CODE (addr) == POST_MODIFY)
6832 && GET_CODE (XEXP (addr, 1)) == PLUS
6833 && XEXP (addr, 0) == XEXP (XEXP (addr, 1), 0)
6834 && XEXP (addr, 0) == inced
6835 && GET_CODE (XEXP (XEXP (addr, 1), 1)) == CONST_INT)
6837 i = INTVAL (XEXP (XEXP (addr, 1), 1));
6838 return i < 0 ? -i : i;
6842 fmt = GET_RTX_FORMAT (code);
6843 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
6847 int tem = find_inc_amount (XEXP (x, i), inced);
6854 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
6856 int tem = find_inc_amount (XVECEXP (x, i, j), inced);
6866 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
6867 If SETS is nonzero, also consider SETs. */
6870 regno_clobbered_p (regno, insn, mode, sets)
6873 enum machine_mode mode;
6876 unsigned int nregs = HARD_REGNO_NREGS (regno, mode);
6877 unsigned int endregno = regno + nregs;
6879 if ((GET_CODE (PATTERN (insn)) == CLOBBER
6880 || (sets && GET_CODE (PATTERN (insn)) == SET))
6881 && GET_CODE (XEXP (PATTERN (insn), 0)) == REG)
6883 unsigned int test = REGNO (XEXP (PATTERN (insn), 0));
6885 return test >= regno && test < endregno;
6888 if (GET_CODE (PATTERN (insn)) == PARALLEL)
6890 int i = XVECLEN (PATTERN (insn), 0) - 1;
6894 rtx elt = XVECEXP (PATTERN (insn), 0, i);
6895 if ((GET_CODE (elt) == CLOBBER
6896 || (sets && GET_CODE (PATTERN (insn)) == SET))
6897 && GET_CODE (XEXP (elt, 0)) == REG)
6899 unsigned int test = REGNO (XEXP (elt, 0));
6901 if (test >= regno && test < endregno)
6910 static const char *const reload_when_needed_name[] =
6913 "RELOAD_FOR_OUTPUT",
6915 "RELOAD_FOR_INPUT_ADDRESS",
6916 "RELOAD_FOR_INPADDR_ADDRESS",
6917 "RELOAD_FOR_OUTPUT_ADDRESS",
6918 "RELOAD_FOR_OUTADDR_ADDRESS",
6919 "RELOAD_FOR_OPERAND_ADDRESS",
6920 "RELOAD_FOR_OPADDR_ADDR",
6922 "RELOAD_FOR_OTHER_ADDRESS"
6925 static const char * const reg_class_names[] = REG_CLASS_NAMES;
6927 /* These functions are used to print the variables set by 'find_reloads' */
6930 debug_reload_to_stream (f)
6938 for (r = 0; r < n_reloads; r++)
6940 fprintf (f, "Reload %d: ", r);
6944 fprintf (f, "reload_in (%s) = ",
6945 GET_MODE_NAME (rld[r].inmode));
6946 print_inline_rtx (f, rld[r].in, 24);
6947 fprintf (f, "\n\t");
6950 if (rld[r].out != 0)
6952 fprintf (f, "reload_out (%s) = ",
6953 GET_MODE_NAME (rld[r].outmode));
6954 print_inline_rtx (f, rld[r].out, 24);
6955 fprintf (f, "\n\t");
6958 fprintf (f, "%s, ", reg_class_names[(int) rld[r].class]);
6960 fprintf (f, "%s (opnum = %d)",
6961 reload_when_needed_name[(int) rld[r].when_needed],
6964 if (rld[r].optional)
6965 fprintf (f, ", optional");
6967 if (rld[r].nongroup)
6968 fprintf (f, ", nongroup");
6970 if (rld[r].inc != 0)
6971 fprintf (f, ", inc by %d", rld[r].inc);
6973 if (rld[r].nocombine)
6974 fprintf (f, ", can't combine");
6976 if (rld[r].secondary_p)
6977 fprintf (f, ", secondary_reload_p");
6979 if (rld[r].in_reg != 0)
6981 fprintf (f, "\n\treload_in_reg: ");
6982 print_inline_rtx (f, rld[r].in_reg, 24);
6985 if (rld[r].out_reg != 0)
6987 fprintf (f, "\n\treload_out_reg: ");
6988 print_inline_rtx (f, rld[r].out_reg, 24);
6991 if (rld[r].reg_rtx != 0)
6993 fprintf (f, "\n\treload_reg_rtx: ");
6994 print_inline_rtx (f, rld[r].reg_rtx, 24);
6998 if (rld[r].secondary_in_reload != -1)
7000 fprintf (f, "%ssecondary_in_reload = %d",
7001 prefix, rld[r].secondary_in_reload);
7005 if (rld[r].secondary_out_reload != -1)
7006 fprintf (f, "%ssecondary_out_reload = %d\n",
7007 prefix, rld[r].secondary_out_reload);
7010 if (rld[r].secondary_in_icode != CODE_FOR_nothing)
7012 fprintf (f, "%ssecondary_in_icode = %s", prefix,
7013 insn_data[rld[r].secondary_in_icode].name);
7017 if (rld[r].secondary_out_icode != CODE_FOR_nothing)
7018 fprintf (f, "%ssecondary_out_icode = %s", prefix,
7019 insn_data[rld[r].secondary_out_icode].name);
7028 debug_reload_to_stream (stderr);