1 /* Instruction scheduling pass. This file contains definitions used
2 internally in the scheduler.
3 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998,
4 1999, 2000, 2001 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Forward declaration. */
26 /* Describe state of dependencies used during sched_analyze phase. */
29 /* The *_insns and *_mems are paired lists. Each pending memory operation
30 will have a pointer to the MEM rtx on one list and a pointer to the
31 containing insn on the other list in the same place in the list. */
33 /* We can't use add_dependence like the old code did, because a single insn
34 may have multiple memory accesses, and hence needs to be on the list
35 once for each memory access. Add_dependence won't let you add an insn
36 to a list more than once. */
38 /* An INSN_LIST containing all insns with pending read operations. */
39 rtx pending_read_insns;
41 /* An EXPR_LIST containing all MEM rtx's which are pending reads. */
42 rtx pending_read_mems;
44 /* An INSN_LIST containing all insns with pending write operations. */
45 rtx pending_write_insns;
47 /* An EXPR_LIST containing all MEM rtx's which are pending writes. */
48 rtx pending_write_mems;
50 /* Indicates the combined length of the two pending lists. We must prevent
51 these lists from ever growing too large since the number of dependencies
52 produced is at least O(N*N), and execution time is at least O(4*N*N), as
53 a function of the length of these pending lists. */
54 int pending_lists_length;
56 /* Length of the pending memory flush list. Large functions with no
57 calls may build up extremely large lists. */
58 int pending_flush_length;
60 /* The last insn upon which all memory references must depend.
61 This is an insn which flushed the pending lists, creating a dependency
62 between it and all previously pending memory references. This creates
63 a barrier (or a checkpoint) which no memory reference is allowed to cross.
65 This includes all non constant CALL_INSNs. When we do interprocedural
66 alias analysis, this restriction can be relaxed.
67 This may also be an INSN that writes memory if the pending lists grow
69 rtx last_pending_memory_flush;
71 /* A list of the last function calls we have seen. We use a list to
72 represent last function calls from multiple predecessor blocks.
73 Used to prevent register lifetimes from expanding unnecessarily. */
74 rtx last_function_call;
76 /* A list of insns which use a pseudo register that does not already
77 cross a call. We create dependencies between each of those insn
78 and the next call insn, to ensure that they won't cross a call after
79 scheduling is done. */
80 rtx sched_before_next_call;
82 /* Used to keep post-call psuedo/hard reg movements together with
84 bool in_post_call_group_p;
86 /* Set to the tail insn of the outermost libcall block.
88 When nonzero, we will mark each insn processed by sched_analyze_insn
89 with SCHED_GROUP_P to ensure libcalls are scheduled as a unit. */
90 rtx libcall_block_tail_insn;
92 /* The maximum register number for the following arrays. Before reload
93 this is max_reg_num; after reload it is FIRST_PSEUDO_REGISTER. */
96 /* Element N is the next insn that sets (hard or pseudo) register
97 N within the current basic block; or zero, if there is no
98 such insn. Needed for new registers which may be introduced
99 by splitting insns. */
109 /* Element N is set for each register that has any non-zero element
110 in reg_last[N].{uses,sets,clobbers}. */
111 regset_head reg_last_in_use;
114 /* This structure holds some state of the current scheduling pass, and
115 contains some function pointers that abstract out some of the non-generic
116 functionality from functions such as schedule_block or schedule_insn.
117 There is one global variable, current_sched_info, which points to the
118 sched_info structure currently in use. */
121 /* Add all insns that are initially ready to the ready list. Called once
122 before scheduling a set of insns. */
123 void (*init_ready_list) PARAMS ((struct ready_list *));
124 /* Called after taking an insn from the ready list. Returns nonzero if
125 this insn can be scheduled, nonzero if we should silently discard it. */
126 int (*can_schedule_ready_p) PARAMS ((rtx));
127 /* Return nonzero if there are more insns that should be scheduled. */
128 int (*schedule_more_p) PARAMS ((void));
129 /* Called after an insn has all its dependencies resolved. Return nonzero
130 if it should be moved to the ready list or the queue, or zero if we
131 should silently discard it. */
132 int (*new_ready) PARAMS ((rtx));
133 /* Compare priority of two insns. Return a positive number if the second
134 insn is to be preferred for scheduling, and a negative one if the first
135 is to be preferred. Zero if they are equally good. */
136 int (*rank) PARAMS ((rtx, rtx));
137 /* Return a string that contains the insn uid and optionally anything else
138 necessary to identify this insn in an output. It's valid to use a
139 static buffer for this. The ALIGNED parameter should cause the string
140 to be formatted so that multiple output lines will line up nicely. */
141 const char *(*print_insn) PARAMS ((rtx, int));
142 /* Return nonzero if an insn should be included in priority
144 int (*contributes_to_priority) PARAMS ((rtx, rtx));
145 /* Called when computing dependencies for a JUMP_INSN. This function
146 should store the set of registers that must be considered as set by
147 the jump in the regset. */
148 void (*compute_jump_reg_dependencies) PARAMS ((rtx, regset));
150 /* The boundaries of the set of insns to be scheduled. */
151 rtx prev_head, next_tail;
153 /* Filled in after the schedule is finished; the first and last scheduled
157 /* If nonzero, enables an additional sanity check in schedule_block. */
158 unsigned int queue_must_finish_empty:1;
159 /* Nonzero if we should use cselib for better alias analysis. This
160 must be 0 if the dependency information is used after sched_analyze
161 has completed, e.g. if we're using it to initialize state for successor
162 blocks in region scheduling. */
163 unsigned int use_cselib:1;
166 extern struct sched_info *current_sched_info;
168 /* Indexed by INSN_UID, the collection of all data associated with
169 a single instruction. */
171 struct haifa_insn_data
173 /* A list of insns which depend on the instruction. Unlike LOG_LINKS,
174 it represents forward dependencies. */
177 /* The line number note in effect for each insn. For line number
178 notes, this indicates whether the note may be reused. */
181 /* Logical uid gives the original ordering of the insns. */
184 /* A priority for each insn. */
187 /* The number of incoming edges in the forward dependency graph.
188 As scheduling proceds, counts are decreased. An insn moves to
189 the ready queue when its counter reaches zero. */
192 /* An encoding of the blockage range function. Both unit and range
194 unsigned int blockage;
196 /* Number of instructions referring to this insn. */
199 /* The minimum clock tick at which the insn becomes ready. This is
200 used to note timing constraints for the insns in the pending list. */
205 /* An encoding of the function units used. */
208 /* This weight is an estimation of the insn's contribution to
209 register pressure. */
212 /* Some insns (e.g. call) are not allowed to move across blocks. */
213 unsigned int cant_move : 1;
215 /* Set if there's DEF-USE dependence between some speculatively
216 moved load insn and this one. */
217 unsigned int fed_by_spec_load : 1;
218 unsigned int is_load_insn : 1;
220 /* Nonzero if priority has been computed already. */
221 unsigned int priority_known : 1;
224 extern struct haifa_insn_data *h_i_d;
226 /* Accessor macros for h_i_d. There are more in haifa-sched.c and
228 #define INSN_DEPEND(INSN) (h_i_d[INSN_UID (INSN)].depend)
229 #define INSN_LUID(INSN) (h_i_d[INSN_UID (INSN)].luid)
230 #define CANT_MOVE(insn) (h_i_d[INSN_UID (insn)].cant_move)
231 #define INSN_DEP_COUNT(INSN) (h_i_d[INSN_UID (INSN)].dep_count)
232 #define INSN_PRIORITY(INSN) (h_i_d[INSN_UID (INSN)].priority)
233 #define INSN_PRIORITY_KNOWN(INSN) (h_i_d[INSN_UID (INSN)].priority_known)
234 #define INSN_COST(INSN) (h_i_d[INSN_UID (INSN)].cost)
235 #define INSN_UNIT(INSN) (h_i_d[INSN_UID (INSN)].units)
236 #define INSN_REG_WEIGHT(INSN) (h_i_d[INSN_UID (INSN)].reg_weight)
238 #define INSN_BLOCKAGE(INSN) (h_i_d[INSN_UID (INSN)].blockage)
240 #define BLOCKAGE_MASK ((1 << BLOCKAGE_BITS) - 1)
241 #define ENCODE_BLOCKAGE(U, R) \
242 (((U) << BLOCKAGE_BITS \
243 | MIN_BLOCKAGE_COST (R)) << BLOCKAGE_BITS \
244 | MAX_BLOCKAGE_COST (R))
245 #define UNIT_BLOCKED(B) ((B) >> (2 * BLOCKAGE_BITS))
246 #define BLOCKAGE_RANGE(B) \
247 (((((B) >> BLOCKAGE_BITS) & BLOCKAGE_MASK) << (HOST_BITS_PER_INT / 2)) \
248 | ((B) & BLOCKAGE_MASK))
250 /* Encodings of the `<name>_unit_blockage_range' function. */
251 #define MIN_BLOCKAGE_COST(R) ((R) >> (HOST_BITS_PER_INT / 2))
252 #define MAX_BLOCKAGE_COST(R) ((R) & ((1 << (HOST_BITS_PER_INT / 2)) - 1))
254 extern FILE *sched_dump;
255 extern int sched_verbose;
262 #define HAIFA_INLINE __inline
265 /* Functions in sched-vis.c. */
266 extern void init_target_units PARAMS ((void));
267 extern void insn_print_units PARAMS ((rtx));
268 extern void init_block_visualization PARAMS ((void));
269 extern void print_block_visualization PARAMS ((const char *));
270 extern void visualize_scheduled_insns PARAMS ((int));
271 extern void visualize_no_unit PARAMS ((rtx));
272 extern void visualize_stall_cycles PARAMS ((int));
273 extern void visualize_alloc PARAMS ((void));
274 extern void visualize_free PARAMS ((void));
276 /* Functions in sched-deps.c. */
277 extern void add_dependence PARAMS ((rtx, rtx, enum reg_note));
278 extern void add_insn_mem_dependence PARAMS ((struct deps *, rtx *, rtx *, rtx,
280 extern void sched_analyze PARAMS ((struct deps *, rtx, rtx));
281 extern void init_deps PARAMS ((struct deps *));
282 extern void free_deps PARAMS ((struct deps *));
283 extern void init_deps_global PARAMS ((void));
284 extern void finish_deps_global PARAMS ((void));
285 extern void compute_forward_dependences PARAMS ((rtx, rtx));
286 extern rtx find_insn_list PARAMS ((rtx, rtx));
287 extern void init_dependency_caches PARAMS ((int));
288 extern void free_dependency_caches PARAMS ((void));
290 /* Functions in haifa-sched.c. */
291 extern void get_block_head_tail PARAMS ((int, rtx *, rtx *));
292 extern int no_real_insns_p PARAMS ((rtx, rtx));
294 extern void rm_line_notes PARAMS ((rtx, rtx));
295 extern void save_line_notes PARAMS ((int, rtx, rtx));
296 extern void restore_line_notes PARAMS ((rtx, rtx));
297 extern void rm_redundant_line_notes PARAMS ((void));
298 extern void rm_other_notes PARAMS ((rtx, rtx));
300 extern int insn_issue_delay PARAMS ((rtx));
301 extern int set_priorities PARAMS ((rtx, rtx));
303 extern rtx sched_emit_insn PARAMS ((rtx));
304 extern void schedule_block PARAMS ((int, int));
305 extern void sched_init PARAMS ((FILE *));
306 extern void sched_finish PARAMS ((void));
308 extern void ready_add PARAMS ((struct ready_list *, rtx));
310 /* The following are exported for the benefit of debugging functions. It
311 would be nicer to keep them private to haifa-sched.c. */
312 extern int insn_unit PARAMS ((rtx));
313 extern int insn_cost PARAMS ((rtx, rtx, rtx));
314 extern rtx get_unit_last_insn PARAMS ((int));
315 extern int actual_hazard_this_instance PARAMS ((int, int, rtx, int, int));