1 /* Target-dependent code for PowerPC systems running FreeBSD.
3 Copyright 2002, 2003, 2004 Free Software Foundation, Inc.
5 Contributed by Wasabi Systems, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
28 #include "breakpoint.h"
30 #include "gdb_string.h"
35 #include "ppcfbsd-tdep.h"
36 #include "trad-frame.h"
37 #include "gdb_assert.h"
38 #include "solib-svr4.h"
40 #define REG_FIXREG_OFFSET(x) ((x) * sizeof(register_t))
41 #define REG_LR_OFFSET (32 * sizeof(register_t))
42 #define REG_CR_OFFSET (33 * sizeof(register_t))
43 #define REG_XER_OFFSET (34 * sizeof(register_t))
44 #define REG_CTR_OFFSET (35 * sizeof(register_t))
45 #define REG_PC_OFFSET (36 * sizeof(register_t))
46 #define SIZEOF_STRUCT_REG (37 * sizeof(register_t))
48 #define FPREG_FPR_OFFSET(x) ((x) * 8)
49 #define FPREG_FPSCR_OFFSET (32 * 8)
50 #define SIZEOF_STRUCT_FPREG (33 * 8)
53 ppcfbsd_supply_reg (char *regs, int regno)
55 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
58 for (i = tdep->ppc_gp0_regnum; i <= tdep->ppc_gplast_regnum; i++)
60 if (regno == i || regno == -1)
61 regcache_raw_supply (current_regcache, i, regs +
62 REG_FIXREG_OFFSET (i - tdep->ppc_gp0_regnum));
65 if (regno == tdep->ppc_lr_regnum || regno == -1)
66 regcache_raw_supply (current_regcache, tdep->ppc_lr_regnum,
67 regs + REG_LR_OFFSET);
69 if (regno == tdep->ppc_cr_regnum || regno == -1)
70 regcache_raw_supply (current_regcache, tdep->ppc_cr_regnum,
71 regs + REG_CR_OFFSET);
73 if (regno == tdep->ppc_xer_regnum || regno == -1)
74 regcache_raw_supply (current_regcache, tdep->ppc_xer_regnum,
75 regs + REG_XER_OFFSET);
77 if (regno == tdep->ppc_ctr_regnum || regno == -1)
78 regcache_raw_supply (current_regcache, tdep->ppc_ctr_regnum,
79 regs + REG_CTR_OFFSET);
81 if (regno == PC_REGNUM || regno == -1)
82 regcache_raw_supply (current_regcache, PC_REGNUM,
83 regs + REG_PC_OFFSET);
86 ppcfbsd_supply_gregset (const struct regset *regset,
87 struct regcache *regcache,
88 int regnum, void *gregs, size_t size)
90 ppcfbsd_supply_reg (gregs, -1);
93 static struct regset ppcfbsd_gregset = {
94 NULL, (void*)ppcfbsd_supply_gregset
98 ppcfbsd_fill_reg (char *regs, int regno)
100 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
103 for (i = tdep->ppc_gp0_regnum; i <= tdep->ppc_gplast_regnum; i++)
105 if (regno == i || regno == -1)
106 regcache_raw_collect (current_regcache, i, regs +
107 REG_FIXREG_OFFSET (i - tdep->ppc_gp0_regnum));
110 if (regno == tdep->ppc_lr_regnum || regno == -1)
111 regcache_raw_collect (current_regcache, tdep->ppc_lr_regnum,
112 regs + REG_LR_OFFSET);
114 if (regno == tdep->ppc_cr_regnum || regno == -1)
115 regcache_raw_collect (current_regcache, tdep->ppc_cr_regnum,
116 regs + REG_CR_OFFSET);
118 if (regno == tdep->ppc_xer_regnum || regno == -1)
119 regcache_raw_collect (current_regcache, tdep->ppc_xer_regnum,
120 regs + REG_XER_OFFSET);
122 if (regno == tdep->ppc_ctr_regnum || regno == -1)
123 regcache_raw_collect (current_regcache, tdep->ppc_ctr_regnum,
124 regs + REG_CTR_OFFSET);
126 if (regno == PC_REGNUM || regno == -1)
127 regcache_raw_collect (current_regcache, PC_REGNUM, regs + REG_PC_OFFSET);
131 ppcfbsd_supply_fpreg (char *fpregs, int regno)
133 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
136 /* FIXME: jimb/2004-05-05: Some PPC variants don't have floating
137 point registers. Traditionally, GDB's register set has still
138 listed the floating point registers for such machines, so this
139 code is harmless. However, the new E500 port actually omits the
140 floating point registers entirely from the register set --- they
141 don't even have register numbers assigned to them.
143 It's not clear to me how best to update this code, so this assert
144 will alert the first person to encounter the NetBSD/E500
145 combination to the problem. */
146 gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
148 for (i = FP0_REGNUM; i <= FPLAST_REGNUM; i++)
150 if (regno == i || regno == -1)
151 regcache_raw_supply (current_regcache, i, fpregs +
152 FPREG_FPR_OFFSET (i - FP0_REGNUM));
155 if (regno == tdep->ppc_fpscr_regnum || regno == -1)
156 regcache_raw_supply (current_regcache, tdep->ppc_fpscr_regnum,
157 fpregs + FPREG_FPSCR_OFFSET);
161 ppcfbsd_supply_fpregset (const struct regset *regset,
162 struct regcache * regcache,
163 int regnum, void *fpset, size_t size)
165 ppcfbsd_supply_fpreg (fpset, -1);
169 static struct regset ppcfbsd_fpregset =
171 NULL, (void*)ppcfbsd_supply_fpregset
175 ppcfbsd_fill_fpreg (char *fpregs, int regno)
177 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
180 /* FIXME: jimb/2004-05-05: Some PPC variants don't have floating
181 point registers. Traditionally, GDB's register set has still
182 listed the floating point registers for such machines, so this
183 code is harmless. However, the new E500 port actually omits the
184 floating point registers entirely from the register set --- they
185 don't even have register numbers assigned to them.
187 It's not clear to me how best to update this code, so this assert
188 will alert the first person to encounter the NetBSD/E500
189 combination to the problem. */
190 gdb_assert (ppc_floating_point_unit_p (current_gdbarch));
192 for (i = FP0_REGNUM; i <= FPLAST_REGNUM; i++)
194 if (regno == i || regno == -1)
195 regcache_raw_collect (current_regcache, i, fpregs +
196 FPREG_FPR_OFFSET (i - FP0_REGNUM));
199 if (regno == tdep->ppc_fpscr_regnum || regno == -1)
200 regcache_raw_collect (current_regcache, tdep->ppc_fpscr_regnum,
201 fpregs + FPREG_FPSCR_OFFSET);
204 /* Return the appropriate register set for the core section identified
205 by SECT_NAME and SECT_SIZE. */
207 const struct regset *
208 ppcfbsd_regset_from_core_section (struct gdbarch *gdbarch,
209 const char *sect_name, size_t sect_size)
211 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
213 if (strcmp (sect_name, ".reg") == 0 && sect_size >= SIZEOF_STRUCT_REG)
214 return &ppcfbsd_gregset;
216 if (strcmp (sect_name, ".reg2") == 0 && sect_size >= SIZEOF_STRUCT_FPREG)
217 return &ppcfbsd_fpregset;
223 /* Macros for matching instructions. Note that, since all the
224 operands are masked off before they're or-ed into the instruction,
225 you can use -1 to make masks. */
227 #define insn_d(opcd, rts, ra, d) \
228 ((((opcd) & 0x3f) << 26) \
229 | (((rts) & 0x1f) << 21) \
230 | (((ra) & 0x1f) << 16) \
233 #define insn_ds(opcd, rts, ra, d, xo) \
234 ((((opcd) & 0x3f) << 26) \
235 | (((rts) & 0x1f) << 21) \
236 | (((ra) & 0x1f) << 16) \
240 #define insn_xfx(opcd, rts, spr, xo) \
241 ((((opcd) & 0x3f) << 26) \
242 | (((rts) & 0x1f) << 21) \
243 | (((spr) & 0x1f) << 16) \
244 | (((spr) & 0x3e0) << 6) \
245 | (((xo) & 0x3ff) << 1))
247 /* Read a PPC instruction from memory. PPC instructions are always
248 big-endian, no matter what endianness the program is running in, so
249 we can't use read_memory_integer or one of its friends here. */
251 read_insn (CORE_ADDR pc)
253 unsigned char buf[4];
255 read_memory (pc, buf, 4);
256 return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
260 /* An instruction to match. */
263 unsigned int mask; /* mask the insn with this... */
264 unsigned int data; /* ...and see if it matches this. */
265 int optional; /* If non-zero, this insn may be absent. */
268 /* Return non-zero if the instructions at PC match the series
269 described in PATTERN, or zero otherwise. PATTERN is an array of
270 'struct insn_pattern' objects, terminated by an entry whose mask is
273 When the match is successful, fill INSN[i] with what PATTERN[i]
274 matched. If PATTERN[i] is optional, and the instruction wasn't
275 present, set INSN[i] to 0 (which is not a valid PPC instruction).
276 INSN should have as many elements as PATTERN. Note that, if
277 PATTERN contains optional instructions which aren't present in
278 memory, then INSN will have holes, so INSN[i] isn't necessarily the
279 i'th instruction in memory. */
281 insns_match_pattern (CORE_ADDR pc,
282 struct insn_pattern *pattern,
287 for (i = 0; pattern[i].mask; i++)
289 insn[i] = read_insn (pc);
290 if ((insn[i] & pattern[i].mask) == pattern[i].data)
292 else if (pattern[i].optional)
302 /* Return the 'd' field of the d-form instruction INSN, properly
305 insn_d_field (unsigned int insn)
307 return ((((CORE_ADDR) insn & 0xffff) ^ 0x8000) - 0x8000);
311 /* Return the 'ds' field of the ds-form instruction INSN, with the two
312 zero bits concatenated at the right, and properly
315 insn_ds_field (unsigned int insn)
317 return ((((CORE_ADDR) insn & 0xfffc) ^ 0x8000) - 0x8000);
321 /* If DESC is the address of a 64-bit PowerPC FreeBSD function
322 descriptor, return the descriptor's entry point. */
324 ppc64_desc_entry_point (CORE_ADDR desc)
326 /* The first word of the descriptor is the entry point. */
327 return (CORE_ADDR) read_memory_unsigned_integer (desc, 8);
331 /* Pattern for the standard linkage function. These are built by
332 build_plt_stub in elf64-ppc.c, whose GLINK argument is always
334 static struct insn_pattern ppc64_standard_linkage[] =
336 /* addis r12, r2, <any> */
337 { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
340 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
342 /* ld r11, <any>(r12) */
343 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
345 /* addis r12, r12, 1 <optional> */
346 { insn_d (-1, -1, -1, -1), insn_d (15, 12, 2, 1), 1 },
348 /* ld r2, <any>(r12) */
349 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
351 /* addis r12, r12, 1 <optional> */
352 { insn_d (-1, -1, -1, -1), insn_d (15, 12, 2, 1), 1 },
355 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467),
358 /* ld r11, <any>(r12) */
359 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
362 { -1, 0x4e800420, 0 },
366 #define PPC64_STANDARD_LINKAGE_LEN \
367 (sizeof (ppc64_standard_linkage) / sizeof (ppc64_standard_linkage[0]))
369 /* When the dynamic linker is doing lazy symbol resolution, the first
370 call to a function in another object will go like this:
372 - The user's function calls the linkage function:
374 100007c4: 4b ff fc d5 bl 10000498
375 100007c8: e8 41 00 28 ld r2,40(r1)
377 - The linkage function loads the entry point (and other stuff) from
378 the function descriptor in the PLT, and jumps to it:
380 10000498: 3d 82 00 00 addis r12,r2,0
381 1000049c: f8 41 00 28 std r2,40(r1)
382 100004a0: e9 6c 80 98 ld r11,-32616(r12)
383 100004a4: e8 4c 80 a0 ld r2,-32608(r12)
384 100004a8: 7d 69 03 a6 mtctr r11
385 100004ac: e9 6c 80 a8 ld r11,-32600(r12)
386 100004b0: 4e 80 04 20 bctr
388 - But since this is the first time that PLT entry has been used, it
389 sends control to its glink entry. That loads the number of the
390 PLT entry and jumps to the common glink0 code:
392 10000c98: 38 00 00 00 li r0,0
393 10000c9c: 4b ff ff dc b 10000c78
395 - The common glink0 code then transfers control to the dynamic
398 10000c78: e8 41 00 28 ld r2,40(r1)
399 10000c7c: 3d 82 00 00 addis r12,r2,0
400 10000c80: e9 6c 80 80 ld r11,-32640(r12)
401 10000c84: e8 4c 80 88 ld r2,-32632(r12)
402 10000c88: 7d 69 03 a6 mtctr r11
403 10000c8c: e9 6c 80 90 ld r11,-32624(r12)
404 10000c90: 4e 80 04 20 bctr
406 Eventually, this code will figure out how to skip all of this,
407 including the dynamic linker. At the moment, we just get through
408 the linkage function. */
410 /* If the current thread is about to execute a series of instructions
411 at PC matching the ppc64_standard_linkage pattern, and INSN is the result
412 from that pattern match, return the code address to which the
413 standard linkage function will send them. (This doesn't deal with
414 dynamic linker lazy symbol resolution stubs.) */
416 ppc64_standard_linkage_target (CORE_ADDR pc, unsigned int *insn)
418 struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch);
420 /* The address of the function descriptor this linkage function
423 = ((CORE_ADDR) read_register (tdep->ppc_gp0_regnum + 2)
424 + (insn_d_field (insn[0]) << 16)
425 + insn_ds_field (insn[2]));
427 /* The first word of the descriptor is the entry point. Return that. */
428 return ppc64_desc_entry_point (desc);
432 /* Given that we've begun executing a call trampoline at PC, return
433 the entry point of the function the trampoline will go to. */
435 ppc64_skip_trampoline_code (CORE_ADDR pc)
437 unsigned int ppc64_standard_linkage_insn[PPC64_STANDARD_LINKAGE_LEN];
439 if (insns_match_pattern (pc, ppc64_standard_linkage,
440 ppc64_standard_linkage_insn))
441 return ppc64_standard_linkage_target (pc, ppc64_standard_linkage_insn);
447 /* Support for CONVERT_FROM_FUNC_PTR_ADDR (ARCH, ADDR, TARG) on PPC64
448 GNU/Linux and FreeBSD.
450 Usually a function pointer's representation is simply the address
451 of the function. On GNU/Linux on the 64-bit PowerPC however, a
452 function pointer is represented by a pointer to a TOC entry. This
453 TOC entry contains three words, the first word is the address of
454 the function, the second word is the TOC pointer (r2), and the
455 third word is the static chain value. Throughout GDB it is
456 currently assumed that a function pointer contains the address of
457 the function, which is not easy to fix. In addition, the
458 conversion of a function address to a function pointer would
459 require allocation of a TOC entry in the inferior's memory space,
460 with all its drawbacks. To be able to call C++ virtual methods in
461 the inferior (which are called via function pointers),
462 find_function_addr uses this function to get the function address
463 from a function pointer. */
465 /* If ADDR points at what is clearly a function descriptor, transform
466 it into the address of the corresponding function. Be
467 conservative, otherwize GDB will do the transformation on any
468 random addresses such as occures when there is no symbol table. */
471 ppc64_fbsd_convert_from_func_ptr_addr (struct gdbarch *gdbarch,
473 struct target_ops *targ)
475 struct section_table *s = target_section_by_addr (targ, addr);
477 /* Check if ADDR points to a function descriptor. */
478 if (s && strcmp (s->the_bfd_section->name, ".opd") == 0)
479 return get_target_memory_unsigned (targ, addr, 8);
485 ppcfbsd_pc_in_sigtramp (CORE_ADDR pc, char *func_name)
487 return (pc >= 0x7fffef00U) ? 1 : 0;
490 /* NetBSD is confused. It appears that 1.5 was using the correct SVr4
491 convention but, 1.6 switched to the below broken convention. For
492 the moment use the broken convention. Ulgh!. */
494 static enum return_value_convention
495 ppcfbsd_return_value (struct gdbarch *gdbarch, struct type *valtype,
496 struct regcache *regcache, void *readbuf,
497 const void *writebuf)
499 if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
500 || TYPE_CODE (valtype) == TYPE_CODE_UNION)
501 && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8))
502 && !(TYPE_LENGTH (valtype) == 1
503 || TYPE_LENGTH (valtype) == 2
504 || TYPE_LENGTH (valtype) == 4
505 || TYPE_LENGTH (valtype) == 8))
506 return RETURN_VALUE_STRUCT_CONVENTION;
508 return ppc_sysv_abi_broken_return_value (gdbarch, valtype, regcache,
513 ppcfbsd_init_abi (struct gdbarch_info info,
514 struct gdbarch *gdbarch)
516 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
518 /* FreeBSD doesn't support the 128-bit `long double' from the psABI. */
519 set_gdbarch_long_double_bit (gdbarch, 64);
521 set_gdbarch_pc_in_sigtramp (gdbarch, ppcfbsd_pc_in_sigtramp);
523 if (tdep->wordsize == 4)
525 set_gdbarch_return_value (gdbarch, ppcfbsd_return_value);
526 set_solib_svr4_fetch_link_map_offsets (gdbarch,
527 svr4_ilp32_fetch_link_map_offsets);
530 if (tdep->wordsize == 8)
532 set_gdbarch_convert_from_func_ptr_addr
533 (gdbarch, ppc64_fbsd_convert_from_func_ptr_addr);
535 set_gdbarch_skip_trampoline_code (gdbarch, ppc64_skip_trampoline_code);
537 set_solib_svr4_fetch_link_map_offsets (gdbarch,
538 svr4_lp64_fetch_link_map_offsets);
541 set_gdbarch_regset_from_core_section (gdbarch,
542 ppcfbsd_regset_from_core_section);
546 _initialize_ppcfbsd_tdep (void)
548 gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc,
549 GDB_OSABI_FREEBSD_ELF, ppcfbsd_init_abi);
550 gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc64,
551 GDB_OSABI_FREEBSD_ELF, ppcfbsd_init_abi);
552 gdbarch_register_osabi (bfd_arch_rs6000, 0, GDB_OSABI_FREEBSD_ELF,