1 //===- TargetTransformInfo.h ------------------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 /// This pass exposes codegen information to IR-level passes. Every
11 /// transformation that uses codegen information is broken into three parts:
12 /// 1. The IR-level analysis pass.
13 /// 2. The IR-level transformation interface which provides the needed
15 /// 3. Codegen-level implementation which uses target-specific hooks.
17 /// This file defines #2, which is the interface that IR-level transformations
18 /// use for querying the codegen.
20 //===----------------------------------------------------------------------===//
22 #ifndef LLVM_ANALYSIS_TARGETTRANSFORMINFO_H
23 #define LLVM_ANALYSIS_TARGETTRANSFORMINFO_H
25 #include "llvm/ADT/Optional.h"
26 #include "llvm/IR/IntrinsicInst.h"
27 #include "llvm/IR/Intrinsics.h"
28 #include "llvm/IR/Operator.h"
29 #include "llvm/IR/PassManager.h"
30 #include "llvm/Pass.h"
31 #include "llvm/Support/DataTypes.h"
39 class ScalarEvolution;
45 /// \brief Information about a load/store intrinsic defined by the target.
46 struct MemIntrinsicInfo {
47 /// This is the pointer that the intrinsic is loading from or storing to.
48 /// If this is non-null, then analysis/optimization passes can assume that
49 /// this intrinsic is functionally equivalent to a load/store from this
51 Value *PtrVal = nullptr;
53 // Ordering for atomic operations.
54 AtomicOrdering Ordering = AtomicOrdering::NotAtomic;
56 // Same Id is set by the target for corresponding load/store intrinsics.
57 unsigned short MatchingId = 0;
60 bool WriteMem = false;
61 bool IsVolatile = false;
63 bool isUnordered() const {
64 return (Ordering == AtomicOrdering::NotAtomic ||
65 Ordering == AtomicOrdering::Unordered) && !IsVolatile;
69 /// \brief This pass provides access to the codegen interfaces that are needed
70 /// for IR-level transformations.
71 class TargetTransformInfo {
73 /// \brief Construct a TTI object using a type implementing the \c Concept
76 /// This is used by targets to construct a TTI wrapping their target-specific
77 /// implementaion that encodes appropriate costs for their target.
78 template <typename T> TargetTransformInfo(T Impl);
80 /// \brief Construct a baseline TTI object using a minimal implementation of
81 /// the \c Concept API below.
83 /// The TTI implementation will reflect the information in the DataLayout
84 /// provided if non-null.
85 explicit TargetTransformInfo(const DataLayout &DL);
87 // Provide move semantics.
88 TargetTransformInfo(TargetTransformInfo &&Arg);
89 TargetTransformInfo &operator=(TargetTransformInfo &&RHS);
91 // We need to define the destructor out-of-line to define our sub-classes
93 ~TargetTransformInfo();
95 /// \brief Handle the invalidation of this information.
97 /// When used as a result of \c TargetIRAnalysis this method will be called
98 /// when the function this was computed for changes. When it returns false,
99 /// the information is preserved across those changes.
100 bool invalidate(Function &, const PreservedAnalyses &,
101 FunctionAnalysisManager::Invalidator &) {
102 // FIXME: We should probably in some way ensure that the subtarget
103 // information for a function hasn't changed.
107 /// \name Generic Target Information
110 /// \brief Underlying constants for 'cost' values in this interface.
112 /// Many APIs in this interface return a cost. This enum defines the
113 /// fundamental values that should be used to interpret (and produce) those
114 /// costs. The costs are returned as an int rather than a member of this
115 /// enumeration because it is expected that the cost of one IR instruction
116 /// may have a multiplicative factor to it or otherwise won't fit directly
117 /// into the enum. Moreover, it is common to sum or average costs which works
118 /// better as simple integral values. Thus this enum only provides constants.
119 /// Also note that the returned costs are signed integers to make it natural
120 /// to add, subtract, and test with zero (a common boundary condition). It is
121 /// not expected that 2^32 is a realistic cost to be modeling at any point.
123 /// Note that these costs should usually reflect the intersection of code-size
124 /// cost and execution cost. A free instruction is typically one that folds
125 /// into another instruction. For example, reg-to-reg moves can often be
126 /// skipped by renaming the registers in the CPU, but they still are encoded
127 /// and thus wouldn't be considered 'free' here.
128 enum TargetCostConstants {
129 TCC_Free = 0, ///< Expected to fold away in lowering.
130 TCC_Basic = 1, ///< The cost of a typical 'add' instruction.
131 TCC_Expensive = 4 ///< The cost of a 'div' instruction on x86.
134 /// \brief Estimate the cost of a specific operation when lowered.
136 /// Note that this is designed to work on an arbitrary synthetic opcode, and
137 /// thus work for hypothetical queries before an instruction has even been
138 /// formed. However, this does *not* work for GEPs, and must not be called
139 /// for a GEP instruction. Instead, use the dedicated getGEPCost interface as
140 /// analyzing a GEP's cost required more information.
142 /// Typically only the result type is required, and the operand type can be
143 /// omitted. However, if the opcode is one of the cast instructions, the
144 /// operand type is required.
146 /// The returned cost is defined in terms of \c TargetCostConstants, see its
147 /// comments for a detailed explanation of the cost values.
148 int getOperationCost(unsigned Opcode, Type *Ty, Type *OpTy = nullptr) const;
150 /// \brief Estimate the cost of a GEP operation when lowered.
152 /// The contract for this function is the same as \c getOperationCost except
153 /// that it supports an interface that provides extra information specific to
154 /// the GEP operation.
155 int getGEPCost(Type *PointeeType, const Value *Ptr,
156 ArrayRef<const Value *> Operands) const;
158 /// \brief Estimate the cost of a function call when lowered.
160 /// The contract for this is the same as \c getOperationCost except that it
161 /// supports an interface that provides extra information specific to call
164 /// This is the most basic query for estimating call cost: it only knows the
165 /// function type and (potentially) the number of arguments at the call site.
166 /// The latter is only interesting for varargs function types.
167 int getCallCost(FunctionType *FTy, int NumArgs = -1) const;
169 /// \brief Estimate the cost of calling a specific function when lowered.
171 /// This overload adds the ability to reason about the particular function
172 /// being called in the event it is a library call with special lowering.
173 int getCallCost(const Function *F, int NumArgs = -1) const;
175 /// \brief Estimate the cost of calling a specific function when lowered.
177 /// This overload allows specifying a set of candidate argument values.
178 int getCallCost(const Function *F, ArrayRef<const Value *> Arguments) const;
180 /// \returns A value by which our inlining threshold should be multiplied.
181 /// This is primarily used to bump up the inlining threshold wholesale on
182 /// targets where calls are unusually expensive.
184 /// TODO: This is a rather blunt instrument. Perhaps altering the costs of
185 /// individual classes of instructions would be better.
186 unsigned getInliningThresholdMultiplier() const;
188 /// \brief Estimate the cost of an intrinsic when lowered.
190 /// Mirrors the \c getCallCost method but uses an intrinsic identifier.
191 int getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
192 ArrayRef<Type *> ParamTys) const;
194 /// \brief Estimate the cost of an intrinsic when lowered.
196 /// Mirrors the \c getCallCost method but uses an intrinsic identifier.
197 int getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
198 ArrayRef<const Value *> Arguments) const;
200 /// \return The estimated number of case clusters when lowering \p 'SI'.
201 /// \p JTSize Set a jump table size only when \p SI is suitable for a jump
203 unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI,
204 unsigned &JTSize) const;
206 /// \brief Estimate the cost of a given IR user when lowered.
208 /// This can estimate the cost of either a ConstantExpr or Instruction when
209 /// lowered. It has two primary advantages over the \c getOperationCost and
210 /// \c getGEPCost above, and one significant disadvantage: it can only be
211 /// used when the IR construct has already been formed.
213 /// The advantages are that it can inspect the SSA use graph to reason more
214 /// accurately about the cost. For example, all-constant-GEPs can often be
215 /// folded into a load or other instruction, but if they are used in some
216 /// other context they may not be folded. This routine can distinguish such
219 /// The returned cost is defined in terms of \c TargetCostConstants, see its
220 /// comments for a detailed explanation of the cost values.
221 int getUserCost(const User *U) const;
223 /// \brief Return true if branch divergence exists.
225 /// Branch divergence has a significantly negative impact on GPU performance
226 /// when threads in the same wavefront take different paths due to conditional
228 bool hasBranchDivergence() const;
230 /// \brief Returns whether V is a source of divergence.
232 /// This function provides the target-dependent information for
233 /// the target-independent DivergenceAnalysis. DivergenceAnalysis first
234 /// builds the dependency graph, and then runs the reachability algorithm
235 /// starting with the sources of divergence.
236 bool isSourceOfDivergence(const Value *V) const;
238 /// Returns the address space ID for a target's 'flat' address space. Note
239 /// this is not necessarily the same as addrspace(0), which LLVM sometimes
240 /// refers to as the generic address space. The flat address space is a
241 /// generic address space that can be used access multiple segments of memory
242 /// with different address spaces. Access of a memory location through a
243 /// pointer with this address space is expected to be legal but slower
244 /// compared to the same memory location accessed through a pointer with a
245 /// different address space.
247 /// This is for for targets with different pointer representations which can
248 /// be converted with the addrspacecast instruction. If a pointer is converted
249 /// to this address space, optimizations should attempt to replace the access
250 /// with the source address space.
252 /// \returns ~0u if the target does not have such a flat address space to
254 unsigned getFlatAddressSpace() const;
256 /// \brief Test whether calls to a function lower to actual program function
259 /// The idea is to test whether the program is likely to require a 'call'
260 /// instruction or equivalent in order to call the given function.
262 /// FIXME: It's not clear that this is a good or useful query API. Client's
263 /// should probably move to simpler cost metrics using the above.
264 /// Alternatively, we could split the cost interface into distinct code-size
265 /// and execution-speed costs. This would allow modelling the core of this
266 /// query more accurately as a call is a single small instruction, but
267 /// incurs significant execution cost.
268 bool isLoweredToCall(const Function *F) const;
270 /// Parameters that control the generic loop unrolling transformation.
271 struct UnrollingPreferences {
272 /// The cost threshold for the unrolled loop. Should be relative to the
273 /// getUserCost values returned by this API, and the expectation is that
274 /// the unrolled loop's instructions when run through that interface should
275 /// not exceed this cost. However, this is only an estimate. Also, specific
276 /// loops may be unrolled even with a cost above this threshold if deemed
277 /// profitable. Set this to UINT_MAX to disable the loop body cost
280 /// If complete unrolling will reduce the cost of the loop, we will boost
281 /// the Threshold by a certain percent to allow more aggressive complete
282 /// unrolling. This value provides the maximum boost percentage that we
283 /// can apply to Threshold (The value should be no less than 100).
284 /// BoostedThreshold = Threshold * min(RolledCost / UnrolledCost,
285 /// MaxPercentThresholdBoost / 100)
286 /// E.g. if complete unrolling reduces the loop execution time by 50%
287 /// then we boost the threshold by the factor of 2x. If unrolling is not
288 /// expected to reduce the running time, then we do not increase the
290 unsigned MaxPercentThresholdBoost;
291 /// The cost threshold for the unrolled loop when optimizing for size (set
292 /// to UINT_MAX to disable).
293 unsigned OptSizeThreshold;
294 /// The cost threshold for the unrolled loop, like Threshold, but used
295 /// for partial/runtime unrolling (set to UINT_MAX to disable).
296 unsigned PartialThreshold;
297 /// The cost threshold for the unrolled loop when optimizing for size, like
298 /// OptSizeThreshold, but used for partial/runtime unrolling (set to
299 /// UINT_MAX to disable).
300 unsigned PartialOptSizeThreshold;
301 /// A forced unrolling factor (the number of concatenated bodies of the
302 /// original loop in the unrolled loop body). When set to 0, the unrolling
303 /// transformation will select an unrolling factor based on the current cost
304 /// threshold and other factors.
306 /// A forced peeling factor (the number of bodied of the original loop
307 /// that should be peeled off before the loop body). When set to 0, the
308 /// unrolling transformation will select a peeling factor based on profile
309 /// information and other factors.
311 /// Default unroll count for loops with run-time trip count.
312 unsigned DefaultUnrollRuntimeCount;
313 // Set the maximum unrolling factor. The unrolling factor may be selected
314 // using the appropriate cost threshold, but may not exceed this number
315 // (set to UINT_MAX to disable). This does not apply in cases where the
316 // loop is being fully unrolled.
318 /// Set the maximum unrolling factor for full unrolling. Like MaxCount, but
319 /// applies even if full unrolling is selected. This allows a target to fall
320 /// back to Partial unrolling if full unrolling is above FullUnrollMaxCount.
321 unsigned FullUnrollMaxCount;
322 // Represents number of instructions optimized when "back edge"
323 // becomes "fall through" in unrolled loop.
324 // For now we count a conditional branch on a backedge and a comparison
327 /// Allow partial unrolling (unrolling of loops to expand the size of the
328 /// loop body, not only to eliminate small constant-trip-count loops).
330 /// Allow runtime unrolling (unrolling of loops to expand the size of the
331 /// loop body even when the number of loop iterations is not known at
334 /// Allow generation of a loop remainder (extra iterations after unroll).
336 /// Allow emitting expensive instructions (such as divisions) when computing
337 /// the trip count of a loop for runtime unrolling.
338 bool AllowExpensiveTripCount;
339 /// Apply loop unroll on any kind of loop
340 /// (mainly to loops that fail runtime unrolling).
342 /// Allow using trip count upper bound to unroll loops.
344 /// Allow peeling off loop iterations for loops with low dynamic tripcount.
348 /// \brief Get target-customized preferences for the generic loop unrolling
349 /// transformation. The caller will initialize UP with the current
350 /// target-independent defaults.
351 void getUnrollingPreferences(Loop *L, UnrollingPreferences &UP) const;
355 /// \name Scalar Target Information
358 /// \brief Flags indicating the kind of support for population count.
360 /// Compared to the SW implementation, HW support is supposed to
361 /// significantly boost the performance when the population is dense, and it
362 /// may or may not degrade performance if the population is sparse. A HW
363 /// support is considered as "Fast" if it can outperform, or is on a par
364 /// with, SW implementation when the population is sparse; otherwise, it is
365 /// considered as "Slow".
366 enum PopcntSupportKind { PSK_Software, PSK_SlowHardware, PSK_FastHardware };
368 /// \brief Return true if the specified immediate is legal add immediate, that
369 /// is the target has add instructions which can add a register with the
370 /// immediate without having to materialize the immediate into a register.
371 bool isLegalAddImmediate(int64_t Imm) const;
373 /// \brief Return true if the specified immediate is legal icmp immediate,
374 /// that is the target has icmp instructions which can compare a register
375 /// against the immediate without having to materialize the immediate into a
377 bool isLegalICmpImmediate(int64_t Imm) const;
379 /// \brief Return true if the addressing mode represented by AM is legal for
380 /// this target, for a load/store of the specified type.
381 /// The type may be VoidTy, in which case only return true if the addressing
382 /// mode is legal for a load/store of any legal type.
383 /// TODO: Handle pre/postinc as well.
384 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
385 bool HasBaseReg, int64_t Scale,
386 unsigned AddrSpace = 0) const;
388 /// \brief Return true if the target supports masked load/store
389 /// AVX2 and AVX-512 targets allow masks for consecutive load and store
390 bool isLegalMaskedStore(Type *DataType) const;
391 bool isLegalMaskedLoad(Type *DataType) const;
393 /// \brief Return true if the target supports masked gather/scatter
394 /// AVX-512 fully supports gather and scatter for vectors with 32 and 64
395 /// bits scalar type.
396 bool isLegalMaskedScatter(Type *DataType) const;
397 bool isLegalMaskedGather(Type *DataType) const;
399 /// Return true if target doesn't mind addresses in vectors.
400 bool prefersVectorizedAddressing() const;
402 /// \brief Return the cost of the scaling factor used in the addressing
403 /// mode represented by AM for this target, for a load/store
404 /// of the specified type.
405 /// If the AM is supported, the return value must be >= 0.
406 /// If the AM is not supported, it returns a negative value.
407 /// TODO: Handle pre/postinc as well.
408 int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
409 bool HasBaseReg, int64_t Scale,
410 unsigned AddrSpace = 0) const;
412 /// \brief Return true if target supports the load / store
413 /// instruction with the given Offset on the form reg + Offset. It
414 /// may be that Offset is too big for a certain type (register
416 bool isFoldableMemAccessOffset(Instruction *I, int64_t Offset) const;
418 /// \brief Return true if it's free to truncate a value of type Ty1 to type
419 /// Ty2. e.g. On x86 it's free to truncate a i32 value in register EAX to i16
420 /// by referencing its sub-register AX.
421 bool isTruncateFree(Type *Ty1, Type *Ty2) const;
423 /// \brief Return true if it is profitable to hoist instruction in the
424 /// then/else to before if.
425 bool isProfitableToHoist(Instruction *I) const;
427 /// \brief Return true if this type is legal.
428 bool isTypeLegal(Type *Ty) const;
430 /// \brief Returns the target's jmp_buf alignment in bytes.
431 unsigned getJumpBufAlignment() const;
433 /// \brief Returns the target's jmp_buf size in bytes.
434 unsigned getJumpBufSize() const;
436 /// \brief Return true if switches should be turned into lookup tables for the
438 bool shouldBuildLookupTables() const;
440 /// \brief Return true if switches should be turned into lookup tables
441 /// containing this constant value for the target.
442 bool shouldBuildLookupTablesForConstant(Constant *C) const;
444 unsigned getScalarizationOverhead(Type *Ty, bool Insert, bool Extract) const;
446 unsigned getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
449 /// If target has efficient vector element load/store instructions, it can
450 /// return true here so that insertion/extraction costs are not added to
451 /// the scalarization cost of a load/store.
452 bool supportsEfficientVectorElementLoadStore() const;
454 /// \brief Don't restrict interleaved unrolling to small loops.
455 bool enableAggressiveInterleaving(bool LoopHasReductions) const;
457 /// \brief Enable inline expansion of memcmp
458 bool expandMemCmp(Instruction *I, unsigned &MaxLoadSize) const;
460 /// \brief Enable matching of interleaved access groups.
461 bool enableInterleavedAccessVectorization() const;
463 /// \brief Indicate that it is potentially unsafe to automatically vectorize
464 /// floating-point operations because the semantics of vector and scalar
465 /// floating-point semantics may differ. For example, ARM NEON v7 SIMD math
466 /// does not support IEEE-754 denormal numbers, while depending on the
467 /// platform, scalar floating-point math does.
468 /// This applies to floating-point math operations and calls, not memory
469 /// operations, shuffles, or casts.
470 bool isFPVectorizationPotentiallyUnsafe() const;
472 /// \brief Determine if the target supports unaligned memory accesses.
473 bool allowsMisalignedMemoryAccesses(LLVMContext &Context,
474 unsigned BitWidth, unsigned AddressSpace = 0,
475 unsigned Alignment = 1,
476 bool *Fast = nullptr) const;
478 /// \brief Return hardware support for population count.
479 PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) const;
481 /// \brief Return true if the hardware has a fast square-root instruction.
482 bool haveFastSqrt(Type *Ty) const;
484 /// \brief Return the expected cost of supporting the floating point operation
485 /// of the specified type.
486 int getFPOpCost(Type *Ty) const;
488 /// \brief Return the expected cost of materializing for the given integer
489 /// immediate of the specified type.
490 int getIntImmCost(const APInt &Imm, Type *Ty) const;
492 /// \brief Return the expected cost of materialization for the given integer
493 /// immediate of the specified type for a given instruction. The cost can be
494 /// zero if the immediate can be folded into the specified instruction.
495 int getIntImmCost(unsigned Opc, unsigned Idx, const APInt &Imm,
497 int getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
500 /// \brief Return the expected cost for the given integer when optimising
501 /// for size. This is different than the other integer immediate cost
502 /// functions in that it is subtarget agnostic. This is useful when you e.g.
503 /// target one ISA such as Aarch32 but smaller encodings could be possible
504 /// with another such as Thumb. This return value is used as a penalty when
505 /// the total costs for a constant is calculated (the bigger the cost, the
506 /// more beneficial constant hoisting is).
507 int getIntImmCodeSizeCost(unsigned Opc, unsigned Idx, const APInt &Imm,
511 /// \name Vector Target Information
514 /// \brief The various kinds of shuffle patterns for vector queries.
516 SK_Broadcast, ///< Broadcast element 0 to all other elements.
517 SK_Reverse, ///< Reverse the order of the vector.
518 SK_Alternate, ///< Choose alternate elements from vector.
519 SK_InsertSubvector, ///< InsertSubvector. Index indicates start offset.
520 SK_ExtractSubvector,///< ExtractSubvector Index indicates start offset.
521 SK_PermuteTwoSrc, ///< Merge elements from two source vectors into one
522 ///< with any shuffle mask.
523 SK_PermuteSingleSrc ///< Shuffle elements of single source vector with any
527 /// \brief Additional information about an operand's possible values.
528 enum OperandValueKind {
529 OK_AnyValue, // Operand can have any value.
530 OK_UniformValue, // Operand is uniform (splat of a value).
531 OK_UniformConstantValue, // Operand is uniform constant.
532 OK_NonUniformConstantValue // Operand is a non uniform constant value.
535 /// \brief Additional properties of an operand's values.
536 enum OperandValueProperties { OP_None = 0, OP_PowerOf2 = 1 };
538 /// \return The number of scalar or vector registers that the target has.
539 /// If 'Vectors' is true, it returns the number of vector registers. If it is
540 /// set to false, it returns the number of scalar registers.
541 unsigned getNumberOfRegisters(bool Vector) const;
543 /// \return The width of the largest scalar or vector register type.
544 unsigned getRegisterBitWidth(bool Vector) const;
546 /// \return The width of the smallest vector register type.
547 unsigned getMinVectorRegisterBitWidth() const;
549 /// \return True if it should be considered for address type promotion.
550 /// \p AllowPromotionWithoutCommonHeader Set true if promoting \p I is
551 /// profitable without finding other extensions fed by the same input.
552 bool shouldConsiderAddressTypePromotion(
553 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const;
555 /// \return The size of a cache line in bytes.
556 unsigned getCacheLineSize() const;
558 /// \return How much before a load we should place the prefetch instruction.
559 /// This is currently measured in number of instructions.
560 unsigned getPrefetchDistance() const;
562 /// \return Some HW prefetchers can handle accesses up to a certain constant
563 /// stride. This is the minimum stride in bytes where it makes sense to start
564 /// adding SW prefetches. The default is 1, i.e. prefetch with any stride.
565 unsigned getMinPrefetchStride() const;
567 /// \return The maximum number of iterations to prefetch ahead. If the
568 /// required number of iterations is more than this number, no prefetching is
570 unsigned getMaxPrefetchIterationsAhead() const;
572 /// \return The maximum interleave factor that any transform should try to
573 /// perform for this target. This number depends on the level of parallelism
574 /// and the number of execution units in the CPU.
575 unsigned getMaxInterleaveFactor(unsigned VF) const;
577 /// \return The expected cost of arithmetic ops, such as mul, xor, fsub, etc.
578 /// \p Args is an optional argument which holds the instruction operands
579 /// values so the TTI can analyize those values searching for special
580 /// cases\optimizations based on those values.
581 int getArithmeticInstrCost(
582 unsigned Opcode, Type *Ty, OperandValueKind Opd1Info = OK_AnyValue,
583 OperandValueKind Opd2Info = OK_AnyValue,
584 OperandValueProperties Opd1PropInfo = OP_None,
585 OperandValueProperties Opd2PropInfo = OP_None,
586 ArrayRef<const Value *> Args = ArrayRef<const Value *>()) const;
588 /// \return The cost of a shuffle instruction of kind Kind and of type Tp.
589 /// The index and subtype parameters are used by the subvector insertion and
590 /// extraction shuffle kinds.
591 int getShuffleCost(ShuffleKind Kind, Type *Tp, int Index = 0,
592 Type *SubTp = nullptr) const;
594 /// \return The expected cost of cast instructions, such as bitcast, trunc,
595 /// zext, etc. If there is an existing instruction that holds Opcode, it
596 /// may be passed in the 'I' parameter.
597 int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
598 const Instruction *I = nullptr) const;
600 /// \return The expected cost of a sign- or zero-extended vector extract. Use
601 /// -1 to indicate that there is no information about the index value.
602 int getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy,
603 unsigned Index = -1) const;
605 /// \return The expected cost of control-flow related instructions such as
607 int getCFInstrCost(unsigned Opcode) const;
609 /// \returns The expected cost of compare and select instructions. If there
610 /// is an existing instruction that holds Opcode, it may be passed in the
612 int getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
613 Type *CondTy = nullptr, const Instruction *I = nullptr) const;
615 /// \return The expected cost of vector Insert and Extract.
616 /// Use -1 to indicate that there is no information on the index value.
617 int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index = -1) const;
619 /// \return The cost of Load and Store instructions.
620 int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
621 unsigned AddressSpace, const Instruction *I = nullptr) const;
623 /// \return The cost of masked Load and Store instructions.
624 int getMaskedMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
625 unsigned AddressSpace) const;
627 /// \return The cost of Gather or Scatter operation
628 /// \p Opcode - is a type of memory access Load or Store
629 /// \p DataTy - a vector type of the data to be loaded or stored
630 /// \p Ptr - pointer [or vector of pointers] - address[es] in memory
631 /// \p VariableMask - true when the memory access is predicated with a mask
632 /// that is not a compile-time constant
633 /// \p Alignment - alignment of single element
634 int getGatherScatterOpCost(unsigned Opcode, Type *DataTy, Value *Ptr,
635 bool VariableMask, unsigned Alignment) const;
637 /// \return The cost of the interleaved memory operation.
638 /// \p Opcode is the memory operation code
639 /// \p VecTy is the vector type of the interleaved access.
640 /// \p Factor is the interleave factor
641 /// \p Indices is the indices for interleaved load members (as interleaved
642 /// load allows gaps)
643 /// \p Alignment is the alignment of the memory operation
644 /// \p AddressSpace is address space of the pointer.
645 int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor,
646 ArrayRef<unsigned> Indices, unsigned Alignment,
647 unsigned AddressSpace) const;
649 /// \brief Calculate the cost of performing a vector reduction.
651 /// This is the cost of reducing the vector value of type \p Ty to a scalar
652 /// value using the operation denoted by \p Opcode. The form of the reduction
653 /// can either be a pairwise reduction or a reduction that splits the vector
654 /// at every reduction level.
658 /// ((v0+v1), (v2, v3), undef, undef)
661 /// ((v0+v2), (v1+v3), undef, undef)
662 int getReductionCost(unsigned Opcode, Type *Ty, bool IsPairwiseForm) const;
664 /// \returns The cost of Intrinsic instructions. Analyses the real arguments.
665 /// Three cases are handled: 1. scalar instruction 2. vector instruction
666 /// 3. scalar instruction which is to be vectorized with VF.
667 int getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
668 ArrayRef<Value *> Args, FastMathFlags FMF,
669 unsigned VF = 1) const;
671 /// \returns The cost of Intrinsic instructions. Types analysis only.
672 /// If ScalarizationCostPassed is UINT_MAX, the cost of scalarizing the
673 /// arguments and the return value will be computed based on types.
674 int getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
675 ArrayRef<Type *> Tys, FastMathFlags FMF,
676 unsigned ScalarizationCostPassed = UINT_MAX) const;
678 /// \returns The cost of Call instructions.
679 int getCallInstrCost(Function *F, Type *RetTy, ArrayRef<Type *> Tys) const;
681 /// \returns The number of pieces into which the provided type must be
682 /// split during legalization. Zero is returned when the answer is unknown.
683 unsigned getNumberOfParts(Type *Tp) const;
685 /// \returns The cost of the address computation. For most targets this can be
686 /// merged into the instruction indexing mode. Some targets might want to
687 /// distinguish between address computation for memory operations on vector
688 /// types and scalar types. Such targets should override this function.
689 /// The 'SE' parameter holds pointer for the scalar evolution object which
690 /// is used in order to get the Ptr step value in case of constant stride.
691 /// The 'Ptr' parameter holds SCEV of the access pointer.
692 int getAddressComputationCost(Type *Ty, ScalarEvolution *SE = nullptr,
693 const SCEV *Ptr = nullptr) const;
695 /// \returns The cost, if any, of keeping values of the given types alive
698 /// Some types may require the use of register classes that do not have
699 /// any callee-saved registers, so would require a spill and fill.
700 unsigned getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const;
702 /// \returns True if the intrinsic is a supported memory intrinsic. Info
703 /// will contain additional information - whether the intrinsic may write
704 /// or read to memory, volatility and the pointer. Info is undefined
705 /// if false is returned.
706 bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info) const;
708 /// \returns A value which is the result of the given memory intrinsic. New
709 /// instructions may be created to extract the result from the given intrinsic
710 /// memory operation. Returns nullptr if the target cannot create a result
711 /// from the given intrinsic.
712 Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
713 Type *ExpectedType) const;
715 /// \returns True if the two functions have compatible attributes for inlining
717 bool areInlineCompatible(const Function *Caller,
718 const Function *Callee) const;
720 /// \returns The bitwidth of the largest vector type that should be used to
721 /// load/store in the given address space.
722 unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const;
724 /// \returns True if the load instruction is legal to vectorize.
725 bool isLegalToVectorizeLoad(LoadInst *LI) const;
727 /// \returns True if the store instruction is legal to vectorize.
728 bool isLegalToVectorizeStore(StoreInst *SI) const;
730 /// \returns True if it is legal to vectorize the given load chain.
731 bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes,
733 unsigned AddrSpace) const;
735 /// \returns True if it is legal to vectorize the given store chain.
736 bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes,
738 unsigned AddrSpace) const;
740 /// \returns The new vector factor value if the target doesn't support \p
741 /// SizeInBytes loads or has a better vector factor.
742 unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize,
743 unsigned ChainSizeInBytes,
744 VectorType *VecTy) const;
746 /// \returns The new vector factor value if the target doesn't support \p
747 /// SizeInBytes stores or has a better vector factor.
748 unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize,
749 unsigned ChainSizeInBytes,
750 VectorType *VecTy) const;
752 /// Flags describing the kind of vector reduction.
753 struct ReductionFlags {
754 ReductionFlags() : IsMaxOp(false), IsSigned(false), NoNaN(false) {}
755 bool IsMaxOp; ///< If the op a min/max kind, true if it's a max operation.
756 bool IsSigned; ///< Whether the operation is a signed int reduction.
757 bool NoNaN; ///< If op is an fp min/max, whether NaNs may be present.
760 /// \returns True if the target wants to handle the given reduction idiom in
761 /// the intrinsics form instead of the shuffle form.
762 bool useReductionIntrinsic(unsigned Opcode, Type *Ty,
763 ReductionFlags Flags) const;
765 /// \returns True if the target wants to expand the given reduction intrinsic
766 /// into a shuffle sequence.
767 bool shouldExpandReduction(const IntrinsicInst *II) const;
771 /// \brief The abstract base class used to type erase specific TTI
775 /// \brief The template model for the base class which wraps a concrete
776 /// implementation in a type erased interface.
777 template <typename T> class Model;
779 std::unique_ptr<Concept> TTIImpl;
782 class TargetTransformInfo::Concept {
784 virtual ~Concept() = 0;
785 virtual const DataLayout &getDataLayout() const = 0;
786 virtual int getOperationCost(unsigned Opcode, Type *Ty, Type *OpTy) = 0;
787 virtual int getGEPCost(Type *PointeeType, const Value *Ptr,
788 ArrayRef<const Value *> Operands) = 0;
789 virtual int getCallCost(FunctionType *FTy, int NumArgs) = 0;
790 virtual int getCallCost(const Function *F, int NumArgs) = 0;
791 virtual int getCallCost(const Function *F,
792 ArrayRef<const Value *> Arguments) = 0;
793 virtual unsigned getInliningThresholdMultiplier() = 0;
794 virtual int getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
795 ArrayRef<Type *> ParamTys) = 0;
796 virtual int getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
797 ArrayRef<const Value *> Arguments) = 0;
798 virtual unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI,
799 unsigned &JTSize) = 0;
800 virtual int getUserCost(const User *U) = 0;
801 virtual bool hasBranchDivergence() = 0;
802 virtual bool isSourceOfDivergence(const Value *V) = 0;
803 virtual unsigned getFlatAddressSpace() = 0;
804 virtual bool isLoweredToCall(const Function *F) = 0;
805 virtual void getUnrollingPreferences(Loop *L, UnrollingPreferences &UP) = 0;
806 virtual bool isLegalAddImmediate(int64_t Imm) = 0;
807 virtual bool isLegalICmpImmediate(int64_t Imm) = 0;
808 virtual bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
809 int64_t BaseOffset, bool HasBaseReg,
811 unsigned AddrSpace) = 0;
812 virtual bool isLegalMaskedStore(Type *DataType) = 0;
813 virtual bool isLegalMaskedLoad(Type *DataType) = 0;
814 virtual bool isLegalMaskedScatter(Type *DataType) = 0;
815 virtual bool isLegalMaskedGather(Type *DataType) = 0;
816 virtual bool prefersVectorizedAddressing() = 0;
817 virtual int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
818 int64_t BaseOffset, bool HasBaseReg,
819 int64_t Scale, unsigned AddrSpace) = 0;
820 virtual bool isFoldableMemAccessOffset(Instruction *I, int64_t Offset) = 0;
821 virtual bool isTruncateFree(Type *Ty1, Type *Ty2) = 0;
822 virtual bool isProfitableToHoist(Instruction *I) = 0;
823 virtual bool isTypeLegal(Type *Ty) = 0;
824 virtual unsigned getJumpBufAlignment() = 0;
825 virtual unsigned getJumpBufSize() = 0;
826 virtual bool shouldBuildLookupTables() = 0;
827 virtual bool shouldBuildLookupTablesForConstant(Constant *C) = 0;
829 getScalarizationOverhead(Type *Ty, bool Insert, bool Extract) = 0;
830 virtual unsigned getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
832 virtual bool supportsEfficientVectorElementLoadStore() = 0;
833 virtual bool enableAggressiveInterleaving(bool LoopHasReductions) = 0;
834 virtual bool expandMemCmp(Instruction *I, unsigned &MaxLoadSize) = 0;
835 virtual bool enableInterleavedAccessVectorization() = 0;
836 virtual bool isFPVectorizationPotentiallyUnsafe() = 0;
837 virtual bool allowsMisalignedMemoryAccesses(LLVMContext &Context,
839 unsigned AddressSpace,
842 virtual PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) = 0;
843 virtual bool haveFastSqrt(Type *Ty) = 0;
844 virtual int getFPOpCost(Type *Ty) = 0;
845 virtual int getIntImmCodeSizeCost(unsigned Opc, unsigned Idx, const APInt &Imm,
847 virtual int getIntImmCost(const APInt &Imm, Type *Ty) = 0;
848 virtual int getIntImmCost(unsigned Opc, unsigned Idx, const APInt &Imm,
850 virtual int getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
852 virtual unsigned getNumberOfRegisters(bool Vector) = 0;
853 virtual unsigned getRegisterBitWidth(bool Vector) = 0;
854 virtual unsigned getMinVectorRegisterBitWidth() = 0;
855 virtual bool shouldConsiderAddressTypePromotion(
856 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) = 0;
857 virtual unsigned getCacheLineSize() = 0;
858 virtual unsigned getPrefetchDistance() = 0;
859 virtual unsigned getMinPrefetchStride() = 0;
860 virtual unsigned getMaxPrefetchIterationsAhead() = 0;
861 virtual unsigned getMaxInterleaveFactor(unsigned VF) = 0;
863 getArithmeticInstrCost(unsigned Opcode, Type *Ty, OperandValueKind Opd1Info,
864 OperandValueKind Opd2Info,
865 OperandValueProperties Opd1PropInfo,
866 OperandValueProperties Opd2PropInfo,
867 ArrayRef<const Value *> Args) = 0;
868 virtual int getShuffleCost(ShuffleKind Kind, Type *Tp, int Index,
870 virtual int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
871 const Instruction *I) = 0;
872 virtual int getExtractWithExtendCost(unsigned Opcode, Type *Dst,
873 VectorType *VecTy, unsigned Index) = 0;
874 virtual int getCFInstrCost(unsigned Opcode) = 0;
875 virtual int getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
876 Type *CondTy, const Instruction *I) = 0;
877 virtual int getVectorInstrCost(unsigned Opcode, Type *Val,
879 virtual int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
880 unsigned AddressSpace, const Instruction *I) = 0;
881 virtual int getMaskedMemoryOpCost(unsigned Opcode, Type *Src,
883 unsigned AddressSpace) = 0;
884 virtual int getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
885 Value *Ptr, bool VariableMask,
886 unsigned Alignment) = 0;
887 virtual int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy,
889 ArrayRef<unsigned> Indices,
891 unsigned AddressSpace) = 0;
892 virtual int getReductionCost(unsigned Opcode, Type *Ty,
893 bool IsPairwiseForm) = 0;
894 virtual int getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
895 ArrayRef<Type *> Tys, FastMathFlags FMF,
896 unsigned ScalarizationCostPassed) = 0;
897 virtual int getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
898 ArrayRef<Value *> Args, FastMathFlags FMF, unsigned VF) = 0;
899 virtual int getCallInstrCost(Function *F, Type *RetTy,
900 ArrayRef<Type *> Tys) = 0;
901 virtual unsigned getNumberOfParts(Type *Tp) = 0;
902 virtual int getAddressComputationCost(Type *Ty, ScalarEvolution *SE,
903 const SCEV *Ptr) = 0;
904 virtual unsigned getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) = 0;
905 virtual bool getTgtMemIntrinsic(IntrinsicInst *Inst,
906 MemIntrinsicInfo &Info) = 0;
907 virtual Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
908 Type *ExpectedType) = 0;
909 virtual bool areInlineCompatible(const Function *Caller,
910 const Function *Callee) const = 0;
911 virtual unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const = 0;
912 virtual bool isLegalToVectorizeLoad(LoadInst *LI) const = 0;
913 virtual bool isLegalToVectorizeStore(StoreInst *SI) const = 0;
914 virtual bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes,
916 unsigned AddrSpace) const = 0;
917 virtual bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes,
919 unsigned AddrSpace) const = 0;
920 virtual unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize,
921 unsigned ChainSizeInBytes,
922 VectorType *VecTy) const = 0;
923 virtual unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize,
924 unsigned ChainSizeInBytes,
925 VectorType *VecTy) const = 0;
926 virtual bool useReductionIntrinsic(unsigned Opcode, Type *Ty,
927 ReductionFlags) const = 0;
928 virtual bool shouldExpandReduction(const IntrinsicInst *II) const = 0;
931 template <typename T>
932 class TargetTransformInfo::Model final : public TargetTransformInfo::Concept {
936 Model(T Impl) : Impl(std::move(Impl)) {}
939 const DataLayout &getDataLayout() const override {
940 return Impl.getDataLayout();
943 int getOperationCost(unsigned Opcode, Type *Ty, Type *OpTy) override {
944 return Impl.getOperationCost(Opcode, Ty, OpTy);
946 int getGEPCost(Type *PointeeType, const Value *Ptr,
947 ArrayRef<const Value *> Operands) override {
948 return Impl.getGEPCost(PointeeType, Ptr, Operands);
950 int getCallCost(FunctionType *FTy, int NumArgs) override {
951 return Impl.getCallCost(FTy, NumArgs);
953 int getCallCost(const Function *F, int NumArgs) override {
954 return Impl.getCallCost(F, NumArgs);
956 int getCallCost(const Function *F,
957 ArrayRef<const Value *> Arguments) override {
958 return Impl.getCallCost(F, Arguments);
960 unsigned getInliningThresholdMultiplier() override {
961 return Impl.getInliningThresholdMultiplier();
963 int getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
964 ArrayRef<Type *> ParamTys) override {
965 return Impl.getIntrinsicCost(IID, RetTy, ParamTys);
967 int getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
968 ArrayRef<const Value *> Arguments) override {
969 return Impl.getIntrinsicCost(IID, RetTy, Arguments);
971 int getUserCost(const User *U) override { return Impl.getUserCost(U); }
972 bool hasBranchDivergence() override { return Impl.hasBranchDivergence(); }
973 bool isSourceOfDivergence(const Value *V) override {
974 return Impl.isSourceOfDivergence(V);
977 unsigned getFlatAddressSpace() override {
978 return Impl.getFlatAddressSpace();
981 bool isLoweredToCall(const Function *F) override {
982 return Impl.isLoweredToCall(F);
984 void getUnrollingPreferences(Loop *L, UnrollingPreferences &UP) override {
985 return Impl.getUnrollingPreferences(L, UP);
987 bool isLegalAddImmediate(int64_t Imm) override {
988 return Impl.isLegalAddImmediate(Imm);
990 bool isLegalICmpImmediate(int64_t Imm) override {
991 return Impl.isLegalICmpImmediate(Imm);
993 bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
994 bool HasBaseReg, int64_t Scale,
995 unsigned AddrSpace) override {
996 return Impl.isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
999 bool isLegalMaskedStore(Type *DataType) override {
1000 return Impl.isLegalMaskedStore(DataType);
1002 bool isLegalMaskedLoad(Type *DataType) override {
1003 return Impl.isLegalMaskedLoad(DataType);
1005 bool isLegalMaskedScatter(Type *DataType) override {
1006 return Impl.isLegalMaskedScatter(DataType);
1008 bool isLegalMaskedGather(Type *DataType) override {
1009 return Impl.isLegalMaskedGather(DataType);
1011 bool prefersVectorizedAddressing() override {
1012 return Impl.prefersVectorizedAddressing();
1014 int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset,
1015 bool HasBaseReg, int64_t Scale,
1016 unsigned AddrSpace) override {
1017 return Impl.getScalingFactorCost(Ty, BaseGV, BaseOffset, HasBaseReg,
1020 bool isFoldableMemAccessOffset(Instruction *I, int64_t Offset) override {
1021 return Impl.isFoldableMemAccessOffset(I, Offset);
1023 bool isTruncateFree(Type *Ty1, Type *Ty2) override {
1024 return Impl.isTruncateFree(Ty1, Ty2);
1026 bool isProfitableToHoist(Instruction *I) override {
1027 return Impl.isProfitableToHoist(I);
1029 bool isTypeLegal(Type *Ty) override { return Impl.isTypeLegal(Ty); }
1030 unsigned getJumpBufAlignment() override { return Impl.getJumpBufAlignment(); }
1031 unsigned getJumpBufSize() override { return Impl.getJumpBufSize(); }
1032 bool shouldBuildLookupTables() override {
1033 return Impl.shouldBuildLookupTables();
1035 bool shouldBuildLookupTablesForConstant(Constant *C) override {
1036 return Impl.shouldBuildLookupTablesForConstant(C);
1038 unsigned getScalarizationOverhead(Type *Ty, bool Insert,
1039 bool Extract) override {
1040 return Impl.getScalarizationOverhead(Ty, Insert, Extract);
1042 unsigned getOperandsScalarizationOverhead(ArrayRef<const Value *> Args,
1043 unsigned VF) override {
1044 return Impl.getOperandsScalarizationOverhead(Args, VF);
1047 bool supportsEfficientVectorElementLoadStore() override {
1048 return Impl.supportsEfficientVectorElementLoadStore();
1051 bool enableAggressiveInterleaving(bool LoopHasReductions) override {
1052 return Impl.enableAggressiveInterleaving(LoopHasReductions);
1054 bool expandMemCmp(Instruction *I, unsigned &MaxLoadSize) override {
1055 return Impl.expandMemCmp(I, MaxLoadSize);
1057 bool enableInterleavedAccessVectorization() override {
1058 return Impl.enableInterleavedAccessVectorization();
1060 bool isFPVectorizationPotentiallyUnsafe() override {
1061 return Impl.isFPVectorizationPotentiallyUnsafe();
1063 bool allowsMisalignedMemoryAccesses(LLVMContext &Context,
1064 unsigned BitWidth, unsigned AddressSpace,
1065 unsigned Alignment, bool *Fast) override {
1066 return Impl.allowsMisalignedMemoryAccesses(Context, BitWidth, AddressSpace,
1069 PopcntSupportKind getPopcntSupport(unsigned IntTyWidthInBit) override {
1070 return Impl.getPopcntSupport(IntTyWidthInBit);
1072 bool haveFastSqrt(Type *Ty) override { return Impl.haveFastSqrt(Ty); }
1074 int getFPOpCost(Type *Ty) override { return Impl.getFPOpCost(Ty); }
1076 int getIntImmCodeSizeCost(unsigned Opc, unsigned Idx, const APInt &Imm,
1077 Type *Ty) override {
1078 return Impl.getIntImmCodeSizeCost(Opc, Idx, Imm, Ty);
1080 int getIntImmCost(const APInt &Imm, Type *Ty) override {
1081 return Impl.getIntImmCost(Imm, Ty);
1083 int getIntImmCost(unsigned Opc, unsigned Idx, const APInt &Imm,
1084 Type *Ty) override {
1085 return Impl.getIntImmCost(Opc, Idx, Imm, Ty);
1087 int getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
1088 Type *Ty) override {
1089 return Impl.getIntImmCost(IID, Idx, Imm, Ty);
1091 unsigned getNumberOfRegisters(bool Vector) override {
1092 return Impl.getNumberOfRegisters(Vector);
1094 unsigned getRegisterBitWidth(bool Vector) override {
1095 return Impl.getRegisterBitWidth(Vector);
1097 unsigned getMinVectorRegisterBitWidth() override {
1098 return Impl.getMinVectorRegisterBitWidth();
1100 bool shouldConsiderAddressTypePromotion(
1101 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) override {
1102 return Impl.shouldConsiderAddressTypePromotion(
1103 I, AllowPromotionWithoutCommonHeader);
1105 unsigned getCacheLineSize() override {
1106 return Impl.getCacheLineSize();
1108 unsigned getPrefetchDistance() override { return Impl.getPrefetchDistance(); }
1109 unsigned getMinPrefetchStride() override {
1110 return Impl.getMinPrefetchStride();
1112 unsigned getMaxPrefetchIterationsAhead() override {
1113 return Impl.getMaxPrefetchIterationsAhead();
1115 unsigned getMaxInterleaveFactor(unsigned VF) override {
1116 return Impl.getMaxInterleaveFactor(VF);
1118 unsigned getEstimatedNumberOfCaseClusters(const SwitchInst &SI,
1119 unsigned &JTSize) override {
1120 return Impl.getEstimatedNumberOfCaseClusters(SI, JTSize);
1123 getArithmeticInstrCost(unsigned Opcode, Type *Ty, OperandValueKind Opd1Info,
1124 OperandValueKind Opd2Info,
1125 OperandValueProperties Opd1PropInfo,
1126 OperandValueProperties Opd2PropInfo,
1127 ArrayRef<const Value *> Args) override {
1128 return Impl.getArithmeticInstrCost(Opcode, Ty, Opd1Info, Opd2Info,
1129 Opd1PropInfo, Opd2PropInfo, Args);
1131 int getShuffleCost(ShuffleKind Kind, Type *Tp, int Index,
1132 Type *SubTp) override {
1133 return Impl.getShuffleCost(Kind, Tp, Index, SubTp);
1135 int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
1136 const Instruction *I) override {
1137 return Impl.getCastInstrCost(Opcode, Dst, Src, I);
1139 int getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy,
1140 unsigned Index) override {
1141 return Impl.getExtractWithExtendCost(Opcode, Dst, VecTy, Index);
1143 int getCFInstrCost(unsigned Opcode) override {
1144 return Impl.getCFInstrCost(Opcode);
1146 int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
1147 const Instruction *I) override {
1148 return Impl.getCmpSelInstrCost(Opcode, ValTy, CondTy, I);
1150 int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) override {
1151 return Impl.getVectorInstrCost(Opcode, Val, Index);
1153 int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
1154 unsigned AddressSpace, const Instruction *I) override {
1155 return Impl.getMemoryOpCost(Opcode, Src, Alignment, AddressSpace, I);
1157 int getMaskedMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
1158 unsigned AddressSpace) override {
1159 return Impl.getMaskedMemoryOpCost(Opcode, Src, Alignment, AddressSpace);
1161 int getGatherScatterOpCost(unsigned Opcode, Type *DataTy,
1162 Value *Ptr, bool VariableMask,
1163 unsigned Alignment) override {
1164 return Impl.getGatherScatterOpCost(Opcode, DataTy, Ptr, VariableMask,
1167 int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor,
1168 ArrayRef<unsigned> Indices, unsigned Alignment,
1169 unsigned AddressSpace) override {
1170 return Impl.getInterleavedMemoryOpCost(Opcode, VecTy, Factor, Indices,
1171 Alignment, AddressSpace);
1173 int getReductionCost(unsigned Opcode, Type *Ty,
1174 bool IsPairwiseForm) override {
1175 return Impl.getReductionCost(Opcode, Ty, IsPairwiseForm);
1177 int getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy, ArrayRef<Type *> Tys,
1178 FastMathFlags FMF, unsigned ScalarizationCostPassed) override {
1179 return Impl.getIntrinsicInstrCost(ID, RetTy, Tys, FMF,
1180 ScalarizationCostPassed);
1182 int getIntrinsicInstrCost(Intrinsic::ID ID, Type *RetTy,
1183 ArrayRef<Value *> Args, FastMathFlags FMF, unsigned VF) override {
1184 return Impl.getIntrinsicInstrCost(ID, RetTy, Args, FMF, VF);
1186 int getCallInstrCost(Function *F, Type *RetTy,
1187 ArrayRef<Type *> Tys) override {
1188 return Impl.getCallInstrCost(F, RetTy, Tys);
1190 unsigned getNumberOfParts(Type *Tp) override {
1191 return Impl.getNumberOfParts(Tp);
1193 int getAddressComputationCost(Type *Ty, ScalarEvolution *SE,
1194 const SCEV *Ptr) override {
1195 return Impl.getAddressComputationCost(Ty, SE, Ptr);
1197 unsigned getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) override {
1198 return Impl.getCostOfKeepingLiveOverCall(Tys);
1200 bool getTgtMemIntrinsic(IntrinsicInst *Inst,
1201 MemIntrinsicInfo &Info) override {
1202 return Impl.getTgtMemIntrinsic(Inst, Info);
1204 Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
1205 Type *ExpectedType) override {
1206 return Impl.getOrCreateResultFromMemIntrinsic(Inst, ExpectedType);
1208 bool areInlineCompatible(const Function *Caller,
1209 const Function *Callee) const override {
1210 return Impl.areInlineCompatible(Caller, Callee);
1212 unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const override {
1213 return Impl.getLoadStoreVecRegBitWidth(AddrSpace);
1215 bool isLegalToVectorizeLoad(LoadInst *LI) const override {
1216 return Impl.isLegalToVectorizeLoad(LI);
1218 bool isLegalToVectorizeStore(StoreInst *SI) const override {
1219 return Impl.isLegalToVectorizeStore(SI);
1221 bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes,
1223 unsigned AddrSpace) const override {
1224 return Impl.isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1227 bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes,
1229 unsigned AddrSpace) const override {
1230 return Impl.isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1233 unsigned getLoadVectorFactor(unsigned VF, unsigned LoadSize,
1234 unsigned ChainSizeInBytes,
1235 VectorType *VecTy) const override {
1236 return Impl.getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1238 unsigned getStoreVectorFactor(unsigned VF, unsigned StoreSize,
1239 unsigned ChainSizeInBytes,
1240 VectorType *VecTy) const override {
1241 return Impl.getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1243 bool useReductionIntrinsic(unsigned Opcode, Type *Ty,
1244 ReductionFlags Flags) const override {
1245 return Impl.useReductionIntrinsic(Opcode, Ty, Flags);
1247 bool shouldExpandReduction(const IntrinsicInst *II) const override {
1248 return Impl.shouldExpandReduction(II);
1252 template <typename T>
1253 TargetTransformInfo::TargetTransformInfo(T Impl)
1254 : TTIImpl(new Model<T>(Impl)) {}
1256 /// \brief Analysis pass providing the \c TargetTransformInfo.
1258 /// The core idea of the TargetIRAnalysis is to expose an interface through
1259 /// which LLVM targets can analyze and provide information about the middle
1260 /// end's target-independent IR. This supports use cases such as target-aware
1261 /// cost modeling of IR constructs.
1263 /// This is a function analysis because much of the cost modeling for targets
1264 /// is done in a subtarget specific way and LLVM supports compiling different
1265 /// functions targeting different subtargets in order to support runtime
1266 /// dispatch according to the observed subtarget.
1267 class TargetIRAnalysis : public AnalysisInfoMixin<TargetIRAnalysis> {
1269 typedef TargetTransformInfo Result;
1271 /// \brief Default construct a target IR analysis.
1273 /// This will use the module's datalayout to construct a baseline
1274 /// conservative TTI result.
1277 /// \brief Construct an IR analysis pass around a target-provide callback.
1279 /// The callback will be called with a particular function for which the TTI
1280 /// is needed and must return a TTI object for that function.
1281 TargetIRAnalysis(std::function<Result(const Function &)> TTICallback);
1283 // Value semantics. We spell out the constructors for MSVC.
1284 TargetIRAnalysis(const TargetIRAnalysis &Arg)
1285 : TTICallback(Arg.TTICallback) {}
1286 TargetIRAnalysis(TargetIRAnalysis &&Arg)
1287 : TTICallback(std::move(Arg.TTICallback)) {}
1288 TargetIRAnalysis &operator=(const TargetIRAnalysis &RHS) {
1289 TTICallback = RHS.TTICallback;
1292 TargetIRAnalysis &operator=(TargetIRAnalysis &&RHS) {
1293 TTICallback = std::move(RHS.TTICallback);
1297 Result run(const Function &F, FunctionAnalysisManager &);
1300 friend AnalysisInfoMixin<TargetIRAnalysis>;
1301 static AnalysisKey Key;
1303 /// \brief The callback used to produce a result.
1305 /// We use a completely opaque callback so that targets can provide whatever
1306 /// mechanism they desire for constructing the TTI for a given function.
1308 /// FIXME: Should we really use std::function? It's relatively inefficient.
1309 /// It might be possible to arrange for even stateful callbacks to outlive
1310 /// the analysis and thus use a function_ref which would be lighter weight.
1311 /// This may also be less error prone as the callback is likely to reference
1312 /// the external TargetMachine, and that reference needs to never dangle.
1313 std::function<Result(const Function &)> TTICallback;
1315 /// \brief Helper function used as the callback in the default constructor.
1316 static Result getDefaultTTI(const Function &F);
1319 /// \brief Wrapper pass for TargetTransformInfo.
1321 /// This pass can be constructed from a TTI object which it stores internally
1322 /// and is queried by passes.
1323 class TargetTransformInfoWrapperPass : public ImmutablePass {
1324 TargetIRAnalysis TIRA;
1325 Optional<TargetTransformInfo> TTI;
1327 virtual void anchor();
1332 /// \brief We must provide a default constructor for the pass but it should
1335 /// Use the constructor below or call one of the creation routines.
1336 TargetTransformInfoWrapperPass();
1338 explicit TargetTransformInfoWrapperPass(TargetIRAnalysis TIRA);
1340 TargetTransformInfo &getTTI(const Function &F);
1343 /// \brief Create an analysis pass wrapper around a TTI object.
1345 /// This analysis pass just holds the TTI instance and makes it available to
1347 ImmutablePass *createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA);
1349 } // End llvm namespace