1 //===-- llvm/CallingConvLower.h - Calling Conventions -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the CCState and CCValAssign classes, used for lowering
11 // and implementing calling conventions.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_CALLINGCONVLOWER_H
16 #define LLVM_CODEGEN_CALLINGCONVLOWER_H
18 #include "llvm/ADT/SmallVector.h"
19 #include "llvm/CodeGen/MachineFrameInfo.h"
20 #include "llvm/CodeGen/MachineFunction.h"
21 #include "llvm/IR/CallingConv.h"
22 #include "llvm/MC/MCRegisterInfo.h"
23 #include "llvm/Target/TargetCallingConv.h"
29 class TargetRegisterInfo;
31 /// CCValAssign - Represent assignment of one arg/retval to a location.
35 Full, // The value fills the full location.
36 SExt, // The value is sign extended in the location.
37 ZExt, // The value is zero extended in the location.
38 AExt, // The value is extended with undefined upper bits.
39 SExtUpper, // The value is in the upper bits of the location and should be
40 // sign extended when retrieved.
41 ZExtUpper, // The value is in the upper bits of the location and should be
42 // zero extended when retrieved.
43 AExtUpper, // The value is in the upper bits of the location and should be
44 // extended with undefined upper bits when retrieved.
45 BCvt, // The value is bit-converted in the location.
46 VExt, // The value is vector-widened in the location.
47 // FIXME: Not implemented yet. Code that uses AExt to mean
48 // vector-widen should be fixed to use VExt instead.
49 FPExt, // The floating-point value is fp-extended in the location.
50 Indirect // The location contains pointer to the value.
51 // TODO: a subset of the value is in the location.
55 /// ValNo - This is the value number begin assigned (e.g. an argument number).
58 /// Loc is either a stack offset or a register number.
61 /// isMem - True if this is a memory loc, false if it is a register loc.
64 /// isCustom - True if this arg/retval requires special handling.
65 unsigned isCustom : 1;
67 /// Information about how the value is assigned.
70 /// ValVT - The type of the value being assigned.
73 /// LocVT - The type of the location being assigned to.
77 static CCValAssign getReg(unsigned ValNo, MVT ValVT,
78 unsigned RegNo, MVT LocVT,
91 static CCValAssign getCustomReg(unsigned ValNo, MVT ValVT,
92 unsigned RegNo, MVT LocVT,
95 Ret = getReg(ValNo, ValVT, RegNo, LocVT, HTP);
100 static CCValAssign getMem(unsigned ValNo, MVT ValVT,
101 unsigned Offset, MVT LocVT,
107 Ret.isCustom = false;
114 static CCValAssign getCustomMem(unsigned ValNo, MVT ValVT,
115 unsigned Offset, MVT LocVT,
118 Ret = getMem(ValNo, ValVT, Offset, LocVT, HTP);
123 // There is no need to differentiate between a pending CCValAssign and other
124 // kinds, as they are stored in a different list.
125 static CCValAssign getPending(unsigned ValNo, MVT ValVT, MVT LocVT,
126 LocInfo HTP, unsigned ExtraInfo = 0) {
127 return getReg(ValNo, ValVT, ExtraInfo, LocVT, HTP);
130 void convertToReg(unsigned RegNo) {
135 void convertToMem(unsigned Offset) {
140 unsigned getValNo() const { return ValNo; }
141 MVT getValVT() const { return ValVT; }
143 bool isRegLoc() const { return !isMem; }
144 bool isMemLoc() const { return isMem; }
146 bool needsCustom() const { return isCustom; }
148 unsigned getLocReg() const { assert(isRegLoc()); return Loc; }
149 unsigned getLocMemOffset() const { assert(isMemLoc()); return Loc; }
150 unsigned getExtraInfo() const { return Loc; }
151 MVT getLocVT() const { return LocVT; }
153 LocInfo getLocInfo() const { return HTP; }
154 bool isExtInLoc() const {
155 return (HTP == AExt || HTP == SExt || HTP == ZExt);
158 bool isUpperBitsInLoc() const {
159 return HTP == AExtUpper || HTP == SExtUpper || HTP == ZExtUpper;
163 /// Describes a register that needs to be forwarded from the prologue to a
165 struct ForwardedRegister {
166 ForwardedRegister(unsigned VReg, MCPhysReg PReg, MVT VT)
167 : VReg(VReg), PReg(PReg), VT(VT) {}
173 /// CCAssignFn - This function assigns a location for Val, updating State to
174 /// reflect the change. It returns 'true' if it failed to handle Val.
175 typedef bool CCAssignFn(unsigned ValNo, MVT ValVT,
176 MVT LocVT, CCValAssign::LocInfo LocInfo,
177 ISD::ArgFlagsTy ArgFlags, CCState &State);
179 /// CCCustomFn - This function assigns a location for Val, possibly updating
180 /// all args to reflect changes and indicates if it handled it. It must set
181 /// isCustom if it handles the arg and returns true.
182 typedef bool CCCustomFn(unsigned &ValNo, MVT &ValVT,
183 MVT &LocVT, CCValAssign::LocInfo &LocInfo,
184 ISD::ArgFlagsTy &ArgFlags, CCState &State);
186 /// ParmContext - This enum tracks whether calling convention lowering is in
187 /// the context of prologue or call generation. Not all backends make use of
188 /// this information.
189 typedef enum { Unknown, Prologue, Call } ParmContext;
191 /// CCState - This class holds information needed while lowering arguments and
192 /// return values. It captures which registers are already assigned and which
193 /// stack slots are used. It provides accessors to allocate these values.
196 CallingConv::ID CallingConv;
198 bool AnalyzingMustTailForwardedRegs = false;
200 const TargetRegisterInfo &TRI;
201 SmallVectorImpl<CCValAssign> &Locs;
202 LLVMContext &Context;
204 unsigned StackOffset;
205 unsigned MaxStackArgAlign;
206 SmallVector<uint32_t, 16> UsedRegs;
207 SmallVector<CCValAssign, 4> PendingLocs;
209 // ByValInfo and SmallVector<ByValInfo, 4> ByValRegs:
211 // Vector of ByValInfo instances (ByValRegs) is introduced for byval registers
213 // Or, in another words it tracks byval parameters that are stored in
214 // general purpose registers.
216 // For 4 byte stack alignment,
217 // instance index means byval parameter number in formal
218 // arguments set. Assume, we have some "struct_type" with size = 4 bytes,
219 // then, for function "foo":
221 // i32 foo(i32 %p, %struct_type* %r, i32 %s, %struct_type* %t)
223 // ByValRegs[0] describes how "%r" is stored (Begin == r1, End == r2)
224 // ByValRegs[1] describes how "%t" is stored (Begin == r3, End == r4).
226 // In case of 8 bytes stack alignment,
227 // ByValRegs may also contain information about wasted registers.
228 // In function shown above, r3 would be wasted according to AAPCS rules.
229 // And in that case ByValRegs[1].Waste would be "true".
230 // ByValRegs vector size still would be 2,
231 // while "%t" goes to the stack: it wouldn't be described in ByValRegs.
233 // Supposed use-case for this collection:
234 // 1. Initially ByValRegs is empty, InRegsParamsProcessed is 0.
235 // 2. HandleByVal fillups ByValRegs.
236 // 3. Argument analysis (LowerFormatArguments, for example). After
237 // some byval argument was analyzed, InRegsParamsProcessed is increased.
239 ByValInfo(unsigned B, unsigned E, bool IsWaste = false) :
240 Begin(B), End(E), Waste(IsWaste) {}
241 // First register allocated for current parameter.
244 // First after last register allocated for current parameter.
247 // Means that current range of registers doesn't belong to any
248 // parameters. It was wasted due to stack alignment rules.
249 // For more information see:
250 // AAPCS, 5.5 Parameter Passing, Stage C, C.3.
253 SmallVector<ByValInfo, 4 > ByValRegs;
255 // InRegsParamsProcessed - shows how many instances of ByValRegs was proceed
256 // during argument analysis.
257 unsigned InRegsParamsProcessed;
260 ParmContext CallOrPrologue;
263 CCState(CallingConv::ID CC, bool isVarArg, MachineFunction &MF,
264 SmallVectorImpl<CCValAssign> &locs, LLVMContext &C);
266 void addLoc(const CCValAssign &V) {
270 LLVMContext &getContext() const { return Context; }
271 MachineFunction &getMachineFunction() const { return MF; }
272 CallingConv::ID getCallingConv() const { return CallingConv; }
273 bool isVarArg() const { return IsVarArg; }
275 /// getNextStackOffset - Return the next stack offset such that all stack
276 /// slots satisfy their alignment requirements.
277 unsigned getNextStackOffset() const {
281 /// getAlignedCallFrameSize - Return the size of the call frame needed to
282 /// be able to store all arguments and such that the alignment requirement
283 /// of each of the arguments is satisfied.
284 unsigned getAlignedCallFrameSize() const {
285 return alignTo(StackOffset, MaxStackArgAlign);
288 /// isAllocated - Return true if the specified register (or an alias) is
290 bool isAllocated(unsigned Reg) const {
291 return UsedRegs[Reg/32] & (1 << (Reg&31));
294 /// AnalyzeFormalArguments - Analyze an array of argument values,
295 /// incorporating info about the formals into this state.
296 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
299 /// The function will invoke AnalyzeFormalArguments.
300 void AnalyzeArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
302 AnalyzeFormalArguments(Ins, Fn);
305 /// AnalyzeReturn - Analyze the returned values of a return,
306 /// incorporating info about the result values into this state.
307 void AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
310 /// CheckReturn - Analyze the return values of a function, returning
311 /// true if the return can be performed without sret-demotion, and
313 bool CheckReturn(const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
316 /// AnalyzeCallOperands - Analyze the outgoing arguments to a call,
317 /// incorporating info about the passed values into this state.
318 void AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
321 /// AnalyzeCallOperands - Same as above except it takes vectors of types
322 /// and argument flags.
323 void AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
324 SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
327 /// The function will invoke AnalyzeCallOperands.
328 void AnalyzeArguments(const SmallVectorImpl<ISD::OutputArg> &Outs,
330 AnalyzeCallOperands(Outs, Fn);
333 /// AnalyzeCallResult - Analyze the return values of a call,
334 /// incorporating info about the passed values into this state.
335 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
338 /// A shadow allocated register is a register that was allocated
339 /// but wasn't added to the location list (Locs).
340 /// \returns true if the register was allocated as shadow or false otherwise.
341 bool IsShadowAllocatedReg(unsigned Reg) const;
343 /// AnalyzeCallResult - Same as above except it's specialized for calls which
344 /// produce a single value.
345 void AnalyzeCallResult(MVT VT, CCAssignFn Fn);
347 /// getFirstUnallocated - Return the index of the first unallocated register
348 /// in the set, or Regs.size() if they are all allocated.
349 unsigned getFirstUnallocated(ArrayRef<MCPhysReg> Regs) const {
350 for (unsigned i = 0; i < Regs.size(); ++i)
351 if (!isAllocated(Regs[i]))
356 /// AllocateReg - Attempt to allocate one register. If it is not available,
357 /// return zero. Otherwise, return the register, marking it and any aliases
359 unsigned AllocateReg(unsigned Reg) {
360 if (isAllocated(Reg)) return 0;
365 /// Version of AllocateReg with extra register to be shadowed.
366 unsigned AllocateReg(unsigned Reg, unsigned ShadowReg) {
367 if (isAllocated(Reg)) return 0;
369 MarkAllocated(ShadowReg);
373 /// AllocateReg - Attempt to allocate one of the specified registers. If none
374 /// are available, return zero. Otherwise, return the first one available,
375 /// marking it and any aliases as allocated.
376 unsigned AllocateReg(ArrayRef<MCPhysReg> Regs) {
377 unsigned FirstUnalloc = getFirstUnallocated(Regs);
378 if (FirstUnalloc == Regs.size())
379 return 0; // Didn't find the reg.
381 // Mark the register and any aliases as allocated.
382 unsigned Reg = Regs[FirstUnalloc];
387 /// AllocateRegBlock - Attempt to allocate a block of RegsRequired consecutive
388 /// registers. If this is not possible, return zero. Otherwise, return the first
389 /// register of the block that were allocated, marking the entire block as allocated.
390 unsigned AllocateRegBlock(ArrayRef<MCPhysReg> Regs, unsigned RegsRequired) {
391 if (RegsRequired > Regs.size())
394 for (unsigned StartIdx = 0; StartIdx <= Regs.size() - RegsRequired;
396 bool BlockAvailable = true;
397 // Check for already-allocated regs in this block
398 for (unsigned BlockIdx = 0; BlockIdx < RegsRequired; ++BlockIdx) {
399 if (isAllocated(Regs[StartIdx + BlockIdx])) {
400 BlockAvailable = false;
404 if (BlockAvailable) {
405 // Mark the entire block as allocated
406 for (unsigned BlockIdx = 0; BlockIdx < RegsRequired; ++BlockIdx) {
407 MarkAllocated(Regs[StartIdx + BlockIdx]);
409 return Regs[StartIdx];
412 // No block was available
416 /// Version of AllocateReg with list of registers to be shadowed.
417 unsigned AllocateReg(ArrayRef<MCPhysReg> Regs, const MCPhysReg *ShadowRegs) {
418 unsigned FirstUnalloc = getFirstUnallocated(Regs);
419 if (FirstUnalloc == Regs.size())
420 return 0; // Didn't find the reg.
422 // Mark the register and any aliases as allocated.
423 unsigned Reg = Regs[FirstUnalloc], ShadowReg = ShadowRegs[FirstUnalloc];
425 MarkAllocated(ShadowReg);
429 /// AllocateStack - Allocate a chunk of stack space with the specified size
431 unsigned AllocateStack(unsigned Size, unsigned Align) {
432 assert(Align && ((Align - 1) & Align) == 0); // Align is power of 2.
433 StackOffset = alignTo(StackOffset, Align);
434 unsigned Result = StackOffset;
436 MaxStackArgAlign = std::max(Align, MaxStackArgAlign);
437 ensureMaxAlignment(Align);
441 void ensureMaxAlignment(unsigned Align) {
442 if (!AnalyzingMustTailForwardedRegs)
443 MF.getFrameInfo().ensureMaxAlignment(Align);
446 /// Version of AllocateStack with extra register to be shadowed.
447 unsigned AllocateStack(unsigned Size, unsigned Align, unsigned ShadowReg) {
448 MarkAllocated(ShadowReg);
449 return AllocateStack(Size, Align);
452 /// Version of AllocateStack with list of extra registers to be shadowed.
453 /// Note that, unlike AllocateReg, this shadows ALL of the shadow registers.
454 unsigned AllocateStack(unsigned Size, unsigned Align,
455 ArrayRef<MCPhysReg> ShadowRegs) {
456 for (unsigned i = 0; i < ShadowRegs.size(); ++i)
457 MarkAllocated(ShadowRegs[i]);
458 return AllocateStack(Size, Align);
461 // HandleByVal - Allocate a stack slot large enough to pass an argument by
462 // value. The size and alignment information of the argument is encoded in its
463 // parameter attribute.
464 void HandleByVal(unsigned ValNo, MVT ValVT,
465 MVT LocVT, CCValAssign::LocInfo LocInfo,
466 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
468 // Returns count of byval arguments that are to be stored (even partly)
470 unsigned getInRegsParamsCount() const { return ByValRegs.size(); }
472 // Returns count of byval in-regs arguments proceed.
473 unsigned getInRegsParamsProcessed() const { return InRegsParamsProcessed; }
475 // Get information about N-th byval parameter that is stored in registers.
476 // Here "ByValParamIndex" is N.
477 void getInRegsParamInfo(unsigned InRegsParamRecordIndex,
478 unsigned& BeginReg, unsigned& EndReg) const {
479 assert(InRegsParamRecordIndex < ByValRegs.size() &&
480 "Wrong ByVal parameter index");
482 const ByValInfo& info = ByValRegs[InRegsParamRecordIndex];
483 BeginReg = info.Begin;
487 // Add information about parameter that is kept in registers.
488 void addInRegsParamInfo(unsigned RegBegin, unsigned RegEnd) {
489 ByValRegs.push_back(ByValInfo(RegBegin, RegEnd));
492 // Goes either to next byval parameter (excluding "waste" record), or
493 // to the end of collection.
494 // Returns false, if end is reached.
495 bool nextInRegsParam() {
496 unsigned e = ByValRegs.size();
497 if (InRegsParamsProcessed < e)
498 ++InRegsParamsProcessed;
499 return InRegsParamsProcessed < e;
502 // Clear byval registers tracking info.
503 void clearByValRegsInfo() {
504 InRegsParamsProcessed = 0;
508 // Rewind byval registers tracking info.
509 void rewindByValRegsInfo() {
510 InRegsParamsProcessed = 0;
513 ParmContext getCallOrPrologue() const { return CallOrPrologue; }
515 // Get list of pending assignments
516 SmallVectorImpl<llvm::CCValAssign> &getPendingLocs() {
520 /// Compute the remaining unused register parameters that would be used for
521 /// the given value type. This is useful when varargs are passed in the
522 /// registers that normal prototyped parameters would be passed in, or for
523 /// implementing perfect forwarding.
524 void getRemainingRegParmsForType(SmallVectorImpl<MCPhysReg> &Regs, MVT VT,
527 /// Compute the set of registers that need to be preserved and forwarded to
528 /// any musttail calls.
529 void analyzeMustTailForwardedRegisters(
530 SmallVectorImpl<ForwardedRegister> &Forwards, ArrayRef<MVT> RegParmTypes,
533 /// Returns true if the results of the two calling conventions are compatible.
534 /// This is usually part of the check for tailcall eligibility.
535 static bool resultsCompatible(CallingConv::ID CalleeCC,
536 CallingConv::ID CallerCC, MachineFunction &MF,
538 const SmallVectorImpl<ISD::InputArg> &Ins,
539 CCAssignFn CalleeFn, CCAssignFn CallerFn);
541 /// The function runs an additional analysis pass over function arguments.
542 /// It will mark each argument with the attribute flag SecArgPass.
543 /// After running, it will sort the locs list.
545 void AnalyzeArgumentsSecondPass(const SmallVectorImpl<T> &Args,
547 unsigned NumFirstPassLocs = Locs.size();
549 /// Creates similar argument list to \p Args in which each argument is
550 /// marked using SecArgPass flag.
551 SmallVector<T, 16> SecPassArg;
552 // SmallVector<ISD::InputArg, 16> SecPassArg;
553 for (auto Arg : Args) {
554 Arg.Flags.setSecArgPass();
555 SecPassArg.push_back(Arg);
558 // Run the second argument pass
559 AnalyzeArguments(SecPassArg, Fn);
561 // Sort the locations of the arguments according to their original position.
562 SmallVector<CCValAssign, 16> TmpArgLocs;
563 std::swap(TmpArgLocs, Locs);
564 auto B = TmpArgLocs.begin(), E = TmpArgLocs.end();
565 std::merge(B, B + NumFirstPassLocs, B + NumFirstPassLocs, E,
566 std::back_inserter(Locs),
567 [](const CCValAssign &A, const CCValAssign &B) -> bool {
568 return A.getValNo() < B.getValNo();
573 /// MarkAllocated - Mark a register and all of its aliases as allocated.
574 void MarkAllocated(unsigned Reg);
579 } // end namespace llvm