1 //===-- FunctionLoweringInfo.h - Lower functions from LLVM IR to CodeGen --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements routines for translating functions from LLVM IR into
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
16 #define LLVM_CODEGEN_FUNCTIONLOWERINGINFO_H
18 #include "llvm/ADT/APInt.h"
19 #include "llvm/ADT/DenseMap.h"
20 #include "llvm/ADT/IndexedMap.h"
21 #include "llvm/ADT/Optional.h"
22 #include "llvm/ADT/SmallPtrSet.h"
23 #include "llvm/ADT/SmallVector.h"
24 #include "llvm/CodeGen/ISDOpcodes.h"
25 #include "llvm/CodeGen/MachineBasicBlock.h"
26 #include "llvm/IR/InlineAsm.h"
27 #include "llvm/IR/Instructions.h"
28 #include "llvm/Target/TargetRegisterInfo.h"
35 class BranchProbabilityInfo;
41 class MachineBasicBlock;
42 class MachineFunction;
43 class MachineModuleInfo;
44 class MachineRegisterInfo;
50 //===--------------------------------------------------------------------===//
51 /// FunctionLoweringInfo - This contains information that is global to a
52 /// function that is used when lowering a region of the function.
54 class FunctionLoweringInfo {
58 const TargetLowering *TLI;
59 MachineRegisterInfo *RegInfo;
60 BranchProbabilityInfo *BPI;
61 /// CanLowerReturn - true iff the function's return value can be lowered to
65 /// True if part of the CSRs will be handled via explicit copies.
68 /// DemoteRegister - if CanLowerReturn is false, DemoteRegister is a vreg
69 /// allocated to hold a pointer to the hidden sret parameter.
70 unsigned DemoteRegister;
72 /// MBBMap - A mapping from LLVM basic blocks to their machine code entry.
73 DenseMap<const BasicBlock*, MachineBasicBlock *> MBBMap;
75 typedef SmallVector<unsigned, 1> SwiftErrorVRegs;
76 typedef SmallVector<const Value*, 1> SwiftErrorValues;
77 /// A function can only have a single swifterror argument. And if it does
78 /// have a swifterror argument, it must be the first entry in
80 SwiftErrorValues SwiftErrorVals;
82 /// Track the virtual register for each swifterror value in a given basic
83 /// block. Entries in SwiftErrorVRegs have the same ordering as entries
84 /// in SwiftErrorVals.
85 /// Note that another choice that is more straight-forward is to use
86 /// Map<const MachineBasicBlock*, Map<Value*, unsigned/*VReg*/>>. It
87 /// maintains a map from swifterror values to virtual registers for each
88 /// machine basic block. This choice does not require a one-to-one
89 /// correspondence between SwiftErrorValues and SwiftErrorVRegs. But because
90 /// of efficiency concern, we do not choose it.
91 llvm::DenseMap<const MachineBasicBlock*, SwiftErrorVRegs> SwiftErrorMap;
93 /// Track the virtual register for each swifterror value at the end of a basic
94 /// block when we need the assignment of a virtual register before the basic
95 /// block is visited. When we actually visit the basic block, we will make
96 /// sure the swifterror value is in the correct virtual register.
97 llvm::DenseMap<const MachineBasicBlock*, SwiftErrorVRegs>
100 /// Find the swifterror virtual register in SwiftErrorMap. We will assert
101 /// failure when the value does not exist in swifterror map.
102 unsigned findSwiftErrorVReg(const MachineBasicBlock*, const Value*) const;
103 /// Set the swifterror virtual register in SwiftErrorMap.
104 void setSwiftErrorVReg(const MachineBasicBlock *MBB, const Value*, unsigned);
106 /// ValueMap - Since we emit code for the function a basic block at a time,
107 /// we must remember which virtual registers hold the values for
108 /// cross-basic-block values.
109 DenseMap<const Value *, unsigned> ValueMap;
111 /// Track virtual registers created for exception pointers.
112 DenseMap<const Value *, unsigned> CatchPadExceptionPointers;
114 /// Keep track of frame indices allocated for statepoints as they could be
115 /// used across basic block boundaries. This struct is more complex than a
116 /// simple map because the stateopint lowering code de-duplicates gc pointers
117 /// based on their SDValue (so %p and (bitcast %p to T) will get the same
118 /// slot), and we track that here.
120 struct StatepointSpillMap {
121 typedef DenseMap<const Value *, Optional<int>> SlotMapTy;
123 /// Maps uniqued llvm IR values to the slots they were spilled in. If a
124 /// value is mapped to None it means we visited the value but didn't spill
125 /// it (because it was a constant, for instance).
128 /// Maps llvm IR values to the values they were de-duplicated to.
129 DenseMap<const Value *, const Value *> DuplicateMap;
131 SlotMapTy::const_iterator find(const Value *V) const {
132 auto DuplIt = DuplicateMap.find(V);
133 if (DuplIt != DuplicateMap.end())
135 return SlotMap.find(V);
138 SlotMapTy::const_iterator end() const { return SlotMap.end(); }
141 /// Maps gc.statepoint instructions to their corresponding StatepointSpillMap
143 DenseMap<const Instruction *, StatepointSpillMap> StatepointSpillMaps;
145 /// StaticAllocaMap - Keep track of frame indices for fixed sized allocas in
146 /// the entry block. This allows the allocas to be efficiently referenced
147 /// anywhere in the function.
148 DenseMap<const AllocaInst*, int> StaticAllocaMap;
150 /// ByValArgFrameIndexMap - Keep track of frame indices for byval arguments.
151 DenseMap<const Argument*, int> ByValArgFrameIndexMap;
153 /// ArgDbgValues - A list of DBG_VALUE instructions created during isel for
154 /// function arguments that are inserted after scheduling is completed.
155 SmallVector<MachineInstr*, 8> ArgDbgValues;
157 /// RegFixups - Registers which need to be replaced after isel is done.
158 DenseMap<unsigned, unsigned> RegFixups;
160 /// StatepointStackSlots - A list of temporary stack slots (frame indices)
161 /// used to spill values at a statepoint. We store them here to enable
162 /// reuse of the same stack slots across different statepoints in different
164 SmallVector<unsigned, 50> StatepointStackSlots;
166 /// MBB - The current block.
167 MachineBasicBlock *MBB;
169 /// MBB - The current insert position inside the current block.
170 MachineBasicBlock::iterator InsertPt;
173 unsigned NumSignBits : 31;
174 unsigned IsValid : 1;
175 APInt KnownOne, KnownZero;
176 LiveOutInfo() : NumSignBits(0), IsValid(true), KnownOne(1, 0),
180 /// Record the preferred extend type (ISD::SIGN_EXTEND or ISD::ZERO_EXTEND)
182 DenseMap<const Value *, ISD::NodeType> PreferredExtendType;
184 /// VisitedBBs - The set of basic blocks visited thus far by instruction
186 SmallPtrSet<const BasicBlock*, 4> VisitedBBs;
188 /// PHINodesToUpdate - A list of phi instructions whose operand list will
189 /// be updated after processing the current basic block.
190 /// TODO: This isn't per-function state, it's per-basic-block state. But
191 /// there's no other convenient place for it to live right now.
192 std::vector<std::pair<MachineInstr*, unsigned> > PHINodesToUpdate;
193 unsigned OrigNumPHINodesToUpdate;
195 /// If the current MBB is a landing pad, the exception pointer and exception
196 /// selector registers are copied into these virtual registers by
197 /// SelectionDAGISel::PrepareEHLandingPad().
198 unsigned ExceptionPointerVirtReg, ExceptionSelectorVirtReg;
200 /// set - Initialize this FunctionLoweringInfo with the given Function
201 /// and its associated MachineFunction.
203 void set(const Function &Fn, MachineFunction &MF, SelectionDAG *DAG);
205 /// clear - Clear out all the function-specific state. This returns this
206 /// FunctionLoweringInfo to an empty state, ready to be used for a
207 /// different function.
210 /// isExportedInst - Return true if the specified value is an instruction
211 /// exported from its block.
212 bool isExportedInst(const Value *V) {
213 return ValueMap.count(V);
216 unsigned CreateReg(MVT VT);
218 unsigned CreateRegs(Type *Ty);
220 unsigned InitializeRegForValue(const Value *V) {
221 // Tokens never live in vregs.
222 if (V->getType()->isTokenTy())
224 unsigned &R = ValueMap[V];
225 assert(R == 0 && "Already initialized this value register!");
226 return R = CreateRegs(V->getType());
229 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
230 /// register is a PHI destination and the PHI's LiveOutInfo is not valid.
231 const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg) {
232 if (!LiveOutRegInfo.inBounds(Reg))
235 const LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
242 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
243 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
244 /// the register's LiveOutInfo is for a smaller bit width, it is extended to
245 /// the larger bit width by zero extension. The bit width must be no smaller
246 /// than the LiveOutInfo's existing bit width.
247 const LiveOutInfo *GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth);
249 /// AddLiveOutRegInfo - Adds LiveOutInfo for a register.
250 void AddLiveOutRegInfo(unsigned Reg, unsigned NumSignBits,
251 const APInt &KnownZero, const APInt &KnownOne) {
252 // Only install this information if it tells us something.
253 if (NumSignBits == 1 && KnownZero == 0 && KnownOne == 0)
256 LiveOutRegInfo.grow(Reg);
257 LiveOutInfo &LOI = LiveOutRegInfo[Reg];
258 LOI.NumSignBits = NumSignBits;
259 LOI.KnownOne = KnownOne;
260 LOI.KnownZero = KnownZero;
263 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
264 /// register based on the LiveOutInfo of its operands.
265 void ComputePHILiveOutRegInfo(const PHINode*);
267 /// InvalidatePHILiveOutRegInfo - Invalidates a PHI's LiveOutInfo, to be
268 /// called when a block is visited before all of its predecessors.
269 void InvalidatePHILiveOutRegInfo(const PHINode *PN) {
270 // PHIs with no uses have no ValueMap entry.
271 DenseMap<const Value*, unsigned>::const_iterator It = ValueMap.find(PN);
272 if (It == ValueMap.end())
275 unsigned Reg = It->second;
279 LiveOutRegInfo.grow(Reg);
280 LiveOutRegInfo[Reg].IsValid = false;
283 /// setArgumentFrameIndex - Record frame index for the byval
285 void setArgumentFrameIndex(const Argument *A, int FI);
287 /// getArgumentFrameIndex - Get frame index for the byval argument.
288 int getArgumentFrameIndex(const Argument *A);
290 unsigned getCatchPadExceptionPointerVReg(const Value *CPI,
291 const TargetRegisterClass *RC);
294 void addSEHHandlersForLPads(ArrayRef<const LandingPadInst *> LPads);
296 /// LiveOutRegInfo - Information about live out vregs.
297 IndexedMap<LiveOutInfo, VirtReg2IndexFunctor> LiveOutRegInfo;
300 /// ComputeUsesVAFloatArgument - Determine if any floating-point values are
301 /// being passed to this variadic function, and set the MachineModuleInfo's
302 /// usesVAFloatArgument flag if so. This flag is used to emit an undefined
303 /// reference to _fltused on Windows, which will link in MSVCRT's
304 /// floating-point support.
305 void ComputeUsesVAFloatArgument(const CallInst &I, MachineModuleInfo *MMI);
307 /// AddLandingPadInfo - Extract the exception handling information from the
308 /// landingpad instruction and add them to the specified machine module info.
309 void AddLandingPadInfo(const LandingPadInst &I, MachineModuleInfo &MMI,
310 MachineBasicBlock *MBB);
312 } // end namespace llvm