1 //==-- llvm/CodeGen/GlobalISel/InstructionSelector.h -------------*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 /// \file This file declares the API for the instruction selector.
11 /// This class is responsible for selecting machine instructions.
12 /// It's implemented by the target. It's used by the InstructionSelect pass.
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_GLOBALISEL_INSTRUCTIONSELECTOR_H
17 #define LLVM_CODEGEN_GLOBALISEL_INSTRUCTIONSELECTOR_H
19 #include "llvm/ADT/Optional.h"
26 class MachineInstrBuilder;
27 class MachineFunction;
29 class MachineRegisterInfo;
30 class RegisterBankInfo;
31 class TargetInstrInfo;
32 class TargetRegisterInfo;
34 /// Container class for CodeGen predicate results.
35 /// This is convenient because std::bitset does not have a constructor
36 /// with an initializer list of set bits.
38 /// Each InstructionSelector subclass should define a PredicateBitset class with:
39 /// const unsigned MAX_SUBTARGET_PREDICATES = 192;
40 /// using PredicateBitset = PredicateBitsetImpl<MAX_SUBTARGET_PREDICATES>;
41 /// and updating the constant to suit the target. Tablegen provides a suitable
42 /// definition for the predicates in use in <Target>GenGlobalISel.inc when
43 /// GET_GLOBALISEL_PREDICATE_BITSET is defined.
44 template <std::size_t MaxPredicates>
45 class PredicateBitsetImpl : public std::bitset<MaxPredicates> {
47 // Cannot inherit constructors because it's not supported by VC++..
48 PredicateBitsetImpl() = default;
50 PredicateBitsetImpl(const std::bitset<MaxPredicates> &B)
51 : std::bitset<MaxPredicates>(B) {}
53 PredicateBitsetImpl(std::initializer_list<unsigned> Init) {
55 std::bitset<MaxPredicates>::set(I);
59 /// Provides the logic to select generic machine instructions.
60 class InstructionSelector {
62 virtual ~InstructionSelector() {}
64 /// This is executed before selecting a function.
65 virtual void beginFunction(const MachineFunction &MF) {}
67 /// Select the (possibly generic) instruction \p I to only use target-specific
68 /// opcodes. It is OK to insert multiple instructions, but they cannot be
69 /// generic pre-isel instructions.
71 /// \returns whether selection succeeded.
72 /// \pre I.getParent() && I.getParent()->getParent()
75 /// for I in all mutated/inserted instructions:
76 /// !isPreISelGenericOpcode(I.getOpcode())
78 virtual bool select(MachineInstr &I) const = 0;
81 typedef std::function<void(MachineInstrBuilder &)> ComplexRendererFn;
83 InstructionSelector();
85 /// Mutate the newly-selected instruction \p I to constrain its (possibly
86 /// generic) virtual register operands to the instruction's register class.
87 /// This could involve inserting COPYs before (for uses) or after (for defs).
88 /// This requires the number of operands to match the instruction description.
89 /// \returns whether operand regclass constraining succeeded.
91 // FIXME: Not all instructions have the same number of operands. We should
92 // probably expose a constrain helper per operand and let the target selector
93 // constrain individual registers, like fast-isel.
94 bool constrainSelectedInstRegOperands(MachineInstr &I,
95 const TargetInstrInfo &TII,
96 const TargetRegisterInfo &TRI,
97 const RegisterBankInfo &RBI) const;
99 bool isOperandImmEqual(const MachineOperand &MO, int64_t Value,
100 const MachineRegisterInfo &MRI) const;
102 bool isObviouslySafeToFold(MachineInstr &MI) const;
105 } // End namespace llvm.