1 //== llvm/CodeGen/GlobalISel/LegalizerHelper.h ---------------- -*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 /// \file A pass to convert the target-illegal operations created by IR -> MIR
11 /// translation into ones the target expects to be able to select. This may
12 /// occur in multiple phases, for example G_ADD <2 x i8> -> G_ADD <2 x i16> ->
15 /// The LegalizerHelper class is where most of the work happens, and is
16 /// designed to be callable from other passes that find themselves with an
17 /// illegal instruction.
19 //===----------------------------------------------------------------------===//
21 #ifndef LLVM_CODEGEN_GLOBALISEL_MACHINELEGALIZEHELPER_H
22 #define LLVM_CODEGEN_GLOBALISEL_MACHINELEGALIZEHELPER_H
24 #include "llvm/CodeGen/GlobalISel/CallLowering.h"
25 #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
26 #include "llvm/CodeGen/LowLevelType.h"
27 #include "llvm/CodeGen/MachineFunctionPass.h"
28 #include "llvm/CodeGen/RuntimeLibcalls.h"
31 // Forward declarations.
34 class MachineRegisterInfo;
35 class GISelChangeObserver;
37 class LegalizerHelper {
40 /// Instruction was already legal and no change was made to the
44 /// Instruction has been legalized and the MachineFunction changed.
47 /// Some kind of error has occurred and we could not legalize this
52 LegalizerHelper(MachineFunction &MF, GISelChangeObserver &Observer,
54 LegalizerHelper(MachineFunction &MF, const LegalizerInfo &LI,
55 GISelChangeObserver &Observer, MachineIRBuilder &B);
57 /// Replace \p MI by a sequence of legal instructions that can implement the
58 /// same operation. Note that this means \p MI may be deleted, so any iterator
59 /// steps should be performed before calling this function. \p Helper should
60 /// be initialized to the MachineFunction containing \p MI.
62 /// Considered as an opaque blob, the legal code will use and define the same
63 /// registers as \p MI.
64 LegalizeResult legalizeInstrStep(MachineInstr &MI);
66 /// Legalize an instruction by emiting a runtime library call instead.
67 LegalizeResult libcall(MachineInstr &MI);
69 /// Legalize an instruction by reducing the width of the underlying scalar
71 LegalizeResult narrowScalar(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy);
73 /// Legalize an instruction by performing the operation on a wider scalar type
74 /// (for example a 16-bit addition can be safely performed at 32-bits
75 /// precision, ignoring the unused bits).
76 LegalizeResult widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
78 /// Legalize an instruction by splitting it into simpler parts, hopefully
79 /// understood by the target.
80 LegalizeResult lower(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
82 /// Legalize a vector instruction by splitting into multiple components, each
83 /// acting on the same scalar type as the original but with fewer elements.
84 LegalizeResult fewerElementsVector(MachineInstr &MI, unsigned TypeIdx,
87 /// Legalize a vector instruction by increasing the number of vector elements
88 /// involved and ignoring the added elements later.
89 LegalizeResult moreElementsVector(MachineInstr &MI, unsigned TypeIdx,
92 /// Expose MIRBuilder so clients can set their own RecordInsertInstruction
94 MachineIRBuilder &MIRBuilder;
96 /// Expose LegalizerInfo so the clients can re-use.
97 const LegalizerInfo &getLegalizerInfo() const { return LI; }
100 /// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
101 /// Use by extending the operand's type to \p WideTy using the specified \p
102 /// ExtOpcode for the extension instruction, and replacing the vreg of the
103 /// operand in place.
104 void widenScalarSrc(MachineInstr &MI, LLT WideTy, unsigned OpIdx,
107 /// Legalize a single operand \p OpIdx of the machine instruction \p MI as a
108 /// Def by extending the operand's type to \p WideTy and truncating it back
109 /// with the \p TruncOpcode, and replacing the vreg of the operand in place.
110 void widenScalarDst(MachineInstr &MI, LLT WideTy, unsigned OpIdx = 0,
111 unsigned TruncOpcode = TargetOpcode::G_TRUNC);
113 /// Helper function to split a wide generic register into bitwise blocks with
114 /// the given Type (which implies the number of blocks needed). The generic
115 /// registers created are appended to Ops, starting at bit 0 of Reg.
116 void extractParts(unsigned Reg, LLT Ty, int NumParts,
117 SmallVectorImpl<unsigned> &VRegs);
119 LegalizeResult lowerBitCount(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
121 MachineRegisterInfo &MRI;
122 const LegalizerInfo &LI;
123 /// To keep track of changes made by the LegalizerHelper.
124 GISelChangeObserver &Observer;
127 /// Helper function that creates the given libcall.
128 LegalizerHelper::LegalizeResult
129 createLibcall(MachineIRBuilder &MIRBuilder, RTLIB::Libcall Libcall,
130 const CallLowering::ArgInfo &Result,
131 ArrayRef<CallLowering::ArgInfo> Args);
133 } // End namespace llvm.