1 //===-- llvm/CodeGen/GlobalISel/MachineIRBuilder.h - MIBuilder --*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 /// This file declares the MachineIRBuilder class.
11 /// This is a helper class to build MachineInstr.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_GLOBALISEL_MACHINEIRBUILDER_H
15 #define LLVM_CODEGEN_GLOBALISEL_MACHINEIRBUILDER_H
17 #include "llvm/CodeGen/GlobalISel/Types.h"
19 #include "llvm/CodeGen/LowLevelType.h"
20 #include "llvm/CodeGen/MachineBasicBlock.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/IR/Constants.h"
23 #include "llvm/IR/DebugLoc.h"
29 // Forward declarations.
30 class MachineFunction;
32 class TargetInstrInfo;
34 /// Helper class to build MachineInstr.
35 /// It keeps internally the insertion point and debug location for all
36 /// the new instructions we want to create.
37 /// This information can be modify via the related setters.
38 class MachineIRBuilder {
39 /// MachineFunction under construction.
41 /// Information used to access the description of the opcodes.
42 const TargetInstrInfo *TII;
43 /// Information used to verify types are consistent and to create virtual registers.
44 MachineRegisterInfo *MRI;
45 /// Debug location to be set to any instruction we create.
48 /// \name Fields describing the insertion point.
50 MachineBasicBlock *MBB;
51 MachineBasicBlock::iterator II;
54 std::function<void(MachineInstr *)> InsertedInstr;
56 const TargetInstrInfo &getTII() {
57 assert(TII && "TargetInstrInfo is not set");
61 void validateTruncExt(unsigned Dst, unsigned Src, bool IsExtend);
64 /// Getter for the function we currently build.
65 MachineFunction &getMF() {
66 assert(MF && "MachineFunction is not set");
70 /// Getter for the basic block we currently build.
71 MachineBasicBlock &getMBB() {
72 assert(MBB && "MachineBasicBlock is not set");
76 /// Current insertion point for new instructions.
77 MachineBasicBlock::iterator getInsertPt() {
81 /// Set the insertion point before the specified position.
82 /// \pre MBB must be in getMF().
83 /// \pre II must be a valid iterator in MBB.
84 void setInsertPt(MachineBasicBlock &MBB, MachineBasicBlock::iterator II);
87 /// \name Setters for the insertion point.
89 /// Set the MachineFunction where to build instructions.
90 void setMF(MachineFunction &);
92 /// Set the insertion point to the end of \p MBB.
93 /// \pre \p MBB must be contained by getMF().
94 void setMBB(MachineBasicBlock &MBB);
96 /// Set the insertion point to before MI.
97 /// \pre MI must be in getMF().
98 void setInstr(MachineInstr &MI);
101 /// \name Control where instructions we create are recorded (typically for
102 /// visiting again later during legalization).
104 void recordInsertions(std::function<void(MachineInstr *)> InsertedInstr);
105 void stopRecordingInsertions();
108 /// Set the debug location to \p DL for all the next build instructions.
109 void setDebugLoc(const DebugLoc &DL) { this->DL = DL; }
111 /// Get the current instruction's debug location.
112 DebugLoc getDebugLoc() { return DL; }
114 /// Build and insert <empty> = \p Opcode <empty>.
115 /// The insertion point is the one set by the last call of either
116 /// setBasicBlock or setMI.
118 /// \pre setBasicBlock or setMI must have been called.
120 /// \return a MachineInstrBuilder for the newly created instruction.
121 MachineInstrBuilder buildInstr(unsigned Opcode);
123 /// Build but don't insert <empty> = \p Opcode <empty>.
125 /// \pre setMF, setBasicBlock or setMI must have been called.
127 /// \return a MachineInstrBuilder for the newly created instruction.
128 MachineInstrBuilder buildInstrNoInsert(unsigned Opcode);
130 /// Insert an existing instruction at the insertion point.
131 MachineInstrBuilder insertInstr(MachineInstrBuilder MIB);
133 /// Build and insert a DBG_VALUE instruction expressing the fact that the
134 /// associated \p Variable lives in \p Reg (suitably modified by \p Expr).
135 MachineInstrBuilder buildDirectDbgValue(unsigned Reg, const MDNode *Variable,
138 /// Build and insert a DBG_VALUE instruction expressing the fact that the
139 /// associated \p Variable lives in memory at \p Reg + \p Offset (suitably
140 /// modified by \p Expr).
141 MachineInstrBuilder buildIndirectDbgValue(unsigned Reg, unsigned Offset,
142 const MDNode *Variable,
144 /// Build and insert a DBG_VALUE instruction expressing the fact that the
145 /// associated \p Variable lives in the stack slot specified by \p FI
146 /// (suitably modified by \p Expr).
147 MachineInstrBuilder buildFIDbgValue(int FI, const MDNode *Variable,
150 /// Build and insert a DBG_VALUE instructions specifying that \p Variable is
151 /// given by \p C (suitably modified by \p Expr).
152 MachineInstrBuilder buildConstDbgValue(const Constant &C, unsigned Offset,
153 const MDNode *Variable,
156 /// Build and insert \p Res<def> = G_FRAME_INDEX \p Idx
158 /// G_FRAME_INDEX materializes the address of an alloca value or other
159 /// stack-based object.
161 /// \pre setBasicBlock or setMI must have been called.
162 /// \pre \p Res must be a generic virtual register with pointer type.
164 /// \return a MachineInstrBuilder for the newly created instruction.
165 MachineInstrBuilder buildFrameIndex(unsigned Res, int Idx);
167 /// Build and insert \p Res<def> = G_GLOBAL_VALUE \p GV
169 /// G_GLOBAL_VALUE materializes the address of the specified global
172 /// \pre setBasicBlock or setMI must have been called.
173 /// \pre \p Res must be a generic virtual register with pointer type
174 /// in the same address space as \p GV.
176 /// \return a MachineInstrBuilder for the newly created instruction.
177 MachineInstrBuilder buildGlobalValue(unsigned Res, const GlobalValue *GV);
179 /// Build and insert \p Res<def> = G_ADD \p Op0, \p Op1
181 /// G_ADD sets \p Res to the sum of integer parameters \p Op0 and \p Op1,
182 /// truncated to their width.
184 /// \pre setBasicBlock or setMI must have been called.
185 /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
186 /// with the same (scalar or vector) type).
188 /// \return a MachineInstrBuilder for the newly created instruction.
189 MachineInstrBuilder buildAdd(unsigned Res, unsigned Op0,
192 /// Build and insert \p Res<def> = G_SUB \p Op0, \p Op1
194 /// G_SUB sets \p Res to the sum of integer parameters \p Op0 and \p Op1,
195 /// truncated to their width.
197 /// \pre setBasicBlock or setMI must have been called.
198 /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
199 /// with the same (scalar or vector) type).
201 /// \return a MachineInstrBuilder for the newly created instruction.
202 MachineInstrBuilder buildSub(unsigned Res, unsigned Op0,
205 /// Build and insert \p Res<def> = G_MUL \p Op0, \p Op1
207 /// G_MUL sets \p Res to the sum of integer parameters \p Op0 and \p Op1,
208 /// truncated to their width.
210 /// \pre setBasicBlock or setMI must have been called.
211 /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
212 /// with the same (scalar or vector) type).
214 /// \return a MachineInstrBuilder for the newly created instruction.
215 MachineInstrBuilder buildMul(unsigned Res, unsigned Op0,
218 /// Build and insert \p Res<def> = G_GEP \p Op0, \p Op1
220 /// G_GEP adds \p Op1 bytes to the pointer specified by \p Op0,
221 /// storing the resulting pointer in \p Res.
223 /// \pre setBasicBlock or setMI must have been called.
224 /// \pre \p Res and \p Op0 must be generic virtual registers with pointer
226 /// \pre \p Op1 must be a generic virtual register with scalar type.
228 /// \return a MachineInstrBuilder for the newly created instruction.
229 MachineInstrBuilder buildGEP(unsigned Res, unsigned Op0,
232 /// Materialize and insert \p Res<def> = G_GEP \p Op0, (G_CONSTANT \p Value)
234 /// G_GEP adds \p Value bytes to the pointer specified by \p Op0,
235 /// storing the resulting pointer in \p Res. If \p Value is zero then no
236 /// G_GEP or G_CONSTANT will be created and \pre Op0 will be assigned to
239 /// \pre setBasicBlock or setMI must have been called.
240 /// \pre \p Op0 must be a generic virtual register with pointer type.
241 /// \pre \p ValueTy must be a scalar type.
242 /// \pre \p Res must be 0. This is to detect confusion between
243 /// materializeGEP() and buildGEP().
244 /// \post \p Res will either be a new generic virtual register of the same
245 /// type as \p Op0 or \p Op0 itself.
247 /// \return a MachineInstrBuilder for the newly created instruction.
248 Optional<MachineInstrBuilder> materializeGEP(unsigned &Res, unsigned Op0,
252 /// Build and insert \p Res<def> = G_PTR_MASK \p Op0, \p NumBits
254 /// G_PTR_MASK clears the low bits of a pointer operand without destroying its
255 /// pointer properties. This has the effect of rounding the address *down* to
256 /// a specified alignment in bits.
258 /// \pre setBasicBlock or setMI must have been called.
259 /// \pre \p Res and \p Op0 must be generic virtual registers with pointer
261 /// \pre \p NumBits must be an integer representing the number of low bits to
262 /// be cleared in \p Op0.
264 /// \return a MachineInstrBuilder for the newly created instruction.
265 MachineInstrBuilder buildPtrMask(unsigned Res, unsigned Op0,
268 /// Build and insert \p Res<def>, \p CarryOut<def> = G_UADDE \p Op0,
269 /// \p Op1, \p CarryIn
271 /// G_UADDE sets \p Res to \p Op0 + \p Op1 + \p CarryIn (truncated to the bit
272 /// width) and sets \p CarryOut to 1 if the result overflowed in unsigned
275 /// \pre setBasicBlock or setMI must have been called.
276 /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
277 /// with the same scalar type.
278 /// \pre \p CarryOut and \p CarryIn must be generic virtual
279 /// registers with the same scalar type (typically s1)
281 /// \return The newly created instruction.
282 MachineInstrBuilder buildUAdde(unsigned Res, unsigned CarryOut, unsigned Op0,
283 unsigned Op1, unsigned CarryIn);
285 /// Build and insert \p Res<def> = G_AND \p Op0, \p Op1
287 /// G_AND sets \p Res to the bitwise and of integer parameters \p Op0 and \p
290 /// \pre setBasicBlock or setMI must have been called.
291 /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
292 /// with the same (scalar or vector) type).
294 /// \return a MachineInstrBuilder for the newly created instruction.
295 MachineInstrBuilder buildAnd(unsigned Res, unsigned Op0,
298 /// Build and insert \p Res<def> = G_ANYEXT \p Op0
300 /// G_ANYEXT produces a register of the specified width, with bits 0 to
301 /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are unspecified
302 /// (i.e. this is neither zero nor sign-extension). For a vector register,
303 /// each element is extended individually.
305 /// \pre setBasicBlock or setMI must have been called.
306 /// \pre \p Res must be a generic virtual register with scalar or vector type.
307 /// \pre \p Op must be a generic virtual register with scalar or vector type.
308 /// \pre \p Op must be smaller than \p Res
310 /// \return The newly created instruction.
311 MachineInstrBuilder buildAnyExt(unsigned Res, unsigned Op);
313 /// Build and insert \p Res<def> = G_SEXT \p Op
315 /// G_SEXT produces a register of the specified width, with bits 0 to
316 /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are duplicated from the
317 /// high bit of \p Op (i.e. 2s-complement sign extended).
319 /// \pre setBasicBlock or setMI must have been called.
320 /// \pre \p Res must be a generic virtual register with scalar or vector type.
321 /// \pre \p Op must be a generic virtual register with scalar or vector type.
322 /// \pre \p Op must be smaller than \p Res
324 /// \return The newly created instruction.
325 MachineInstrBuilder buildSExt(unsigned Res, unsigned Op);
327 /// Build and insert \p Res<def> = G_ZEXT \p Op
329 /// G_ZEXT produces a register of the specified width, with bits 0 to
330 /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are 0. For a vector
331 /// register, each element is extended individually.
333 /// \pre setBasicBlock or setMI must have been called.
334 /// \pre \p Res must be a generic virtual register with scalar or vector type.
335 /// \pre \p Op must be a generic virtual register with scalar or vector type.
336 /// \pre \p Op must be smaller than \p Res
338 /// \return The newly created instruction.
339 MachineInstrBuilder buildZExt(unsigned Res, unsigned Op);
341 /// Build and insert \p Res<def> = G_SEXT \p Op, \p Res = G_TRUNC \p Op, or
342 /// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op.
344 /// \pre setBasicBlock or setMI must have been called.
345 /// \pre \p Res must be a generic virtual register with scalar or vector type.
346 /// \pre \p Op must be a generic virtual register with scalar or vector type.
348 /// \return The newly created instruction.
349 MachineInstrBuilder buildSExtOrTrunc(unsigned Res, unsigned Op);
351 /// Build and insert \p Res<def> = G_ZEXT \p Op, \p Res = G_TRUNC \p Op, or
352 /// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op.
354 /// \pre setBasicBlock or setMI must have been called.
355 /// \pre \p Res must be a generic virtual register with scalar or vector type.
356 /// \pre \p Op must be a generic virtual register with scalar or vector type.
358 /// \return The newly created instruction.
359 MachineInstrBuilder buildZExtOrTrunc(unsigned Res, unsigned Op);
361 /// Build and insert an appropriate cast between two registers of equal size.
362 MachineInstrBuilder buildCast(unsigned Dst, unsigned Src);
364 /// Build and insert G_BR \p Dest
366 /// G_BR is an unconditional branch to \p Dest.
368 /// \pre setBasicBlock or setMI must have been called.
370 /// \return a MachineInstrBuilder for the newly created instruction.
371 MachineInstrBuilder buildBr(MachineBasicBlock &BB);
373 /// Build and insert G_BRCOND \p Tst, \p Dest
375 /// G_BRCOND is a conditional branch to \p Dest.
377 /// \pre setBasicBlock or setMI must have been called.
378 /// \pre \p Tst must be a generic virtual register with scalar
379 /// type. At the beginning of legalization, this will be a single
380 /// bit (s1). Targets with interesting flags registers may change
381 /// this. For a wider type, whether the branch is taken must only
382 /// depend on bit 0 (for now).
384 /// \return The newly created instruction.
385 MachineInstrBuilder buildBrCond(unsigned Tst, MachineBasicBlock &BB);
387 /// Build and insert G_BRINDIRECT \p Tgt
389 /// G_BRINDIRECT is an indirect branch to \p Tgt.
391 /// \pre setBasicBlock or setMI must have been called.
392 /// \pre \p Tgt must be a generic virtual register with pointer type.
394 /// \return a MachineInstrBuilder for the newly created instruction.
395 MachineInstrBuilder buildBrIndirect(unsigned Tgt);
397 /// Build and insert \p Res = G_CONSTANT \p Val
399 /// G_CONSTANT is an integer constant with the specified size and value. \p
400 /// Val will be extended or truncated to the size of \p Reg.
402 /// \pre setBasicBlock or setMI must have been called.
403 /// \pre \p Res must be a generic virtual register with scalar or pointer
406 /// \return The newly created instruction.
407 MachineInstrBuilder buildConstant(unsigned Res, const ConstantInt &Val);
409 /// Build and insert \p Res = G_CONSTANT \p Val
411 /// G_CONSTANT is an integer constant with the specified size and value.
413 /// \pre setBasicBlock or setMI must have been called.
414 /// \pre \p Res must be a generic virtual register with scalar type.
416 /// \return The newly created instruction.
417 MachineInstrBuilder buildConstant(unsigned Res, int64_t Val);
419 /// Build and insert \p Res = G_FCONSTANT \p Val
421 /// G_FCONSTANT is a floating-point constant with the specified size and
424 /// \pre setBasicBlock or setMI must have been called.
425 /// \pre \p Res must be a generic virtual register with scalar type.
427 /// \return The newly created instruction.
428 MachineInstrBuilder buildFConstant(unsigned Res, const ConstantFP &Val);
430 /// Build and insert \p Res<def> = COPY Op
432 /// Register-to-register COPY sets \p Res to \p Op.
434 /// \pre setBasicBlock or setMI must have been called.
436 /// \return a MachineInstrBuilder for the newly created instruction.
437 MachineInstrBuilder buildCopy(unsigned Res, unsigned Op);
439 /// Build and insert `Res<def> = G_LOAD Addr, MMO`.
441 /// Loads the value stored at \p Addr. Puts the result in \p Res.
443 /// \pre setBasicBlock or setMI must have been called.
444 /// \pre \p Res must be a generic virtual register.
445 /// \pre \p Addr must be a generic virtual register with pointer type.
447 /// \return a MachineInstrBuilder for the newly created instruction.
448 MachineInstrBuilder buildLoad(unsigned Res, unsigned Addr,
449 MachineMemOperand &MMO);
451 /// Build and insert `G_STORE Val, Addr, MMO`.
453 /// Stores the value \p Val to \p Addr.
455 /// \pre setBasicBlock or setMI must have been called.
456 /// \pre \p Val must be a generic virtual register.
457 /// \pre \p Addr must be a generic virtual register with pointer type.
459 /// \return a MachineInstrBuilder for the newly created instruction.
460 MachineInstrBuilder buildStore(unsigned Val, unsigned Addr,
461 MachineMemOperand &MMO);
463 /// Build and insert `Res0<def>, ... = G_EXTRACT Src, Idx0`.
465 /// \pre setBasicBlock or setMI must have been called.
466 /// \pre \p Res and \p Src must be generic virtual registers.
468 /// \return a MachineInstrBuilder for the newly created instruction.
469 MachineInstrBuilder buildExtract(unsigned Res, unsigned Src, uint64_t Index);
471 /// Build and insert \p Res = IMPLICIT_DEF.
472 MachineInstrBuilder buildUndef(unsigned Dst);
474 /// Build and insert instructions to put \p Ops together at the specified p
475 /// Indices to form a larger register.
477 /// If the types of the input registers are uniform and cover the entirity of
478 /// \p Res then a G_MERGE_VALUES will be produced. Otherwise an IMPLICIT_DEF
479 /// followed by a sequence of G_INSERT instructions.
481 /// \pre setBasicBlock or setMI must have been called.
482 /// \pre The final element of the sequence must not extend past the end of the
483 /// destination register.
484 /// \pre The bits defined by each Op (derived from index and scalar size) must
486 /// \pre \p Indices must be in ascending order of bit position.
487 void buildSequence(unsigned Res, ArrayRef<unsigned> Ops,
488 ArrayRef<uint64_t> Indices);
490 /// Build and insert \p Res<def> = G_MERGE_VALUES \p Op0, ...
492 /// G_MERGE_VALUES combines the input elements contiguously into a larger
495 /// \pre setBasicBlock or setMI must have been called.
496 /// \pre The entire register \p Res (and no more) must be covered by the input
498 /// \pre The type of all \p Ops registers must be identical.
500 /// \return a MachineInstrBuilder for the newly created instruction.
501 MachineInstrBuilder buildMerge(unsigned Res, ArrayRef<unsigned> Ops);
503 /// Build and insert \p Res0<def>, ... = G_UNMERGE_VALUES \p Op
505 /// G_UNMERGE_VALUES splits contiguous bits of the input into multiple
507 /// \pre setBasicBlock or setMI must have been called.
508 /// \pre The entire register \p Res (and no more) must be covered by the input
510 /// \pre The type of all \p Res registers must be identical.
512 /// \return a MachineInstrBuilder for the newly created instruction.
513 MachineInstrBuilder buildUnmerge(ArrayRef<unsigned> Res, unsigned Op);
515 MachineInstrBuilder buildInsert(unsigned Res, unsigned Src,
516 unsigned Op, unsigned Index);
518 /// Build and insert either a G_INTRINSIC (if \p HasSideEffects is false) or
519 /// G_INTRINSIC_W_SIDE_EFFECTS instruction. Its first operand will be the
520 /// result register definition unless \p Reg is NoReg (== 0). The second
521 /// operand will be the intrinsic's ID.
523 /// Callers are expected to add the required definitions and uses afterwards.
525 /// \pre setBasicBlock or setMI must have been called.
527 /// \return a MachineInstrBuilder for the newly created instruction.
528 MachineInstrBuilder buildIntrinsic(Intrinsic::ID ID, unsigned Res,
529 bool HasSideEffects);
531 /// Build and insert \p Res<def> = G_FPTRUNC \p Op
533 /// G_FPTRUNC converts a floating-point value into one with a smaller type.
535 /// \pre setBasicBlock or setMI must have been called.
536 /// \pre \p Res must be a generic virtual register with scalar or vector type.
537 /// \pre \p Op must be a generic virtual register with scalar or vector type.
538 /// \pre \p Res must be smaller than \p Op
540 /// \return The newly created instruction.
541 MachineInstrBuilder buildFPTrunc(unsigned Res, unsigned Op);
543 /// Build and insert \p Res<def> = G_TRUNC \p Op
545 /// G_TRUNC extracts the low bits of a type. For a vector type each element is
546 /// truncated independently before being packed into the destination.
548 /// \pre setBasicBlock or setMI must have been called.
549 /// \pre \p Res must be a generic virtual register with scalar or vector type.
550 /// \pre \p Op must be a generic virtual register with scalar or vector type.
551 /// \pre \p Res must be smaller than \p Op
553 /// \return The newly created instruction.
554 MachineInstrBuilder buildTrunc(unsigned Res, unsigned Op);
556 /// Build and insert a \p Res = G_ICMP \p Pred, \p Op0, \p Op1
558 /// \pre setBasicBlock or setMI must have been called.
560 /// \pre \p Res must be a generic virtual register with scalar or
561 /// vector type. Typically this starts as s1 or <N x s1>.
562 /// \pre \p Op0 and Op1 must be generic virtual registers with the
563 /// same number of elements as \p Res. If \p Res is a scalar,
564 /// \p Op0 must be either a scalar or pointer.
565 /// \pre \p Pred must be an integer predicate.
567 /// \return a MachineInstrBuilder for the newly created instruction.
568 MachineInstrBuilder buildICmp(CmpInst::Predicate Pred,
569 unsigned Res, unsigned Op0, unsigned Op1);
571 /// Build and insert a \p Res = G_FCMP \p Pred\p Op0, \p Op1
573 /// \pre setBasicBlock or setMI must have been called.
575 /// \pre \p Res must be a generic virtual register with scalar or
576 /// vector type. Typically this starts as s1 or <N x s1>.
577 /// \pre \p Op0 and Op1 must be generic virtual registers with the
578 /// same number of elements as \p Res (or scalar, if \p Res is
580 /// \pre \p Pred must be a floating-point predicate.
582 /// \return a MachineInstrBuilder for the newly created instruction.
583 MachineInstrBuilder buildFCmp(CmpInst::Predicate Pred,
584 unsigned Res, unsigned Op0, unsigned Op1);
586 /// Build and insert a \p Res = G_SELECT \p Tst, \p Op0, \p Op1
588 /// \pre setBasicBlock or setMI must have been called.
589 /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
590 /// with the same type.
591 /// \pre \p Tst must be a generic virtual register with scalar, pointer or
592 /// vector type. If vector then it must have the same number of
593 /// elements as the other parameters.
595 /// \return a MachineInstrBuilder for the newly created instruction.
596 MachineInstrBuilder buildSelect(unsigned Res, unsigned Tst,
597 unsigned Op0, unsigned Op1);
599 /// Build and insert \p Res<def> = G_INSERT_VECTOR_ELT \p Val,
602 /// \pre setBasicBlock or setMI must have been called.
603 /// \pre \p Res and \p Val must be a generic virtual register
604 // with the same vector type.
605 /// \pre \p Elt and \p Idx must be a generic virtual register
606 /// with scalar type.
608 /// \return The newly created instruction.
609 MachineInstrBuilder buildInsertVectorElement(unsigned Res, unsigned Val,
610 unsigned Elt, unsigned Idx);
612 /// Build and insert \p Res<def> = G_EXTRACT_VECTOR_ELT \p Val, \p Idx
614 /// \pre setBasicBlock or setMI must have been called.
615 /// \pre \p Res must be a generic virtual register with scalar type.
616 /// \pre \p Val must be a generic virtual register with vector type.
617 /// \pre \p Idx must be a generic virtual register with scalar type.
619 /// \return The newly created instruction.
620 MachineInstrBuilder buildExtractVectorElement(unsigned Res, unsigned Val,
624 } // End namespace llvm.
625 #endif // LLVM_CODEGEN_GLOBALISEL_MACHINEIRBUILDER_H