1 //===-- llvm/CodeGen/GlobalISel/MachineIRBuilder.h - MIBuilder --*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 /// This file declares the MachineIRBuilder class.
11 /// This is a helper class to build MachineInstr.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_GLOBALISEL_MACHINEIRBUILDER_H
15 #define LLVM_CODEGEN_GLOBALISEL_MACHINEIRBUILDER_H
17 #include "llvm/CodeGen/GlobalISel/Types.h"
19 #include "llvm/CodeGen/LowLevelType.h"
20 #include "llvm/CodeGen/MachineBasicBlock.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/IR/Constants.h"
24 #include "llvm/IR/DebugLoc.h"
30 // Forward declarations.
31 class MachineFunction;
33 class TargetInstrInfo;
35 /// Helper class to build MachineInstr.
36 /// It keeps internally the insertion point and debug location for all
37 /// the new instructions we want to create.
38 /// This information can be modify via the related setters.
39 class MachineIRBuilder {
40 /// MachineFunction under construction.
42 /// Information used to access the description of the opcodes.
43 const TargetInstrInfo *TII;
44 /// Information used to verify types are consistent and to create virtual registers.
45 MachineRegisterInfo *MRI;
46 /// Debug location to be set to any instruction we create.
49 /// \name Fields describing the insertion point.
51 MachineBasicBlock *MBB;
52 MachineBasicBlock::iterator II;
55 std::function<void(MachineInstr *)> InsertedInstr;
57 const TargetInstrInfo &getTII() {
58 assert(TII && "TargetInstrInfo is not set");
62 void validateTruncExt(unsigned Dst, unsigned Src, bool IsExtend);
63 MachineInstrBuilder buildBinaryOp(unsigned Opcode, unsigned Res, unsigned Op0, unsigned Op1);
65 unsigned getDestFromArg(unsigned Reg) { return Reg; }
66 unsigned getDestFromArg(LLT Ty) {
67 return getMF().getRegInfo().createGenericVirtualRegister(Ty);
69 unsigned getDestFromArg(const TargetRegisterClass *RC) {
70 return getMF().getRegInfo().createVirtualRegister(RC);
73 unsigned getRegFromArg(unsigned Reg) { return Reg; }
75 unsigned getRegFromArg(const MachineInstrBuilder &MIB) {
76 return MIB->getOperand(0).getReg();
80 /// Getter for the function we currently build.
81 MachineFunction &getMF() {
82 assert(MF && "MachineFunction is not set");
86 /// Getter for the basic block we currently build.
87 MachineBasicBlock &getMBB() {
88 assert(MBB && "MachineBasicBlock is not set");
92 /// Current insertion point for new instructions.
93 MachineBasicBlock::iterator getInsertPt() {
97 /// Set the insertion point before the specified position.
98 /// \pre MBB must be in getMF().
99 /// \pre II must be a valid iterator in MBB.
100 void setInsertPt(MachineBasicBlock &MBB, MachineBasicBlock::iterator II);
103 /// \name Setters for the insertion point.
105 /// Set the MachineFunction where to build instructions.
106 void setMF(MachineFunction &);
108 /// Set the insertion point to the end of \p MBB.
109 /// \pre \p MBB must be contained by getMF().
110 void setMBB(MachineBasicBlock &MBB);
112 /// Set the insertion point to before MI.
113 /// \pre MI must be in getMF().
114 void setInstr(MachineInstr &MI);
117 /// \name Control where instructions we create are recorded (typically for
118 /// visiting again later during legalization).
120 void recordInsertions(std::function<void(MachineInstr *)> InsertedInstr);
121 void stopRecordingInsertions();
124 /// Set the debug location to \p DL for all the next build instructions.
125 void setDebugLoc(const DebugLoc &DL) { this->DL = DL; }
127 /// Get the current instruction's debug location.
128 DebugLoc getDebugLoc() { return DL; }
130 /// Build and insert <empty> = \p Opcode <empty>.
131 /// The insertion point is the one set by the last call of either
132 /// setBasicBlock or setMI.
134 /// \pre setBasicBlock or setMI must have been called.
136 /// \return a MachineInstrBuilder for the newly created instruction.
137 MachineInstrBuilder buildInstr(unsigned Opcode);
139 /// DAG like Generic method for building arbitrary instructions as above.
140 /// \Opc opcode for the instruction.
141 /// \Ty Either LLT/TargetRegisterClass/unsigned types for Dst
142 /// \Args Variadic list of uses of types(unsigned/MachineInstrBuilder)
143 /// Uses of type MachineInstrBuilder will perform
144 /// getOperand(0).getReg() to convert to register.
145 template <typename DstTy, typename... UseArgsTy>
146 MachineInstrBuilder buildInstr(unsigned Opc, DstTy &&Ty,
147 UseArgsTy &&... Args) {
148 auto MIB = buildInstr(Opc).addDef(getDestFromArg(Ty));
149 unsigned It[] = {(getRegFromArg(Args))...};
150 for (const auto &i : It)
155 /// Build but don't insert <empty> = \p Opcode <empty>.
157 /// \pre setMF, setBasicBlock or setMI must have been called.
159 /// \return a MachineInstrBuilder for the newly created instruction.
160 MachineInstrBuilder buildInstrNoInsert(unsigned Opcode);
162 /// Insert an existing instruction at the insertion point.
163 MachineInstrBuilder insertInstr(MachineInstrBuilder MIB);
165 /// Build and insert a DBG_VALUE instruction expressing the fact that the
166 /// associated \p Variable lives in \p Reg (suitably modified by \p Expr).
167 MachineInstrBuilder buildDirectDbgValue(unsigned Reg, const MDNode *Variable,
170 /// Build and insert a DBG_VALUE instruction expressing the fact that the
171 /// associated \p Variable lives in memory at \p Reg + \p Offset (suitably
172 /// modified by \p Expr).
173 MachineInstrBuilder buildIndirectDbgValue(unsigned Reg, unsigned Offset,
174 const MDNode *Variable,
176 /// Build and insert a DBG_VALUE instruction expressing the fact that the
177 /// associated \p Variable lives in the stack slot specified by \p FI
178 /// (suitably modified by \p Expr).
179 MachineInstrBuilder buildFIDbgValue(int FI, const MDNode *Variable,
182 /// Build and insert a DBG_VALUE instructions specifying that \p Variable is
183 /// given by \p C (suitably modified by \p Expr).
184 MachineInstrBuilder buildConstDbgValue(const Constant &C, unsigned Offset,
185 const MDNode *Variable,
188 /// Build and insert \p Res<def> = G_FRAME_INDEX \p Idx
190 /// G_FRAME_INDEX materializes the address of an alloca value or other
191 /// stack-based object.
193 /// \pre setBasicBlock or setMI must have been called.
194 /// \pre \p Res must be a generic virtual register with pointer type.
196 /// \return a MachineInstrBuilder for the newly created instruction.
197 MachineInstrBuilder buildFrameIndex(unsigned Res, int Idx);
199 /// Build and insert \p Res<def> = G_GLOBAL_VALUE \p GV
201 /// G_GLOBAL_VALUE materializes the address of the specified global
204 /// \pre setBasicBlock or setMI must have been called.
205 /// \pre \p Res must be a generic virtual register with pointer type
206 /// in the same address space as \p GV.
208 /// \return a MachineInstrBuilder for the newly created instruction.
209 MachineInstrBuilder buildGlobalValue(unsigned Res, const GlobalValue *GV);
211 /// Build and insert \p Res<def> = G_ADD \p Op0, \p Op1
213 /// G_ADD sets \p Res to the sum of integer parameters \p Op0 and \p Op1,
214 /// truncated to their width.
216 /// \pre setBasicBlock or setMI must have been called.
217 /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
218 /// with the same (scalar or vector) type).
220 /// \return a MachineInstrBuilder for the newly created instruction.
221 MachineInstrBuilder buildAdd(unsigned Res, unsigned Op0,
223 template <typename DstTy, typename... UseArgsTy>
224 MachineInstrBuilder buildAdd(DstTy &&Ty, UseArgsTy &&... UseArgs) {
225 unsigned Res = getDestFromArg(Ty);
226 return buildAdd(Res, (getRegFromArg(UseArgs))...);
229 /// Build and insert \p Res<def> = G_SUB \p Op0, \p Op1
231 /// G_SUB sets \p Res to the sum of integer parameters \p Op0 and \p Op1,
232 /// truncated to their width.
234 /// \pre setBasicBlock or setMI must have been called.
235 /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
236 /// with the same (scalar or vector) type).
238 /// \return a MachineInstrBuilder for the newly created instruction.
239 MachineInstrBuilder buildSub(unsigned Res, unsigned Op0,
242 /// Build and insert \p Res<def> = G_MUL \p Op0, \p Op1
244 /// G_MUL sets \p Res to the sum of integer parameters \p Op0 and \p Op1,
245 /// truncated to their width.
247 /// \pre setBasicBlock or setMI must have been called.
248 /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
249 /// with the same (scalar or vector) type).
251 /// \return a MachineInstrBuilder for the newly created instruction.
252 MachineInstrBuilder buildMul(unsigned Res, unsigned Op0,
255 /// Build and insert \p Res<def> = G_GEP \p Op0, \p Op1
257 /// G_GEP adds \p Op1 bytes to the pointer specified by \p Op0,
258 /// storing the resulting pointer in \p Res.
260 /// \pre setBasicBlock or setMI must have been called.
261 /// \pre \p Res and \p Op0 must be generic virtual registers with pointer
263 /// \pre \p Op1 must be a generic virtual register with scalar type.
265 /// \return a MachineInstrBuilder for the newly created instruction.
266 MachineInstrBuilder buildGEP(unsigned Res, unsigned Op0,
269 /// Materialize and insert \p Res<def> = G_GEP \p Op0, (G_CONSTANT \p Value)
271 /// G_GEP adds \p Value bytes to the pointer specified by \p Op0,
272 /// storing the resulting pointer in \p Res. If \p Value is zero then no
273 /// G_GEP or G_CONSTANT will be created and \pre Op0 will be assigned to
276 /// \pre setBasicBlock or setMI must have been called.
277 /// \pre \p Op0 must be a generic virtual register with pointer type.
278 /// \pre \p ValueTy must be a scalar type.
279 /// \pre \p Res must be 0. This is to detect confusion between
280 /// materializeGEP() and buildGEP().
281 /// \post \p Res will either be a new generic virtual register of the same
282 /// type as \p Op0 or \p Op0 itself.
284 /// \return a MachineInstrBuilder for the newly created instruction.
285 Optional<MachineInstrBuilder> materializeGEP(unsigned &Res, unsigned Op0,
289 /// Build and insert \p Res<def> = G_PTR_MASK \p Op0, \p NumBits
291 /// G_PTR_MASK clears the low bits of a pointer operand without destroying its
292 /// pointer properties. This has the effect of rounding the address *down* to
293 /// a specified alignment in bits.
295 /// \pre setBasicBlock or setMI must have been called.
296 /// \pre \p Res and \p Op0 must be generic virtual registers with pointer
298 /// \pre \p NumBits must be an integer representing the number of low bits to
299 /// be cleared in \p Op0.
301 /// \return a MachineInstrBuilder for the newly created instruction.
302 MachineInstrBuilder buildPtrMask(unsigned Res, unsigned Op0,
305 /// Build and insert \p Res<def>, \p CarryOut<def> = G_UADDE \p Op0,
306 /// \p Op1, \p CarryIn
308 /// G_UADDE sets \p Res to \p Op0 + \p Op1 + \p CarryIn (truncated to the bit
309 /// width) and sets \p CarryOut to 1 if the result overflowed in unsigned
312 /// \pre setBasicBlock or setMI must have been called.
313 /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
314 /// with the same scalar type.
315 /// \pre \p CarryOut and \p CarryIn must be generic virtual
316 /// registers with the same scalar type (typically s1)
318 /// \return The newly created instruction.
319 MachineInstrBuilder buildUAdde(unsigned Res, unsigned CarryOut, unsigned Op0,
320 unsigned Op1, unsigned CarryIn);
322 /// Build and insert \p Res<def> = G_AND \p Op0, \p Op1
324 /// G_AND sets \p Res to the bitwise and of integer parameters \p Op0 and \p
327 /// \pre setBasicBlock or setMI must have been called.
328 /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
329 /// with the same (scalar or vector) type).
331 /// \return a MachineInstrBuilder for the newly created instruction.
332 MachineInstrBuilder buildAnd(unsigned Res, unsigned Op0,
335 /// Build and insert \p Res<def> = G_OR \p Op0, \p Op1
337 /// G_OR sets \p Res to the bitwise or of integer parameters \p Op0 and \p
340 /// \pre setBasicBlock or setMI must have been called.
341 /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
342 /// with the same (scalar or vector) type).
344 /// \return a MachineInstrBuilder for the newly created instruction.
345 MachineInstrBuilder buildOr(unsigned Res, unsigned Op0, unsigned Op1);
347 /// Build and insert \p Res<def> = G_ANYEXT \p Op0
349 /// G_ANYEXT produces a register of the specified width, with bits 0 to
350 /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are unspecified
351 /// (i.e. this is neither zero nor sign-extension). For a vector register,
352 /// each element is extended individually.
354 /// \pre setBasicBlock or setMI must have been called.
355 /// \pre \p Res must be a generic virtual register with scalar or vector type.
356 /// \pre \p Op must be a generic virtual register with scalar or vector type.
357 /// \pre \p Op must be smaller than \p Res
359 /// \return The newly created instruction.
360 MachineInstrBuilder buildAnyExt(unsigned Res, unsigned Op);
362 /// Build and insert \p Res<def> = G_SEXT \p Op
364 /// G_SEXT produces a register of the specified width, with bits 0 to
365 /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are duplicated from the
366 /// high bit of \p Op (i.e. 2s-complement sign extended).
368 /// \pre setBasicBlock or setMI must have been called.
369 /// \pre \p Res must be a generic virtual register with scalar or vector type.
370 /// \pre \p Op must be a generic virtual register with scalar or vector type.
371 /// \pre \p Op must be smaller than \p Res
373 /// \return The newly created instruction.
374 MachineInstrBuilder buildSExt(unsigned Res, unsigned Op);
376 /// Build and insert \p Res<def> = G_ZEXT \p Op
378 /// G_ZEXT produces a register of the specified width, with bits 0 to
379 /// sizeof(\p Ty) * 8 set to \p Op. The remaining bits are 0. For a vector
380 /// register, each element is extended individually.
382 /// \pre setBasicBlock or setMI must have been called.
383 /// \pre \p Res must be a generic virtual register with scalar or vector type.
384 /// \pre \p Op must be a generic virtual register with scalar or vector type.
385 /// \pre \p Op must be smaller than \p Res
387 /// \return The newly created instruction.
388 MachineInstrBuilder buildZExt(unsigned Res, unsigned Op);
390 /// Build and insert \p Res<def> = G_SEXT \p Op, \p Res = G_TRUNC \p Op, or
391 /// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op.
393 /// \pre setBasicBlock or setMI must have been called.
394 /// \pre \p Res must be a generic virtual register with scalar or vector type.
395 /// \pre \p Op must be a generic virtual register with scalar or vector type.
397 /// \return The newly created instruction.
398 MachineInstrBuilder buildSExtOrTrunc(unsigned Res, unsigned Op);
400 /// Build and insert \p Res<def> = G_ZEXT \p Op, \p Res = G_TRUNC \p Op, or
401 /// \p Res = COPY \p Op depending on the differing sizes of \p Res and \p Op.
403 /// \pre setBasicBlock or setMI must have been called.
404 /// \pre \p Res must be a generic virtual register with scalar or vector type.
405 /// \pre \p Op must be a generic virtual register with scalar or vector type.
407 /// \return The newly created instruction.
408 MachineInstrBuilder buildZExtOrTrunc(unsigned Res, unsigned Op);
410 /// Build and insert an appropriate cast between two registers of equal size.
411 MachineInstrBuilder buildCast(unsigned Dst, unsigned Src);
413 /// Build and insert G_BR \p Dest
415 /// G_BR is an unconditional branch to \p Dest.
417 /// \pre setBasicBlock or setMI must have been called.
419 /// \return a MachineInstrBuilder for the newly created instruction.
420 MachineInstrBuilder buildBr(MachineBasicBlock &BB);
422 /// Build and insert G_BRCOND \p Tst, \p Dest
424 /// G_BRCOND is a conditional branch to \p Dest.
426 /// \pre setBasicBlock or setMI must have been called.
427 /// \pre \p Tst must be a generic virtual register with scalar
428 /// type. At the beginning of legalization, this will be a single
429 /// bit (s1). Targets with interesting flags registers may change
430 /// this. For a wider type, whether the branch is taken must only
431 /// depend on bit 0 (for now).
433 /// \return The newly created instruction.
434 MachineInstrBuilder buildBrCond(unsigned Tst, MachineBasicBlock &BB);
436 /// Build and insert G_BRINDIRECT \p Tgt
438 /// G_BRINDIRECT is an indirect branch to \p Tgt.
440 /// \pre setBasicBlock or setMI must have been called.
441 /// \pre \p Tgt must be a generic virtual register with pointer type.
443 /// \return a MachineInstrBuilder for the newly created instruction.
444 MachineInstrBuilder buildBrIndirect(unsigned Tgt);
446 /// Build and insert \p Res = G_CONSTANT \p Val
448 /// G_CONSTANT is an integer constant with the specified size and value. \p
449 /// Val will be extended or truncated to the size of \p Reg.
451 /// \pre setBasicBlock or setMI must have been called.
452 /// \pre \p Res must be a generic virtual register with scalar or pointer
455 /// \return The newly created instruction.
456 MachineInstrBuilder buildConstant(unsigned Res, const ConstantInt &Val);
458 /// Build and insert \p Res = G_CONSTANT \p Val
460 /// G_CONSTANT is an integer constant with the specified size and value.
462 /// \pre setBasicBlock or setMI must have been called.
463 /// \pre \p Res must be a generic virtual register with scalar type.
465 /// \return The newly created instruction.
466 MachineInstrBuilder buildConstant(unsigned Res, int64_t Val);
468 template <typename DstType>
469 MachineInstrBuilder buildConstant(DstType &&Res, int64_t Val) {
470 return buildConstant(getDestFromArg(Res), Val);
472 /// Build and insert \p Res = G_FCONSTANT \p Val
474 /// G_FCONSTANT is a floating-point constant with the specified size and
477 /// \pre setBasicBlock or setMI must have been called.
478 /// \pre \p Res must be a generic virtual register with scalar type.
480 /// \return The newly created instruction.
481 MachineInstrBuilder buildFConstant(unsigned Res, const ConstantFP &Val);
483 /// Build and insert \p Res<def> = COPY Op
485 /// Register-to-register COPY sets \p Res to \p Op.
487 /// \pre setBasicBlock or setMI must have been called.
489 /// \return a MachineInstrBuilder for the newly created instruction.
490 MachineInstrBuilder buildCopy(unsigned Res, unsigned Op);
492 /// Build and insert `Res<def> = G_LOAD Addr, MMO`.
494 /// Loads the value stored at \p Addr. Puts the result in \p Res.
496 /// \pre setBasicBlock or setMI must have been called.
497 /// \pre \p Res must be a generic virtual register.
498 /// \pre \p Addr must be a generic virtual register with pointer type.
500 /// \return a MachineInstrBuilder for the newly created instruction.
501 MachineInstrBuilder buildLoad(unsigned Res, unsigned Addr,
502 MachineMemOperand &MMO);
504 /// Build and insert `G_STORE Val, Addr, MMO`.
506 /// Stores the value \p Val to \p Addr.
508 /// \pre setBasicBlock or setMI must have been called.
509 /// \pre \p Val must be a generic virtual register.
510 /// \pre \p Addr must be a generic virtual register with pointer type.
512 /// \return a MachineInstrBuilder for the newly created instruction.
513 MachineInstrBuilder buildStore(unsigned Val, unsigned Addr,
514 MachineMemOperand &MMO);
516 /// Build and insert `Res0<def>, ... = G_EXTRACT Src, Idx0`.
518 /// \pre setBasicBlock or setMI must have been called.
519 /// \pre \p Res and \p Src must be generic virtual registers.
521 /// \return a MachineInstrBuilder for the newly created instruction.
522 MachineInstrBuilder buildExtract(unsigned Res, unsigned Src, uint64_t Index);
524 /// Build and insert \p Res = IMPLICIT_DEF.
525 MachineInstrBuilder buildUndef(unsigned Dst);
527 /// Build and insert instructions to put \p Ops together at the specified p
528 /// Indices to form a larger register.
530 /// If the types of the input registers are uniform and cover the entirity of
531 /// \p Res then a G_MERGE_VALUES will be produced. Otherwise an IMPLICIT_DEF
532 /// followed by a sequence of G_INSERT instructions.
534 /// \pre setBasicBlock or setMI must have been called.
535 /// \pre The final element of the sequence must not extend past the end of the
536 /// destination register.
537 /// \pre The bits defined by each Op (derived from index and scalar size) must
539 /// \pre \p Indices must be in ascending order of bit position.
540 void buildSequence(unsigned Res, ArrayRef<unsigned> Ops,
541 ArrayRef<uint64_t> Indices);
543 /// Build and insert \p Res<def> = G_MERGE_VALUES \p Op0, ...
545 /// G_MERGE_VALUES combines the input elements contiguously into a larger
548 /// \pre setBasicBlock or setMI must have been called.
549 /// \pre The entire register \p Res (and no more) must be covered by the input
551 /// \pre The type of all \p Ops registers must be identical.
553 /// \return a MachineInstrBuilder for the newly created instruction.
554 MachineInstrBuilder buildMerge(unsigned Res, ArrayRef<unsigned> Ops);
556 /// Build and insert \p Res0<def>, ... = G_UNMERGE_VALUES \p Op
558 /// G_UNMERGE_VALUES splits contiguous bits of the input into multiple
560 /// \pre setBasicBlock or setMI must have been called.
561 /// \pre The entire register \p Res (and no more) must be covered by the input
563 /// \pre The type of all \p Res registers must be identical.
565 /// \return a MachineInstrBuilder for the newly created instruction.
566 MachineInstrBuilder buildUnmerge(ArrayRef<unsigned> Res, unsigned Op);
568 MachineInstrBuilder buildInsert(unsigned Res, unsigned Src,
569 unsigned Op, unsigned Index);
571 /// Build and insert either a G_INTRINSIC (if \p HasSideEffects is false) or
572 /// G_INTRINSIC_W_SIDE_EFFECTS instruction. Its first operand will be the
573 /// result register definition unless \p Reg is NoReg (== 0). The second
574 /// operand will be the intrinsic's ID.
576 /// Callers are expected to add the required definitions and uses afterwards.
578 /// \pre setBasicBlock or setMI must have been called.
580 /// \return a MachineInstrBuilder for the newly created instruction.
581 MachineInstrBuilder buildIntrinsic(Intrinsic::ID ID, unsigned Res,
582 bool HasSideEffects);
584 /// Build and insert \p Res<def> = G_FPTRUNC \p Op
586 /// G_FPTRUNC converts a floating-point value into one with a smaller type.
588 /// \pre setBasicBlock or setMI must have been called.
589 /// \pre \p Res must be a generic virtual register with scalar or vector type.
590 /// \pre \p Op must be a generic virtual register with scalar or vector type.
591 /// \pre \p Res must be smaller than \p Op
593 /// \return The newly created instruction.
594 MachineInstrBuilder buildFPTrunc(unsigned Res, unsigned Op);
596 /// Build and insert \p Res<def> = G_TRUNC \p Op
598 /// G_TRUNC extracts the low bits of a type. For a vector type each element is
599 /// truncated independently before being packed into the destination.
601 /// \pre setBasicBlock or setMI must have been called.
602 /// \pre \p Res must be a generic virtual register with scalar or vector type.
603 /// \pre \p Op must be a generic virtual register with scalar or vector type.
604 /// \pre \p Res must be smaller than \p Op
606 /// \return The newly created instruction.
607 MachineInstrBuilder buildTrunc(unsigned Res, unsigned Op);
609 /// Build and insert a \p Res = G_ICMP \p Pred, \p Op0, \p Op1
611 /// \pre setBasicBlock or setMI must have been called.
613 /// \pre \p Res must be a generic virtual register with scalar or
614 /// vector type. Typically this starts as s1 or <N x s1>.
615 /// \pre \p Op0 and Op1 must be generic virtual registers with the
616 /// same number of elements as \p Res. If \p Res is a scalar,
617 /// \p Op0 must be either a scalar or pointer.
618 /// \pre \p Pred must be an integer predicate.
620 /// \return a MachineInstrBuilder for the newly created instruction.
621 MachineInstrBuilder buildICmp(CmpInst::Predicate Pred,
622 unsigned Res, unsigned Op0, unsigned Op1);
624 /// Build and insert a \p Res = G_FCMP \p Pred\p Op0, \p Op1
626 /// \pre setBasicBlock or setMI must have been called.
628 /// \pre \p Res must be a generic virtual register with scalar or
629 /// vector type. Typically this starts as s1 or <N x s1>.
630 /// \pre \p Op0 and Op1 must be generic virtual registers with the
631 /// same number of elements as \p Res (or scalar, if \p Res is
633 /// \pre \p Pred must be a floating-point predicate.
635 /// \return a MachineInstrBuilder for the newly created instruction.
636 MachineInstrBuilder buildFCmp(CmpInst::Predicate Pred,
637 unsigned Res, unsigned Op0, unsigned Op1);
639 /// Build and insert a \p Res = G_SELECT \p Tst, \p Op0, \p Op1
641 /// \pre setBasicBlock or setMI must have been called.
642 /// \pre \p Res, \p Op0 and \p Op1 must be generic virtual registers
643 /// with the same type.
644 /// \pre \p Tst must be a generic virtual register with scalar, pointer or
645 /// vector type. If vector then it must have the same number of
646 /// elements as the other parameters.
648 /// \return a MachineInstrBuilder for the newly created instruction.
649 MachineInstrBuilder buildSelect(unsigned Res, unsigned Tst,
650 unsigned Op0, unsigned Op1);
652 /// Build and insert \p Res<def> = G_INSERT_VECTOR_ELT \p Val,
655 /// \pre setBasicBlock or setMI must have been called.
656 /// \pre \p Res and \p Val must be a generic virtual register
657 // with the same vector type.
658 /// \pre \p Elt and \p Idx must be a generic virtual register
659 /// with scalar type.
661 /// \return The newly created instruction.
662 MachineInstrBuilder buildInsertVectorElement(unsigned Res, unsigned Val,
663 unsigned Elt, unsigned Idx);
665 /// Build and insert \p Res<def> = G_EXTRACT_VECTOR_ELT \p Val, \p Idx
667 /// \pre setBasicBlock or setMI must have been called.
668 /// \pre \p Res must be a generic virtual register with scalar type.
669 /// \pre \p Val must be a generic virtual register with vector type.
670 /// \pre \p Idx must be a generic virtual register with scalar type.
672 /// \return The newly created instruction.
673 MachineInstrBuilder buildExtractVectorElement(unsigned Res, unsigned Val,
677 } // End namespace llvm.
678 #endif // LLVM_CODEGEN_GLOBALISEL_MACHINEIRBUILDER_H