1 //===---- LiveRangeEdit.h - Basic tools for split and spill -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // The LiveRangeEdit class represents changes done to a virtual register when it
11 // is spilled or split.
13 // The parent register is never changed. Instead, a number of new virtual
14 // registers are created and added to the newRegs vector.
16 //===----------------------------------------------------------------------===//
18 #ifndef LLVM_CODEGEN_LIVERANGEEDIT_H
19 #define LLVM_CODEGEN_LIVERANGEEDIT_H
21 #include "llvm/ADT/ArrayRef.h"
22 #include "llvm/ADT/SetVector.h"
23 #include "llvm/ADT/SmallPtrSet.h"
24 #include "llvm/Analysis/AliasAnalysis.h"
25 #include "llvm/CodeGen/LiveInterval.h"
26 #include "llvm/CodeGen/MachineRegisterInfo.h"
27 #include "llvm/Target/TargetMachine.h"
28 #include "llvm/Target/TargetSubtargetInfo.h"
33 class MachineBlockFrequencyInfo;
34 class MachineLoopInfo;
37 class LiveRangeEdit : private MachineRegisterInfo::Delegate {
39 /// Callback methods for LiveRangeEdit owners.
41 virtual void anchor();
43 /// Called immediately before erasing a dead machine instruction.
44 virtual void LRE_WillEraseInstruction(MachineInstr *MI) {}
46 /// Called when a virtual register is no longer used. Return false to defer
47 /// its deletion from LiveIntervals.
48 virtual bool LRE_CanEraseVirtReg(unsigned) { return true; }
50 /// Called before shrinking the live range of a virtual register.
51 virtual void LRE_WillShrinkVirtReg(unsigned) {}
53 /// Called after cloning a virtual register.
54 /// This is used for new registers representing connected components of Old.
55 virtual void LRE_DidCloneVirtReg(unsigned New, unsigned Old) {}
57 virtual ~Delegate() {}
62 SmallVectorImpl<unsigned> &NewRegs;
63 MachineRegisterInfo &MRI;
66 const TargetInstrInfo &TII;
67 Delegate *const TheDelegate;
69 /// FirstNew - Index of the first register added to NewRegs.
70 const unsigned FirstNew;
72 /// ScannedRemattable - true when remattable values have been identified.
73 bool ScannedRemattable;
75 /// DeadRemats - The saved instructions which have already been dead after
76 /// rematerialization but not deleted yet -- to be done in postOptimization.
77 SmallPtrSet<MachineInstr *, 32> *DeadRemats;
79 /// Remattable - Values defined by remattable instructions as identified by
80 /// tii.isTriviallyReMaterializable().
81 SmallPtrSet<const VNInfo*,4> Remattable;
83 /// Rematted - Values that were actually rematted, and so need to have their
84 /// live range trimmed or entirely removed.
85 SmallPtrSet<const VNInfo*,4> Rematted;
87 /// scanRemattable - Identify the Parent values that may rematerialize.
88 void scanRemattable(AliasAnalysis *aa);
90 /// allUsesAvailableAt - Return true if all registers used by OrigMI at
91 /// OrigIdx are also available with the same value at UseIdx.
92 bool allUsesAvailableAt(const MachineInstr *OrigMI, SlotIndex OrigIdx,
93 SlotIndex UseIdx) const;
95 /// foldAsLoad - If LI has a single use and a single def that can be folded as
96 /// a load, eliminate the register by folding the def into the use.
97 bool foldAsLoad(LiveInterval *LI, SmallVectorImpl<MachineInstr*> &Dead);
99 typedef SetVector<LiveInterval*,
100 SmallVector<LiveInterval*, 8>,
101 SmallPtrSet<LiveInterval*, 8> > ToShrinkSet;
102 /// Helper for eliminateDeadDefs.
103 void eliminateDeadDef(MachineInstr *MI, ToShrinkSet &ToShrink,
106 /// MachineRegisterInfo callback to notify when new virtual
107 /// registers are created.
108 void MRI_NoteNewVirtualRegister(unsigned VReg) override;
110 /// \brief Check if MachineOperand \p MO is a last use/kill either in the
111 /// main live range of \p LI or in one of the matching subregister ranges.
112 bool useIsKill(const LiveInterval &LI, const MachineOperand &MO) const;
115 /// Create a LiveRangeEdit for breaking down parent into smaller pieces.
116 /// @param parent The register being spilled or split.
117 /// @param newRegs List to receive any new registers created. This needn't be
118 /// empty initially, any existing registers are ignored.
119 /// @param MF The MachineFunction the live range edit is taking place in.
120 /// @param lis The collection of all live intervals in this function.
121 /// @param vrm Map of virtual registers to physical registers for this
122 /// function. If NULL, no virtual register map updates will
123 /// be done. This could be the case if called before Regalloc.
124 /// @param deadRemats The collection of all the instructions defining an
125 /// original reg and are dead after remat.
126 LiveRangeEdit(LiveInterval *parent, SmallVectorImpl<unsigned> &newRegs,
127 MachineFunction &MF, LiveIntervals &lis, VirtRegMap *vrm,
128 Delegate *delegate = nullptr,
129 SmallPtrSet<MachineInstr *, 32> *deadRemats = nullptr)
130 : Parent(parent), NewRegs(newRegs), MRI(MF.getRegInfo()), LIS(lis),
131 VRM(vrm), TII(*MF.getSubtarget().getInstrInfo()), TheDelegate(delegate),
132 FirstNew(newRegs.size()), ScannedRemattable(false),
133 DeadRemats(deadRemats) {
134 MRI.setDelegate(this);
137 ~LiveRangeEdit() override { MRI.resetDelegate(this); }
139 LiveInterval &getParent() const {
140 assert(Parent && "No parent LiveInterval");
143 unsigned getReg() const { return getParent().reg; }
145 /// Iterator for accessing the new registers added by this edit.
146 typedef SmallVectorImpl<unsigned>::const_iterator iterator;
147 iterator begin() const { return NewRegs.begin()+FirstNew; }
148 iterator end() const { return NewRegs.end(); }
149 unsigned size() const { return NewRegs.size()-FirstNew; }
150 bool empty() const { return size() == 0; }
151 unsigned get(unsigned idx) const { return NewRegs[idx+FirstNew]; }
153 /// pop_back - It allows LiveRangeEdit users to drop new registers.
154 /// The context is when an original def instruction of a register is
155 /// dead after rematerialization, we still want to keep it for following
156 /// rematerializations. We save the def instruction in DeadRemats,
157 /// and replace the original dst register with a new dummy register so
158 /// the live range of original dst register can be shrinked normally.
159 /// We don't want to allocate phys register for the dummy register, so
160 /// we want to drop it from the NewRegs set.
161 void pop_back() { NewRegs.pop_back(); }
163 ArrayRef<unsigned> regs() const {
164 return makeArrayRef(NewRegs).slice(FirstNew);
167 /// createEmptyIntervalFrom - Create a new empty interval based on OldReg.
168 LiveInterval &createEmptyIntervalFrom(unsigned OldReg);
170 /// createFrom - Create a new virtual register based on OldReg.
171 unsigned createFrom(unsigned OldReg);
173 /// create - Create a new register with the same class and original slot as
175 LiveInterval &createEmptyInterval() {
176 return createEmptyIntervalFrom(getReg());
180 return createFrom(getReg());
183 /// anyRematerializable - Return true if any parent values may be
184 /// rematerializable.
185 /// This function must be called before any rematerialization is attempted.
186 bool anyRematerializable(AliasAnalysis*);
188 /// checkRematerializable - Manually add VNI to the list of rematerializable
189 /// values if DefMI may be rematerializable.
190 bool checkRematerializable(VNInfo *VNI, const MachineInstr *DefMI,
193 /// Remat - Information needed to rematerialize at a specific location.
195 VNInfo *ParentVNI; // parent_'s value at the remat location.
196 MachineInstr *OrigMI; // Instruction defining OrigVNI. It contains the
197 // real expr for remat.
198 explicit Remat(VNInfo *ParentVNI) : ParentVNI(ParentVNI), OrigMI(nullptr) {}
201 /// canRematerializeAt - Determine if ParentVNI can be rematerialized at
202 /// UseIdx. It is assumed that parent_.getVNINfoAt(UseIdx) == ParentVNI.
203 /// When cheapAsAMove is set, only cheap remats are allowed.
204 bool canRematerializeAt(Remat &RM, VNInfo *OrigVNI, SlotIndex UseIdx,
207 /// rematerializeAt - Rematerialize RM.ParentVNI into DestReg by inserting an
208 /// instruction into MBB before MI. The new instruction is mapped, but
209 /// liveness is not updated.
210 /// Return the SlotIndex of the new instruction.
211 SlotIndex rematerializeAt(MachineBasicBlock &MBB,
212 MachineBasicBlock::iterator MI,
215 const TargetRegisterInfo&,
218 /// markRematerialized - explicitly mark a value as rematerialized after doing
220 void markRematerialized(const VNInfo *ParentVNI) {
221 Rematted.insert(ParentVNI);
224 /// didRematerialize - Return true if ParentVNI was rematerialized anywhere.
225 bool didRematerialize(const VNInfo *ParentVNI) const {
226 return Rematted.count(ParentVNI);
229 void markDeadRemat(MachineInstr *inst) {
230 // DeadRemats is an optional field.
232 DeadRemats->insert(inst);
235 /// eraseVirtReg - Notify the delegate that Reg is no longer in use, and try
236 /// to erase it from LIS.
237 void eraseVirtReg(unsigned Reg);
239 /// eliminateDeadDefs - Try to delete machine instructions that are now dead
240 /// (allDefsAreDead returns true). This may cause live intervals to be trimmed
241 /// and further dead efs to be eliminated.
242 /// RegsBeingSpilled lists registers currently being spilled by the register
243 /// allocator. These registers should not be split into new intervals
244 /// as currently those new intervals are not guaranteed to spill.
245 void eliminateDeadDefs(SmallVectorImpl<MachineInstr *> &Dead,
246 ArrayRef<unsigned> RegsBeingSpilled = None,
247 AliasAnalysis *AA = nullptr);
249 /// calculateRegClassAndHint - Recompute register class and hint for each new
251 void calculateRegClassAndHint(MachineFunction&,
252 const MachineLoopInfo&,
253 const MachineBlockFrequencyInfo&);