1 //===- llvm/CodeGen/LiveRegUnits.h - Register Unit Set ----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// A set of register units. It is intended for register liveness tracking.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_LIVEREGUNITS_H
16 #define LLVM_CODEGEN_LIVEREGUNITS_H
18 #include "llvm/ADT/BitVector.h"
19 #include "llvm/MC/LaneBitmask.h"
20 #include "llvm/MC/MCRegisterInfo.h"
21 #include "llvm/Target/TargetRegisterInfo.h"
27 class MachineBasicBlock;
29 /// A set of register units used to track register liveness.
31 const TargetRegisterInfo *TRI = nullptr;
35 /// Constructs a new empty LiveRegUnits set.
36 LiveRegUnits() = default;
38 /// Constructs and initialize an empty LiveRegUnits set.
39 LiveRegUnits(const TargetRegisterInfo &TRI) {
43 /// Initialize and clear the set.
44 void init(const TargetRegisterInfo &TRI) {
47 Units.resize(TRI.getNumRegUnits());
51 void clear() { Units.reset(); }
53 /// Returns true if the set is empty.
54 bool empty() const { return Units.empty(); }
56 /// Adds register units covered by physical register \p Reg.
57 void addReg(unsigned Reg) {
58 for (MCRegUnitIterator Unit(Reg, TRI); Unit.isValid(); ++Unit)
62 /// \brief Adds register units covered by physical register \p Reg that are
63 /// part of the lanemask \p Mask.
64 void addRegMasked(unsigned Reg, LaneBitmask Mask) {
65 for (MCRegUnitMaskIterator Unit(Reg, TRI); Unit.isValid(); ++Unit) {
66 LaneBitmask UnitMask = (*Unit).second;
67 if (UnitMask.none() || (UnitMask & Mask).any())
68 Units.set((*Unit).first);
72 /// Removes all register units covered by physical register \p Reg.
73 void removeReg(unsigned Reg) {
74 for (MCRegUnitIterator Unit(Reg, TRI); Unit.isValid(); ++Unit)
78 /// Removes register units not preserved by the regmask \p RegMask.
79 /// The regmask has the same format as the one in the RegMask machine operand.
80 void removeRegsNotPreserved(const uint32_t *RegMask);
82 /// Adds register units not preserved by the regmask \p RegMask.
83 /// The regmask has the same format as the one in the RegMask machine operand.
84 void addRegsInMask(const uint32_t *RegMask);
86 /// Returns true if no part of physical register \p Reg is live.
87 bool available(unsigned Reg) const {
88 for (MCRegUnitIterator Unit(Reg, TRI); Unit.isValid(); ++Unit) {
89 if (Units.test(*Unit))
95 /// Updates liveness when stepping backwards over the instruction \p MI.
96 /// This removes all register units defined or clobbered in \p MI and then
97 /// adds the units used (as in use operands) in \p MI.
98 void stepBackward(const MachineInstr &MI);
100 /// Adds all register units used, defined or clobbered in \p MI.
101 /// This is useful when walking over a range of instruction to find registers
102 /// unused over the whole range.
103 void accumulate(const MachineInstr &MI);
105 /// Adds registers living out of block \p MBB.
106 /// Live out registers are the union of the live-in registers of the successor
107 /// blocks and pristine registers. Live out registers of the end block are the
108 /// callee saved registers.
109 void addLiveOuts(const MachineBasicBlock &MBB);
111 /// Adds registers living into block \p MBB.
112 void addLiveIns(const MachineBasicBlock &MBB);
114 /// Adds all register units marked in the bitvector \p RegUnits.
115 void addUnits(const BitVector &RegUnits) {
118 /// Removes all register units marked in the bitvector \p RegUnits.
119 void removeUnits(const BitVector &RegUnits) {
120 Units.reset(RegUnits);
122 /// Return the internal bitvector representation of the set.
123 const BitVector &getBitVector() const {
128 } // end namespace llvm
130 #endif // LLVM_CODEGEN_LIVEREGUNITS_H