1 //==- llvm/CodeGen/MachineMemOperand.h - MachineMemOperand class -*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineMemOperand class, which is a
11 // description of a memory reference. It is used to help track dependencies
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEMEMOPERAND_H
17 #define LLVM_CODEGEN_MACHINEMEMOPERAND_H
19 #include "llvm/ADT/BitmaskEnum.h"
20 #include "llvm/ADT/PointerUnion.h"
21 #include "llvm/CodeGen/PseudoSourceValue.h"
22 #include "llvm/IR/Instructions.h"
23 #include "llvm/IR/Metadata.h"
24 #include "llvm/IR/Value.h" // PointerLikeTypeTraits<Value*>
25 #include "llvm/Support/AtomicOrdering.h"
26 #include "llvm/Support/DataTypes.h"
30 class FoldingSetNodeID;
33 class MachineFunction;
34 class ModuleSlotTracker;
36 /// This class contains a discriminated union of information about pointers in
37 /// memory operands, relating them back to LLVM IR or to virtual locations (such
38 /// as frame indices) that are exposed during codegen.
39 struct MachinePointerInfo {
40 /// This is the IR pointer value for the access, or it is null if unknown.
41 /// If this is null, then the access is to a pointer in the default address
43 PointerUnion<const Value *, const PseudoSourceValue *> V;
45 /// Offset - This is an offset from the base Value*.
48 explicit MachinePointerInfo(const Value *v = nullptr, int64_t offset = 0)
49 : V(v), Offset(offset) {}
51 explicit MachinePointerInfo(const PseudoSourceValue *v,
53 : V(v), Offset(offset) {}
55 MachinePointerInfo getWithOffset(int64_t O) const {
56 if (V.isNull()) return MachinePointerInfo();
57 if (V.is<const Value*>())
58 return MachinePointerInfo(V.get<const Value*>(), Offset+O);
59 return MachinePointerInfo(V.get<const PseudoSourceValue*>(), Offset+O);
62 /// Return the LLVM IR address space number that this pointer points into.
63 unsigned getAddrSpace() const;
65 /// Return a MachinePointerInfo record that refers to the constant pool.
66 static MachinePointerInfo getConstantPool(MachineFunction &MF);
68 /// Return a MachinePointerInfo record that refers to the specified
70 static MachinePointerInfo getFixedStack(MachineFunction &MF, int FI,
73 /// Return a MachinePointerInfo record that refers to a jump table entry.
74 static MachinePointerInfo getJumpTable(MachineFunction &MF);
76 /// Return a MachinePointerInfo record that refers to a GOT entry.
77 static MachinePointerInfo getGOT(MachineFunction &MF);
79 /// Stack pointer relative access.
80 static MachinePointerInfo getStack(MachineFunction &MF, int64_t Offset);
84 //===----------------------------------------------------------------------===//
85 /// A description of a memory reference used in the backend.
86 /// Instead of holding a StoreInst or LoadInst, this class holds the address
87 /// Value of the reference along with a byte size and offset. This allows it
88 /// to describe lowered loads and stores. Also, the special PseudoSourceValue
89 /// objects can be used to represent loads and stores to memory locations
90 /// that aren't explicit in the regular LLVM IR.
92 class MachineMemOperand {
94 /// Flags values. These may be or'd together.
95 enum Flags : uint16_t {
98 /// The memory access reads data.
100 /// The memory access writes data.
102 /// The memory access is volatile.
103 MOVolatile = 1u << 2,
104 /// The memory access is non-temporal.
105 MONonTemporal = 1u << 3,
106 /// The memory access is dereferenceable (i.e., doesn't trap).
107 MODereferenceable = 1u << 4,
108 /// The memory access always returns the same value (or traps).
109 MOInvariant = 1u << 5,
111 // Reserved for use by target-specific passes.
112 MOTargetFlag1 = 1u << 6,
113 MOTargetFlag2 = 1u << 7,
114 MOTargetFlag3 = 1u << 8,
116 LLVM_MARK_AS_BITMASK_ENUM(/* LargestFlag = */ MOTargetFlag3)
120 /// Atomic information for this memory operation.
121 struct MachineAtomicInfo {
122 /// Synchronization scope for this memory operation.
123 unsigned SynchScope : 1; // enum SynchronizationScope
124 /// Atomic ordering requirements for this memory operation. For cmpxchg
125 /// atomic operations, atomic ordering requirements when store occurs.
126 unsigned Ordering : 4; // enum AtomicOrdering
127 /// For cmpxchg atomic operations, atomic ordering requirements when store
129 unsigned FailureOrdering : 4; // enum AtomicOrdering
132 MachinePointerInfo PtrInfo;
135 uint16_t BaseAlignLog2; // log_2(base_alignment) + 1
136 MachineAtomicInfo AtomicInfo;
138 const MDNode *Ranges;
141 /// Construct a MachineMemOperand object with the specified PtrInfo, flags,
142 /// size, and base alignment. For atomic operations the synchronization scope
143 /// and atomic ordering requirements must also be specified. For cmpxchg
144 /// atomic operations the atomic ordering requirements when store does not
145 /// occur must also be specified.
146 MachineMemOperand(MachinePointerInfo PtrInfo, Flags flags, uint64_t s,
147 unsigned base_alignment,
148 const AAMDNodes &AAInfo = AAMDNodes(),
149 const MDNode *Ranges = nullptr,
150 SynchronizationScope SynchScope = CrossThread,
151 AtomicOrdering Ordering = AtomicOrdering::NotAtomic,
152 AtomicOrdering FailureOrdering = AtomicOrdering::NotAtomic);
154 const MachinePointerInfo &getPointerInfo() const { return PtrInfo; }
156 /// Return the base address of the memory access. This may either be a normal
157 /// LLVM IR Value, or one of the special values used in CodeGen.
158 /// Special values are those obtained via
159 /// PseudoSourceValue::getFixedStack(int), PseudoSourceValue::getStack, and
160 /// other PseudoSourceValue member functions which return objects which stand
161 /// for frame/stack pointer relative references and other special references
162 /// which are not representable in the high-level IR.
163 const Value *getValue() const { return PtrInfo.V.dyn_cast<const Value*>(); }
165 const PseudoSourceValue *getPseudoValue() const {
166 return PtrInfo.V.dyn_cast<const PseudoSourceValue*>();
169 const void *getOpaqueValue() const { return PtrInfo.V.getOpaqueValue(); }
171 /// Return the raw flags of the source value, \see Flags.
172 Flags getFlags() const { return FlagVals; }
174 /// Bitwise OR the current flags with the given flags.
175 void setFlags(Flags f) { FlagVals |= f; }
177 /// For normal values, this is a byte offset added to the base address.
178 /// For PseudoSourceValue::FPRel values, this is the FrameIndex number.
179 int64_t getOffset() const { return PtrInfo.Offset; }
181 unsigned getAddrSpace() const { return PtrInfo.getAddrSpace(); }
183 /// Return the size in bytes of the memory reference.
184 uint64_t getSize() const { return Size; }
186 /// Return the minimum known alignment in bytes of the actual memory
188 uint64_t getAlignment() const;
190 /// Return the minimum known alignment in bytes of the base address, without
192 uint64_t getBaseAlignment() const { return (1u << BaseAlignLog2) >> 1; }
194 /// Return the AA tags for the memory reference.
195 AAMDNodes getAAInfo() const { return AAInfo; }
197 /// Return the range tag for the memory reference.
198 const MDNode *getRanges() const { return Ranges; }
200 /// Return the synchronization scope for this memory operation.
201 SynchronizationScope getSynchScope() const {
202 return static_cast<SynchronizationScope>(AtomicInfo.SynchScope);
205 /// Return the atomic ordering requirements for this memory operation. For
206 /// cmpxchg atomic operations, return the atomic ordering requirements when
208 AtomicOrdering getOrdering() const {
209 return static_cast<AtomicOrdering>(AtomicInfo.Ordering);
212 /// For cmpxchg atomic operations, return the atomic ordering requirements
213 /// when store does not occur.
214 AtomicOrdering getFailureOrdering() const {
215 return static_cast<AtomicOrdering>(AtomicInfo.FailureOrdering);
218 bool isLoad() const { return FlagVals & MOLoad; }
219 bool isStore() const { return FlagVals & MOStore; }
220 bool isVolatile() const { return FlagVals & MOVolatile; }
221 bool isNonTemporal() const { return FlagVals & MONonTemporal; }
222 bool isDereferenceable() const { return FlagVals & MODereferenceable; }
223 bool isInvariant() const { return FlagVals & MOInvariant; }
225 /// Returns true if this operation has an atomic ordering requirement of
226 /// unordered or higher, false otherwise.
227 bool isAtomic() const { return getOrdering() != AtomicOrdering::NotAtomic; }
229 /// Returns true if this memory operation doesn't have any ordering
230 /// constraints other than normal aliasing. Volatile and atomic memory
231 /// operations can't be reordered.
233 /// Currently, we don't model the difference between volatile and atomic
234 /// operations. They should retain their ordering relative to all memory
236 bool isUnordered() const { return !isVolatile(); }
238 /// Update this MachineMemOperand to reflect the alignment of MMO, if it has a
239 /// greater alignment. This must only be used when the new alignment applies
240 /// to all users of this MachineMemOperand.
241 void refineAlignment(const MachineMemOperand *MMO);
243 /// Change the SourceValue for this MachineMemOperand. This should only be
244 /// used when an object is being relocated and all references to it are being
246 void setValue(const Value *NewSV) { PtrInfo.V = NewSV; }
247 void setValue(const PseudoSourceValue *NewSV) { PtrInfo.V = NewSV; }
248 void setOffset(int64_t NewOffset) { PtrInfo.Offset = NewOffset; }
250 /// Profile - Gather unique data for the object.
252 void Profile(FoldingSetNodeID &ID) const;
254 /// Support for operator<<.
256 void print(raw_ostream &OS) const;
257 void print(raw_ostream &OS, ModuleSlotTracker &MST) const;
260 friend bool operator==(const MachineMemOperand &LHS,
261 const MachineMemOperand &RHS) {
262 return LHS.getValue() == RHS.getValue() &&
263 LHS.getPseudoValue() == RHS.getPseudoValue() &&
264 LHS.getSize() == RHS.getSize() &&
265 LHS.getOffset() == RHS.getOffset() &&
266 LHS.getFlags() == RHS.getFlags() &&
267 LHS.getAAInfo() == RHS.getAAInfo() &&
268 LHS.getRanges() == RHS.getRanges() &&
269 LHS.getAlignment() == RHS.getAlignment() &&
270 LHS.getAddrSpace() == RHS.getAddrSpace();
273 friend bool operator!=(const MachineMemOperand &LHS,
274 const MachineMemOperand &RHS) {
275 return !(LHS == RHS);
279 inline raw_ostream &operator<<(raw_ostream &OS, const MachineMemOperand &MRO) {
284 } // End llvm namespace