1 //===-- llvm/CodeGen/MachineOperand.h - MachineOperand class ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineOperand class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_MACHINEOPERAND_H
15 #define LLVM_CODEGEN_MACHINEOPERAND_H
17 #include "llvm/Support/DataTypes.h"
18 #include "llvm/IR/Intrinsics.h"
27 class MachineBasicBlock;
29 class MachineRegisterInfo;
31 class ModuleSlotTracker;
33 class TargetIntrinsicInfo;
34 class TargetRegisterInfo;
39 /// MachineOperand class - Representation of each machine instruction operand.
41 /// This class isn't a POD type because it has a private constructor, but its
42 /// destructor must be trivial. Functions like MachineInstr::addOperand(),
43 /// MachineRegisterInfo::moveOperands(), and MF::DeleteMachineInstr() depend on
44 /// not having to call the MachineOperand destructor.
46 class MachineOperand {
48 enum MachineOperandType : unsigned char {
49 MO_Register, ///< Register operand.
50 MO_Immediate, ///< Immediate operand
51 MO_CImmediate, ///< Immediate >64bit operand
52 MO_FPImmediate, ///< Floating-point immediate operand
53 MO_MachineBasicBlock, ///< MachineBasicBlock reference
54 MO_FrameIndex, ///< Abstract Stack Frame Index
55 MO_ConstantPoolIndex, ///< Address of indexed Constant in Constant Pool
56 MO_TargetIndex, ///< Target-dependent index+offset operand.
57 MO_JumpTableIndex, ///< Address of indexed Jump Table for switch
58 MO_ExternalSymbol, ///< Name of external global symbol
59 MO_GlobalAddress, ///< Address of a global value
60 MO_BlockAddress, ///< Address of a basic block
61 MO_RegisterMask, ///< Mask of preserved registers.
62 MO_RegisterLiveOut, ///< Mask of live-out registers.
63 MO_Metadata, ///< Metadata reference (for debug info)
64 MO_MCSymbol, ///< MCSymbol reference (for debug/eh info)
65 MO_CFIIndex, ///< MCCFIInstruction index.
66 MO_IntrinsicID, ///< Intrinsic ID for ISel
67 MO_Predicate, ///< Generic predicate for ISel
68 MO_Placeholder, ///< Placeholder for GlobalISel ComplexPattern result.
72 /// OpKind - Specify what kind of operand this is. This discriminates the
74 MachineOperandType OpKind : 8;
76 /// Subregister number for MO_Register. A value of 0 indicates the
77 /// MO_Register has no subReg.
79 /// For all other kinds of operands, this field holds target-specific flags.
80 unsigned SubReg_TargetFlags : 12;
82 /// TiedTo - Non-zero when this register operand is tied to another register
83 /// operand. The encoding of this field is described in the block comment
84 /// before MachineInstr::tieOperands().
85 unsigned char TiedTo : 4;
87 /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
90 /// IsDef - True if this is a def, false if this is a use of the register.
94 /// IsImp - True if this is an implicit def or use, false if it is explicit.
98 /// IsKill - True if this instruction is the last use of the register on this
99 /// path through the function. This is only valid on uses of registers.
102 /// IsDead - True if this register is never used by a subsequent instruction.
103 /// This is only valid on definitions of registers.
106 /// IsUndef - True if this register operand reads an "undef" value, i.e. the
107 /// read value doesn't matter. This flag can be set on both use and def
108 /// operands. On a sub-register def operand, it refers to the part of the
109 /// register that isn't written. On a full-register def operand, it is a
110 /// noop. See readsReg().
112 /// This is only valid on registers.
114 /// Note that an instruction may have multiple <undef> operands referring to
115 /// the same register. In that case, the instruction may depend on those
116 /// operands reading the same dont-care value. For example:
118 /// %vreg1<def> = XOR %vreg2<undef>, %vreg2<undef>
120 /// Any register can be used for %vreg2, and its value doesn't matter, but
121 /// the two operands must be the same register.
125 /// IsInternalRead - True if this operand reads a value that was defined
126 /// inside the same instruction or bundle. This flag can be set on both use
127 /// and def operands. On a sub-register def operand, it refers to the part
128 /// of the register that isn't written. On a full-register def operand, it
131 /// When this flag is set, the instruction bundle must contain at least one
132 /// other def of the register. If multiple instructions in the bundle define
133 /// the register, the meaning is target-defined.
134 bool IsInternalRead : 1;
136 /// IsEarlyClobber - True if this MO_Register 'def' operand is written to
137 /// by the MachineInstr before all input registers are read. This is used to
138 /// model the GCC inline asm '&' constraint modifier.
139 bool IsEarlyClobber : 1;
141 /// IsDebug - True if this MO_Register 'use' operand is in a debug pseudo,
142 /// not a real instruction. Such uses should be ignored during codegen.
145 /// SmallContents - This really should be part of the Contents union, but
146 /// lives out here so we can get a better packed struct.
147 /// MO_Register: Register number.
148 /// OffsetedInfo: Low bits of offset.
150 unsigned RegNo; // For MO_Register.
151 unsigned OffsetLo; // Matches Contents.OffsetedInfo.OffsetHi.
154 /// ParentMI - This is the instruction that this operand is embedded into.
155 /// This is valid for all operand types, when the operand is in an instr.
156 MachineInstr *ParentMI;
158 /// Contents union - This contains the payload for the various operand types.
160 MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
161 const ConstantFP *CFP; // For MO_FPImmediate.
162 const ConstantInt *CI; // For MO_CImmediate. Integers > 64bit.
163 int64_t ImmVal; // For MO_Immediate.
164 const uint32_t *RegMask; // For MO_RegisterMask and MO_RegisterLiveOut.
165 const MDNode *MD; // For MO_Metadata.
166 MCSymbol *Sym; // For MO_MCSymbol.
167 unsigned CFIIndex; // For MO_CFI.
168 Intrinsic::ID IntrinsicID; // For MO_IntrinsicID.
169 unsigned Pred; // For MO_Predicate
171 struct { // For MO_Register.
172 // Register number is in SmallContents.RegNo.
173 MachineOperand *Prev; // Access list for register. See MRI.
174 MachineOperand *Next;
177 /// OffsetedInfo - This struct contains the offset and an object identifier.
178 /// this represent the object as with an optional offset from it.
181 int Index; // For MO_*Index - The index itself.
182 const char *SymbolName; // For MO_ExternalSymbol.
183 const GlobalValue *GV; // For MO_GlobalAddress.
184 const BlockAddress *BA; // For MO_BlockAddress.
186 // Low bits of offset are in SmallContents.OffsetLo.
187 int OffsetHi; // An offset from the object, high 32 bits.
191 explicit MachineOperand(MachineOperandType K)
192 : OpKind(K), SubReg_TargetFlags(0), ParentMI(nullptr) {}
194 /// getType - Returns the MachineOperandType for this operand.
196 MachineOperandType getType() const { return (MachineOperandType)OpKind; }
198 unsigned getTargetFlags() const {
199 return isReg() ? 0 : SubReg_TargetFlags;
201 void setTargetFlags(unsigned F) {
202 assert(!isReg() && "Register operands can't have target flags");
203 SubReg_TargetFlags = F;
204 assert(SubReg_TargetFlags == F && "Target flags out of range");
206 void addTargetFlag(unsigned F) {
207 assert(!isReg() && "Register operands can't have target flags");
208 SubReg_TargetFlags |= F;
209 assert((SubReg_TargetFlags & F) && "Target flags out of range");
213 /// getParent - Return the instruction that this operand belongs to.
215 MachineInstr *getParent() { return ParentMI; }
216 const MachineInstr *getParent() const { return ParentMI; }
218 /// clearParent - Reset the parent pointer.
220 /// The MachineOperand copy constructor also copies ParentMI, expecting the
221 /// original to be deleted. If a MachineOperand is ever stored outside a
222 /// MachineInstr, the parent pointer must be cleared.
224 /// Never call clearParent() on an operand in a MachineInstr.
226 void clearParent() { ParentMI = nullptr; }
228 void print(raw_ostream &os, const TargetRegisterInfo *TRI = nullptr,
229 const TargetIntrinsicInfo *IntrinsicInfo = nullptr) const;
230 void print(raw_ostream &os, ModuleSlotTracker &MST,
231 const TargetRegisterInfo *TRI = nullptr,
232 const TargetIntrinsicInfo *IntrinsicInfo = nullptr) const;
235 //===--------------------------------------------------------------------===//
236 // Accessors that tell you what kind of MachineOperand you're looking at.
237 //===--------------------------------------------------------------------===//
239 /// isReg - Tests if this is a MO_Register operand.
240 bool isReg() const { return OpKind == MO_Register; }
241 /// isImm - Tests if this is a MO_Immediate operand.
242 bool isImm() const { return OpKind == MO_Immediate; }
243 /// isCImm - Test if this is a MO_CImmediate operand.
244 bool isCImm() const { return OpKind == MO_CImmediate; }
245 /// isFPImm - Tests if this is a MO_FPImmediate operand.
246 bool isFPImm() const { return OpKind == MO_FPImmediate; }
247 /// isMBB - Tests if this is a MO_MachineBasicBlock operand.
248 bool isMBB() const { return OpKind == MO_MachineBasicBlock; }
249 /// isFI - Tests if this is a MO_FrameIndex operand.
250 bool isFI() const { return OpKind == MO_FrameIndex; }
251 /// isCPI - Tests if this is a MO_ConstantPoolIndex operand.
252 bool isCPI() const { return OpKind == MO_ConstantPoolIndex; }
253 /// isTargetIndex - Tests if this is a MO_TargetIndex operand.
254 bool isTargetIndex() const { return OpKind == MO_TargetIndex; }
255 /// isJTI - Tests if this is a MO_JumpTableIndex operand.
256 bool isJTI() const { return OpKind == MO_JumpTableIndex; }
257 /// isGlobal - Tests if this is a MO_GlobalAddress operand.
258 bool isGlobal() const { return OpKind == MO_GlobalAddress; }
259 /// isSymbol - Tests if this is a MO_ExternalSymbol operand.
260 bool isSymbol() const { return OpKind == MO_ExternalSymbol; }
261 /// isBlockAddress - Tests if this is a MO_BlockAddress operand.
262 bool isBlockAddress() const { return OpKind == MO_BlockAddress; }
263 /// isRegMask - Tests if this is a MO_RegisterMask operand.
264 bool isRegMask() const { return OpKind == MO_RegisterMask; }
265 /// isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand.
266 bool isRegLiveOut() const { return OpKind == MO_RegisterLiveOut; }
267 /// isMetadata - Tests if this is a MO_Metadata operand.
268 bool isMetadata() const { return OpKind == MO_Metadata; }
269 bool isMCSymbol() const { return OpKind == MO_MCSymbol; }
270 bool isCFIIndex() const { return OpKind == MO_CFIIndex; }
271 bool isIntrinsicID() const { return OpKind == MO_IntrinsicID; }
272 bool isPredicate() const { return OpKind == MO_Predicate; }
273 //===--------------------------------------------------------------------===//
274 // Accessors for Register Operands
275 //===--------------------------------------------------------------------===//
277 /// getReg - Returns the register number.
278 unsigned getReg() const {
279 assert(isReg() && "This is not a register operand!");
280 return SmallContents.RegNo;
283 unsigned getSubReg() const {
284 assert(isReg() && "Wrong MachineOperand accessor");
285 return SubReg_TargetFlags;
289 assert(isReg() && "Wrong MachineOperand accessor");
294 assert(isReg() && "Wrong MachineOperand accessor");
298 bool isImplicit() const {
299 assert(isReg() && "Wrong MachineOperand accessor");
303 bool isDead() const {
304 assert(isReg() && "Wrong MachineOperand accessor");
308 bool isKill() const {
309 assert(isReg() && "Wrong MachineOperand accessor");
313 bool isUndef() const {
314 assert(isReg() && "Wrong MachineOperand accessor");
318 bool isInternalRead() const {
319 assert(isReg() && "Wrong MachineOperand accessor");
320 return IsInternalRead;
323 bool isEarlyClobber() const {
324 assert(isReg() && "Wrong MachineOperand accessor");
325 return IsEarlyClobber;
328 bool isTied() const {
329 assert(isReg() && "Wrong MachineOperand accessor");
333 bool isDebug() const {
334 assert(isReg() && "Wrong MachineOperand accessor");
338 /// readsReg - Returns true if this operand reads the previous value of its
339 /// register. A use operand with the <undef> flag set doesn't read its
340 /// register. A sub-register def implicitly reads the other parts of the
341 /// register being redefined unless the <undef> flag is set.
343 /// This refers to reading the register value from before the current
344 /// instruction or bundle. Internal bundle reads are not included.
345 bool readsReg() const {
346 assert(isReg() && "Wrong MachineOperand accessor");
347 return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
350 //===--------------------------------------------------------------------===//
351 // Mutators for Register Operands
352 //===--------------------------------------------------------------------===//
354 /// Change the register this operand corresponds to.
356 void setReg(unsigned Reg);
358 void setSubReg(unsigned subReg) {
359 assert(isReg() && "Wrong MachineOperand mutator");
360 SubReg_TargetFlags = subReg;
361 assert(SubReg_TargetFlags == subReg && "SubReg out of range");
364 /// substVirtReg - Substitute the current register with the virtual
365 /// subregister Reg:SubReg. Take any existing SubReg index into account,
366 /// using TargetRegisterInfo to compose the subreg indices if necessary.
367 /// Reg must be a virtual register, SubIdx can be 0.
369 void substVirtReg(unsigned Reg, unsigned SubIdx, const TargetRegisterInfo&);
371 /// substPhysReg - Substitute the current register with the physical register
372 /// Reg, taking any existing SubReg into account. For instance,
373 /// substPhysReg(%EAX) will change %reg1024:sub_8bit to %AL.
375 void substPhysReg(unsigned Reg, const TargetRegisterInfo&);
377 void setIsUse(bool Val = true) { setIsDef(!Val); }
379 void setIsDef(bool Val = true);
381 void setImplicit(bool Val = true) {
382 assert(isReg() && "Wrong MachineOperand mutator");
386 void setIsKill(bool Val = true) {
387 assert(isReg() && !IsDef && "Wrong MachineOperand mutator");
388 assert((!Val || !isDebug()) && "Marking a debug operation as kill");
392 void setIsDead(bool Val = true) {
393 assert(isReg() && IsDef && "Wrong MachineOperand mutator");
397 void setIsUndef(bool Val = true) {
398 assert(isReg() && "Wrong MachineOperand mutator");
402 void setIsInternalRead(bool Val = true) {
403 assert(isReg() && "Wrong MachineOperand mutator");
404 IsInternalRead = Val;
407 void setIsEarlyClobber(bool Val = true) {
408 assert(isReg() && IsDef && "Wrong MachineOperand mutator");
409 IsEarlyClobber = Val;
412 void setIsDebug(bool Val = true) {
413 assert(isReg() && !IsDef && "Wrong MachineOperand mutator");
417 //===--------------------------------------------------------------------===//
418 // Accessors for various operand types.
419 //===--------------------------------------------------------------------===//
421 int64_t getImm() const {
422 assert(isImm() && "Wrong MachineOperand accessor");
423 return Contents.ImmVal;
426 const ConstantInt *getCImm() const {
427 assert(isCImm() && "Wrong MachineOperand accessor");
431 const ConstantFP *getFPImm() const {
432 assert(isFPImm() && "Wrong MachineOperand accessor");
436 MachineBasicBlock *getMBB() const {
437 assert(isMBB() && "Wrong MachineOperand accessor");
441 int getIndex() const {
442 assert((isFI() || isCPI() || isTargetIndex() || isJTI()) &&
443 "Wrong MachineOperand accessor");
444 return Contents.OffsetedInfo.Val.Index;
447 const GlobalValue *getGlobal() const {
448 assert(isGlobal() && "Wrong MachineOperand accessor");
449 return Contents.OffsetedInfo.Val.GV;
452 const BlockAddress *getBlockAddress() const {
453 assert(isBlockAddress() && "Wrong MachineOperand accessor");
454 return Contents.OffsetedInfo.Val.BA;
457 MCSymbol *getMCSymbol() const {
458 assert(isMCSymbol() && "Wrong MachineOperand accessor");
462 unsigned getCFIIndex() const {
463 assert(isCFIIndex() && "Wrong MachineOperand accessor");
464 return Contents.CFIIndex;
467 Intrinsic::ID getIntrinsicID() const {
468 assert(isIntrinsicID() && "Wrong MachineOperand accessor");
469 return Contents.IntrinsicID;
472 unsigned getPredicate() const {
473 assert(isPredicate() && "Wrong MachineOperand accessor");
474 return Contents.Pred;
477 /// Return the offset from the symbol in this operand. This always returns 0
478 /// for ExternalSymbol operands.
479 int64_t getOffset() const {
480 assert((isGlobal() || isSymbol() || isMCSymbol() || isCPI() ||
481 isTargetIndex() || isBlockAddress()) &&
482 "Wrong MachineOperand accessor");
483 return int64_t(uint64_t(Contents.OffsetedInfo.OffsetHi) << 32) |
484 SmallContents.OffsetLo;
487 const char *getSymbolName() const {
488 assert(isSymbol() && "Wrong MachineOperand accessor");
489 return Contents.OffsetedInfo.Val.SymbolName;
492 /// clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
493 /// It is sometimes necessary to detach the register mask pointer from its
494 /// machine operand. This static method can be used for such detached bit
496 static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg) {
497 // See TargetRegisterInfo.h.
498 assert(PhysReg < (1u << 30) && "Not a physical register");
499 return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32));
502 /// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
503 bool clobbersPhysReg(unsigned PhysReg) const {
504 return clobbersPhysReg(getRegMask(), PhysReg);
507 /// getRegMask - Returns a bit mask of registers preserved by this RegMask
509 const uint32_t *getRegMask() const {
510 assert(isRegMask() && "Wrong MachineOperand accessor");
511 return Contents.RegMask;
514 /// getRegLiveOut - Returns a bit mask of live-out registers.
515 const uint32_t *getRegLiveOut() const {
516 assert(isRegLiveOut() && "Wrong MachineOperand accessor");
517 return Contents.RegMask;
520 const MDNode *getMetadata() const {
521 assert(isMetadata() && "Wrong MachineOperand accessor");
525 //===--------------------------------------------------------------------===//
526 // Mutators for various operand types.
527 //===--------------------------------------------------------------------===//
529 void setImm(int64_t immVal) {
530 assert(isImm() && "Wrong MachineOperand mutator");
531 Contents.ImmVal = immVal;
534 void setFPImm(const ConstantFP *CFP) {
535 assert(isFPImm() && "Wrong MachineOperand mutator");
539 void setOffset(int64_t Offset) {
540 assert((isGlobal() || isSymbol() || isMCSymbol() || isCPI() ||
541 isTargetIndex() || isBlockAddress()) &&
542 "Wrong MachineOperand mutator");
543 SmallContents.OffsetLo = unsigned(Offset);
544 Contents.OffsetedInfo.OffsetHi = int(Offset >> 32);
547 void setIndex(int Idx) {
548 assert((isFI() || isCPI() || isTargetIndex() || isJTI()) &&
549 "Wrong MachineOperand mutator");
550 Contents.OffsetedInfo.Val.Index = Idx;
553 void setMBB(MachineBasicBlock *MBB) {
554 assert(isMBB() && "Wrong MachineOperand mutator");
558 /// Sets value of register mask operand referencing Mask. The
559 /// operand does not take ownership of the memory referenced by Mask, it must
560 /// remain valid for the lifetime of the operand. See CreateRegMask().
561 /// Any physreg with a 0 bit in the mask is clobbered by the instruction.
562 void setRegMask(const uint32_t *RegMaskPtr) {
563 assert(isRegMask() && "Wrong MachineOperand mutator");
564 Contents.RegMask = RegMaskPtr;
567 //===--------------------------------------------------------------------===//
569 //===--------------------------------------------------------------------===//
571 /// Returns true if this operand is identical to the specified operand except
572 /// for liveness related flags (isKill, isUndef and isDead).
573 bool isIdenticalTo(const MachineOperand &Other) const;
575 /// \brief MachineOperand hash_value overload.
577 /// Note that this includes the same information in the hash that
578 /// isIdenticalTo uses for comparison. It is thus suited for use in hash
579 /// tables which use that function for equality comparisons only.
580 friend hash_code hash_value(const MachineOperand &MO);
582 /// ChangeToImmediate - Replace this operand with a new immediate operand of
583 /// the specified value. If an operand is known to be an immediate already,
584 /// the setImm method should be used.
585 void ChangeToImmediate(int64_t ImmVal);
587 /// ChangeToFPImmediate - Replace this operand with a new FP immediate operand
588 /// of the specified value. If an operand is known to be an FP immediate
589 /// already, the setFPImm method should be used.
590 void ChangeToFPImmediate(const ConstantFP *FPImm);
592 /// ChangeToES - Replace this operand with a new external symbol operand.
593 void ChangeToES(const char *SymName, unsigned char TargetFlags = 0);
595 /// ChangeToMCSymbol - Replace this operand with a new MC symbol operand.
596 void ChangeToMCSymbol(MCSymbol *Sym);
598 /// Replace this operand with a frame index.
599 void ChangeToFrameIndex(int Idx);
601 /// ChangeToRegister - Replace this operand with a new register operand of
602 /// the specified value. If an operand is known to be an register already,
603 /// the setReg method should be used.
604 void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
605 bool isKill = false, bool isDead = false,
606 bool isUndef = false, bool isDebug = false);
608 //===--------------------------------------------------------------------===//
609 // Construction methods.
610 //===--------------------------------------------------------------------===//
612 static MachineOperand CreateImm(int64_t Val) {
613 MachineOperand Op(MachineOperand::MO_Immediate);
618 static MachineOperand CreateCImm(const ConstantInt *CI) {
619 MachineOperand Op(MachineOperand::MO_CImmediate);
624 static MachineOperand CreateFPImm(const ConstantFP *CFP) {
625 MachineOperand Op(MachineOperand::MO_FPImmediate);
626 Op.Contents.CFP = CFP;
630 static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false,
631 bool isKill = false, bool isDead = false,
632 bool isUndef = false,
633 bool isEarlyClobber = false,
635 bool isDebug = false,
636 bool isInternalRead = false) {
637 assert(!(isDead && !isDef) && "Dead flag on non-def");
638 assert(!(isKill && isDef) && "Kill flag on def");
639 MachineOperand Op(MachineOperand::MO_Register);
644 Op.IsUndef = isUndef;
645 Op.IsInternalRead = isInternalRead;
646 Op.IsEarlyClobber = isEarlyClobber;
648 Op.IsDebug = isDebug;
649 Op.SmallContents.RegNo = Reg;
650 Op.Contents.Reg.Prev = nullptr;
651 Op.Contents.Reg.Next = nullptr;
652 Op.setSubReg(SubReg);
655 static MachineOperand CreateMBB(MachineBasicBlock *MBB,
656 unsigned char TargetFlags = 0) {
657 MachineOperand Op(MachineOperand::MO_MachineBasicBlock);
659 Op.setTargetFlags(TargetFlags);
662 static MachineOperand CreateFI(int Idx) {
663 MachineOperand Op(MachineOperand::MO_FrameIndex);
667 static MachineOperand CreateCPI(unsigned Idx, int Offset,
668 unsigned char TargetFlags = 0) {
669 MachineOperand Op(MachineOperand::MO_ConstantPoolIndex);
671 Op.setOffset(Offset);
672 Op.setTargetFlags(TargetFlags);
675 static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset,
676 unsigned char TargetFlags = 0) {
677 MachineOperand Op(MachineOperand::MO_TargetIndex);
679 Op.setOffset(Offset);
680 Op.setTargetFlags(TargetFlags);
683 static MachineOperand CreateJTI(unsigned Idx,
684 unsigned char TargetFlags = 0) {
685 MachineOperand Op(MachineOperand::MO_JumpTableIndex);
687 Op.setTargetFlags(TargetFlags);
690 static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset,
691 unsigned char TargetFlags = 0) {
692 MachineOperand Op(MachineOperand::MO_GlobalAddress);
693 Op.Contents.OffsetedInfo.Val.GV = GV;
694 Op.setOffset(Offset);
695 Op.setTargetFlags(TargetFlags);
698 static MachineOperand CreateES(const char *SymName,
699 unsigned char TargetFlags = 0) {
700 MachineOperand Op(MachineOperand::MO_ExternalSymbol);
701 Op.Contents.OffsetedInfo.Val.SymbolName = SymName;
702 Op.setOffset(0); // Offset is always 0.
703 Op.setTargetFlags(TargetFlags);
706 static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset,
707 unsigned char TargetFlags = 0) {
708 MachineOperand Op(MachineOperand::MO_BlockAddress);
709 Op.Contents.OffsetedInfo.Val.BA = BA;
710 Op.setOffset(Offset);
711 Op.setTargetFlags(TargetFlags);
714 /// CreateRegMask - Creates a register mask operand referencing Mask. The
715 /// operand does not take ownership of the memory referenced by Mask, it must
716 /// remain valid for the lifetime of the operand.
718 /// A RegMask operand represents a set of non-clobbered physical registers on
719 /// an instruction that clobbers many registers, typically a call. The bit
720 /// mask has a bit set for each physreg that is preserved by this
721 /// instruction, as described in the documentation for
722 /// TargetRegisterInfo::getCallPreservedMask().
724 /// Any physreg with a 0 bit in the mask is clobbered by the instruction.
726 static MachineOperand CreateRegMask(const uint32_t *Mask) {
727 assert(Mask && "Missing register mask");
728 MachineOperand Op(MachineOperand::MO_RegisterMask);
729 Op.Contents.RegMask = Mask;
732 static MachineOperand CreateRegLiveOut(const uint32_t *Mask) {
733 assert(Mask && "Missing live-out register mask");
734 MachineOperand Op(MachineOperand::MO_RegisterLiveOut);
735 Op.Contents.RegMask = Mask;
738 static MachineOperand CreateMetadata(const MDNode *Meta) {
739 MachineOperand Op(MachineOperand::MO_Metadata);
740 Op.Contents.MD = Meta;
744 static MachineOperand CreateMCSymbol(MCSymbol *Sym,
745 unsigned char TargetFlags = 0) {
746 MachineOperand Op(MachineOperand::MO_MCSymbol);
747 Op.Contents.Sym = Sym;
749 Op.setTargetFlags(TargetFlags);
753 static MachineOperand CreateCFIIndex(unsigned CFIIndex) {
754 MachineOperand Op(MachineOperand::MO_CFIIndex);
755 Op.Contents.CFIIndex = CFIIndex;
759 static MachineOperand CreateIntrinsicID(Intrinsic::ID ID) {
760 MachineOperand Op(MachineOperand::MO_IntrinsicID);
761 Op.Contents.IntrinsicID = ID;
765 static MachineOperand CreatePredicate(unsigned Pred) {
766 MachineOperand Op(MachineOperand::MO_Predicate);
767 Op.Contents.Pred = Pred;
771 static MachineOperand CreatePlaceholder() {
772 MachineOperand Op(MachineOperand::MO_Placeholder);
776 friend class MachineInstr;
777 friend class MachineRegisterInfo;
779 void removeRegFromUses();
781 //===--------------------------------------------------------------------===//
782 // Methods for handling register use/def lists.
783 //===--------------------------------------------------------------------===//
785 /// isOnRegUseList - Return true if this operand is on a register use/def list
786 /// or false if not. This can only be called for register operands that are
787 /// part of a machine instruction.
788 bool isOnRegUseList() const {
789 assert(isReg() && "Can only add reg operand to use lists");
790 return Contents.Reg.Prev != nullptr;
794 inline raw_ostream &operator<<(raw_ostream &OS, const MachineOperand& MO) {
795 MO.print(OS, nullptr);
799 // See friend declaration above. This additional declaration is required in
800 // order to compile LLVM with IBM xlC compiler.
801 hash_code hash_value(const MachineOperand &MO);
802 } // End llvm namespace