1 //===-- llvm/CodeGen/MachineOperand.h - MachineOperand class ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineOperand class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_CODEGEN_MACHINEOPERAND_H
15 #define LLVM_CODEGEN_MACHINEOPERAND_H
17 #include "llvm/Support/DataTypes.h"
18 #include "llvm/IR/Intrinsics.h"
27 class MachineBasicBlock;
29 class MachineRegisterInfo;
31 class ModuleSlotTracker;
33 class TargetIntrinsicInfo;
34 class TargetRegisterInfo;
39 /// MachineOperand class - Representation of each machine instruction operand.
41 /// This class isn't a POD type because it has a private constructor, but its
42 /// destructor must be trivial. Functions like MachineInstr::addOperand(),
43 /// MachineRegisterInfo::moveOperands(), and MF::DeleteMachineInstr() depend on
44 /// not having to call the MachineOperand destructor.
46 class MachineOperand {
48 enum MachineOperandType : unsigned char {
49 MO_Register, ///< Register operand.
50 MO_Immediate, ///< Immediate operand
51 MO_CImmediate, ///< Immediate >64bit operand
52 MO_FPImmediate, ///< Floating-point immediate operand
53 MO_MachineBasicBlock, ///< MachineBasicBlock reference
54 MO_FrameIndex, ///< Abstract Stack Frame Index
55 MO_ConstantPoolIndex, ///< Address of indexed Constant in Constant Pool
56 MO_TargetIndex, ///< Target-dependent index+offset operand.
57 MO_JumpTableIndex, ///< Address of indexed Jump Table for switch
58 MO_ExternalSymbol, ///< Name of external global symbol
59 MO_GlobalAddress, ///< Address of a global value
60 MO_BlockAddress, ///< Address of a basic block
61 MO_RegisterMask, ///< Mask of preserved registers.
62 MO_RegisterLiveOut, ///< Mask of live-out registers.
63 MO_Metadata, ///< Metadata reference (for debug info)
64 MO_MCSymbol, ///< MCSymbol reference (for debug/eh info)
65 MO_CFIIndex, ///< MCCFIInstruction index.
66 MO_IntrinsicID, ///< Intrinsic ID for ISel
67 MO_Predicate, ///< Generic predicate for ISel
71 /// OpKind - Specify what kind of operand this is. This discriminates the
73 MachineOperandType OpKind : 8;
75 /// Subregister number for MO_Register. A value of 0 indicates the
76 /// MO_Register has no subReg.
78 /// For all other kinds of operands, this field holds target-specific flags.
79 unsigned SubReg_TargetFlags : 12;
81 /// TiedTo - Non-zero when this register operand is tied to another register
82 /// operand. The encoding of this field is described in the block comment
83 /// before MachineInstr::tieOperands().
84 unsigned char TiedTo : 4;
86 /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
89 /// IsDef - True if this is a def, false if this is a use of the register.
93 /// IsImp - True if this is an implicit def or use, false if it is explicit.
97 /// IsKill - True if this instruction is the last use of the register on this
98 /// path through the function. This is only valid on uses of registers.
101 /// IsDead - True if this register is never used by a subsequent instruction.
102 /// This is only valid on definitions of registers.
105 /// IsUndef - True if this register operand reads an "undef" value, i.e. the
106 /// read value doesn't matter. This flag can be set on both use and def
107 /// operands. On a sub-register def operand, it refers to the part of the
108 /// register that isn't written. On a full-register def operand, it is a
109 /// noop. See readsReg().
111 /// This is only valid on registers.
113 /// Note that an instruction may have multiple <undef> operands referring to
114 /// the same register. In that case, the instruction may depend on those
115 /// operands reading the same dont-care value. For example:
117 /// %vreg1<def> = XOR %vreg2<undef>, %vreg2<undef>
119 /// Any register can be used for %vreg2, and its value doesn't matter, but
120 /// the two operands must be the same register.
124 /// IsInternalRead - True if this operand reads a value that was defined
125 /// inside the same instruction or bundle. This flag can be set on both use
126 /// and def operands. On a sub-register def operand, it refers to the part
127 /// of the register that isn't written. On a full-register def operand, it
130 /// When this flag is set, the instruction bundle must contain at least one
131 /// other def of the register. If multiple instructions in the bundle define
132 /// the register, the meaning is target-defined.
133 bool IsInternalRead : 1;
135 /// IsEarlyClobber - True if this MO_Register 'def' operand is written to
136 /// by the MachineInstr before all input registers are read. This is used to
137 /// model the GCC inline asm '&' constraint modifier.
138 bool IsEarlyClobber : 1;
140 /// IsDebug - True if this MO_Register 'use' operand is in a debug pseudo,
141 /// not a real instruction. Such uses should be ignored during codegen.
144 /// SmallContents - This really should be part of the Contents union, but
145 /// lives out here so we can get a better packed struct.
146 /// MO_Register: Register number.
147 /// OffsetedInfo: Low bits of offset.
149 unsigned RegNo; // For MO_Register.
150 unsigned OffsetLo; // Matches Contents.OffsetedInfo.OffsetHi.
153 /// ParentMI - This is the instruction that this operand is embedded into.
154 /// This is valid for all operand types, when the operand is in an instr.
155 MachineInstr *ParentMI;
157 /// Contents union - This contains the payload for the various operand types.
159 MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
160 const ConstantFP *CFP; // For MO_FPImmediate.
161 const ConstantInt *CI; // For MO_CImmediate. Integers > 64bit.
162 int64_t ImmVal; // For MO_Immediate.
163 const uint32_t *RegMask; // For MO_RegisterMask and MO_RegisterLiveOut.
164 const MDNode *MD; // For MO_Metadata.
165 MCSymbol *Sym; // For MO_MCSymbol.
166 unsigned CFIIndex; // For MO_CFI.
167 Intrinsic::ID IntrinsicID; // For MO_IntrinsicID.
168 unsigned Pred; // For MO_Predicate
170 struct { // For MO_Register.
171 // Register number is in SmallContents.RegNo.
172 MachineOperand *Prev; // Access list for register. See MRI.
173 MachineOperand *Next;
176 /// OffsetedInfo - This struct contains the offset and an object identifier.
177 /// this represent the object as with an optional offset from it.
180 int Index; // For MO_*Index - The index itself.
181 const char *SymbolName; // For MO_ExternalSymbol.
182 const GlobalValue *GV; // For MO_GlobalAddress.
183 const BlockAddress *BA; // For MO_BlockAddress.
185 // Low bits of offset are in SmallContents.OffsetLo.
186 int OffsetHi; // An offset from the object, high 32 bits.
190 explicit MachineOperand(MachineOperandType K)
191 : OpKind(K), SubReg_TargetFlags(0), ParentMI(nullptr) {}
193 /// getType - Returns the MachineOperandType for this operand.
195 MachineOperandType getType() const { return (MachineOperandType)OpKind; }
197 unsigned getTargetFlags() const {
198 return isReg() ? 0 : SubReg_TargetFlags;
200 void setTargetFlags(unsigned F) {
201 assert(!isReg() && "Register operands can't have target flags");
202 SubReg_TargetFlags = F;
203 assert(SubReg_TargetFlags == F && "Target flags out of range");
205 void addTargetFlag(unsigned F) {
206 assert(!isReg() && "Register operands can't have target flags");
207 SubReg_TargetFlags |= F;
208 assert((SubReg_TargetFlags & F) && "Target flags out of range");
212 /// getParent - Return the instruction that this operand belongs to.
214 MachineInstr *getParent() { return ParentMI; }
215 const MachineInstr *getParent() const { return ParentMI; }
217 /// clearParent - Reset the parent pointer.
219 /// The MachineOperand copy constructor also copies ParentMI, expecting the
220 /// original to be deleted. If a MachineOperand is ever stored outside a
221 /// MachineInstr, the parent pointer must be cleared.
223 /// Never call clearParent() on an operand in a MachineInstr.
225 void clearParent() { ParentMI = nullptr; }
227 void print(raw_ostream &os, const TargetRegisterInfo *TRI = nullptr,
228 const TargetIntrinsicInfo *IntrinsicInfo = nullptr) const;
229 void print(raw_ostream &os, ModuleSlotTracker &MST,
230 const TargetRegisterInfo *TRI = nullptr,
231 const TargetIntrinsicInfo *IntrinsicInfo = nullptr) const;
232 LLVM_DUMP_METHOD void dump() const;
234 //===--------------------------------------------------------------------===//
235 // Accessors that tell you what kind of MachineOperand you're looking at.
236 //===--------------------------------------------------------------------===//
238 /// isReg - Tests if this is a MO_Register operand.
239 bool isReg() const { return OpKind == MO_Register; }
240 /// isImm - Tests if this is a MO_Immediate operand.
241 bool isImm() const { return OpKind == MO_Immediate; }
242 /// isCImm - Test if this is a MO_CImmediate operand.
243 bool isCImm() const { return OpKind == MO_CImmediate; }
244 /// isFPImm - Tests if this is a MO_FPImmediate operand.
245 bool isFPImm() const { return OpKind == MO_FPImmediate; }
246 /// isMBB - Tests if this is a MO_MachineBasicBlock operand.
247 bool isMBB() const { return OpKind == MO_MachineBasicBlock; }
248 /// isFI - Tests if this is a MO_FrameIndex operand.
249 bool isFI() const { return OpKind == MO_FrameIndex; }
250 /// isCPI - Tests if this is a MO_ConstantPoolIndex operand.
251 bool isCPI() const { return OpKind == MO_ConstantPoolIndex; }
252 /// isTargetIndex - Tests if this is a MO_TargetIndex operand.
253 bool isTargetIndex() const { return OpKind == MO_TargetIndex; }
254 /// isJTI - Tests if this is a MO_JumpTableIndex operand.
255 bool isJTI() const { return OpKind == MO_JumpTableIndex; }
256 /// isGlobal - Tests if this is a MO_GlobalAddress operand.
257 bool isGlobal() const { return OpKind == MO_GlobalAddress; }
258 /// isSymbol - Tests if this is a MO_ExternalSymbol operand.
259 bool isSymbol() const { return OpKind == MO_ExternalSymbol; }
260 /// isBlockAddress - Tests if this is a MO_BlockAddress operand.
261 bool isBlockAddress() const { return OpKind == MO_BlockAddress; }
262 /// isRegMask - Tests if this is a MO_RegisterMask operand.
263 bool isRegMask() const { return OpKind == MO_RegisterMask; }
264 /// isRegLiveOut - Tests if this is a MO_RegisterLiveOut operand.
265 bool isRegLiveOut() const { return OpKind == MO_RegisterLiveOut; }
266 /// isMetadata - Tests if this is a MO_Metadata operand.
267 bool isMetadata() const { return OpKind == MO_Metadata; }
268 bool isMCSymbol() const { return OpKind == MO_MCSymbol; }
269 bool isCFIIndex() const { return OpKind == MO_CFIIndex; }
270 bool isIntrinsicID() const { return OpKind == MO_IntrinsicID; }
271 bool isPredicate() const { return OpKind == MO_Predicate; }
272 //===--------------------------------------------------------------------===//
273 // Accessors for Register Operands
274 //===--------------------------------------------------------------------===//
276 /// getReg - Returns the register number.
277 unsigned getReg() const {
278 assert(isReg() && "This is not a register operand!");
279 return SmallContents.RegNo;
282 unsigned getSubReg() const {
283 assert(isReg() && "Wrong MachineOperand accessor");
284 return SubReg_TargetFlags;
288 assert(isReg() && "Wrong MachineOperand accessor");
293 assert(isReg() && "Wrong MachineOperand accessor");
297 bool isImplicit() const {
298 assert(isReg() && "Wrong MachineOperand accessor");
302 bool isDead() const {
303 assert(isReg() && "Wrong MachineOperand accessor");
307 bool isKill() const {
308 assert(isReg() && "Wrong MachineOperand accessor");
312 bool isUndef() const {
313 assert(isReg() && "Wrong MachineOperand accessor");
317 bool isInternalRead() const {
318 assert(isReg() && "Wrong MachineOperand accessor");
319 return IsInternalRead;
322 bool isEarlyClobber() const {
323 assert(isReg() && "Wrong MachineOperand accessor");
324 return IsEarlyClobber;
327 bool isTied() const {
328 assert(isReg() && "Wrong MachineOperand accessor");
332 bool isDebug() const {
333 assert(isReg() && "Wrong MachineOperand accessor");
337 /// readsReg - Returns true if this operand reads the previous value of its
338 /// register. A use operand with the <undef> flag set doesn't read its
339 /// register. A sub-register def implicitly reads the other parts of the
340 /// register being redefined unless the <undef> flag is set.
342 /// This refers to reading the register value from before the current
343 /// instruction or bundle. Internal bundle reads are not included.
344 bool readsReg() const {
345 assert(isReg() && "Wrong MachineOperand accessor");
346 return !isUndef() && !isInternalRead() && (isUse() || getSubReg());
349 //===--------------------------------------------------------------------===//
350 // Mutators for Register Operands
351 //===--------------------------------------------------------------------===//
353 /// Change the register this operand corresponds to.
355 void setReg(unsigned Reg);
357 void setSubReg(unsigned subReg) {
358 assert(isReg() && "Wrong MachineOperand accessor");
359 SubReg_TargetFlags = subReg;
360 assert(SubReg_TargetFlags == subReg && "SubReg out of range");
363 /// substVirtReg - Substitute the current register with the virtual
364 /// subregister Reg:SubReg. Take any existing SubReg index into account,
365 /// using TargetRegisterInfo to compose the subreg indices if necessary.
366 /// Reg must be a virtual register, SubIdx can be 0.
368 void substVirtReg(unsigned Reg, unsigned SubIdx, const TargetRegisterInfo&);
370 /// substPhysReg - Substitute the current register with the physical register
371 /// Reg, taking any existing SubReg into account. For instance,
372 /// substPhysReg(%EAX) will change %reg1024:sub_8bit to %AL.
374 void substPhysReg(unsigned Reg, const TargetRegisterInfo&);
376 void setIsUse(bool Val = true) { setIsDef(!Val); }
378 void setIsDef(bool Val = true);
380 void setImplicit(bool Val = true) {
381 assert(isReg() && "Wrong MachineOperand accessor");
385 void setIsKill(bool Val = true) {
386 assert(isReg() && !IsDef && "Wrong MachineOperand accessor");
387 assert((!Val || !isDebug()) && "Marking a debug operation as kill");
391 void setIsDead(bool Val = true) {
392 assert(isReg() && IsDef && "Wrong MachineOperand accessor");
396 void setIsUndef(bool Val = true) {
397 assert(isReg() && "Wrong MachineOperand accessor");
401 void setIsInternalRead(bool Val = true) {
402 assert(isReg() && "Wrong MachineOperand accessor");
403 IsInternalRead = Val;
406 void setIsEarlyClobber(bool Val = true) {
407 assert(isReg() && IsDef && "Wrong MachineOperand accessor");
408 IsEarlyClobber = Val;
411 void setIsDebug(bool Val = true) {
412 assert(isReg() && !IsDef && "Wrong MachineOperand accessor");
416 //===--------------------------------------------------------------------===//
417 // Accessors for various operand types.
418 //===--------------------------------------------------------------------===//
420 int64_t getImm() const {
421 assert(isImm() && "Wrong MachineOperand accessor");
422 return Contents.ImmVal;
425 const ConstantInt *getCImm() const {
426 assert(isCImm() && "Wrong MachineOperand accessor");
430 const ConstantFP *getFPImm() const {
431 assert(isFPImm() && "Wrong MachineOperand accessor");
435 MachineBasicBlock *getMBB() const {
436 assert(isMBB() && "Wrong MachineOperand accessor");
440 int getIndex() const {
441 assert((isFI() || isCPI() || isTargetIndex() || isJTI()) &&
442 "Wrong MachineOperand accessor");
443 return Contents.OffsetedInfo.Val.Index;
446 const GlobalValue *getGlobal() const {
447 assert(isGlobal() && "Wrong MachineOperand accessor");
448 return Contents.OffsetedInfo.Val.GV;
451 const BlockAddress *getBlockAddress() const {
452 assert(isBlockAddress() && "Wrong MachineOperand accessor");
453 return Contents.OffsetedInfo.Val.BA;
456 MCSymbol *getMCSymbol() const {
457 assert(isMCSymbol() && "Wrong MachineOperand accessor");
461 unsigned getCFIIndex() const {
462 assert(isCFIIndex() && "Wrong MachineOperand accessor");
463 return Contents.CFIIndex;
466 Intrinsic::ID getIntrinsicID() const {
467 assert(isIntrinsicID() && "Wrong MachineOperand accessor");
468 return Contents.IntrinsicID;
471 unsigned getPredicate() const {
472 assert(isPredicate() && "Wrong MachineOperand accessor");
473 return Contents.Pred;
476 /// Return the offset from the symbol in this operand. This always returns 0
477 /// for ExternalSymbol operands.
478 int64_t getOffset() const {
479 assert((isGlobal() || isSymbol() || isMCSymbol() || isCPI() ||
480 isTargetIndex() || isBlockAddress()) &&
481 "Wrong MachineOperand accessor");
482 return int64_t(uint64_t(Contents.OffsetedInfo.OffsetHi) << 32) |
483 SmallContents.OffsetLo;
486 const char *getSymbolName() const {
487 assert(isSymbol() && "Wrong MachineOperand accessor");
488 return Contents.OffsetedInfo.Val.SymbolName;
491 /// clobbersPhysReg - Returns true if this RegMask clobbers PhysReg.
492 /// It is sometimes necessary to detach the register mask pointer from its
493 /// machine operand. This static method can be used for such detached bit
495 static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg) {
496 // See TargetRegisterInfo.h.
497 assert(PhysReg < (1u << 30) && "Not a physical register");
498 return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32));
501 /// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
502 bool clobbersPhysReg(unsigned PhysReg) const {
503 return clobbersPhysReg(getRegMask(), PhysReg);
506 /// getRegMask - Returns a bit mask of registers preserved by this RegMask
508 const uint32_t *getRegMask() const {
509 assert(isRegMask() && "Wrong MachineOperand accessor");
510 return Contents.RegMask;
513 /// getRegLiveOut - Returns a bit mask of live-out registers.
514 const uint32_t *getRegLiveOut() const {
515 assert(isRegLiveOut() && "Wrong MachineOperand accessor");
516 return Contents.RegMask;
519 const MDNode *getMetadata() const {
520 assert(isMetadata() && "Wrong MachineOperand accessor");
524 //===--------------------------------------------------------------------===//
525 // Mutators for various operand types.
526 //===--------------------------------------------------------------------===//
528 void setImm(int64_t immVal) {
529 assert(isImm() && "Wrong MachineOperand mutator");
530 Contents.ImmVal = immVal;
533 void setFPImm(const ConstantFP *CFP) {
534 assert(isFPImm() && "Wrong MachineOperand mutator");
538 void setOffset(int64_t Offset) {
539 assert((isGlobal() || isSymbol() || isMCSymbol() || isCPI() ||
540 isTargetIndex() || isBlockAddress()) &&
541 "Wrong MachineOperand accessor");
542 SmallContents.OffsetLo = unsigned(Offset);
543 Contents.OffsetedInfo.OffsetHi = int(Offset >> 32);
546 void setIndex(int Idx) {
547 assert((isFI() || isCPI() || isTargetIndex() || isJTI()) &&
548 "Wrong MachineOperand accessor");
549 Contents.OffsetedInfo.Val.Index = Idx;
552 void setMBB(MachineBasicBlock *MBB) {
553 assert(isMBB() && "Wrong MachineOperand accessor");
557 /// Sets value of register mask operand referencing Mask. The
558 /// operand does not take ownership of the memory referenced by Mask, it must
559 /// remain valid for the lifetime of the operand. See CreateRegMask().
560 /// Any physreg with a 0 bit in the mask is clobbered by the instruction.
561 void setRegMask(const uint32_t *RegMaskPtr) {
562 assert(isRegMask() && "Wrong MachineOperand mutator");
563 Contents.RegMask = RegMaskPtr;
566 //===--------------------------------------------------------------------===//
568 //===--------------------------------------------------------------------===//
570 /// Returns true if this operand is identical to the specified operand except
571 /// for liveness related flags (isKill, isUndef and isDead).
572 bool isIdenticalTo(const MachineOperand &Other) const;
574 /// \brief MachineOperand hash_value overload.
576 /// Note that this includes the same information in the hash that
577 /// isIdenticalTo uses for comparison. It is thus suited for use in hash
578 /// tables which use that function for equality comparisons only.
579 friend hash_code hash_value(const MachineOperand &MO);
581 /// ChangeToImmediate - Replace this operand with a new immediate operand of
582 /// the specified value. If an operand is known to be an immediate already,
583 /// the setImm method should be used.
584 void ChangeToImmediate(int64_t ImmVal);
586 /// ChangeToFPImmediate - Replace this operand with a new FP immediate operand
587 /// of the specified value. If an operand is known to be an FP immediate
588 /// already, the setFPImm method should be used.
589 void ChangeToFPImmediate(const ConstantFP *FPImm);
591 /// ChangeToES - Replace this operand with a new external symbol operand.
592 void ChangeToES(const char *SymName, unsigned char TargetFlags = 0);
594 /// ChangeToMCSymbol - Replace this operand with a new MC symbol operand.
595 void ChangeToMCSymbol(MCSymbol *Sym);
597 /// Replace this operand with a frame index.
598 void ChangeToFrameIndex(int Idx);
600 /// ChangeToRegister - Replace this operand with a new register operand of
601 /// the specified value. If an operand is known to be an register already,
602 /// the setReg method should be used.
603 void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
604 bool isKill = false, bool isDead = false,
605 bool isUndef = false, bool isDebug = false);
607 //===--------------------------------------------------------------------===//
608 // Construction methods.
609 //===--------------------------------------------------------------------===//
611 static MachineOperand CreateImm(int64_t Val) {
612 MachineOperand Op(MachineOperand::MO_Immediate);
617 static MachineOperand CreateCImm(const ConstantInt *CI) {
618 MachineOperand Op(MachineOperand::MO_CImmediate);
623 static MachineOperand CreateFPImm(const ConstantFP *CFP) {
624 MachineOperand Op(MachineOperand::MO_FPImmediate);
625 Op.Contents.CFP = CFP;
629 static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false,
630 bool isKill = false, bool isDead = false,
631 bool isUndef = false,
632 bool isEarlyClobber = false,
634 bool isDebug = false,
635 bool isInternalRead = false) {
636 assert(!(isDead && !isDef) && "Dead flag on non-def");
637 assert(!(isKill && isDef) && "Kill flag on def");
638 MachineOperand Op(MachineOperand::MO_Register);
643 Op.IsUndef = isUndef;
644 Op.IsInternalRead = isInternalRead;
645 Op.IsEarlyClobber = isEarlyClobber;
647 Op.IsDebug = isDebug;
648 Op.SmallContents.RegNo = Reg;
649 Op.Contents.Reg.Prev = nullptr;
650 Op.Contents.Reg.Next = nullptr;
651 Op.setSubReg(SubReg);
654 static MachineOperand CreateMBB(MachineBasicBlock *MBB,
655 unsigned char TargetFlags = 0) {
656 MachineOperand Op(MachineOperand::MO_MachineBasicBlock);
658 Op.setTargetFlags(TargetFlags);
661 static MachineOperand CreateFI(int Idx) {
662 MachineOperand Op(MachineOperand::MO_FrameIndex);
666 static MachineOperand CreateCPI(unsigned Idx, int Offset,
667 unsigned char TargetFlags = 0) {
668 MachineOperand Op(MachineOperand::MO_ConstantPoolIndex);
670 Op.setOffset(Offset);
671 Op.setTargetFlags(TargetFlags);
674 static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset,
675 unsigned char TargetFlags = 0) {
676 MachineOperand Op(MachineOperand::MO_TargetIndex);
678 Op.setOffset(Offset);
679 Op.setTargetFlags(TargetFlags);
682 static MachineOperand CreateJTI(unsigned Idx,
683 unsigned char TargetFlags = 0) {
684 MachineOperand Op(MachineOperand::MO_JumpTableIndex);
686 Op.setTargetFlags(TargetFlags);
689 static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset,
690 unsigned char TargetFlags = 0) {
691 MachineOperand Op(MachineOperand::MO_GlobalAddress);
692 Op.Contents.OffsetedInfo.Val.GV = GV;
693 Op.setOffset(Offset);
694 Op.setTargetFlags(TargetFlags);
697 static MachineOperand CreateES(const char *SymName,
698 unsigned char TargetFlags = 0) {
699 MachineOperand Op(MachineOperand::MO_ExternalSymbol);
700 Op.Contents.OffsetedInfo.Val.SymbolName = SymName;
701 Op.setOffset(0); // Offset is always 0.
702 Op.setTargetFlags(TargetFlags);
705 static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset,
706 unsigned char TargetFlags = 0) {
707 MachineOperand Op(MachineOperand::MO_BlockAddress);
708 Op.Contents.OffsetedInfo.Val.BA = BA;
709 Op.setOffset(Offset);
710 Op.setTargetFlags(TargetFlags);
713 /// CreateRegMask - Creates a register mask operand referencing Mask. The
714 /// operand does not take ownership of the memory referenced by Mask, it must
715 /// remain valid for the lifetime of the operand.
717 /// A RegMask operand represents a set of non-clobbered physical registers on
718 /// an instruction that clobbers many registers, typically a call. The bit
719 /// mask has a bit set for each physreg that is preserved by this
720 /// instruction, as described in the documentation for
721 /// TargetRegisterInfo::getCallPreservedMask().
723 /// Any physreg with a 0 bit in the mask is clobbered by the instruction.
725 static MachineOperand CreateRegMask(const uint32_t *Mask) {
726 assert(Mask && "Missing register mask");
727 MachineOperand Op(MachineOperand::MO_RegisterMask);
728 Op.Contents.RegMask = Mask;
731 static MachineOperand CreateRegLiveOut(const uint32_t *Mask) {
732 assert(Mask && "Missing live-out register mask");
733 MachineOperand Op(MachineOperand::MO_RegisterLiveOut);
734 Op.Contents.RegMask = Mask;
737 static MachineOperand CreateMetadata(const MDNode *Meta) {
738 MachineOperand Op(MachineOperand::MO_Metadata);
739 Op.Contents.MD = Meta;
743 static MachineOperand CreateMCSymbol(MCSymbol *Sym,
744 unsigned char TargetFlags = 0) {
745 MachineOperand Op(MachineOperand::MO_MCSymbol);
746 Op.Contents.Sym = Sym;
748 Op.setTargetFlags(TargetFlags);
752 static MachineOperand CreateCFIIndex(unsigned CFIIndex) {
753 MachineOperand Op(MachineOperand::MO_CFIIndex);
754 Op.Contents.CFIIndex = CFIIndex;
758 static MachineOperand CreateIntrinsicID(Intrinsic::ID ID) {
759 MachineOperand Op(MachineOperand::MO_IntrinsicID);
760 Op.Contents.IntrinsicID = ID;
764 static MachineOperand CreatePredicate(unsigned Pred) {
765 MachineOperand Op(MachineOperand::MO_Predicate);
766 Op.Contents.Pred = Pred;
770 friend class MachineInstr;
771 friend class MachineRegisterInfo;
773 void removeRegFromUses();
775 //===--------------------------------------------------------------------===//
776 // Methods for handling register use/def lists.
777 //===--------------------------------------------------------------------===//
779 /// isOnRegUseList - Return true if this operand is on a register use/def list
780 /// or false if not. This can only be called for register operands that are
781 /// part of a machine instruction.
782 bool isOnRegUseList() const {
783 assert(isReg() && "Can only add reg operand to use lists");
784 return Contents.Reg.Prev != nullptr;
788 inline raw_ostream &operator<<(raw_ostream &OS, const MachineOperand& MO) {
789 MO.print(OS, nullptr);
793 // See friend declaration above. This additional declaration is required in
794 // order to compile LLVM with IBM xlC compiler.
795 hash_code hash_value(const MachineOperand &MO);
796 } // End llvm namespace