1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines interfaces to access the target independent code generation
11 // passes provided by the LLVM backend.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_PASSES_H
16 #define LLVM_CODEGEN_PASSES_H
24 class MachineFunction;
25 class MachineFunctionPass;
29 class TargetRegisterClass;
32 } // End llvm namespace
34 /// List of target independent CodeGen pass IDs.
36 FunctionPass *createAtomicExpandPass();
38 /// createUnreachableBlockEliminationPass - The LLVM code generator does not
39 /// work well with unreachable basic blocks (what live ranges make sense for a
40 /// block that cannot be reached?). As such, a code generator should either
41 /// not instruction select unreachable blocks, or run this pass as its
42 /// last LLVM modifying pass to clean up blocks that are not reachable from
44 FunctionPass *createUnreachableBlockEliminationPass();
46 /// MachineFunctionPrinter pass - This pass prints out the machine function to
47 /// the given stream as a debugging tool.
49 createMachineFunctionPrinterPass(raw_ostream &OS,
50 const std::string &Banner ="");
52 /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream
53 /// using the MIR serialization format.
54 MachineFunctionPass *createPrintMIRPass(raw_ostream &OS);
56 /// This pass resets a MachineFunction when it has the FailedISel property
57 /// as if it was just created.
58 /// If EmitFallbackDiag is true, the pass will emit a
59 /// DiagnosticInfoISelFallback for every MachineFunction it resets.
60 /// If AbortOnFailedISel is true, abort compilation instead of resetting.
61 MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag,
62 bool AbortOnFailedISel);
64 /// createCodeGenPreparePass - Transform the code to expose more pattern
65 /// matching during instruction selection.
66 FunctionPass *createCodeGenPreparePass();
68 /// createScalarizeMaskedMemIntrinPass - Replace masked load, store, gather
69 /// and scatter intrinsics with scalar code when target doesn't support them.
70 FunctionPass *createScalarizeMaskedMemIntrinPass();
72 /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg
73 /// load-linked/store-conditional loops.
74 extern char &AtomicExpandID;
76 /// MachineLoopInfo - This pass is a loop analysis pass.
77 extern char &MachineLoopInfoID;
79 /// MachineDominators - This pass is a machine dominators analysis pass.
80 extern char &MachineDominatorsID;
82 /// MachineDominanaceFrontier - This pass is a machine dominators analysis pass.
83 extern char &MachineDominanceFrontierID;
85 /// MachineRegionInfo - This pass computes SESE regions for machine functions.
86 extern char &MachineRegionInfoPassID;
88 /// EdgeBundles analysis - Bundle machine CFG edges.
89 extern char &EdgeBundlesID;
91 /// LiveVariables pass - This pass computes the set of blocks in which each
92 /// variable is life and sets machine operand kill flags.
93 extern char &LiveVariablesID;
95 /// PHIElimination - This pass eliminates machine instruction PHI nodes
96 /// by inserting copy instructions. This destroys SSA information, but is the
97 /// desired input for some register allocators. This pass is "required" by
98 /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
99 extern char &PHIEliminationID;
101 /// LiveIntervals - This analysis keeps track of the live ranges of virtual
102 /// and physical registers.
103 extern char &LiveIntervalsID;
105 /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
106 extern char &LiveStacksID;
108 /// TwoAddressInstruction - This pass reduces two-address instructions to
109 /// use two operands. This destroys SSA information but it is desired by
110 /// register allocators.
111 extern char &TwoAddressInstructionPassID;
113 /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
114 extern char &ProcessImplicitDefsID;
116 /// RegisterCoalescer - This pass merges live ranges to eliminate copies.
117 extern char &RegisterCoalescerID;
119 /// MachineScheduler - This pass schedules machine instructions.
120 extern char &MachineSchedulerID;
122 /// PostMachineScheduler - This pass schedules machine instructions postRA.
123 extern char &PostMachineSchedulerID;
125 /// SpillPlacement analysis. Suggest optimal placement of spill code between
127 extern char &SpillPlacementID;
129 /// ShrinkWrap pass. Look for the best place to insert save and restore
130 // instruction and update the MachineFunctionInfo with that information.
131 extern char &ShrinkWrapID;
133 /// LiveRangeShrink pass. Move instruction close to its definition to shrink
134 /// the definition's live range.
135 extern char &LiveRangeShrinkID;
137 /// Greedy register allocator.
138 extern char &RAGreedyID;
140 /// Basic register allocator.
141 extern char &RABasicID;
143 /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as
144 /// assigned in VirtRegMap.
145 extern char &VirtRegRewriterID;
147 /// UnreachableMachineBlockElimination - This pass removes unreachable
148 /// machine basic blocks.
149 extern char &UnreachableMachineBlockElimID;
151 /// DeadMachineInstructionElim - This pass removes dead machine instructions.
152 extern char &DeadMachineInstructionElimID;
154 /// This pass adds dead/undef flags after analyzing subregister lanes.
155 extern char &DetectDeadLanesID;
157 /// FastRegisterAllocation Pass - This pass register allocates as fast as
158 /// possible. It is best suited for debug code where live ranges are short.
160 FunctionPass *createFastRegisterAllocator();
162 /// BasicRegisterAllocation Pass - This pass implements a degenerate global
163 /// register allocator using the basic regalloc framework.
165 FunctionPass *createBasicRegisterAllocator();
167 /// Greedy register allocation pass - This pass implements a global register
168 /// allocator for optimized builds.
170 FunctionPass *createGreedyRegisterAllocator();
172 /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
173 /// Quadratic Prograaming (PBQP) based register allocator.
175 FunctionPass *createDefaultPBQPRegisterAllocator();
177 /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
178 /// and eliminates abstract frame references.
179 extern char &PrologEpilogCodeInserterID;
180 MachineFunctionPass *createPrologEpilogInserterPass();
182 /// ExpandPostRAPseudos - This pass expands pseudo instructions after
183 /// register allocation.
184 extern char &ExpandPostRAPseudosID;
186 /// createPostRAHazardRecognizer - This pass runs the post-ra hazard
188 extern char &PostRAHazardRecognizerID;
190 /// createPostRAScheduler - This pass performs post register allocation
192 extern char &PostRASchedulerID;
194 /// BranchFolding - This pass performs machine code CFG based
195 /// optimizations to delete branches to branches, eliminate branches to
196 /// successor blocks (creating fall throughs), and eliminating branches over
198 extern char &BranchFolderPassID;
200 /// BranchRelaxation - This pass replaces branches that need to jump further
201 /// than is supported by a branch instruction.
202 extern char &BranchRelaxationPassID;
204 /// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
205 extern char &MachineFunctionPrinterPassID;
207 /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR
208 /// serialization format.
209 extern char &MIRPrintingPassID;
211 /// TailDuplicate - Duplicate blocks with unconditional branches
212 /// into tails of their predecessors.
213 extern char &TailDuplicateID;
215 /// MachineTraceMetrics - This pass computes critical path and CPU resource
216 /// usage in an ensemble of traces.
217 extern char &MachineTraceMetricsID;
219 /// EarlyIfConverter - This pass performs if-conversion on SSA form by
220 /// inserting cmov instructions.
221 extern char &EarlyIfConverterID;
223 /// This pass performs instruction combining using trace metrics to estimate
224 /// critical-path and resource depth.
225 extern char &MachineCombinerID;
227 /// StackSlotColoring - This pass performs stack coloring and merging.
228 /// It merges disjoint allocas to reduce the stack size.
229 extern char &StackColoringID;
231 /// IfConverter - This pass performs machine code if conversion.
232 extern char &IfConverterID;
234 FunctionPass *createIfConverter(
235 std::function<bool(const MachineFunction &)> Ftor);
237 /// MachineBlockPlacement - This pass places basic blocks based on branch
239 extern char &MachineBlockPlacementID;
241 /// MachineBlockPlacementStats - This pass collects statistics about the
242 /// basic block placement using branch probabilities and block frequency
244 extern char &MachineBlockPlacementStatsID;
246 /// GCLowering Pass - Used by gc.root to perform its default lowering
248 FunctionPass *createGCLoweringPass();
250 /// ShadowStackGCLowering - Implements the custom lowering mechanism
251 /// used by the shadow stack GC. Only runs on functions which opt in to
252 /// the shadow stack collector.
253 FunctionPass *createShadowStackGCLoweringPass();
255 /// GCMachineCodeAnalysis - Target-independent pass to mark safe points
256 /// in machine code. Must be added very late during code generation, just
257 /// prior to output, and importantly after all CFG transformations (such as
259 extern char &GCMachineCodeAnalysisID;
261 /// Creates a pass to print GC metadata.
263 FunctionPass *createGCInfoPrinter(raw_ostream &OS);
265 /// MachineCSE - This pass performs global CSE on machine instructions.
266 extern char &MachineCSEID;
268 /// ImplicitNullChecks - This pass folds null pointer checks into nearby
269 /// memory operations.
270 extern char &ImplicitNullChecksID;
272 /// MachineLICM - This pass performs LICM on machine instructions.
273 extern char &MachineLICMID;
275 /// MachineSinking - This pass performs sinking on machine instructions.
276 extern char &MachineSinkingID;
278 /// MachineCopyPropagation - This pass performs copy propagation on
279 /// machine instructions.
280 extern char &MachineCopyPropagationID;
282 /// PeepholeOptimizer - This pass performs peephole optimizations -
283 /// like extension and comparison eliminations.
284 extern char &PeepholeOptimizerID;
286 /// OptimizePHIs - This pass optimizes machine instruction PHIs
287 /// to take advantage of opportunities created during DAG legalization.
288 extern char &OptimizePHIsID;
290 /// StackSlotColoring - This pass performs stack slot coloring.
291 extern char &StackSlotColoringID;
293 /// \brief This pass lays out funclets contiguously.
294 extern char &FuncletLayoutID;
296 /// This pass inserts the XRay instrumentation sleds if they are supported by
297 /// the target platform.
298 extern char &XRayInstrumentationID;
300 /// This pass inserts FEntry calls
301 extern char &FEntryInserterID;
303 /// \brief This pass implements the "patchable-function" attribute.
304 extern char &PatchableFunctionID;
306 /// createStackProtectorPass - This pass adds stack protectors to functions.
308 FunctionPass *createStackProtectorPass();
310 /// createMachineVerifierPass - This pass verifies cenerated machine code
311 /// instructions for correctness.
313 FunctionPass *createMachineVerifierPass(const std::string& Banner);
315 /// createDwarfEHPass - This pass mulches exception handling code into a form
316 /// adapted to code generation. Required if using dwarf exception handling.
317 FunctionPass *createDwarfEHPass();
319 /// createWinEHPass - Prepares personality functions used by MSVC on Windows,
320 /// in addition to the Itanium LSDA based personalities.
321 FunctionPass *createWinEHPass();
323 /// createSjLjEHPreparePass - This pass adapts exception handling code to use
324 /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
326 FunctionPass *createSjLjEHPreparePass();
328 /// LocalStackSlotAllocation - This pass assigns local frame indices to stack
329 /// slots relative to one another and allocates base registers to access them
330 /// when it is estimated by the target to be out of range of normal frame
331 /// pointer or stack pointer index addressing.
332 extern char &LocalStackSlotAllocationID;
334 /// ExpandISelPseudos - This pass expands pseudo-instructions.
335 extern char &ExpandISelPseudosID;
337 /// UnpackMachineBundles - This pass unpack machine instruction bundles.
338 extern char &UnpackMachineBundlesID;
341 createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor);
343 /// FinalizeMachineBundles - This pass finalize machine instruction
344 /// bundles (created earlier, e.g. during pre-RA scheduling).
345 extern char &FinalizeMachineBundlesID;
347 /// StackMapLiveness - This pass analyses the register live-out set of
348 /// stackmap/patchpoint intrinsics and attaches the calculated information to
349 /// the intrinsic for later emission to the StackMap.
350 extern char &StackMapLivenessID;
352 /// LiveDebugValues pass
353 extern char &LiveDebugValuesID;
355 /// createJumpInstrTables - This pass creates jump-instruction tables.
356 ModulePass *createJumpInstrTablesPass();
358 /// createForwardControlFlowIntegrityPass - This pass adds control-flow
360 ModulePass *createForwardControlFlowIntegrityPass();
362 /// InterleavedAccess Pass - This pass identifies and matches interleaved
363 /// memory accesses to target specific intrinsics.
365 FunctionPass *createInterleavedAccessPass();
367 /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all
368 /// TLS variables for the emulated TLS model.
370 ModulePass *createLowerEmuTLSPass();
372 /// This pass lowers the @llvm.load.relative intrinsic to instructions.
373 /// This is unsafe to do earlier because a pass may combine the constant
374 /// initializer into the load, which may result in an overflowing evaluation.
375 ModulePass *createPreISelIntrinsicLoweringPass();
377 /// GlobalMerge - This pass merges internal (by default) globals into structs
378 /// to enable reuse of a base pointer by indexed addressing modes.
379 /// It can also be configured to focus on size optimizations only.
381 Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
382 bool OnlyOptimizeForSize = false,
383 bool MergeExternalByDefault = false);
385 /// This pass splits the stack into a safe stack and an unsafe stack to
386 /// protect against stack-based overflow vulnerabilities.
387 FunctionPass *createSafeStackPass();
389 /// This pass detects subregister lanes in a virtual register that are used
390 /// independently of other lanes and splits them into separate virtual
392 extern char &RenameIndependentSubregsID;
394 /// This pass is executed POST-RA to collect which physical registers are
395 /// preserved by given machine function.
396 FunctionPass *createRegUsageInfoCollector();
398 /// Return a MachineFunction pass that identifies call sites
399 /// and propagates register usage information of callee to caller
400 /// if available with PysicalRegisterUsageInfo pass.
401 FunctionPass *createRegUsageInfoPropPass();
403 /// This pass performs software pipelining on machine instructions.
404 extern char &MachinePipelinerID;
406 /// This pass frees the memory occupied by the MachineFunction.
407 FunctionPass *createFreeMachineFunctionPass();
409 /// This pass performs outlining on machine instructions directly before
410 /// printing assembly.
411 ModulePass *createMachineOutlinerPass(bool OutlineFromLinkOnceODRs = false);
413 /// This pass expands the experimental reduction intrinsics into sequences of
415 FunctionPass *createExpandReductionsPass();
417 // This pass expands memcmp() to load/stores.
418 FunctionPass *createExpandMemCmpPass();
420 // This pass expands indirectbr instructions.
421 FunctionPass *createIndirectBrExpandPass();
423 } // End llvm namespace