1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines interfaces to access the target independent code generation
11 // passes provided by the LLVM backend.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_PASSES_H
16 #define LLVM_CODEGEN_PASSES_H
24 class MachineFunction;
25 class MachineFunctionPass;
29 class TargetRegisterClass;
32 } // End llvm namespace
34 /// List of target independent CodeGen pass IDs.
36 FunctionPass *createAtomicExpandPass();
38 /// createUnreachableBlockEliminationPass - The LLVM code generator does not
39 /// work well with unreachable basic blocks (what live ranges make sense for a
40 /// block that cannot be reached?). As such, a code generator should either
41 /// not instruction select unreachable blocks, or run this pass as its
42 /// last LLVM modifying pass to clean up blocks that are not reachable from
44 FunctionPass *createUnreachableBlockEliminationPass();
46 /// Insert mcount-like function calls.
47 FunctionPass *createCountingFunctionInserterPass();
49 /// MachineFunctionPrinter pass - This pass prints out the machine function to
50 /// the given stream as a debugging tool.
52 createMachineFunctionPrinterPass(raw_ostream &OS,
53 const std::string &Banner ="");
55 /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream
56 /// using the MIR serialization format.
57 MachineFunctionPass *createPrintMIRPass(raw_ostream &OS);
59 /// This pass resets a MachineFunction when it has the FailedISel property
60 /// as if it was just created.
61 /// If EmitFallbackDiag is true, the pass will emit a
62 /// DiagnosticInfoISelFallback for every MachineFunction it resets.
63 /// If AbortOnFailedISel is true, abort compilation instead of resetting.
64 MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag,
65 bool AbortOnFailedISel);
67 /// createCodeGenPreparePass - Transform the code to expose more pattern
68 /// matching during instruction selection.
69 FunctionPass *createCodeGenPreparePass();
71 /// createScalarizeMaskedMemIntrinPass - Replace masked load, store, gather
72 /// and scatter intrinsics with scalar code when target doesn't support them.
73 FunctionPass *createScalarizeMaskedMemIntrinPass();
75 /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg
76 /// load-linked/store-conditional loops.
77 extern char &AtomicExpandID;
79 /// MachineLoopInfo - This pass is a loop analysis pass.
80 extern char &MachineLoopInfoID;
82 /// MachineDominators - This pass is a machine dominators analysis pass.
83 extern char &MachineDominatorsID;
85 /// MachineDominanaceFrontier - This pass is a machine dominators analysis pass.
86 extern char &MachineDominanceFrontierID;
88 /// MachineRegionInfo - This pass computes SESE regions for machine functions.
89 extern char &MachineRegionInfoPassID;
91 /// EdgeBundles analysis - Bundle machine CFG edges.
92 extern char &EdgeBundlesID;
94 /// LiveVariables pass - This pass computes the set of blocks in which each
95 /// variable is life and sets machine operand kill flags.
96 extern char &LiveVariablesID;
98 /// PHIElimination - This pass eliminates machine instruction PHI nodes
99 /// by inserting copy instructions. This destroys SSA information, but is the
100 /// desired input for some register allocators. This pass is "required" by
101 /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
102 extern char &PHIEliminationID;
104 /// LiveIntervals - This analysis keeps track of the live ranges of virtual
105 /// and physical registers.
106 extern char &LiveIntervalsID;
108 /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
109 extern char &LiveStacksID;
111 /// TwoAddressInstruction - This pass reduces two-address instructions to
112 /// use two operands. This destroys SSA information but it is desired by
113 /// register allocators.
114 extern char &TwoAddressInstructionPassID;
116 /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
117 extern char &ProcessImplicitDefsID;
119 /// RegisterCoalescer - This pass merges live ranges to eliminate copies.
120 extern char &RegisterCoalescerID;
122 /// MachineScheduler - This pass schedules machine instructions.
123 extern char &MachineSchedulerID;
125 /// PostMachineScheduler - This pass schedules machine instructions postRA.
126 extern char &PostMachineSchedulerID;
128 /// SpillPlacement analysis. Suggest optimal placement of spill code between
130 extern char &SpillPlacementID;
132 /// ShrinkWrap pass. Look for the best place to insert save and restore
133 // instruction and update the MachineFunctionInfo with that information.
134 extern char &ShrinkWrapID;
136 /// Greedy register allocator.
137 extern char &RAGreedyID;
139 /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as
140 /// assigned in VirtRegMap.
141 extern char &VirtRegRewriterID;
143 /// UnreachableMachineBlockElimination - This pass removes unreachable
144 /// machine basic blocks.
145 extern char &UnreachableMachineBlockElimID;
147 /// DeadMachineInstructionElim - This pass removes dead machine instructions.
148 extern char &DeadMachineInstructionElimID;
150 /// This pass adds dead/undef flags after analyzing subregister lanes.
151 extern char &DetectDeadLanesID;
153 /// FastRegisterAllocation Pass - This pass register allocates as fast as
154 /// possible. It is best suited for debug code where live ranges are short.
156 FunctionPass *createFastRegisterAllocator();
158 /// BasicRegisterAllocation Pass - This pass implements a degenerate global
159 /// register allocator using the basic regalloc framework.
161 FunctionPass *createBasicRegisterAllocator();
163 /// Greedy register allocation pass - This pass implements a global register
164 /// allocator for optimized builds.
166 FunctionPass *createGreedyRegisterAllocator();
168 /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
169 /// Quadratic Prograaming (PBQP) based register allocator.
171 FunctionPass *createDefaultPBQPRegisterAllocator();
173 /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
174 /// and eliminates abstract frame references.
175 extern char &PrologEpilogCodeInserterID;
176 MachineFunctionPass *createPrologEpilogInserterPass();
178 /// ExpandPostRAPseudos - This pass expands pseudo instructions after
179 /// register allocation.
180 extern char &ExpandPostRAPseudosID;
182 /// createPostRAHazardRecognizer - This pass runs the post-ra hazard
184 extern char &PostRAHazardRecognizerID;
186 /// createPostRAScheduler - This pass performs post register allocation
188 extern char &PostRASchedulerID;
190 /// BranchFolding - This pass performs machine code CFG based
191 /// optimizations to delete branches to branches, eliminate branches to
192 /// successor blocks (creating fall throughs), and eliminating branches over
194 extern char &BranchFolderPassID;
196 /// BranchRelaxation - This pass replaces branches that need to jump further
197 /// than is supported by a branch instruction.
198 extern char &BranchRelaxationPassID;
200 /// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
201 extern char &MachineFunctionPrinterPassID;
203 /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR
204 /// serialization format.
205 extern char &MIRPrintingPassID;
207 /// TailDuplicate - Duplicate blocks with unconditional branches
208 /// into tails of their predecessors.
209 extern char &TailDuplicateID;
211 /// MachineTraceMetrics - This pass computes critical path and CPU resource
212 /// usage in an ensemble of traces.
213 extern char &MachineTraceMetricsID;
215 /// EarlyIfConverter - This pass performs if-conversion on SSA form by
216 /// inserting cmov instructions.
217 extern char &EarlyIfConverterID;
219 /// This pass performs instruction combining using trace metrics to estimate
220 /// critical-path and resource depth.
221 extern char &MachineCombinerID;
223 /// StackSlotColoring - This pass performs stack coloring and merging.
224 /// It merges disjoint allocas to reduce the stack size.
225 extern char &StackColoringID;
227 /// IfConverter - This pass performs machine code if conversion.
228 extern char &IfConverterID;
230 FunctionPass *createIfConverter(
231 std::function<bool(const MachineFunction &)> Ftor);
233 /// MachineBlockPlacement - This pass places basic blocks based on branch
235 extern char &MachineBlockPlacementID;
237 /// MachineBlockPlacementStats - This pass collects statistics about the
238 /// basic block placement using branch probabilities and block frequency
240 extern char &MachineBlockPlacementStatsID;
242 /// GCLowering Pass - Used by gc.root to perform its default lowering
244 FunctionPass *createGCLoweringPass();
246 /// ShadowStackGCLowering - Implements the custom lowering mechanism
247 /// used by the shadow stack GC. Only runs on functions which opt in to
248 /// the shadow stack collector.
249 FunctionPass *createShadowStackGCLoweringPass();
251 /// GCMachineCodeAnalysis - Target-independent pass to mark safe points
252 /// in machine code. Must be added very late during code generation, just
253 /// prior to output, and importantly after all CFG transformations (such as
255 extern char &GCMachineCodeAnalysisID;
257 /// Creates a pass to print GC metadata.
259 FunctionPass *createGCInfoPrinter(raw_ostream &OS);
261 /// MachineCSE - This pass performs global CSE on machine instructions.
262 extern char &MachineCSEID;
264 /// ImplicitNullChecks - This pass folds null pointer checks into nearby
265 /// memory operations.
266 extern char &ImplicitNullChecksID;
268 /// MachineLICM - This pass performs LICM on machine instructions.
269 extern char &MachineLICMID;
271 /// MachineSinking - This pass performs sinking on machine instructions.
272 extern char &MachineSinkingID;
274 /// MachineCopyPropagation - This pass performs copy propagation on
275 /// machine instructions.
276 extern char &MachineCopyPropagationID;
278 /// PeepholeOptimizer - This pass performs peephole optimizations -
279 /// like extension and comparison eliminations.
280 extern char &PeepholeOptimizerID;
282 /// OptimizePHIs - This pass optimizes machine instruction PHIs
283 /// to take advantage of opportunities created during DAG legalization.
284 extern char &OptimizePHIsID;
286 /// StackSlotColoring - This pass performs stack slot coloring.
287 extern char &StackSlotColoringID;
289 /// \brief This pass lays out funclets contiguously.
290 extern char &FuncletLayoutID;
292 /// This pass inserts the XRay instrumentation sleds if they are supported by
293 /// the target platform.
294 extern char &XRayInstrumentationID;
296 /// This pass inserts FEntry calls
297 extern char &FEntryInserterID;
299 /// \brief This pass implements the "patchable-function" attribute.
300 extern char &PatchableFunctionID;
302 /// createStackProtectorPass - This pass adds stack protectors to functions.
304 FunctionPass *createStackProtectorPass();
306 /// createMachineVerifierPass - This pass verifies cenerated machine code
307 /// instructions for correctness.
309 FunctionPass *createMachineVerifierPass(const std::string& Banner);
311 /// createDwarfEHPass - This pass mulches exception handling code into a form
312 /// adapted to code generation. Required if using dwarf exception handling.
313 FunctionPass *createDwarfEHPass();
315 /// createWinEHPass - Prepares personality functions used by MSVC on Windows,
316 /// in addition to the Itanium LSDA based personalities.
317 FunctionPass *createWinEHPass();
319 /// createSjLjEHPreparePass - This pass adapts exception handling code to use
320 /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
322 FunctionPass *createSjLjEHPreparePass();
324 /// LocalStackSlotAllocation - This pass assigns local frame indices to stack
325 /// slots relative to one another and allocates base registers to access them
326 /// when it is estimated by the target to be out of range of normal frame
327 /// pointer or stack pointer index addressing.
328 extern char &LocalStackSlotAllocationID;
330 /// ExpandISelPseudos - This pass expands pseudo-instructions.
331 extern char &ExpandISelPseudosID;
333 /// UnpackMachineBundles - This pass unpack machine instruction bundles.
334 extern char &UnpackMachineBundlesID;
337 createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor);
339 /// FinalizeMachineBundles - This pass finalize machine instruction
340 /// bundles (created earlier, e.g. during pre-RA scheduling).
341 extern char &FinalizeMachineBundlesID;
343 /// StackMapLiveness - This pass analyses the register live-out set of
344 /// stackmap/patchpoint intrinsics and attaches the calculated information to
345 /// the intrinsic for later emission to the StackMap.
346 extern char &StackMapLivenessID;
348 /// LiveDebugValues pass
349 extern char &LiveDebugValuesID;
351 /// createJumpInstrTables - This pass creates jump-instruction tables.
352 ModulePass *createJumpInstrTablesPass();
354 /// createForwardControlFlowIntegrityPass - This pass adds control-flow
356 ModulePass *createForwardControlFlowIntegrityPass();
358 /// InterleavedAccess Pass - This pass identifies and matches interleaved
359 /// memory accesses to target specific intrinsics.
361 FunctionPass *createInterleavedAccessPass();
363 /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all
364 /// TLS variables for the emulated TLS model.
366 ModulePass *createLowerEmuTLSPass();
368 /// This pass lowers the @llvm.load.relative intrinsic to instructions.
369 /// This is unsafe to do earlier because a pass may combine the constant
370 /// initializer into the load, which may result in an overflowing evaluation.
371 ModulePass *createPreISelIntrinsicLoweringPass();
373 /// GlobalMerge - This pass merges internal (by default) globals into structs
374 /// to enable reuse of a base pointer by indexed addressing modes.
375 /// It can also be configured to focus on size optimizations only.
377 Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
378 bool OnlyOptimizeForSize = false,
379 bool MergeExternalByDefault = false);
381 /// This pass splits the stack into a safe stack and an unsafe stack to
382 /// protect against stack-based overflow vulnerabilities.
383 FunctionPass *createSafeStackPass();
385 /// This pass detects subregister lanes in a virtual register that are used
386 /// independently of other lanes and splits them into separate virtual
388 extern char &RenameIndependentSubregsID;
390 /// This pass is executed POST-RA to collect which physical registers are
391 /// preserved by given machine function.
392 FunctionPass *createRegUsageInfoCollector();
394 /// Return a MachineFunction pass that identifies call sites
395 /// and propagates register usage information of callee to caller
396 /// if available with PysicalRegisterUsageInfo pass.
397 FunctionPass *createRegUsageInfoPropPass();
399 /// This pass performs software pipelining on machine instructions.
400 extern char &MachinePipelinerID;
402 /// This pass frees the memory occupied by the MachineFunction.
403 FunctionPass *createFreeMachineFunctionPass();
405 /// This pass combine basic blocks guarded by the same branch.
406 extern char &BranchCoalescingID;
408 /// This pass performs outlining on machine instructions directly before
409 /// printing assembly.
410 ModulePass *createMachineOutlinerPass();
412 /// This pass expands the experimental reduction intrinsics into sequences of
414 FunctionPass *createExpandReductionsPass();
416 } // End llvm namespace