1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines interfaces to access the target independent code generation
11 // passes provided by the LLVM backend.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_PASSES_H
16 #define LLVM_CODEGEN_PASSES_H
25 class MachineFunctionPass;
29 class TargetRegisterClass;
32 } // End llvm namespace
34 /// List of target independent CodeGen pass IDs.
36 FunctionPass *createAtomicExpandPass(const TargetMachine *TM);
38 /// createUnreachableBlockEliminationPass - The LLVM code generator does not
39 /// work well with unreachable basic blocks (what live ranges make sense for a
40 /// block that cannot be reached?). As such, a code generator should either
41 /// not instruction select unreachable blocks, or run this pass as its
42 /// last LLVM modifying pass to clean up blocks that are not reachable from
44 FunctionPass *createUnreachableBlockEliminationPass();
46 /// MachineFunctionPrinter pass - This pass prints out the machine function to
47 /// the given stream as a debugging tool.
49 createMachineFunctionPrinterPass(raw_ostream &OS,
50 const std::string &Banner ="");
52 /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream
53 /// using the MIR serialization format.
54 MachineFunctionPass *createPrintMIRPass(raw_ostream &OS);
56 /// createCodeGenPreparePass - Transform the code to expose more pattern
57 /// matching during instruction selection.
58 FunctionPass *createCodeGenPreparePass(const TargetMachine *TM = nullptr);
60 /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg
61 /// load-linked/store-conditional loops.
62 extern char &AtomicExpandID;
64 /// MachineLoopInfo - This pass is a loop analysis pass.
65 extern char &MachineLoopInfoID;
67 /// MachineDominators - This pass is a machine dominators analysis pass.
68 extern char &MachineDominatorsID;
70 /// MachineDominanaceFrontier - This pass is a machine dominators analysis pass.
71 extern char &MachineDominanceFrontierID;
73 /// EdgeBundles analysis - Bundle machine CFG edges.
74 extern char &EdgeBundlesID;
76 /// LiveVariables pass - This pass computes the set of blocks in which each
77 /// variable is life and sets machine operand kill flags.
78 extern char &LiveVariablesID;
80 /// PHIElimination - This pass eliminates machine instruction PHI nodes
81 /// by inserting copy instructions. This destroys SSA information, but is the
82 /// desired input for some register allocators. This pass is "required" by
83 /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
84 extern char &PHIEliminationID;
86 /// LiveIntervals - This analysis keeps track of the live ranges of virtual
87 /// and physical registers.
88 extern char &LiveIntervalsID;
90 /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
91 extern char &LiveStacksID;
93 /// TwoAddressInstruction - This pass reduces two-address instructions to
94 /// use two operands. This destroys SSA information but it is desired by
95 /// register allocators.
96 extern char &TwoAddressInstructionPassID;
98 /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
99 extern char &ProcessImplicitDefsID;
101 /// RegisterCoalescer - This pass merges live ranges to eliminate copies.
102 extern char &RegisterCoalescerID;
104 /// MachineScheduler - This pass schedules machine instructions.
105 extern char &MachineSchedulerID;
107 /// PostMachineScheduler - This pass schedules machine instructions postRA.
108 extern char &PostMachineSchedulerID;
110 /// SpillPlacement analysis. Suggest optimal placement of spill code between
112 extern char &SpillPlacementID;
114 /// ShrinkWrap pass. Look for the best place to insert save and restore
115 // instruction and update the MachineFunctionInfo with that information.
116 extern char &ShrinkWrapID;
118 /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as
119 /// assigned in VirtRegMap.
120 extern char &VirtRegRewriterID;
122 /// UnreachableMachineBlockElimination - This pass removes unreachable
123 /// machine basic blocks.
124 extern char &UnreachableMachineBlockElimID;
126 /// DeadMachineInstructionElim - This pass removes dead machine instructions.
127 extern char &DeadMachineInstructionElimID;
129 /// This pass adds dead/undef flags after analyzing subregister lanes.
130 extern char &DetectDeadLanesID;
132 /// FastRegisterAllocation Pass - This pass register allocates as fast as
133 /// possible. It is best suited for debug code where live ranges are short.
135 FunctionPass *createFastRegisterAllocator();
137 /// BasicRegisterAllocation Pass - This pass implements a degenerate global
138 /// register allocator using the basic regalloc framework.
140 FunctionPass *createBasicRegisterAllocator();
142 /// Greedy register allocation pass - This pass implements a global register
143 /// allocator for optimized builds.
145 FunctionPass *createGreedyRegisterAllocator();
147 /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
148 /// Quadratic Prograaming (PBQP) based register allocator.
150 FunctionPass *createDefaultPBQPRegisterAllocator();
152 /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
153 /// and eliminates abstract frame references.
154 extern char &PrologEpilogCodeInserterID;
155 MachineFunctionPass *createPrologEpilogInserterPass(const TargetMachine *TM);
157 /// ExpandPostRAPseudos - This pass expands pseudo instructions after
158 /// register allocation.
159 extern char &ExpandPostRAPseudosID;
161 /// createPostRAHazardRecognizer - This pass runs the post-ra hazard
163 extern char &PostRAHazardRecognizerID;
165 /// createPostRAScheduler - This pass performs post register allocation
167 extern char &PostRASchedulerID;
169 /// BranchFolding - This pass performs machine code CFG based
170 /// optimizations to delete branches to branches, eliminate branches to
171 /// successor blocks (creating fall throughs), and eliminating branches over
173 extern char &BranchFolderPassID;
175 /// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
176 extern char &MachineFunctionPrinterPassID;
178 /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR
179 /// serialization format.
180 extern char &MIRPrintingPassID;
182 /// TailDuplicate - Duplicate blocks with unconditional branches
183 /// into tails of their predecessors.
184 extern char &TailDuplicateID;
186 /// MachineTraceMetrics - This pass computes critical path and CPU resource
187 /// usage in an ensemble of traces.
188 extern char &MachineTraceMetricsID;
190 /// EarlyIfConverter - This pass performs if-conversion on SSA form by
191 /// inserting cmov instructions.
192 extern char &EarlyIfConverterID;
194 /// This pass performs instruction combining using trace metrics to estimate
195 /// critical-path and resource depth.
196 extern char &MachineCombinerID;
198 /// StackSlotColoring - This pass performs stack coloring and merging.
199 /// It merges disjoint allocas to reduce the stack size.
200 extern char &StackColoringID;
202 /// IfConverter - This pass performs machine code if conversion.
203 extern char &IfConverterID;
205 FunctionPass *createIfConverter(std::function<bool(const Function &)> Ftor);
207 /// MachineBlockPlacement - This pass places basic blocks based on branch
209 extern char &MachineBlockPlacementID;
211 /// MachineBlockPlacementStats - This pass collects statistics about the
212 /// basic block placement using branch probabilities and block frequency
214 extern char &MachineBlockPlacementStatsID;
216 /// GCLowering Pass - Used by gc.root to perform its default lowering
218 FunctionPass *createGCLoweringPass();
220 /// ShadowStackGCLowering - Implements the custom lowering mechanism
221 /// used by the shadow stack GC. Only runs on functions which opt in to
222 /// the shadow stack collector.
223 FunctionPass *createShadowStackGCLoweringPass();
225 /// GCMachineCodeAnalysis - Target-independent pass to mark safe points
226 /// in machine code. Must be added very late during code generation, just
227 /// prior to output, and importantly after all CFG transformations (such as
229 extern char &GCMachineCodeAnalysisID;
231 /// Creates a pass to print GC metadata.
233 FunctionPass *createGCInfoPrinter(raw_ostream &OS);
235 /// MachineCSE - This pass performs global CSE on machine instructions.
236 extern char &MachineCSEID;
238 /// ImplicitNullChecks - This pass folds null pointer checks into nearby
239 /// memory operations.
240 extern char &ImplicitNullChecksID;
242 /// MachineLICM - This pass performs LICM on machine instructions.
243 extern char &MachineLICMID;
245 /// MachineSinking - This pass performs sinking on machine instructions.
246 extern char &MachineSinkingID;
248 /// MachineCopyPropagation - This pass performs copy propagation on
249 /// machine instructions.
250 extern char &MachineCopyPropagationID;
252 /// PeepholeOptimizer - This pass performs peephole optimizations -
253 /// like extension and comparison eliminations.
254 extern char &PeepholeOptimizerID;
256 /// OptimizePHIs - This pass optimizes machine instruction PHIs
257 /// to take advantage of opportunities created during DAG legalization.
258 extern char &OptimizePHIsID;
260 /// StackSlotColoring - This pass performs stack slot coloring.
261 extern char &StackSlotColoringID;
263 /// \brief This pass lays out funclets contiguously.
264 extern char &FuncletLayoutID;
266 /// This pass inserts the XRay instrumentation sleds if they are supported by
267 /// the target platform.
268 extern char &XRayInstrumentationID;
270 /// \brief This pass implements the "patchable-function" attribute.
271 extern char &PatchableFunctionID;
273 /// createStackProtectorPass - This pass adds stack protectors to functions.
275 FunctionPass *createStackProtectorPass(const TargetMachine *TM);
277 /// createMachineVerifierPass - This pass verifies cenerated machine code
278 /// instructions for correctness.
280 FunctionPass *createMachineVerifierPass(const std::string& Banner);
282 /// createDwarfEHPass - This pass mulches exception handling code into a form
283 /// adapted to code generation. Required if using dwarf exception handling.
284 FunctionPass *createDwarfEHPass(const TargetMachine *TM);
286 /// createWinEHPass - Prepares personality functions used by MSVC on Windows,
287 /// in addition to the Itanium LSDA based personalities.
288 FunctionPass *createWinEHPass(const TargetMachine *TM);
290 /// createSjLjEHPreparePass - This pass adapts exception handling code to use
291 /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
293 FunctionPass *createSjLjEHPreparePass();
295 /// LocalStackSlotAllocation - This pass assigns local frame indices to stack
296 /// slots relative to one another and allocates base registers to access them
297 /// when it is estimated by the target to be out of range of normal frame
298 /// pointer or stack pointer index addressing.
299 extern char &LocalStackSlotAllocationID;
301 /// ExpandISelPseudos - This pass expands pseudo-instructions.
302 extern char &ExpandISelPseudosID;
304 /// createExecutionDependencyFixPass - This pass fixes execution time
305 /// problems with dependent instructions, such as switching execution
306 /// domains to match.
308 /// The pass will examine instructions using and defining registers in RC.
310 FunctionPass *createExecutionDependencyFixPass(const TargetRegisterClass *RC);
312 /// UnpackMachineBundles - This pass unpack machine instruction bundles.
313 extern char &UnpackMachineBundlesID;
316 createUnpackMachineBundles(std::function<bool(const Function &)> Ftor);
318 /// FinalizeMachineBundles - This pass finalize machine instruction
319 /// bundles (created earlier, e.g. during pre-RA scheduling).
320 extern char &FinalizeMachineBundlesID;
322 /// StackMapLiveness - This pass analyses the register live-out set of
323 /// stackmap/patchpoint intrinsics and attaches the calculated information to
324 /// the intrinsic for later emission to the StackMap.
325 extern char &StackMapLivenessID;
327 /// LiveDebugValues pass
328 extern char &LiveDebugValuesID;
330 /// createJumpInstrTables - This pass creates jump-instruction tables.
331 ModulePass *createJumpInstrTablesPass();
333 /// createForwardControlFlowIntegrityPass - This pass adds control-flow
335 ModulePass *createForwardControlFlowIntegrityPass();
337 /// InterleavedAccess Pass - This pass identifies and matches interleaved
338 /// memory accesses to target specific intrinsics.
340 FunctionPass *createInterleavedAccessPass(const TargetMachine *TM);
342 /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all
343 /// TLS variables for the emulated TLS model.
345 ModulePass *createLowerEmuTLSPass(const TargetMachine *TM);
347 /// This pass lowers the @llvm.load.relative intrinsic to instructions.
348 /// This is unsafe to do earlier because a pass may combine the constant
349 /// initializer into the load, which may result in an overflowing evaluation.
350 ModulePass *createPreISelIntrinsicLoweringPass();
352 /// GlobalMerge - This pass merges internal (by default) globals into structs
353 /// to enable reuse of a base pointer by indexed addressing modes.
354 /// It can also be configured to focus on size optimizations only.
356 Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
357 bool OnlyOptimizeForSize = false,
358 bool MergeExternalByDefault = false);
360 /// This pass splits the stack into a safe stack and an unsafe stack to
361 /// protect against stack-based overflow vulnerabilities.
362 FunctionPass *createSafeStackPass(const TargetMachine *TM = nullptr);
364 /// This pass detects subregister lanes in a virtual register that are used
365 /// independently of other lanes and splits them into separate virtual
367 extern char &RenameIndependentSubregsID;
369 /// This pass is executed POST-RA to collect which physical registers are
370 /// preserved by given machine function.
371 FunctionPass *createRegUsageInfoCollector();
373 /// Return a MachineFunction pass that identifies call sites
374 /// and propagates register usage information of callee to caller
375 /// if available with PysicalRegisterUsageInfo pass.
376 FunctionPass *createRegUsageInfoPropPass();
377 } // End llvm namespace
379 /// Target machine pass initializer for passes with dependencies. Use with
380 /// INITIALIZE_TM_PASS_END.
381 #define INITIALIZE_TM_PASS_BEGIN INITIALIZE_PASS_BEGIN
383 /// Target machine pass initializer for passes with dependencies. Use with
384 /// INITIALIZE_TM_PASS_BEGIN.
385 #define INITIALIZE_TM_PASS_END(passName, arg, name, cfg, analysis) \
386 PassInfo *PI = new PassInfo( \
387 name, arg, &passName::ID, \
388 PassInfo::NormalCtor_t(callDefaultCtor<passName>), cfg, analysis, \
389 PassInfo::TargetMachineCtor_t(callTargetMachineCtor<passName>)); \
390 Registry.registerPass(*PI, true); \
393 LLVM_DEFINE_ONCE_FLAG(Initialize##passName##PassFlag); \
394 void llvm::initialize##passName##Pass(PassRegistry &Registry) { \
395 llvm::call_once(Initialize##passName##PassFlag, \
396 initialize##passName##PassOnce, std::ref(Registry)); \
399 /// This initializer registers TargetMachine constructor, so the pass being
400 /// initialized can use target dependent interfaces. Please do not move this
401 /// macro to be together with INITIALIZE_PASS, which is a complete target
402 /// independent initializer, and we don't want to make libScalarOpts depend
404 #define INITIALIZE_TM_PASS(passName, arg, name, cfg, analysis) \
405 INITIALIZE_TM_PASS_BEGIN(passName, arg, name, cfg, analysis) \
406 INITIALIZE_TM_PASS_END(passName, arg, name, cfg, analysis)