1 //===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines interfaces to access the target independent code generation
11 // passes provided by the LLVM backend.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_CODEGEN_PASSES_H
16 #define LLVM_CODEGEN_PASSES_H
24 class MachineFunction;
25 class MachineFunctionPass;
29 class TargetRegisterClass;
32 } // End llvm namespace
34 /// List of target independent CodeGen pass IDs.
36 FunctionPass *createAtomicExpandPass(const TargetMachine *TM);
38 /// createUnreachableBlockEliminationPass - The LLVM code generator does not
39 /// work well with unreachable basic blocks (what live ranges make sense for a
40 /// block that cannot be reached?). As such, a code generator should either
41 /// not instruction select unreachable blocks, or run this pass as its
42 /// last LLVM modifying pass to clean up blocks that are not reachable from
44 FunctionPass *createUnreachableBlockEliminationPass();
46 /// Insert mcount-like function calls.
47 FunctionPass *createCountingFunctionInserterPass();
49 /// MachineFunctionPrinter pass - This pass prints out the machine function to
50 /// the given stream as a debugging tool.
52 createMachineFunctionPrinterPass(raw_ostream &OS,
53 const std::string &Banner ="");
55 /// MIRPrinting pass - this pass prints out the LLVM IR into the given stream
56 /// using the MIR serialization format.
57 MachineFunctionPass *createPrintMIRPass(raw_ostream &OS);
59 /// This pass resets a MachineFunction when it has the FailedISel property
60 /// as if it was just created.
61 /// If EmitFallbackDiag is true, the pass will emit a
62 /// DiagnosticInfoISelFallback for every MachineFunction it resets.
63 MachineFunctionPass *createResetMachineFunctionPass(bool EmitFallbackDiag);
65 /// createCodeGenPreparePass - Transform the code to expose more pattern
66 /// matching during instruction selection.
67 FunctionPass *createCodeGenPreparePass(const TargetMachine *TM = nullptr);
69 /// AtomicExpandID -- Lowers atomic operations in terms of either cmpxchg
70 /// load-linked/store-conditional loops.
71 extern char &AtomicExpandID;
73 /// MachineLoopInfo - This pass is a loop analysis pass.
74 extern char &MachineLoopInfoID;
76 /// MachineDominators - This pass is a machine dominators analysis pass.
77 extern char &MachineDominatorsID;
79 /// MachineDominanaceFrontier - This pass is a machine dominators analysis pass.
80 extern char &MachineDominanceFrontierID;
82 /// EdgeBundles analysis - Bundle machine CFG edges.
83 extern char &EdgeBundlesID;
85 /// LiveVariables pass - This pass computes the set of blocks in which each
86 /// variable is life and sets machine operand kill flags.
87 extern char &LiveVariablesID;
89 /// PHIElimination - This pass eliminates machine instruction PHI nodes
90 /// by inserting copy instructions. This destroys SSA information, but is the
91 /// desired input for some register allocators. This pass is "required" by
92 /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
93 extern char &PHIEliminationID;
95 /// LiveIntervals - This analysis keeps track of the live ranges of virtual
96 /// and physical registers.
97 extern char &LiveIntervalsID;
99 /// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
100 extern char &LiveStacksID;
102 /// TwoAddressInstruction - This pass reduces two-address instructions to
103 /// use two operands. This destroys SSA information but it is desired by
104 /// register allocators.
105 extern char &TwoAddressInstructionPassID;
107 /// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
108 extern char &ProcessImplicitDefsID;
110 /// RegisterCoalescer - This pass merges live ranges to eliminate copies.
111 extern char &RegisterCoalescerID;
113 /// MachineScheduler - This pass schedules machine instructions.
114 extern char &MachineSchedulerID;
116 /// PostMachineScheduler - This pass schedules machine instructions postRA.
117 extern char &PostMachineSchedulerID;
119 /// SpillPlacement analysis. Suggest optimal placement of spill code between
121 extern char &SpillPlacementID;
123 /// ShrinkWrap pass. Look for the best place to insert save and restore
124 // instruction and update the MachineFunctionInfo with that information.
125 extern char &ShrinkWrapID;
127 /// Greedy register allocator.
128 extern char &RAGreedyID;
130 /// VirtRegRewriter pass. Rewrite virtual registers to physical registers as
131 /// assigned in VirtRegMap.
132 extern char &VirtRegRewriterID;
134 /// UnreachableMachineBlockElimination - This pass removes unreachable
135 /// machine basic blocks.
136 extern char &UnreachableMachineBlockElimID;
138 /// DeadMachineInstructionElim - This pass removes dead machine instructions.
139 extern char &DeadMachineInstructionElimID;
141 /// This pass adds dead/undef flags after analyzing subregister lanes.
142 extern char &DetectDeadLanesID;
144 /// FastRegisterAllocation Pass - This pass register allocates as fast as
145 /// possible. It is best suited for debug code where live ranges are short.
147 FunctionPass *createFastRegisterAllocator();
149 /// BasicRegisterAllocation Pass - This pass implements a degenerate global
150 /// register allocator using the basic regalloc framework.
152 FunctionPass *createBasicRegisterAllocator();
154 /// Greedy register allocation pass - This pass implements a global register
155 /// allocator for optimized builds.
157 FunctionPass *createGreedyRegisterAllocator();
159 /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
160 /// Quadratic Prograaming (PBQP) based register allocator.
162 FunctionPass *createDefaultPBQPRegisterAllocator();
164 /// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
165 /// and eliminates abstract frame references.
166 extern char &PrologEpilogCodeInserterID;
167 MachineFunctionPass *createPrologEpilogInserterPass(const TargetMachine *TM);
169 /// ExpandPostRAPseudos - This pass expands pseudo instructions after
170 /// register allocation.
171 extern char &ExpandPostRAPseudosID;
173 /// createPostRAHazardRecognizer - This pass runs the post-ra hazard
175 extern char &PostRAHazardRecognizerID;
177 /// createPostRAScheduler - This pass performs post register allocation
179 extern char &PostRASchedulerID;
181 /// BranchFolding - This pass performs machine code CFG based
182 /// optimizations to delete branches to branches, eliminate branches to
183 /// successor blocks (creating fall throughs), and eliminating branches over
185 extern char &BranchFolderPassID;
187 /// BranchRelaxation - This pass replaces branches that need to jump further
188 /// than is supported by a branch instruction.
189 extern char &BranchRelaxationPassID;
191 /// MachineFunctionPrinterPass - This pass prints out MachineInstr's.
192 extern char &MachineFunctionPrinterPassID;
194 /// MIRPrintingPass - this pass prints out the LLVM IR using the MIR
195 /// serialization format.
196 extern char &MIRPrintingPassID;
198 /// TailDuplicate - Duplicate blocks with unconditional branches
199 /// into tails of their predecessors.
200 extern char &TailDuplicateID;
202 /// MachineTraceMetrics - This pass computes critical path and CPU resource
203 /// usage in an ensemble of traces.
204 extern char &MachineTraceMetricsID;
206 /// EarlyIfConverter - This pass performs if-conversion on SSA form by
207 /// inserting cmov instructions.
208 extern char &EarlyIfConverterID;
210 /// This pass performs instruction combining using trace metrics to estimate
211 /// critical-path and resource depth.
212 extern char &MachineCombinerID;
214 /// StackSlotColoring - This pass performs stack coloring and merging.
215 /// It merges disjoint allocas to reduce the stack size.
216 extern char &StackColoringID;
218 /// IfConverter - This pass performs machine code if conversion.
219 extern char &IfConverterID;
221 FunctionPass *createIfConverter(
222 std::function<bool(const MachineFunction &)> Ftor);
224 /// MachineBlockPlacement - This pass places basic blocks based on branch
226 extern char &MachineBlockPlacementID;
228 /// MachineBlockPlacementStats - This pass collects statistics about the
229 /// basic block placement using branch probabilities and block frequency
231 extern char &MachineBlockPlacementStatsID;
233 /// GCLowering Pass - Used by gc.root to perform its default lowering
235 FunctionPass *createGCLoweringPass();
237 /// ShadowStackGCLowering - Implements the custom lowering mechanism
238 /// used by the shadow stack GC. Only runs on functions which opt in to
239 /// the shadow stack collector.
240 FunctionPass *createShadowStackGCLoweringPass();
242 /// GCMachineCodeAnalysis - Target-independent pass to mark safe points
243 /// in machine code. Must be added very late during code generation, just
244 /// prior to output, and importantly after all CFG transformations (such as
246 extern char &GCMachineCodeAnalysisID;
248 /// Creates a pass to print GC metadata.
250 FunctionPass *createGCInfoPrinter(raw_ostream &OS);
252 /// MachineCSE - This pass performs global CSE on machine instructions.
253 extern char &MachineCSEID;
255 /// ImplicitNullChecks - This pass folds null pointer checks into nearby
256 /// memory operations.
257 extern char &ImplicitNullChecksID;
259 /// MachineLICM - This pass performs LICM on machine instructions.
260 extern char &MachineLICMID;
262 /// MachineSinking - This pass performs sinking on machine instructions.
263 extern char &MachineSinkingID;
265 /// MachineCopyPropagation - This pass performs copy propagation on
266 /// machine instructions.
267 extern char &MachineCopyPropagationID;
269 /// PeepholeOptimizer - This pass performs peephole optimizations -
270 /// like extension and comparison eliminations.
271 extern char &PeepholeOptimizerID;
273 /// OptimizePHIs - This pass optimizes machine instruction PHIs
274 /// to take advantage of opportunities created during DAG legalization.
275 extern char &OptimizePHIsID;
277 /// StackSlotColoring - This pass performs stack slot coloring.
278 extern char &StackSlotColoringID;
280 /// \brief This pass lays out funclets contiguously.
281 extern char &FuncletLayoutID;
283 /// This pass inserts the XRay instrumentation sleds if they are supported by
284 /// the target platform.
285 extern char &XRayInstrumentationID;
287 /// \brief This pass implements the "patchable-function" attribute.
288 extern char &PatchableFunctionID;
290 /// createStackProtectorPass - This pass adds stack protectors to functions.
292 FunctionPass *createStackProtectorPass(const TargetMachine *TM);
294 /// createMachineVerifierPass - This pass verifies cenerated machine code
295 /// instructions for correctness.
297 FunctionPass *createMachineVerifierPass(const std::string& Banner);
299 /// createDwarfEHPass - This pass mulches exception handling code into a form
300 /// adapted to code generation. Required if using dwarf exception handling.
301 FunctionPass *createDwarfEHPass(const TargetMachine *TM);
303 /// createWinEHPass - Prepares personality functions used by MSVC on Windows,
304 /// in addition to the Itanium LSDA based personalities.
305 FunctionPass *createWinEHPass(const TargetMachine *TM);
307 /// createSjLjEHPreparePass - This pass adapts exception handling code to use
308 /// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
310 FunctionPass *createSjLjEHPreparePass();
312 /// LocalStackSlotAllocation - This pass assigns local frame indices to stack
313 /// slots relative to one another and allocates base registers to access them
314 /// when it is estimated by the target to be out of range of normal frame
315 /// pointer or stack pointer index addressing.
316 extern char &LocalStackSlotAllocationID;
318 /// ExpandISelPseudos - This pass expands pseudo-instructions.
319 extern char &ExpandISelPseudosID;
321 /// createExecutionDependencyFixPass - This pass fixes execution time
322 /// problems with dependent instructions, such as switching execution
323 /// domains to match.
325 /// The pass will examine instructions using and defining registers in RC.
327 FunctionPass *createExecutionDependencyFixPass(const TargetRegisterClass *RC);
329 /// UnpackMachineBundles - This pass unpack machine instruction bundles.
330 extern char &UnpackMachineBundlesID;
333 createUnpackMachineBundles(std::function<bool(const MachineFunction &)> Ftor);
335 /// FinalizeMachineBundles - This pass finalize machine instruction
336 /// bundles (created earlier, e.g. during pre-RA scheduling).
337 extern char &FinalizeMachineBundlesID;
339 /// StackMapLiveness - This pass analyses the register live-out set of
340 /// stackmap/patchpoint intrinsics and attaches the calculated information to
341 /// the intrinsic for later emission to the StackMap.
342 extern char &StackMapLivenessID;
344 /// LiveDebugValues pass
345 extern char &LiveDebugValuesID;
347 /// createJumpInstrTables - This pass creates jump-instruction tables.
348 ModulePass *createJumpInstrTablesPass();
350 /// createForwardControlFlowIntegrityPass - This pass adds control-flow
352 ModulePass *createForwardControlFlowIntegrityPass();
354 /// InterleavedAccess Pass - This pass identifies and matches interleaved
355 /// memory accesses to target specific intrinsics.
357 FunctionPass *createInterleavedAccessPass(const TargetMachine *TM);
359 /// LowerEmuTLS - This pass generates __emutls_[vt].xyz variables for all
360 /// TLS variables for the emulated TLS model.
362 ModulePass *createLowerEmuTLSPass(const TargetMachine *TM);
364 /// This pass lowers the @llvm.load.relative intrinsic to instructions.
365 /// This is unsafe to do earlier because a pass may combine the constant
366 /// initializer into the load, which may result in an overflowing evaluation.
367 ModulePass *createPreISelIntrinsicLoweringPass();
369 /// GlobalMerge - This pass merges internal (by default) globals into structs
370 /// to enable reuse of a base pointer by indexed addressing modes.
371 /// It can also be configured to focus on size optimizations only.
373 Pass *createGlobalMergePass(const TargetMachine *TM, unsigned MaximalOffset,
374 bool OnlyOptimizeForSize = false,
375 bool MergeExternalByDefault = false);
377 /// This pass splits the stack into a safe stack and an unsafe stack to
378 /// protect against stack-based overflow vulnerabilities.
379 FunctionPass *createSafeStackPass(const TargetMachine *TM = nullptr);
381 /// This pass detects subregister lanes in a virtual register that are used
382 /// independently of other lanes and splits them into separate virtual
384 extern char &RenameIndependentSubregsID;
386 /// This pass is executed POST-RA to collect which physical registers are
387 /// preserved by given machine function.
388 FunctionPass *createRegUsageInfoCollector();
390 /// Return a MachineFunction pass that identifies call sites
391 /// and propagates register usage information of callee to caller
392 /// if available with PysicalRegisterUsageInfo pass.
393 FunctionPass *createRegUsageInfoPropPass();
395 /// This pass performs software pipelining on machine instructions.
396 extern char &MachinePipelinerID;
398 /// This pass frees the memory occupied by the MachineFunction.
399 FunctionPass *createFreeMachineFunctionPass();
400 } // End llvm namespace
402 /// Target machine pass initializer for passes with dependencies. Use with
403 /// INITIALIZE_TM_PASS_END.
404 #define INITIALIZE_TM_PASS_BEGIN INITIALIZE_PASS_BEGIN
406 /// Target machine pass initializer for passes with dependencies. Use with
407 /// INITIALIZE_TM_PASS_BEGIN.
408 #define INITIALIZE_TM_PASS_END(passName, arg, name, cfg, analysis) \
409 PassInfo *PI = new PassInfo( \
410 name, arg, &passName::ID, \
411 PassInfo::NormalCtor_t(callDefaultCtor<passName>), cfg, analysis, \
412 PassInfo::TargetMachineCtor_t(callTargetMachineCtor<passName>)); \
413 Registry.registerPass(*PI, true); \
416 LLVM_DEFINE_ONCE_FLAG(Initialize##passName##PassFlag); \
417 void llvm::initialize##passName##Pass(PassRegistry &Registry) { \
418 llvm::call_once(Initialize##passName##PassFlag, \
419 initialize##passName##PassOnce, std::ref(Registry)); \
422 /// This initializer registers TargetMachine constructor, so the pass being
423 /// initialized can use target dependent interfaces. Please do not move this
424 /// macro to be together with INITIALIZE_PASS, which is a complete target
425 /// independent initializer, and we don't want to make libScalarOpts depend
427 #define INITIALIZE_TM_PASS(passName, arg, name, cfg, analysis) \
428 INITIALIZE_TM_PASS_BEGIN(passName, arg, name, cfg, analysis) \
429 INITIALIZE_TM_PASS_END(passName, arg, name, cfg, analysis)