1 //===- RegisterScavenging.h - Machine register scavenging -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// This file declares the machine register scavenger class. It can provide
12 /// information such as unused register at any point in a machine basic block.
13 /// It also provides a mechanism to make registers available by evicting them
16 //===----------------------------------------------------------------------===//
18 #ifndef LLVM_CODEGEN_REGISTERSCAVENGING_H
19 #define LLVM_CODEGEN_REGISTERSCAVENGING_H
21 #include "llvm/ADT/BitVector.h"
22 #include "llvm/ADT/SmallVector.h"
23 #include "llvm/CodeGen/LiveRegUnits.h"
24 #include "llvm/CodeGen/MachineBasicBlock.h"
25 #include "llvm/CodeGen/MachineRegisterInfo.h"
26 #include "llvm/MC/LaneBitmask.h"
31 class TargetInstrInfo;
32 class TargetRegisterClass;
33 class TargetRegisterInfo;
36 const TargetRegisterInfo *TRI;
37 const TargetInstrInfo *TII;
38 MachineRegisterInfo* MRI;
39 MachineBasicBlock *MBB = nullptr;
40 MachineBasicBlock::iterator MBBI;
41 unsigned NumRegUnits = 0;
43 /// True if RegScavenger is currently tracking the liveness of registers.
44 bool Tracking = false;
46 /// Information on scavenged registers (held in a spill slot).
47 struct ScavengedInfo {
48 ScavengedInfo(int FI = -1) : FrameIndex(FI) {}
50 /// A spill slot used for scavenging a register post register allocation.
53 /// If non-zero, the specific register is currently being
54 /// scavenged. That is, it is spilled to this scavenging stack slot.
57 /// The instruction that restores the scavenged register from stack.
58 const MachineInstr *Restore = nullptr;
61 /// A vector of information on scavenged registers.
62 SmallVector<ScavengedInfo, 2> Scavenged;
64 LiveRegUnits LiveUnits;
66 // These BitVectors are only used internally to forward(). They are members
67 // to avoid frequent reallocations.
68 BitVector KillRegUnits, DefRegUnits;
69 BitVector TmpRegUnits;
72 RegScavenger() = default;
74 /// Start tracking liveness from the begin of basic block \p MBB.
75 void enterBasicBlock(MachineBasicBlock &MBB);
77 /// Start tracking liveness from the end of basic block \p MBB.
78 /// Use backward() to move towards the beginning of the block. This is
79 /// preferred to enterBasicBlock() and forward() because it does not depend
80 /// on the presence of kill flags.
81 void enterBasicBlockEnd(MachineBasicBlock &MBB);
83 /// Move the internal MBB iterator and update register states.
86 /// Move the internal MBB iterator and update register states until
87 /// it has processed the specific iterator.
88 void forward(MachineBasicBlock::iterator I) {
89 if (!Tracking && MBB->begin() != I) forward();
90 while (MBBI != I) forward();
93 /// Invert the behavior of forward() on the current instruction (undo the
94 /// changes to the available registers made by forward()).
97 /// Unprocess instructions until you reach the provided iterator.
98 void unprocess(MachineBasicBlock::iterator I) {
99 while (MBBI != I) unprocess();
102 /// Update internal register state and move MBB iterator backwards.
103 /// Contrary to unprocess() this method gives precise results even in the
104 /// absence of kill flags.
107 /// Call backward() as long as the internal iterator does not point to \p I.
108 void backward(MachineBasicBlock::iterator I) {
113 /// Move the internal MBB iterator but do not update register states.
114 void skipTo(MachineBasicBlock::iterator I) {
115 if (I == MachineBasicBlock::iterator(nullptr))
120 MachineBasicBlock::iterator getCurrentPosition() const { return MBBI; }
122 /// Return if a specific register is currently used.
123 bool isRegUsed(unsigned Reg, bool includeReserved = true) const;
125 /// Return all available registers in the register class in Mask.
126 BitVector getRegsAvailable(const TargetRegisterClass *RC);
128 /// Find an unused register of the specified register class.
129 /// Return 0 if none is found.
130 unsigned FindUnusedReg(const TargetRegisterClass *RC) const;
132 /// Add a scavenging frame index.
133 void addScavengingFrameIndex(int FI) {
134 Scavenged.push_back(ScavengedInfo(FI));
137 /// Query whether a frame index is a scavenging frame index.
138 bool isScavengingFrameIndex(int FI) const {
139 for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
140 IE = Scavenged.end(); I != IE; ++I)
141 if (I->FrameIndex == FI)
147 /// Get an array of scavenging frame indices.
148 void getScavengingFrameIndices(SmallVectorImpl<int> &A) const {
149 for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
150 IE = Scavenged.end(); I != IE; ++I)
151 if (I->FrameIndex >= 0)
152 A.push_back(I->FrameIndex);
155 /// Make a register of the specific register class
156 /// available and do the appropriate bookkeeping. SPAdj is the stack
157 /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
158 /// Returns the scavenged register.
159 /// This is deprecated as it depends on the quality of the kill flags being
160 /// present; Use scavengeRegisterBackwards() instead!
161 unsigned scavengeRegister(const TargetRegisterClass *RC,
162 MachineBasicBlock::iterator I, int SPAdj);
163 unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
164 return scavengeRegister(RegClass, MBBI, SPAdj);
167 /// Make a register of the specific register class available from the current
168 /// position backwards to the place before \p To. If \p RestoreAfter is true
169 /// this includes the instruction following the current position.
170 /// SPAdj is the stack adjustment due to call frame, it's passed along to
171 /// eliminateFrameIndex().
172 /// Returns the scavenged register.
173 unsigned scavengeRegisterBackwards(const TargetRegisterClass &RC,
174 MachineBasicBlock::iterator To,
175 bool RestoreAfter, int SPAdj);
177 /// Tell the scavenger a register is used.
178 void setRegUsed(unsigned Reg, LaneBitmask LaneMask = LaneBitmask::getAll());
181 /// Returns true if a register is reserved. It is never "unused".
182 bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); }
184 /// setUsed / setUnused - Mark the state of one or a number of register units.
186 void setUsed(const BitVector &RegUnits) {
187 LiveUnits.addUnits(RegUnits);
189 void setUnused(const BitVector &RegUnits) {
190 LiveUnits.removeUnits(RegUnits);
193 /// Processes the current instruction and fill the KillRegUnits and
194 /// DefRegUnits bit vectors.
195 void determineKillsAndDefs();
197 /// Add all Reg Units that Reg contains to BV.
198 void addRegUnits(BitVector &BV, unsigned Reg);
200 /// Remove all Reg Units that \p Reg contains from \p BV.
201 void removeRegUnits(BitVector &BV, unsigned Reg);
203 /// Return the candidate register that is unused for the longest after
204 /// StartMI. UseMI is set to the instruction where the search stopped.
206 /// No more than InstrLimit instructions are inspected.
207 unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI,
208 BitVector &Candidates,
210 MachineBasicBlock::iterator &UseMI);
212 /// Initialize RegisterScavenger.
213 void init(MachineBasicBlock &MBB);
215 /// Mark live-in registers of basic block as used.
216 void setLiveInsUsed(const MachineBasicBlock &MBB);
218 /// Spill a register after position \p After and reload it before position
220 ScavengedInfo &spill(unsigned Reg, const TargetRegisterClass &RC, int SPAdj,
221 MachineBasicBlock::iterator Before,
222 MachineBasicBlock::iterator &UseMI);
225 /// Replaces all frame index virtual registers with physical registers. Uses the
226 /// register scavenger to find an appropriate register to use.
227 void scavengeFrameVirtualRegs(MachineFunction &MF, RegScavenger &RS);
229 } // end namespace llvm
231 #endif // LLVM_CODEGEN_REGISTERSCAVENGING_H