1 //===-- RegisterScavenging.h - Machine register scavenging ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// This file declares the machine register scavenger class. It can provide
12 /// information such as unused register at any point in a machine basic block.
13 /// It also provides a mechanism to make registers available by evicting them
16 //===----------------------------------------------------------------------===//
18 #ifndef LLVM_CODEGEN_REGISTERSCAVENGING_H
19 #define LLVM_CODEGEN_REGISTERSCAVENGING_H
21 #include "llvm/ADT/BitVector.h"
22 #include "llvm/CodeGen/MachineBasicBlock.h"
23 #include "llvm/CodeGen/MachineRegisterInfo.h"
27 class MachineRegisterInfo;
28 class TargetRegisterInfo;
29 class TargetInstrInfo;
30 class TargetRegisterClass;
33 const TargetRegisterInfo *TRI;
34 const TargetInstrInfo *TII;
35 MachineRegisterInfo* MRI;
36 MachineBasicBlock *MBB;
37 MachineBasicBlock::iterator MBBI;
40 /// True if RegScavenger is currently tracking the liveness of registers.
43 /// Information on scavenged registers (held in a spill slot).
44 struct ScavengedInfo {
45 ScavengedInfo(int FI = -1) : FrameIndex(FI), Reg(0), Restore(nullptr) {}
47 /// A spill slot used for scavenging a register post register allocation.
50 /// If non-zero, the specific register is currently being
51 /// scavenged. That is, it is spilled to this scavenging stack slot.
54 /// The instruction that restores the scavenged register from stack.
55 const MachineInstr *Restore;
58 /// A vector of information on scavenged registers.
59 SmallVector<ScavengedInfo, 2> Scavenged;
61 /// The current state of each reg unit immediately before MBBI.
62 /// One bit per register unit. If bit is not set it means any
63 /// register containing that register unit is currently being used.
64 BitVector RegUnitsAvailable;
66 // These BitVectors are only used internally to forward(). They are members
67 // to avoid frequent reallocations.
68 BitVector KillRegUnits, DefRegUnits;
69 BitVector TmpRegUnits;
73 : MBB(nullptr), NumRegUnits(0), Tracking(false) {}
75 /// Start tracking liveness from the begin of basic block \p MBB.
76 void enterBasicBlock(MachineBasicBlock &MBB);
78 /// Move the internal MBB iterator and update register states.
81 /// Move the internal MBB iterator and update register states until
82 /// it has processed the specific iterator.
83 void forward(MachineBasicBlock::iterator I) {
84 if (!Tracking && MBB->begin() != I) forward();
85 while (MBBI != I) forward();
88 /// Invert the behavior of forward() on the current instruction (undo the
89 /// changes to the available registers made by forward()).
92 /// Unprocess instructions until you reach the provided iterator.
93 void unprocess(MachineBasicBlock::iterator I) {
94 while (MBBI != I) unprocess();
97 /// Move the internal MBB iterator but do not update register states.
98 void skipTo(MachineBasicBlock::iterator I) {
99 if (I == MachineBasicBlock::iterator(nullptr))
104 MachineBasicBlock::iterator getCurrentPosition() const { return MBBI; }
106 /// Return if a specific register is currently used.
107 bool isRegUsed(unsigned Reg, bool includeReserved = true) const;
109 /// Return all available registers in the register class in Mask.
110 BitVector getRegsAvailable(const TargetRegisterClass *RC);
112 /// Find an unused register of the specified register class.
113 /// Return 0 if none is found.
114 unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const;
116 /// Add a scavenging frame index.
117 void addScavengingFrameIndex(int FI) {
118 Scavenged.push_back(ScavengedInfo(FI));
121 /// Query whether a frame index is a scavenging frame index.
122 bool isScavengingFrameIndex(int FI) const {
123 for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
124 IE = Scavenged.end(); I != IE; ++I)
125 if (I->FrameIndex == FI)
131 /// Get an array of scavenging frame indices.
132 void getScavengingFrameIndices(SmallVectorImpl<int> &A) const {
133 for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
134 IE = Scavenged.end(); I != IE; ++I)
135 if (I->FrameIndex >= 0)
136 A.push_back(I->FrameIndex);
139 /// Make a register of the specific register class
140 /// available and do the appropriate bookkeeping. SPAdj is the stack
141 /// adjustment due to call frame, it's passed along to eliminateFrameIndex().
142 /// Returns the scavenged register.
143 unsigned scavengeRegister(const TargetRegisterClass *RegClass,
144 MachineBasicBlock::iterator I, int SPAdj);
145 unsigned scavengeRegister(const TargetRegisterClass *RegClass, int SPAdj) {
146 return scavengeRegister(RegClass, MBBI, SPAdj);
149 /// Tell the scavenger a register is used.
150 void setRegUsed(unsigned Reg, LaneBitmask LaneMask = ~0u);
152 /// Returns true if a register is reserved. It is never "unused".
153 bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); }
155 /// setUsed / setUnused - Mark the state of one or a number of register units.
157 void setUsed(BitVector &RegUnits) {
158 RegUnitsAvailable.reset(RegUnits);
160 void setUnused(BitVector &RegUnits) {
161 RegUnitsAvailable |= RegUnits;
164 /// Processes the current instruction and fill the KillRegUnits and
165 /// DefRegUnits bit vectors.
166 void determineKillsAndDefs();
168 /// Add all Reg Units that Reg contains to BV.
169 void addRegUnits(BitVector &BV, unsigned Reg);
171 /// Return the candidate register that is unused for the longest after
172 /// StartMI. UseMI is set to the instruction where the search stopped.
174 /// No more than InstrLimit instructions are inspected.
175 unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI,
176 BitVector &Candidates,
178 MachineBasicBlock::iterator &UseMI);
180 /// Allow resetting register state info for multiple
181 /// passes over/within the same function.
185 } // End llvm namespace