1 //===- StackMaps.h - StackMaps ----------------------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #ifndef LLVM_CODEGEN_STACKMAPS_H
11 #define LLVM_CODEGEN_STACKMAPS_H
13 #include "llvm/ADT/MapVector.h"
14 #include "llvm/ADT/SmallVector.h"
15 #include "llvm/CodeGen/MachineInstr.h"
16 #include "llvm/IR/CallingConv.h"
17 #include "llvm/Support/Debug.h"
30 class TargetRegisterInfo;
32 /// \brief MI-level stackmap operands.
34 /// MI stackmap operations take the form:
35 /// <id>, <numBytes>, live args...
38 /// Enumerate the meta operands.
39 enum { IDPos, NBytesPos };
42 const MachineInstr* MI;
45 explicit StackMapOpers(const MachineInstr *MI);
47 /// Return the ID for the given stackmap
48 uint64_t getID() const { return MI->getOperand(IDPos).getImm(); }
50 /// Return the number of patchable bytes the given stackmap should emit.
51 uint32_t getNumPatchBytes() const {
52 return MI->getOperand(NBytesPos).getImm();
55 /// Get the operand index of the variable list of non-argument operands.
56 /// These hold the "live state".
57 unsigned getVarIdx() const {
58 // Skip ID, nShadowBytes.
63 /// \brief MI-level patchpoint operands.
65 /// MI patchpoint operations take the form:
66 /// [<def>], <id>, <numBytes>, <target>, <numArgs>, <cc>, ...
68 /// IR patchpoint intrinsics do not have the <cc> operand because calling
69 /// convention is part of the subclass data.
71 /// SD patchpoint nodes do not have a def operand because it is part of the
74 /// Patchpoints following the anyregcc convention are handled specially. For
75 /// these, the stack map also records the location of the return value and
77 class PatchPointOpers {
79 /// Enumerate the meta operands.
80 enum { IDPos, NBytesPos, TargetPos, NArgPos, CCPos, MetaEnd };
83 const MachineInstr *MI;
86 unsigned getMetaIdx(unsigned Pos = 0) const {
87 assert(Pos < MetaEnd && "Meta operand index out of range.");
88 return (HasDef ? 1 : 0) + Pos;
91 const MachineOperand &getMetaOper(unsigned Pos) const {
92 return MI->getOperand(getMetaIdx(Pos));
96 explicit PatchPointOpers(const MachineInstr *MI);
98 bool isAnyReg() const { return (getCallingConv() == CallingConv::AnyReg); }
99 bool hasDef() const { return HasDef; }
101 /// Return the ID for the given patchpoint.
102 uint64_t getID() const { return getMetaOper(IDPos).getImm(); }
104 /// Return the number of patchable bytes the given patchpoint should emit.
105 uint32_t getNumPatchBytes() const {
106 return getMetaOper(NBytesPos).getImm();
109 /// Returns the target of the underlying call.
110 const MachineOperand &getCallTarget() const {
111 return getMetaOper(TargetPos);
114 /// Returns the calling convention
115 CallingConv::ID getCallingConv() const {
116 return getMetaOper(CCPos).getImm();
119 unsigned getArgIdx() const { return getMetaIdx() + MetaEnd; }
121 /// Return the number of call arguments
122 uint32_t getNumCallArgs() const {
123 return MI->getOperand(getMetaIdx(NArgPos)).getImm();
126 /// Get the operand index of the variable list of non-argument operands.
127 /// These hold the "live state".
128 unsigned getVarIdx() const {
129 return getMetaIdx() + MetaEnd + getNumCallArgs();
132 /// Get the index at which stack map locations will be recorded.
133 /// Arguments are not recorded unless the anyregcc convention is used.
134 unsigned getStackMapStartIdx() const {
140 /// \brief Get the next scratch register operand index.
141 unsigned getNextScratchIdx(unsigned StartIdx = 0) const;
144 /// MI-level Statepoint operands
146 /// Statepoint operands take the form:
147 /// <id>, <num patch bytes >, <num call arguments>, <call target>,
148 /// [call arguments...],
149 /// <StackMaps::ConstantOp>, <calling convention>,
150 /// <StackMaps::ConstantOp>, <statepoint flags>,
151 /// <StackMaps::ConstantOp>, <num deopt args>, [deopt args...],
152 /// <gc base/derived pairs...> <gc allocas...>
153 /// Note that the last two sets of arguments are not currently length
155 class StatepointOpers {
156 // TODO:: we should change the STATEPOINT representation so that CC and
157 // Flags should be part of meta operands, with args and deopt operands, and
158 // gc operands all prefixed by their length and a type code. This would be
159 // much more consistent.
161 // These values are aboolute offsets into the operands of the statepoint
163 enum { IDPos, NBytesPos, NCallArgsPos, CallTargetPos, MetaEnd };
165 // These values are relative offests from the start of the statepoint meta
166 // arguments (i.e. the end of the call arguments).
167 enum { CCOffset = 1, FlagsOffset = 3, NumDeoptOperandsOffset = 5 };
169 explicit StatepointOpers(const MachineInstr *MI) : MI(MI) {}
171 /// Get starting index of non call related arguments
172 /// (calling convention, statepoint flags, vm state and gc state).
173 unsigned getVarIdx() const {
174 return MI->getOperand(NCallArgsPos).getImm() + MetaEnd;
177 /// Return the ID for the given statepoint.
178 uint64_t getID() const { return MI->getOperand(IDPos).getImm(); }
180 /// Return the number of patchable bytes the given statepoint should emit.
181 uint32_t getNumPatchBytes() const {
182 return MI->getOperand(NBytesPos).getImm();
185 /// Returns the target of the underlying call.
186 const MachineOperand &getCallTarget() const {
187 return MI->getOperand(CallTargetPos);
191 const MachineInstr *MI;
205 LocationType Type = Unprocessed;
210 Location() = default;
211 Location(LocationType Type, unsigned Size, unsigned Reg, int64_t Offset)
212 : Type(Type), Size(Size), Reg(Reg), Offset(Offset) {}
216 unsigned short Reg = 0;
217 unsigned short DwarfRegNum = 0;
218 unsigned short Size = 0;
220 LiveOutReg() = default;
221 LiveOutReg(unsigned short Reg, unsigned short DwarfRegNum,
223 : Reg(Reg), DwarfRegNum(DwarfRegNum), Size(Size) {}
226 // OpTypes are used to encode information about the following logical
227 // operand (which may consist of several MachineOperands) for the
229 using OpType = enum { DirectMemRefOp, IndirectMemRefOp, ConstantOp };
231 StackMaps(AsmPrinter &AP);
239 /// \brief Generate a stackmap record for a stackmap instruction.
241 /// MI must be a raw STACKMAP, not a PATCHPOINT.
242 void recordStackMap(const MachineInstr &MI);
244 /// \brief Generate a stackmap record for a patchpoint instruction.
245 void recordPatchPoint(const MachineInstr &MI);
247 /// \brief Generate a stackmap record for a statepoint instruction.
248 void recordStatepoint(const MachineInstr &MI);
250 /// If there is any stack map data, create a stack map section and serialize
251 /// the map info into it. This clears the stack map data structures
253 void serializeToStackMapSection();
256 static const char *WSMP;
258 using LocationVec = SmallVector<Location, 8>;
259 using LiveOutVec = SmallVector<LiveOutReg, 8>;
260 using ConstantPool = MapVector<uint64_t, uint64_t>;
262 struct FunctionInfo {
263 uint64_t StackSize = 0;
264 uint64_t RecordCount = 1;
266 FunctionInfo() = default;
267 explicit FunctionInfo(uint64_t StackSize) : StackSize(StackSize) {}
270 struct CallsiteInfo {
271 const MCExpr *CSOffsetExpr = nullptr;
273 LocationVec Locations;
276 CallsiteInfo() = default;
277 CallsiteInfo(const MCExpr *CSOffsetExpr, uint64_t ID,
278 LocationVec &&Locations, LiveOutVec &&LiveOuts)
279 : CSOffsetExpr(CSOffsetExpr), ID(ID), Locations(std::move(Locations)),
280 LiveOuts(std::move(LiveOuts)) {}
283 using FnInfoMap = MapVector<const MCSymbol *, FunctionInfo>;
284 using CallsiteInfoList = std::vector<CallsiteInfo>;
287 CallsiteInfoList CSInfos;
288 ConstantPool ConstPool;
291 MachineInstr::const_mop_iterator
292 parseOperand(MachineInstr::const_mop_iterator MOI,
293 MachineInstr::const_mop_iterator MOE, LocationVec &Locs,
294 LiveOutVec &LiveOuts) const;
296 /// \brief Create a live-out register record for the given register @p Reg.
297 LiveOutReg createLiveOutReg(unsigned Reg,
298 const TargetRegisterInfo *TRI) const;
300 /// \brief Parse the register live-out mask and return a vector of live-out
301 /// registers that need to be recorded in the stackmap.
302 LiveOutVec parseRegisterLiveOutMask(const uint32_t *Mask) const;
304 /// This should be called by the MC lowering code _immediately_ before
305 /// lowering the MI to an MCInst. It records where the operands for the
306 /// instruction are stored, and outputs a label to record the offset of
307 /// the call from the start of the text section. In special cases (e.g. AnyReg
308 /// calling convention) the return register is also recorded if requested.
309 void recordStackMapOpers(const MachineInstr &MI, uint64_t ID,
310 MachineInstr::const_mop_iterator MOI,
311 MachineInstr::const_mop_iterator MOE,
312 bool recordResult = false);
314 /// \brief Emit the stackmap header.
315 void emitStackmapHeader(MCStreamer &OS);
317 /// \brief Emit the function frame record for each function.
318 void emitFunctionFrameRecords(MCStreamer &OS);
320 /// \brief Emit the constant pool.
321 void emitConstantPoolEntries(MCStreamer &OS);
323 /// \brief Emit the callsite info for each stackmap/patchpoint intrinsic call.
324 void emitCallsiteEntries(MCStreamer &OS);
326 void print(raw_ostream &OS);
327 void debug() { print(dbgs()); }
330 } // end namespace llvm
332 #endif // LLVM_CODEGEN_STACKMAPS_H