1 //===- llvm/CodeGen/VirtRegMap.h - Virtual Register Map ---------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a virtual register map. This maps virtual registers to
11 // physical registers and virtual registers to stack slots. It is created and
12 // updated by a register allocator and then used by a machine code rewriter that
13 // adds spill code and rewrites virtual into physical register references.
15 //===----------------------------------------------------------------------===//
17 #ifndef LLVM_CODEGEN_VIRTREGMAP_H
18 #define LLVM_CODEGEN_VIRTREGMAP_H
20 #include "llvm/ADT/IndexedMap.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/TargetRegisterInfo.h"
23 #include "llvm/MC/MCRegisterInfo.h"
24 #include "llvm/Pass.h"
29 class MachineFunction;
30 class MachineRegisterInfo;
32 class TargetInstrInfo;
34 class VirtRegMap : public MachineFunctionPass {
38 NO_STACK_SLOT = (1L << 30)-1,
39 MAX_STACK_SLOT = (1L << 18)-1
43 MachineRegisterInfo *MRI;
44 const TargetInstrInfo *TII;
45 const TargetRegisterInfo *TRI;
48 /// Virt2PhysMap - This is a virtual to physical register
49 /// mapping. Each virtual register is required to have an entry in
50 /// it; even spilled virtual registers (the register mapped to a
51 /// spilled register is the temporary used to load it from the
53 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2PhysMap;
55 /// Virt2StackSlotMap - This is virtual register to stack slot
56 /// mapping. Each spilled virtual register has an entry in it
57 /// which corresponds to the stack slot this register is spilled
59 IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap;
61 /// Virt2SplitMap - This is virtual register to splitted virtual register
63 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2SplitMap;
65 /// createSpillSlot - Allocate a spill slot for RC from MFI.
66 unsigned createSpillSlot(const TargetRegisterClass *RC);
71 VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG),
72 Virt2StackSlotMap(NO_STACK_SLOT), Virt2SplitMap(0) {}
73 VirtRegMap(const VirtRegMap &) = delete;
74 VirtRegMap &operator=(const VirtRegMap &) = delete;
76 bool runOnMachineFunction(MachineFunction &MF) override;
78 void getAnalysisUsage(AnalysisUsage &AU) const override {
80 MachineFunctionPass::getAnalysisUsage(AU);
83 MachineFunction &getMachineFunction() const {
84 assert(MF && "getMachineFunction called before runOnMachineFunction");
88 MachineRegisterInfo &getRegInfo() const { return *MRI; }
89 const TargetRegisterInfo &getTargetRegInfo() const { return *TRI; }
93 /// @brief returns true if the specified virtual register is
94 /// mapped to a physical register
95 bool hasPhys(unsigned virtReg) const {
96 return getPhys(virtReg) != NO_PHYS_REG;
99 /// @brief returns the physical register mapped to the specified
101 unsigned getPhys(unsigned virtReg) const {
102 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
103 return Virt2PhysMap[virtReg];
106 /// @brief creates a mapping for the specified virtual register to
107 /// the specified physical register
108 void assignVirt2Phys(unsigned virtReg, MCPhysReg physReg);
110 /// @brief clears the specified virtual register's, physical
112 void clearVirt(unsigned virtReg) {
113 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
114 assert(Virt2PhysMap[virtReg] != NO_PHYS_REG &&
115 "attempt to clear a not assigned virtual register");
116 Virt2PhysMap[virtReg] = NO_PHYS_REG;
119 /// @brief clears all virtual to physical register mappings
120 void clearAllVirt() {
121 Virt2PhysMap.clear();
125 /// @brief returns true if VirtReg is assigned to its preferred physreg.
126 bool hasPreferredPhys(unsigned VirtReg);
128 /// @brief returns true if VirtReg has a known preferred register.
129 /// This returns false if VirtReg has a preference that is a virtual
130 /// register that hasn't been assigned yet.
131 bool hasKnownPreference(unsigned VirtReg);
133 /// @brief records virtReg is a split live interval from SReg.
134 void setIsSplitFromReg(unsigned virtReg, unsigned SReg) {
135 Virt2SplitMap[virtReg] = SReg;
138 /// @brief returns the live interval virtReg is split from.
139 unsigned getPreSplitReg(unsigned virtReg) const {
140 return Virt2SplitMap[virtReg];
143 /// getOriginal - Return the original virtual register that VirtReg descends
144 /// from through splitting.
145 /// A register that was not created by splitting is its own original.
146 /// This operation is idempotent.
147 unsigned getOriginal(unsigned VirtReg) const {
148 unsigned Orig = getPreSplitReg(VirtReg);
149 return Orig ? Orig : VirtReg;
152 /// @brief returns true if the specified virtual register is not
153 /// mapped to a stack slot or rematerialized.
154 bool isAssignedReg(unsigned virtReg) const {
155 if (getStackSlot(virtReg) == NO_STACK_SLOT)
157 // Split register can be assigned a physical register as well as a
158 // stack slot or remat id.
159 return (Virt2SplitMap[virtReg] && Virt2PhysMap[virtReg] != NO_PHYS_REG);
162 /// @brief returns the stack slot mapped to the specified virtual
164 int getStackSlot(unsigned virtReg) const {
165 assert(TargetRegisterInfo::isVirtualRegister(virtReg));
166 return Virt2StackSlotMap[virtReg];
169 /// @brief create a mapping for the specifed virtual register to
170 /// the next available stack slot
171 int assignVirt2StackSlot(unsigned virtReg);
173 /// @brief create a mapping for the specified virtual register to
174 /// the specified stack slot
175 void assignVirt2StackSlot(unsigned virtReg, int frameIndex);
177 void print(raw_ostream &OS, const Module* M = nullptr) const override;
181 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
186 } // end llvm namespace
188 #endif // LLVM_CODEGEN_VIRTREGMAP_H