contrib/llvm/include/llvm/IR/IntrinsicsARM.td

   1 //===- IntrinsicsARM.td - Defines ARM intrinsics -----------*- tablegen -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file defines all of the ARM-specific intrinsics.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14
  15 //===----------------------------------------------------------------------===//
  16 // TLS
  17
  18 let TargetPrefix = "arm" in {  // All intrinsics start with "llvm.arm.".
  19
  20 // A space-consuming intrinsic primarily for testing ARMConstantIslands. The
  21 // first argument is the number of bytes this "instruction" takes up, the second
  22 // and return value are essentially chains, used to force ordering during ISel.
  23 def int_arm_space : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
  24
  25 // 16-bit multiplications
  26 def int_arm_smulbb : GCCBuiltin<"__builtin_arm_smulbb">,
  27     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
  28 def int_arm_smulbt : GCCBuiltin<"__builtin_arm_smulbt">,
  29     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
  30 def int_arm_smultb : GCCBuiltin<"__builtin_arm_smultb">,
  31     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
  32 def int_arm_smultt : GCCBuiltin<"__builtin_arm_smultt">,
  33     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
  34 def int_arm_smulwb : GCCBuiltin<"__builtin_arm_smulwb">,
  35     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
  36 def int_arm_smulwt : GCCBuiltin<"__builtin_arm_smulwt">,
  37     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
  38
  39 //===----------------------------------------------------------------------===//
  40 // Saturating Arithmetic
  41
  42 def int_arm_qadd : GCCBuiltin<"__builtin_arm_qadd">,
  43     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
  44     [Commutative, IntrNoMem]>;
  45 def int_arm_qsub : GCCBuiltin<"__builtin_arm_qsub">,
  46     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
  47 def int_arm_ssat : GCCBuiltin<"__builtin_arm_ssat">,
  48     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
  49 def int_arm_usat : GCCBuiltin<"__builtin_arm_usat">,
  50     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
  51
  52 // Accumulating multiplications
  53 def int_arm_smlabb : GCCBuiltin<"__builtin_arm_smlabb">,
  54     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
  55     [IntrNoMem]>;
  56 def int_arm_smlabt : GCCBuiltin<"__builtin_arm_smlabt">,
  57     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
  58     [IntrNoMem]>;
  59 def int_arm_smlatb : GCCBuiltin<"__builtin_arm_smlatb">,
  60     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
  61     [IntrNoMem]>;
  62 def int_arm_smlatt : GCCBuiltin<"__builtin_arm_smlatt">,
  63     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
  64     [IntrNoMem]>;
  65 def int_arm_smlawb : GCCBuiltin<"__builtin_arm_smlawb">,
  66     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
  67     [IntrNoMem]>;
  68 def int_arm_smlawt : GCCBuiltin<"__builtin_arm_smlawt">,
  69     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
  70     [IntrNoMem]>;
  71
  72 // Parallel 16-bit saturation
  73 def int_arm_ssat16 : GCCBuiltin<"__builtin_arm_ssat16">,
  74     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
  75 def int_arm_usat16 : GCCBuiltin<"__builtin_arm_usat16">,
  76     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
  77
  78 // Packing and unpacking
  79 def int_arm_sxtab16 : GCCBuiltin<"__builtin_arm_sxtab16">,
  80     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
  81 def int_arm_sxtb16 : GCCBuiltin<"__builtin_arm_sxtb16">,
  82     Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
  83 def int_arm_uxtab16 : GCCBuiltin<"__builtin_arm_uxtab16">,
  84     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
  85 def int_arm_uxtb16 : GCCBuiltin<"__builtin_arm_uxtb16">,
  86     Intrinsic<[llvm_i32_ty], [llvm_i32_ty], [IntrNoMem]>;
  87
  88 // Parallel selection, reads the GE flags.
  89 def int_arm_sel : GCCBuiltin<"__builtin_arm_sel">,
  90     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrReadMem]>;
  91
  92 // Parallel 8-bit addition and subtraction
  93 def int_arm_qadd8  : GCCBuiltin<"__builtin_arm_qadd8">,
  94     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
  95 def int_arm_qsub8  : GCCBuiltin<"__builtin_arm_qsub8">,
  96     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
  97 // Writes to the GE bits.
  98 def int_arm_sadd8  : GCCBuiltin<"__builtin_arm_sadd8">,
  99     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 100 def int_arm_shadd8  : GCCBuiltin<"__builtin_arm_shadd8">,
 101     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 102 def int_arm_shsub8  : GCCBuiltin<"__builtin_arm_shsub8">,
 103     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 104 // Writes to the GE bits.
 105 def int_arm_ssub8  : GCCBuiltin<"__builtin_arm_ssub8">,
 106     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 107 // Writes to the GE bits.
 108 def int_arm_uadd8  : GCCBuiltin<"__builtin_arm_uadd8">,
 109     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 110 def int_arm_uhadd8  : GCCBuiltin<"__builtin_arm_uhadd8">,
 111     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 112 def int_arm_uhsub8  : GCCBuiltin<"__builtin_arm_uhsub8">,
 113     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 114 def int_arm_uqadd8  : GCCBuiltin<"__builtin_arm_uqadd8">,
 115     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 116 def int_arm_uqsub8  : GCCBuiltin<"__builtin_arm_uqsub8">,
 117     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 118 // Writes to the GE bits.
 119 def int_arm_usub8  : GCCBuiltin<"__builtin_arm_usub8">,
 120     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 121
 122 // Sum of 8-bit absolute differences
 123 def int_arm_usad8  : GCCBuiltin<"__builtin_arm_usad8">,
 124     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 125 def int_arm_usada8  : GCCBuiltin<"__builtin_arm_usada8">,
 126     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
 127               [IntrNoMem]>;
 128
 129 // Parallel 16-bit addition and subtraction
 130 def int_arm_qadd16  : GCCBuiltin<"__builtin_arm_qadd16">,
 131     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 132 def int_arm_qasx  : GCCBuiltin<"__builtin_arm_qasx">,
 133     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 134 def int_arm_qsax  : GCCBuiltin<"__builtin_arm_qsax">,
 135     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 136 def int_arm_qsub16  : GCCBuiltin<"__builtin_arm_qsub16">,
 137     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 138 // Writes to the GE bits.
 139 def int_arm_sadd16  : GCCBuiltin<"__builtin_arm_sadd16">,
 140     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 141 // Writes to the GE bits.
 142 def int_arm_sasx  : GCCBuiltin<"__builtin_arm_sasx">,
 143     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 144 def int_arm_shadd16  : GCCBuiltin<"__builtin_arm_shadd16">,
 145     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 146 def int_arm_shasx  : GCCBuiltin<"__builtin_arm_shasx">,
 147     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 148 def int_arm_shsax  : GCCBuiltin<"__builtin_arm_shsax">,
 149     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 150 def int_arm_shsub16  : GCCBuiltin<"__builtin_arm_shsub16">,
 151     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 152 // Writes to the GE bits.
 153 def int_arm_ssax  : GCCBuiltin<"__builtin_arm_ssax">,
 154     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 155 // Writes to the GE bits.
 156 def int_arm_ssub16  : GCCBuiltin<"__builtin_arm_ssub16">,
 157     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 158 // Writes to the GE bits.
 159 def int_arm_uadd16  : GCCBuiltin<"__builtin_arm_uadd16">,
 160     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 161 // Writes to the GE bits.
 162 def int_arm_uasx  : GCCBuiltin<"__builtin_arm_uasx">,
 163     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 164 def int_arm_uhadd16  : GCCBuiltin<"__builtin_arm_uhadd16">,
 165     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 166 def int_arm_uhasx  : GCCBuiltin<"__builtin_arm_uhasx">,
 167     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 168 def int_arm_uhsax  : GCCBuiltin<"__builtin_arm_uhsax">,
 169     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 170 def int_arm_uhsub16  : GCCBuiltin<"__builtin_arm_uhsub16">,
 171     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 172 def int_arm_uqadd16  : GCCBuiltin<"__builtin_arm_uqadd16">,
 173     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 174 def int_arm_uqasx  : GCCBuiltin<"__builtin_arm_uqasx">,
 175     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 176 def int_arm_uqsax  : GCCBuiltin<"__builtin_arm_uqsax">,
 177     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 178 def int_arm_uqsub16  : GCCBuiltin<"__builtin_arm_uqsub16">,
 179     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 180 // Writes to the GE bits.
 181 def int_arm_usax  : GCCBuiltin<"__builtin_arm_usax">,
 182     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 183 // Writes to the GE bits.
 184 def int_arm_usub16  : GCCBuiltin<"__builtin_arm_usub16">,
 185     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], []>;
 186
 187 // Parallel 16-bit multiplication
 188 def int_arm_smlad : GCCBuiltin<"__builtin_arm_smlad">,
 189     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
 190               [IntrNoMem]>;
 191 def int_arm_smladx : GCCBuiltin<"__builtin_arm_smladx">,
 192     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
 193               [IntrNoMem]>;
 194 def int_arm_smlald : GCCBuiltin<"__builtin_arm_smlald">,
 195     Intrinsic<[llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i64_ty],
 196               [IntrNoMem]>;
 197 def int_arm_smlaldx : GCCBuiltin<"__builtin_arm_smlaldx">,
 198     Intrinsic<[llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i64_ty],
 199               [IntrNoMem]>;
 200 def int_arm_smlsd : GCCBuiltin<"__builtin_arm_smlsd">,
 201     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
 202               [IntrNoMem]>;
 203 def int_arm_smlsdx : GCCBuiltin<"__builtin_arm_smlsdx">,
 204     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty],
 205               [IntrNoMem]>;
 206 def int_arm_smlsld : GCCBuiltin<"__builtin_arm_smlsld">,
 207     Intrinsic<[llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i64_ty],
 208               [IntrNoMem]>;
 209 def int_arm_smlsldx : GCCBuiltin<"__builtin_arm_smlsldx">,
 210     Intrinsic<[llvm_i64_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i64_ty],
 211               [IntrNoMem]>;
 212 def int_arm_smuad : GCCBuiltin<"__builtin_arm_smuad">,
 213     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 214 def int_arm_smuadx : GCCBuiltin<"__builtin_arm_smuadx">,
 215     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 216 def int_arm_smusd : GCCBuiltin<"__builtin_arm_smusd">,
 217     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 218 def int_arm_smusdx : GCCBuiltin<"__builtin_arm_smusdx">,
 219     Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], [IntrNoMem]>;
 220
 221
 222 //===----------------------------------------------------------------------===//
 223 // Load, Store and Clear exclusive
 224
 225 def int_arm_ldrex : Intrinsic<[llvm_i32_ty], [llvm_anyptr_ty]>;
 226 def int_arm_strex : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_anyptr_ty]>;
 227
 228 def int_arm_ldaex : Intrinsic<[llvm_i32_ty], [llvm_anyptr_ty]>;
 229 def int_arm_stlex : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_anyptr_ty]>;
 230
 231 def int_arm_clrex : Intrinsic<[]>;
 232
 233 def int_arm_strexd : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty,
 234     llvm_ptr_ty]>;
 235 def int_arm_ldrexd : Intrinsic<[llvm_i32_ty, llvm_i32_ty], [llvm_ptr_ty]>;
 236
 237 def int_arm_stlexd : Intrinsic<[llvm_i32_ty],
 238                                [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty]>;
 239 def int_arm_ldaexd : Intrinsic<[llvm_i32_ty, llvm_i32_ty], [llvm_ptr_ty]>;
 240
 241 //===----------------------------------------------------------------------===//
 242 // Data barrier instructions
 243 def int_arm_dmb : GCCBuiltin<"__builtin_arm_dmb">, MSBuiltin<"__dmb">,
 244                   Intrinsic<[], [llvm_i32_ty]>;
 245 def int_arm_dsb : GCCBuiltin<"__builtin_arm_dsb">, MSBuiltin<"__dsb">,
 246                   Intrinsic<[], [llvm_i32_ty]>;
 247 def int_arm_isb : GCCBuiltin<"__builtin_arm_isb">, MSBuiltin<"__isb">,
 248                   Intrinsic<[], [llvm_i32_ty]>;
 249
 250 //===----------------------------------------------------------------------===//
 251 // VFP
 252
 253 def int_arm_get_fpscr : GCCBuiltin<"__builtin_arm_get_fpscr">,
 254                        Intrinsic<[llvm_i32_ty], [], []>;
 255 def int_arm_set_fpscr : GCCBuiltin<"__builtin_arm_set_fpscr">,
 256                        Intrinsic<[], [llvm_i32_ty], []>;
 257 def int_arm_vcvtr     : Intrinsic<[llvm_float_ty], [llvm_anyfloat_ty],
 258                                   [IntrNoMem]>;
 259 def int_arm_vcvtru    : Intrinsic<[llvm_float_ty], [llvm_anyfloat_ty],
 260                                   [IntrNoMem]>;
 261
 262 //===----------------------------------------------------------------------===//
 263 // Coprocessor
 264
 265 def int_arm_ldc : GCCBuiltin<"__builtin_arm_ldc">,
 266    Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], []>;
 267 def int_arm_ldcl : GCCBuiltin<"__builtin_arm_ldcl">,
 268    Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], []>;
 269 def int_arm_ldc2 : GCCBuiltin<"__builtin_arm_ldc2">,
 270    Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], []>;
 271 def int_arm_ldc2l : GCCBuiltin<"__builtin_arm_ldc2l">,
 272    Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], []>;
 273
 274 def int_arm_stc : GCCBuiltin<"__builtin_arm_stc">,
 275    Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], []>;
 276 def int_arm_stcl : GCCBuiltin<"__builtin_arm_stcl">,
 277    Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], []>;
 278 def int_arm_stc2 : GCCBuiltin<"__builtin_arm_stc2">,
 279    Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], []>;
 280 def int_arm_stc2l : GCCBuiltin<"__builtin_arm_stc2l">,
 281    Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_ptr_ty], []>;
 282
 283 // Move to coprocessor
 284 def int_arm_mcr : GCCBuiltin<"__builtin_arm_mcr">,
 285    Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
 286                   llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], []>;
 287 def int_arm_mcr2 : GCCBuiltin<"__builtin_arm_mcr2">,
 288    Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
 289                   llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], []>;
 290
 291 // Move from coprocessor
 292 def int_arm_mrc : GCCBuiltin<"__builtin_arm_mrc">,
 293                   MSBuiltin<"_MoveFromCoprocessor">,
 294    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
 295                              llvm_i32_ty, llvm_i32_ty], []>;
 296 def int_arm_mrc2 : GCCBuiltin<"__builtin_arm_mrc2">,
 297                    MSBuiltin<"_MoveFromCoprocessor2">,
 298    Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
 299                              llvm_i32_ty, llvm_i32_ty], []>;
 300
 301 // Coprocessor data processing
 302 def int_arm_cdp : GCCBuiltin<"__builtin_arm_cdp">,
 303    Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
 304                   llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], []>;
 305 def int_arm_cdp2 : GCCBuiltin<"__builtin_arm_cdp2">,
 306    Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
 307                   llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], []>;
 308
 309 // Move from two registers to coprocessor
 310 def int_arm_mcrr : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
 311                                   llvm_i32_ty, llvm_i32_ty], []>;
 312 def int_arm_mcrr2 : Intrinsic<[], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty,
 313                                    llvm_i32_ty, llvm_i32_ty], []>;
 314
 315 def int_arm_mrrc : Intrinsic<[llvm_i32_ty, llvm_i32_ty], [llvm_i32_ty,
 316                               llvm_i32_ty, llvm_i32_ty], []>;
 317 def int_arm_mrrc2 : Intrinsic<[llvm_i32_ty, llvm_i32_ty], [llvm_i32_ty,
 318                                llvm_i32_ty, llvm_i32_ty], []>;
 319
 320 //===----------------------------------------------------------------------===//
 321 // CRC32
 322
 323 def int_arm_crc32b  : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
 324     [IntrNoMem]>;
 325 def int_arm_crc32cb : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
 326     [IntrNoMem]>;
 327 def int_arm_crc32h  : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
 328     [IntrNoMem]>;
 329 def int_arm_crc32ch : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
 330     [IntrNoMem]>;
 331 def int_arm_crc32w  : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
 332     [IntrNoMem]>;
 333 def int_arm_crc32cw : Intrinsic<[llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty],
 334     [IntrNoMem]>;
 335
 336 //===----------------------------------------------------------------------===//
 337 // HINT
 338
 339 def int_arm_hint : Intrinsic<[], [llvm_i32_ty]>;
 340 def int_arm_dbg : Intrinsic<[], [llvm_i32_ty]>;
 341
 342 //===----------------------------------------------------------------------===//
 343 // UND (reserved undefined sequence)
 344
 345 def int_arm_undefined : Intrinsic<[], [llvm_i32_ty]>;
 346
 347 //===----------------------------------------------------------------------===//
 348 // Advanced SIMD (NEON)
 349
 350 // The following classes do not correspond directly to GCC builtins.
 351 class Neon_1Arg_Intrinsic
 352   : Intrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>], [IntrNoMem]>;
 353 class Neon_1Arg_Narrow_Intrinsic
 354   : Intrinsic<[llvm_anyvector_ty], [LLVMExtendedType<0>], [IntrNoMem]>;
 355 class Neon_2Arg_Intrinsic
 356   : Intrinsic<[llvm_anyvector_ty], [LLVMMatchType<0>, LLVMMatchType<0>],
 357               [IntrNoMem]>;
 358 class Neon_2Arg_Narrow_Intrinsic
 359   : Intrinsic<[llvm_anyvector_ty], [LLVMExtendedType<0>, LLVMExtendedType<0>],
 360               [IntrNoMem]>;
 361 class Neon_2Arg_Long_Intrinsic
 362   : Intrinsic<[llvm_anyvector_ty], [LLVMTruncatedType<0>, LLVMTruncatedType<0>],
 363               [IntrNoMem]>;
 364 class Neon_3Arg_Intrinsic
 365   : Intrinsic<[llvm_anyvector_ty],
 366               [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
 367               [IntrNoMem]>;
 368 class Neon_3Arg_Long_Intrinsic
 369   : Intrinsic<[llvm_anyvector_ty],
 370               [LLVMMatchType<0>, LLVMTruncatedType<0>, LLVMTruncatedType<0>],
 371               [IntrNoMem]>;
 372 class Neon_CvtFxToFP_Intrinsic
 373   : Intrinsic<[llvm_anyfloat_ty], [llvm_anyint_ty, llvm_i32_ty], [IntrNoMem]>;
 374 class Neon_CvtFPToFx_Intrinsic
 375   : Intrinsic<[llvm_anyint_ty], [llvm_anyfloat_ty, llvm_i32_ty], [IntrNoMem]>;
 376 class Neon_CvtFPtoInt_1Arg_Intrinsic
 377   : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty], [IntrNoMem]>;
 378
 379 class Neon_Compare_Intrinsic
 380   : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty, LLVMMatchType<1>],
 381               [IntrNoMem]>;
 382
 383 // The table operands for VTBL and VTBX consist of 1 to 4 v8i8 vectors.
 384 // Besides the table, VTBL has one other v8i8 argument and VTBX has two.
 385 // Overall, the classes range from 2 to 6 v8i8 arguments.
 386 class Neon_Tbl2Arg_Intrinsic
 387   : Intrinsic<[llvm_v8i8_ty],
 388               [llvm_v8i8_ty, llvm_v8i8_ty], [IntrNoMem]>;
 389 class Neon_Tbl3Arg_Intrinsic
 390   : Intrinsic<[llvm_v8i8_ty],
 391               [llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty], [IntrNoMem]>;
 392 class Neon_Tbl4Arg_Intrinsic
 393   : Intrinsic<[llvm_v8i8_ty],
 394               [llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty],
 395               [IntrNoMem]>;
 396 class Neon_Tbl5Arg_Intrinsic
 397   : Intrinsic<[llvm_v8i8_ty],
 398               [llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty,
 399                llvm_v8i8_ty], [IntrNoMem]>;
 400 class Neon_Tbl6Arg_Intrinsic
 401   : Intrinsic<[llvm_v8i8_ty],
 402               [llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty, llvm_v8i8_ty,
 403                llvm_v8i8_ty, llvm_v8i8_ty], [IntrNoMem]>;
 404
 405 // Arithmetic ops
 406
 407 let IntrProperties = [IntrNoMem, Commutative] in {
 408
 409   // Vector Add.
 410   def int_arm_neon_vhadds : Neon_2Arg_Intrinsic;
 411   def int_arm_neon_vhaddu : Neon_2Arg_Intrinsic;
 412   def int_arm_neon_vrhadds : Neon_2Arg_Intrinsic;
 413   def int_arm_neon_vrhaddu : Neon_2Arg_Intrinsic;
 414   def int_arm_neon_vqadds : Neon_2Arg_Intrinsic;
 415   def int_arm_neon_vqaddu : Neon_2Arg_Intrinsic;
 416   def int_arm_neon_vraddhn : Neon_2Arg_Narrow_Intrinsic;
 417
 418   // Vector Multiply.
 419   def int_arm_neon_vmulp : Neon_2Arg_Intrinsic;
 420   def int_arm_neon_vqdmulh : Neon_2Arg_Intrinsic;
 421   def int_arm_neon_vqrdmulh : Neon_2Arg_Intrinsic;
 422   def int_arm_neon_vmulls : Neon_2Arg_Long_Intrinsic;
 423   def int_arm_neon_vmullu : Neon_2Arg_Long_Intrinsic;
 424   def int_arm_neon_vmullp : Neon_2Arg_Long_Intrinsic;
 425   def int_arm_neon_vqdmull : Neon_2Arg_Long_Intrinsic;
 426
 427   // Vector Maximum.
 428   def int_arm_neon_vmaxs : Neon_2Arg_Intrinsic;
 429   def int_arm_neon_vmaxu : Neon_2Arg_Intrinsic;
 430   def int_arm_neon_vmaxnm : Neon_2Arg_Intrinsic;
 431
 432   // Vector Minimum.
 433   def int_arm_neon_vmins : Neon_2Arg_Intrinsic;
 434   def int_arm_neon_vminu : Neon_2Arg_Intrinsic;
 435   def int_arm_neon_vminnm : Neon_2Arg_Intrinsic;
 436
 437   // Vector Reciprocal Step.
 438   def int_arm_neon_vrecps : Neon_2Arg_Intrinsic;
 439
 440   // Vector Reciprocal Square Root Step.
 441   def int_arm_neon_vrsqrts : Neon_2Arg_Intrinsic;
 442 }
 443
 444 // Vector Subtract.
 445 def int_arm_neon_vhsubs : Neon_2Arg_Intrinsic;
 446 def int_arm_neon_vhsubu : Neon_2Arg_Intrinsic;
 447 def int_arm_neon_vqsubs : Neon_2Arg_Intrinsic;
 448 def int_arm_neon_vqsubu : Neon_2Arg_Intrinsic;
 449 def int_arm_neon_vrsubhn : Neon_2Arg_Narrow_Intrinsic;
 450
 451 // Vector Absolute Compare.
 452 def int_arm_neon_vacge : Neon_Compare_Intrinsic;
 453 def int_arm_neon_vacgt : Neon_Compare_Intrinsic;
 454
 455 // Vector Absolute Differences.
 456 def int_arm_neon_vabds : Neon_2Arg_Intrinsic;
 457 def int_arm_neon_vabdu : Neon_2Arg_Intrinsic;
 458
 459 // Vector Pairwise Add.
 460 def int_arm_neon_vpadd : Neon_2Arg_Intrinsic;
 461
 462 // Vector Pairwise Add Long.
 463 // Note: This is different than the other "long" NEON intrinsics because
 464 // the result vector has half as many elements as the source vector.
 465 // The source and destination vector types must be specified separately.
 466 def int_arm_neon_vpaddls : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty],
 467                                      [IntrNoMem]>;
 468 def int_arm_neon_vpaddlu : Intrinsic<[llvm_anyvector_ty], [llvm_anyvector_ty],
 469                                      [IntrNoMem]>;
 470
 471 // Vector Pairwise Add and Accumulate Long.
 472 // Note: This is similar to vpaddl but the destination vector also appears
 473 // as the first argument.
 474 def int_arm_neon_vpadals : Intrinsic<[llvm_anyvector_ty],
 475                                      [LLVMMatchType<0>, llvm_anyvector_ty],
 476                                      [IntrNoMem]>;
 477 def int_arm_neon_vpadalu : Intrinsic<[llvm_anyvector_ty],
 478                                      [LLVMMatchType<0>, llvm_anyvector_ty],
 479                                      [IntrNoMem]>;
 480
 481 // Vector Pairwise Maximum and Minimum.
 482 def int_arm_neon_vpmaxs : Neon_2Arg_Intrinsic;
 483 def int_arm_neon_vpmaxu : Neon_2Arg_Intrinsic;
 484 def int_arm_neon_vpmins : Neon_2Arg_Intrinsic;
 485 def int_arm_neon_vpminu : Neon_2Arg_Intrinsic;
 486
 487 // Vector Shifts:
 488 //
 489 // The various saturating and rounding vector shift operations need to be
 490 // represented by intrinsics in LLVM, and even the basic VSHL variable shift
 491 // operation cannot be safely translated to LLVM's shift operators.  VSHL can
 492 // be used for both left and right shifts, or even combinations of the two,
 493 // depending on the signs of the shift amounts.  It also has well-defined
 494 // behavior for shift amounts that LLVM leaves undefined.  Only basic shifts
 495 // by constants can be represented with LLVM's shift operators.
 496 //
 497 // The shift counts for these intrinsics are always vectors, even for constant
 498 // shifts, where the constant is replicated.  For consistency with VSHL (and
 499 // other variable shift instructions), left shifts have positive shift counts
 500 // and right shifts have negative shift counts.  This convention is also used
 501 // for constant right shift intrinsics, and to help preserve sanity, the
 502 // intrinsic names use "shift" instead of either "shl" or "shr".  Where
 503 // applicable, signed and unsigned versions of the intrinsics are
 504 // distinguished with "s" and "u" suffixes.  A few NEON shift instructions,
 505 // such as VQSHLU, take signed operands but produce unsigned results; these
 506 // use a "su" suffix.
 507
 508 // Vector Shift.
 509 def int_arm_neon_vshifts : Neon_2Arg_Intrinsic;
 510 def int_arm_neon_vshiftu : Neon_2Arg_Intrinsic;
 511
 512 // Vector Rounding Shift.
 513 def int_arm_neon_vrshifts : Neon_2Arg_Intrinsic;
 514 def int_arm_neon_vrshiftu : Neon_2Arg_Intrinsic;
 515 def int_arm_neon_vrshiftn : Neon_2Arg_Narrow_Intrinsic;
 516
 517 // Vector Saturating Shift.
 518 def int_arm_neon_vqshifts : Neon_2Arg_Intrinsic;
 519 def int_arm_neon_vqshiftu : Neon_2Arg_Intrinsic;
 520 def int_arm_neon_vqshiftsu : Neon_2Arg_Intrinsic;
 521 def int_arm_neon_vqshiftns : Neon_2Arg_Narrow_Intrinsic;
 522 def int_arm_neon_vqshiftnu : Neon_2Arg_Narrow_Intrinsic;
 523 def int_arm_neon_vqshiftnsu : Neon_2Arg_Narrow_Intrinsic;
 524
 525 // Vector Saturating Rounding Shift.
 526 def int_arm_neon_vqrshifts : Neon_2Arg_Intrinsic;
 527 def int_arm_neon_vqrshiftu : Neon_2Arg_Intrinsic;
 528 def int_arm_neon_vqrshiftns : Neon_2Arg_Narrow_Intrinsic;
 529 def int_arm_neon_vqrshiftnu : Neon_2Arg_Narrow_Intrinsic;
 530 def int_arm_neon_vqrshiftnsu : Neon_2Arg_Narrow_Intrinsic;
 531
 532 // Vector Shift and Insert.
 533 def int_arm_neon_vshiftins : Neon_3Arg_Intrinsic;
 534
 535 // Vector Absolute Value and Saturating Absolute Value.
 536 def int_arm_neon_vabs : Neon_1Arg_Intrinsic;
 537 def int_arm_neon_vqabs : Neon_1Arg_Intrinsic;
 538
 539 // Vector Saturating Negate.
 540 def int_arm_neon_vqneg : Neon_1Arg_Intrinsic;
 541
 542 // Vector Count Leading Sign/Zero Bits.
 543 def int_arm_neon_vcls : Neon_1Arg_Intrinsic;
 544
 545 // Vector Reciprocal Estimate.
 546 def int_arm_neon_vrecpe : Neon_1Arg_Intrinsic;
 547
 548 // Vector Reciprocal Square Root Estimate.
 549 def int_arm_neon_vrsqrte : Neon_1Arg_Intrinsic;
 550
 551 // Vector Conversions Between Floating-point and Integer
 552 def int_arm_neon_vcvtau : Neon_CvtFPtoInt_1Arg_Intrinsic;
 553 def int_arm_neon_vcvtas : Neon_CvtFPtoInt_1Arg_Intrinsic;
 554 def int_arm_neon_vcvtnu : Neon_CvtFPtoInt_1Arg_Intrinsic;
 555 def int_arm_neon_vcvtns : Neon_CvtFPtoInt_1Arg_Intrinsic;
 556 def int_arm_neon_vcvtpu : Neon_CvtFPtoInt_1Arg_Intrinsic;
 557 def int_arm_neon_vcvtps : Neon_CvtFPtoInt_1Arg_Intrinsic;
 558 def int_arm_neon_vcvtmu : Neon_CvtFPtoInt_1Arg_Intrinsic;
 559 def int_arm_neon_vcvtms : Neon_CvtFPtoInt_1Arg_Intrinsic;
 560
 561 // Vector Conversions Between Floating-point and Fixed-point.
 562 def int_arm_neon_vcvtfp2fxs : Neon_CvtFPToFx_Intrinsic;
 563 def int_arm_neon_vcvtfp2fxu : Neon_CvtFPToFx_Intrinsic;
 564 def int_arm_neon_vcvtfxs2fp : Neon_CvtFxToFP_Intrinsic;
 565 def int_arm_neon_vcvtfxu2fp : Neon_CvtFxToFP_Intrinsic;
 566
 567 // Vector Conversions Between Half-Precision and Single-Precision.
 568 def int_arm_neon_vcvtfp2hf
 569     : Intrinsic<[llvm_v4i16_ty], [llvm_v4f32_ty], [IntrNoMem]>;
 570 def int_arm_neon_vcvthf2fp
 571     : Intrinsic<[llvm_v4f32_ty], [llvm_v4i16_ty], [IntrNoMem]>;
 572
 573 // Narrowing Saturating Vector Moves.
 574 def int_arm_neon_vqmovns : Neon_1Arg_Narrow_Intrinsic;
 575 def int_arm_neon_vqmovnu : Neon_1Arg_Narrow_Intrinsic;
 576 def int_arm_neon_vqmovnsu : Neon_1Arg_Narrow_Intrinsic;
 577
 578 // Vector Table Lookup.
 579 // The first 1-4 arguments are the table.
 580 def int_arm_neon_vtbl1 : Neon_Tbl2Arg_Intrinsic;
 581 def int_arm_neon_vtbl2 : Neon_Tbl3Arg_Intrinsic;
 582 def int_arm_neon_vtbl3 : Neon_Tbl4Arg_Intrinsic;
 583 def int_arm_neon_vtbl4 : Neon_Tbl5Arg_Intrinsic;
 584
 585 // Vector Table Extension.
 586 // Some elements of the destination vector may not be updated, so the original
 587 // value of that vector is passed as the first argument.  The next 1-4
 588 // arguments after that are the table.
 589 def int_arm_neon_vtbx1 : Neon_Tbl3Arg_Intrinsic;
 590 def int_arm_neon_vtbx2 : Neon_Tbl4Arg_Intrinsic;
 591 def int_arm_neon_vtbx3 : Neon_Tbl5Arg_Intrinsic;
 592 def int_arm_neon_vtbx4 : Neon_Tbl6Arg_Intrinsic;
 593
 594 // Vector Rounding
 595 def int_arm_neon_vrintn : Neon_1Arg_Intrinsic;
 596 def int_arm_neon_vrintx : Neon_1Arg_Intrinsic;
 597 def int_arm_neon_vrinta : Neon_1Arg_Intrinsic;
 598 def int_arm_neon_vrintz : Neon_1Arg_Intrinsic;
 599 def int_arm_neon_vrintm : Neon_1Arg_Intrinsic;
 600 def int_arm_neon_vrintp : Neon_1Arg_Intrinsic;
 601
 602 // De-interleaving vector loads from N-element structures.
 603 // Source operands are the address and alignment.
 604 def int_arm_neon_vld1 : Intrinsic<[llvm_anyvector_ty],
 605                                   [llvm_anyptr_ty, llvm_i32_ty],
 606                                   [IntrReadMem, IntrArgMemOnly]>;
 607 def int_arm_neon_vld2 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>],
 608                                   [llvm_anyptr_ty, llvm_i32_ty],
 609                                   [IntrReadMem, IntrArgMemOnly]>;
 610 def int_arm_neon_vld3 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
 611                                    LLVMMatchType<0>],
 612                                   [llvm_anyptr_ty, llvm_i32_ty],
 613                                   [IntrReadMem, IntrArgMemOnly]>;
 614 def int_arm_neon_vld4 : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
 615                                    LLVMMatchType<0>, LLVMMatchType<0>],
 616                                   [llvm_anyptr_ty, llvm_i32_ty],
 617                                   [IntrReadMem, IntrArgMemOnly]>;
 618
 619 // Vector load N-element structure to one lane.
 620 // Source operands are: the address, the N input vectors (since only one
 621 // lane is assigned), the lane number, and the alignment.
 622 def int_arm_neon_vld2lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>],
 623                                       [llvm_anyptr_ty, LLVMMatchType<0>,
 624                                        LLVMMatchType<0>, llvm_i32_ty,
 625                                        llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
 626 def int_arm_neon_vld3lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
 627                                        LLVMMatchType<0>],
 628                                       [llvm_anyptr_ty, LLVMMatchType<0>,
 629                                        LLVMMatchType<0>, LLVMMatchType<0>,
 630                                        llvm_i32_ty, llvm_i32_ty],
 631                                       [IntrReadMem, IntrArgMemOnly]>;
 632 def int_arm_neon_vld4lane : Intrinsic<[llvm_anyvector_ty, LLVMMatchType<0>,
 633                                        LLVMMatchType<0>, LLVMMatchType<0>],
 634                                       [llvm_anyptr_ty, LLVMMatchType<0>,
 635                                        LLVMMatchType<0>, LLVMMatchType<0>,
 636                                        LLVMMatchType<0>, llvm_i32_ty,
 637                                        llvm_i32_ty], [IntrReadMem, IntrArgMemOnly]>;
 638
 639 // Interleaving vector stores from N-element structures.
 640 // Source operands are: the address, the N vectors, and the alignment.
 641 def int_arm_neon_vst1 : Intrinsic<[],
 642                                   [llvm_anyptr_ty, llvm_anyvector_ty,
 643                                    llvm_i32_ty], [IntrArgMemOnly]>;
 644 def int_arm_neon_vst2 : Intrinsic<[],
 645                                   [llvm_anyptr_ty, llvm_anyvector_ty,
 646                                    LLVMMatchType<1>, llvm_i32_ty],
 647                                   [IntrArgMemOnly]>;
 648 def int_arm_neon_vst3 : Intrinsic<[],
 649                                   [llvm_anyptr_ty, llvm_anyvector_ty,
 650                                    LLVMMatchType<1>, LLVMMatchType<1>,
 651                                    llvm_i32_ty], [IntrArgMemOnly]>;
 652 def int_arm_neon_vst4 : Intrinsic<[],
 653                                   [llvm_anyptr_ty, llvm_anyvector_ty,
 654                                    LLVMMatchType<1>, LLVMMatchType<1>,
 655                                    LLVMMatchType<1>, llvm_i32_ty],
 656                                   [IntrArgMemOnly]>;
 657
 658 // Vector store N-element structure from one lane.
 659 // Source operands are: the address, the N vectors, the lane number, and
 660 // the alignment.
 661 def int_arm_neon_vst2lane : Intrinsic<[],
 662                                       [llvm_anyptr_ty, llvm_anyvector_ty,
 663                                        LLVMMatchType<1>, llvm_i32_ty,
 664                                        llvm_i32_ty], [IntrArgMemOnly]>;
 665 def int_arm_neon_vst3lane : Intrinsic<[],
 666                                       [llvm_anyptr_ty, llvm_anyvector_ty,
 667                                        LLVMMatchType<1>, LLVMMatchType<1>,
 668                                        llvm_i32_ty, llvm_i32_ty],
 669                                       [IntrArgMemOnly]>;
 670 def int_arm_neon_vst4lane : Intrinsic<[],
 671                                       [llvm_anyptr_ty, llvm_anyvector_ty,
 672                                        LLVMMatchType<1>, LLVMMatchType<1>,
 673                                        LLVMMatchType<1>, llvm_i32_ty,
 674                                        llvm_i32_ty], [IntrArgMemOnly]>;
 675
 676 // Vector bitwise select.
 677 def int_arm_neon_vbsl : Intrinsic<[llvm_anyvector_ty],
 678                         [LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
 679                         [IntrNoMem]>;
 680
 681
 682 // Crypto instructions
 683 class AES_1Arg_Intrinsic : Intrinsic<[llvm_v16i8_ty],
 684                                      [llvm_v16i8_ty], [IntrNoMem]>;
 685 class AES_2Arg_Intrinsic : Intrinsic<[llvm_v16i8_ty],
 686                                      [llvm_v16i8_ty, llvm_v16i8_ty],
 687                                      [IntrNoMem]>;
 688
 689 class SHA_1Arg_Intrinsic : Intrinsic<[llvm_i32_ty], [llvm_i32_ty],
 690                                      [IntrNoMem]>;
 691 class SHA_2Arg_Intrinsic : Intrinsic<[llvm_v4i32_ty],
 692                                      [llvm_v4i32_ty, llvm_v4i32_ty],
 693                                      [IntrNoMem]>;
 694 class SHA_3Arg_i32_Intrinsic : Intrinsic<[llvm_v4i32_ty],
 695                                    [llvm_v4i32_ty, llvm_i32_ty, llvm_v4i32_ty],
 696                                    [IntrNoMem]>;
 697 class SHA_3Arg_v4i32_Intrinsic : Intrinsic<[llvm_v4i32_ty],
 698                                    [llvm_v4i32_ty, llvm_v4i32_ty,llvm_v4i32_ty],
 699                                    [IntrNoMem]>;
 700
 701 def int_arm_neon_aesd : AES_2Arg_Intrinsic;
 702 def int_arm_neon_aese : AES_2Arg_Intrinsic;
 703 def int_arm_neon_aesimc : AES_1Arg_Intrinsic;
 704 def int_arm_neon_aesmc : AES_1Arg_Intrinsic;
 705 def int_arm_neon_sha1h : SHA_1Arg_Intrinsic;
 706 def int_arm_neon_sha1su1 : SHA_2Arg_Intrinsic;
 707 def int_arm_neon_sha256su0 : SHA_2Arg_Intrinsic;
 708 def int_arm_neon_sha1c : SHA_3Arg_i32_Intrinsic;
 709 def int_arm_neon_sha1m : SHA_3Arg_i32_Intrinsic;
 710 def int_arm_neon_sha1p : SHA_3Arg_i32_Intrinsic;
 711 def int_arm_neon_sha1su0: SHA_3Arg_v4i32_Intrinsic;
 712 def int_arm_neon_sha256h: SHA_3Arg_v4i32_Intrinsic;
 713 def int_arm_neon_sha256h2: SHA_3Arg_v4i32_Intrinsic;
 714 def int_arm_neon_sha256su1: SHA_3Arg_v4i32_Intrinsic;
 715
 716 } // end TargetPrefix