1 //===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a target parser to recognise ARM hardware features
11 // such as FPU/CPU/ARCH/extensions and specific support such as HWDIV.
13 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_SUPPORT_ARMTARGETPARSER_H
16 #define LLVM_SUPPORT_ARMTARGETPARSER_H
18 #include "llvm/ADT/StringRef.h"
19 #include "llvm/ADT/Triple.h"
20 #include "llvm/Support/ARMBuildAttributes.h"
26 // Arch extension modifiers for CPUs.
27 // Note that this is not the same as the AArch64 list
28 enum ArchExtKind : unsigned {
34 AEK_HWDIVTHUMB = 1 << 4,
35 AEK_HWDIVARM = 1 << 5,
44 AEK_DOTPROD = 1 << 14,
47 AEK_FP16FML = 1 << 17,
49 // Unsupported extensions.
51 AEK_IWMMXT = 0x10000000,
52 AEK_IWMMXT2 = 0x20000000,
53 AEK_MAVERICK = 0x40000000,
54 AEK_XSCALE = 0x80000000,
57 // List of Arch Extension names.
58 // FIXME: TableGen this.
64 const char *NegFeature;
66 StringRef getName() const { return StringRef(NameCStr, NameLength); }
69 const ExtName ARCHExtNames[] = {
70 #define ARM_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) \
71 {NAME, sizeof(NAME) - 1, ID, FEATURE, NEGFEATURE},
72 #include "ARMTargetParser.def"
75 // List of HWDiv names (use getHWDivSynonym) and which architectural
76 // features they correspond to (use getHWDivFeatures).
77 // FIXME: TableGen this.
83 StringRef getName() const { return StringRef(NameCStr, NameLength); }
85 #define ARM_HW_DIV_NAME(NAME, ID) {NAME, sizeof(NAME) - 1, ID},
86 #include "ARMTargetParser.def"
91 #define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) ID,
92 #include "ARMTargetParser.def"
95 // List of CPU names and their arches.
96 // The same CPU can have multiple arches and can be default on multiple arches.
97 // When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
98 // When this becomes table-generated, we'd probably need two tables.
99 // FIXME: TableGen this.
100 template <typename T> struct CpuNames {
101 const char *NameCStr;
104 bool Default; // is $Name the default CPU for $ArchID ?
105 unsigned DefaultExtensions;
107 StringRef getName() const { return StringRef(NameCStr, NameLength); }
110 const CpuNames<ArchKind> CPUNames[] = {
111 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
112 {NAME, sizeof(NAME) - 1, ARM::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT},
113 #include "ARMTargetParser.def"
118 #define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) KIND,
119 #include "ARMTargetParser.def"
124 enum class FPUVersion {
133 // An FPU name restricts the FPU in one of three ways:
134 enum class FPURestriction {
135 None = 0, ///< No restriction
136 D16, ///< Only 16 D registers
137 SP_D16 ///< Only single-precision instructions, with 16 D registers
140 // An FPU name implies one of three levels of Neon support:
141 enum class NeonSupportLevel {
142 None = 0, ///< No Neon
144 Crypto ///< Neon with Crypto
148 enum class ISAKind { INVALID = 0, ARM, THUMB, AARCH64 };
151 // FIXME: BE8 vs. BE32?
152 enum class EndianKind { INVALID = 0, LITTLE, BIG };
155 enum class ProfileKind { INVALID = 0, A, R, M };
157 // List of canonical FPU names (use getFPUSynonym) and which architectural
158 // features they correspond to (use getFPUFeatures).
159 // FIXME: TableGen this.
160 // The entries must appear in the order listed in ARM::FPUKind for correct
163 const char *NameCStr;
167 NeonSupportLevel NeonSupport;
168 FPURestriction Restriction;
170 StringRef getName() const { return StringRef(NameCStr, NameLength); }
173 static const FPUName FPUNames[] = {
174 #define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) \
175 {NAME, sizeof(NAME) - 1, KIND, VERSION, NEON_SUPPORT, RESTRICTION},
176 #include "llvm/Support/ARMTargetParser.def"
179 // List of canonical arch names (use getArchSynonym).
180 // This table also provides the build attribute fields for CPU arch
181 // and Arch ID, according to the Addenda to the ARM ABI, chapters
182 // 2.4 and 2.3.5.2 respectively.
183 // FIXME: SubArch values were simplified to fit into the expectations
184 // of the triples and are not conforming with their official names.
185 // Check to see if the expectation should be changed.
186 // FIXME: TableGen this.
187 template <typename T> struct ArchNames {
188 const char *NameCStr;
190 const char *CPUAttrCStr;
191 size_t CPUAttrLength;
192 const char *SubArchCStr;
193 size_t SubArchLength;
195 unsigned ArchBaseExtensions;
197 ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
199 StringRef getName() const { return StringRef(NameCStr, NameLength); }
201 // CPU class in build attributes.
202 StringRef getCPUAttr() const { return StringRef(CPUAttrCStr, CPUAttrLength); }
205 StringRef getSubArch() const { return StringRef(SubArchCStr, SubArchLength); }
208 static const ArchNames<ArchKind> ARCHNames[] = {
209 #define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, \
211 {NAME, sizeof(NAME) - 1, \
212 CPU_ATTR, sizeof(CPU_ATTR) - 1, \
213 SUB_ARCH, sizeof(SUB_ARCH) - 1, \
214 ARCH_FPU, ARCH_BASE_EXT, \
215 ArchKind::ID, ARCH_ATTR},
216 #include "llvm/Support/ARMTargetParser.def"
220 StringRef getFPUName(unsigned FPUKind);
221 FPUVersion getFPUVersion(unsigned FPUKind);
222 NeonSupportLevel getFPUNeonSupportLevel(unsigned FPUKind);
223 FPURestriction getFPURestriction(unsigned FPUKind);
225 // FIXME: These should be moved to TargetTuple once it exists
226 bool getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features);
227 bool getHWDivFeatures(unsigned HWDivKind, std::vector<StringRef> &Features);
228 bool getExtensionFeatures(unsigned Extensions,
229 std::vector<StringRef> &Features);
231 StringRef getArchName(ArchKind AK);
232 unsigned getArchAttr(ArchKind AK);
233 StringRef getCPUAttr(ArchKind AK);
234 StringRef getSubArch(ArchKind AK);
235 StringRef getArchExtName(unsigned ArchExtKind);
236 StringRef getArchExtFeature(StringRef ArchExt);
237 StringRef getHWDivName(unsigned HWDivKind);
239 // Information by Name
240 unsigned getDefaultFPU(StringRef CPU, ArchKind AK);
241 unsigned getDefaultExtensions(StringRef CPU, ArchKind AK);
242 StringRef getDefaultCPU(StringRef Arch);
243 StringRef getCanonicalArchName(StringRef Arch);
244 StringRef getFPUSynonym(StringRef FPU);
245 StringRef getArchSynonym(StringRef Arch);
248 unsigned parseHWDiv(StringRef HWDiv);
249 unsigned parseFPU(StringRef FPU);
250 ArchKind parseArch(StringRef Arch);
251 unsigned parseArchExt(StringRef ArchExt);
252 ArchKind parseCPUArch(StringRef CPU);
253 ISAKind parseArchISA(StringRef Arch);
254 EndianKind parseArchEndian(StringRef Arch);
255 ProfileKind parseArchProfile(StringRef Arch);
256 unsigned parseArchVersion(StringRef Arch);
258 void fillValidCPUArchList(SmallVectorImpl<StringRef> &Values);
259 StringRef computeDefaultTargetABI(const Triple &TT, StringRef CPU);