1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/ADT/StringRef.h"
18 #include "llvm/ADT/Triple.h"
19 #include "llvm/IR/DataLayout.h"
20 #include "llvm/Pass.h"
21 #include "llvm/Support/CodeGen.h"
22 #include "llvm/Target/TargetOptions.h"
33 class MCSubtargetInfo;
35 class raw_pwrite_stream;
36 class PassManagerBuilder;
38 class TargetIntrinsicInfo;
39 class TargetIRAnalysis;
40 class TargetLoweringObjectFile;
41 class TargetPassConfig;
42 class TargetSubtargetInfo;
44 // The old pass manager infrastructure is hidden in a legacy namespace now.
46 class PassManagerBase;
48 using legacy::PassManagerBase;
50 //===----------------------------------------------------------------------===//
52 /// Primary interface to the complete machine description for the target
53 /// machine. All target-specific information should be accessible through this
57 protected: // Can only create subclasses.
58 TargetMachine(const Target &T, StringRef DataLayoutString,
59 const Triple &TargetTriple, StringRef CPU, StringRef FS,
60 const TargetOptions &Options);
62 /// The Target that this machine was created for.
63 const Target &TheTarget;
65 /// DataLayout for the target: keep ABI type size and alignment.
67 /// The DataLayout is created based on the string representation provided
68 /// during construction. It is kept here only to avoid reparsing the string
69 /// but should not really be used during compilation, because it has an
70 /// internal cache that is context specific.
73 /// Triple string, CPU name, and target feature strings the TargetMachine
74 /// instance is created with.
76 std::string TargetCPU;
79 Reloc::Model RM = Reloc::Static;
80 CodeModel::Model CMModel = CodeModel::Default;
81 CodeGenOpt::Level OptLevel = CodeGenOpt::Default;
83 /// Contains target specific asm information.
84 const MCAsmInfo *AsmInfo;
86 const MCRegisterInfo *MRI;
87 const MCInstrInfo *MII;
88 const MCSubtargetInfo *STI;
90 unsigned RequireStructuredCFG : 1;
91 unsigned O0WantsFastISel : 1;
94 const TargetOptions DefaultOptions;
95 mutable TargetOptions Options;
97 TargetMachine(const TargetMachine &) = delete;
98 void operator=(const TargetMachine &) = delete;
99 virtual ~TargetMachine();
101 const Target &getTarget() const { return TheTarget; }
103 const Triple &getTargetTriple() const { return TargetTriple; }
104 StringRef getTargetCPU() const { return TargetCPU; }
105 StringRef getTargetFeatureString() const { return TargetFS; }
107 /// Virtual method implemented by subclasses that returns a reference to that
108 /// target's TargetSubtargetInfo-derived member variable.
109 virtual const TargetSubtargetInfo *getSubtargetImpl(const Function &) const {
112 virtual TargetLoweringObjectFile *getObjFileLowering() const {
116 /// This method returns a pointer to the specified type of
117 /// TargetSubtargetInfo. In debug builds, it verifies that the object being
118 /// returned is of the correct type.
119 template <typename STC> const STC &getSubtarget(const Function &F) const {
120 return *static_cast<const STC*>(getSubtargetImpl(F));
123 /// Create a DataLayout.
124 const DataLayout createDataLayout() const { return DL; }
126 /// Test if a DataLayout if compatible with the CodeGen for this target.
128 /// The LLVM Module owns a DataLayout that is used for the target independent
129 /// optimizations and code generation. This hook provides a target specific
130 /// check on the validity of this DataLayout.
131 bool isCompatibleDataLayout(const DataLayout &Candidate) const {
132 return DL == Candidate;
135 /// Get the pointer size for this target.
137 /// This is the only time the DataLayout in the TargetMachine is used.
138 unsigned getPointerSize() const { return DL.getPointerSize(); }
140 /// \brief Reset the target options based on the function's attributes.
141 // FIXME: Remove TargetOptions that affect per-function code generation
142 // from TargetMachine.
143 void resetTargetOptions(const Function &F) const;
145 /// Return target specific asm information.
146 const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
148 const MCRegisterInfo *getMCRegisterInfo() const { return MRI; }
149 const MCInstrInfo *getMCInstrInfo() const { return MII; }
150 const MCSubtargetInfo *getMCSubtargetInfo() const { return STI; }
152 /// If intrinsic information is available, return it. If not, return null.
153 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const {
157 bool requiresStructuredCFG() const { return RequireStructuredCFG; }
158 void setRequiresStructuredCFG(bool Value) { RequireStructuredCFG = Value; }
160 /// Returns the code generation relocation model. The choices are static, PIC,
161 /// and dynamic-no-pic, and target default.
162 Reloc::Model getRelocationModel() const;
164 /// Returns the code model. The choices are small, kernel, medium, large, and
166 CodeModel::Model getCodeModel() const;
168 bool isPositionIndependent() const;
170 bool shouldAssumeDSOLocal(const Module &M, const GlobalValue *GV) const;
172 /// Returns the TLS model which should be used for the given global variable.
173 TLSModel::Model getTLSModel(const GlobalValue *GV) const;
175 /// Returns the optimization level: None, Less, Default, or Aggressive.
176 CodeGenOpt::Level getOptLevel() const;
178 /// \brief Overrides the optimization level.
179 void setOptLevel(CodeGenOpt::Level Level);
181 void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
182 bool getO0WantsFastISel() { return O0WantsFastISel; }
183 void setO0WantsFastISel(bool Enable) { O0WantsFastISel = Enable; }
185 bool shouldPrintMachineCode() const { return Options.PrintMachineCode; }
187 bool getUniqueSectionNames() const { return Options.UniqueSectionNames; }
189 /// Return true if data objects should be emitted into their own section,
190 /// corresponds to -fdata-sections.
191 bool getDataSections() const {
192 return Options.DataSections;
195 /// Return true if functions should be emitted into their own section,
196 /// corresponding to -ffunction-sections.
197 bool getFunctionSections() const {
198 return Options.FunctionSections;
201 /// \brief Get a \c TargetIRAnalysis appropriate for the target.
203 /// This is used to construct the new pass manager's target IR analysis pass,
204 /// set up appropriately for this target machine. Even the old pass manager
205 /// uses this to answer queries about the IR.
206 virtual TargetIRAnalysis getTargetIRAnalysis();
208 /// Allow the target to modify the pass manager, e.g. by calling
209 /// PassManagerBuilder::addExtension.
210 virtual void adjustPassManager(PassManagerBuilder &) {}
212 /// These enums are meant to be passed into addPassesToEmitFile to indicate
213 /// what type of file to emit, and returned by it to indicate what type of
214 /// file could actually be made.
215 enum CodeGenFileType {
218 CGFT_Null // Do not emit any output.
221 /// Add passes to the specified pass manager to get the specified file
222 /// emitted. Typically this will involve several steps of code generation.
223 /// This method should return true if emission of this file type is not
224 /// supported, or false on success.
225 virtual bool addPassesToEmitFile(
226 PassManagerBase &, raw_pwrite_stream &, CodeGenFileType,
227 bool /*DisableVerify*/ = true, AnalysisID /*StartBefore*/ = nullptr,
228 AnalysisID /*StartAfter*/ = nullptr, AnalysisID /*StopBefore*/ = nullptr,
229 AnalysisID /*StopAfter*/ = nullptr) {
233 /// Add passes to the specified pass manager to get machine code emitted with
234 /// the MCJIT. This method returns true if machine code is not supported. It
235 /// fills the MCContext Ctx pointer which can be used to build custom
238 virtual bool addPassesToEmitMC(PassManagerBase &, MCContext *&,
240 bool /*DisableVerify*/ = true) {
244 /// True if subtarget inserts the final scheduling pass on its own.
246 /// Branch relaxation, which must happen after block placement, can
247 /// on some targets (e.g. SystemZ) expose additional post-RA
248 /// scheduling opportunities.
249 virtual bool targetSchedulesPostRAScheduling() const { return false; };
251 void getNameWithPrefix(SmallVectorImpl<char> &Name, const GlobalValue *GV,
252 Mangler &Mang, bool MayAlwaysUsePrivate = false) const;
253 MCSymbol *getSymbol(const GlobalValue *GV) const;
255 /// True if the target uses physical regs at Prolog/Epilog insertion
256 /// time. If true (most machines), all vregs must be allocated before
257 /// PEI. If false (virtual-register machines), then callee-save register
258 /// spilling and scavenging are not needed or used.
259 virtual bool usesPhysRegsForPEI() const { return true; }
262 /// This class describes a target machine that is implemented with the LLVM
263 /// target-independent code generator.
265 class LLVMTargetMachine : public TargetMachine {
266 protected: // Can only create subclasses.
267 LLVMTargetMachine(const Target &T, StringRef DataLayoutString,
268 const Triple &TargetTriple, StringRef CPU, StringRef FS,
269 const TargetOptions &Options, Reloc::Model RM,
270 CodeModel::Model CM, CodeGenOpt::Level OL);
274 /// \brief Get a TargetIRAnalysis implementation for the target.
276 /// This analysis will produce a TTI result which uses the common code
277 /// generator to answer queries about the IR.
278 TargetIRAnalysis getTargetIRAnalysis() override;
280 /// Create a pass configuration object to be used by addPassToEmitX methods
281 /// for generating a pipeline of CodeGen passes.
282 virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
284 /// Add passes to the specified pass manager to get the specified file
285 /// emitted. Typically this will involve several steps of code generation.
286 bool addPassesToEmitFile(
287 PassManagerBase &PM, raw_pwrite_stream &Out, CodeGenFileType FileType,
288 bool DisableVerify = true, AnalysisID StartBefore = nullptr,
289 AnalysisID StartAfter = nullptr, AnalysisID StopBefore = nullptr,
290 AnalysisID StopAfter = nullptr) override;
292 /// Add passes to the specified pass manager to get machine code emitted with
293 /// the MCJIT. This method returns true if machine code is not supported. It
294 /// fills the MCContext Ctx pointer which can be used to build custom
296 bool addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
297 raw_pwrite_stream &OS,
298 bool DisableVerify = true) override;
300 /// Returns true if the target is expected to pass all machine verifier
301 /// checks. This is a stopgap measure to fix targets one by one. We will
302 /// remove this at some point and always enable the verifier when
303 /// EXPENSIVE_CHECKS is enabled.
304 virtual bool isMachineVerifierClean() const { return true; }
306 /// \brief Adds an AsmPrinter pass to the pipeline that prints assembly or
307 /// machine code from the MI representation.
308 bool addAsmPrinter(PassManagerBase &PM, raw_pwrite_stream &Out,
309 CodeGenFileType FileTYpe, MCContext &Context);
312 } // end namespace llvm
314 #endif // LLVM_TARGET_TARGETMACHINE_H