1 //===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the TargetMachine and LLVMTargetMachine classes.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_TARGETMACHINE_H
15 #define LLVM_TARGET_TARGETMACHINE_H
17 #include "llvm/ADT/StringRef.h"
18 #include "llvm/ADT/Triple.h"
19 #include "llvm/IR/DataLayout.h"
20 #include "llvm/Pass.h"
21 #include "llvm/Support/CodeGen.h"
22 #include "llvm/Target/TargetOptions.h"
28 class MachineModuleInfo;
34 class MCSubtargetInfo;
36 class raw_pwrite_stream;
37 class PassManagerBuilder;
39 class TargetIntrinsicInfo;
40 class TargetIRAnalysis;
41 class TargetLoweringObjectFile;
42 class TargetPassConfig;
43 class TargetSubtargetInfo;
45 // The old pass manager infrastructure is hidden in a legacy namespace now.
47 class PassManagerBase;
49 using legacy::PassManagerBase;
51 //===----------------------------------------------------------------------===//
53 /// Primary interface to the complete machine description for the target
54 /// machine. All target-specific information should be accessible through this
58 protected: // Can only create subclasses.
59 TargetMachine(const Target &T, StringRef DataLayoutString,
60 const Triple &TargetTriple, StringRef CPU, StringRef FS,
61 const TargetOptions &Options);
63 /// The Target that this machine was created for.
64 const Target &TheTarget;
66 /// DataLayout for the target: keep ABI type size and alignment.
68 /// The DataLayout is created based on the string representation provided
69 /// during construction. It is kept here only to avoid reparsing the string
70 /// but should not really be used during compilation, because it has an
71 /// internal cache that is context specific.
74 /// Triple string, CPU name, and target feature strings the TargetMachine
75 /// instance is created with.
77 std::string TargetCPU;
80 Reloc::Model RM = Reloc::Static;
81 CodeModel::Model CMModel = CodeModel::Small;
82 CodeGenOpt::Level OptLevel = CodeGenOpt::Default;
84 /// Contains target specific asm information.
85 const MCAsmInfo *AsmInfo;
87 const MCRegisterInfo *MRI;
88 const MCInstrInfo *MII;
89 const MCSubtargetInfo *STI;
91 unsigned RequireStructuredCFG : 1;
92 unsigned O0WantsFastISel : 1;
95 const TargetOptions DefaultOptions;
96 mutable TargetOptions Options;
98 TargetMachine(const TargetMachine &) = delete;
99 void operator=(const TargetMachine &) = delete;
100 virtual ~TargetMachine();
102 const Target &getTarget() const { return TheTarget; }
104 const Triple &getTargetTriple() const { return TargetTriple; }
105 StringRef getTargetCPU() const { return TargetCPU; }
106 StringRef getTargetFeatureString() const { return TargetFS; }
108 /// Virtual method implemented by subclasses that returns a reference to that
109 /// target's TargetSubtargetInfo-derived member variable.
110 virtual const TargetSubtargetInfo *getSubtargetImpl(const Function &) const {
113 virtual TargetLoweringObjectFile *getObjFileLowering() const {
117 /// This method returns a pointer to the specified type of
118 /// TargetSubtargetInfo. In debug builds, it verifies that the object being
119 /// returned is of the correct type.
120 template <typename STC> const STC &getSubtarget(const Function &F) const {
121 return *static_cast<const STC*>(getSubtargetImpl(F));
124 /// Create a DataLayout.
125 const DataLayout createDataLayout() const { return DL; }
127 /// Test if a DataLayout if compatible with the CodeGen for this target.
129 /// The LLVM Module owns a DataLayout that is used for the target independent
130 /// optimizations and code generation. This hook provides a target specific
131 /// check on the validity of this DataLayout.
132 bool isCompatibleDataLayout(const DataLayout &Candidate) const {
133 return DL == Candidate;
136 /// Get the pointer size for this target.
138 /// This is the only time the DataLayout in the TargetMachine is used.
139 unsigned getPointerSize() const { return DL.getPointerSize(); }
141 /// \brief Reset the target options based on the function's attributes.
142 // FIXME: Remove TargetOptions that affect per-function code generation
143 // from TargetMachine.
144 void resetTargetOptions(const Function &F) const;
146 /// Return target specific asm information.
147 const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
149 const MCRegisterInfo *getMCRegisterInfo() const { return MRI; }
150 const MCInstrInfo *getMCInstrInfo() const { return MII; }
151 const MCSubtargetInfo *getMCSubtargetInfo() const { return STI; }
153 /// If intrinsic information is available, return it. If not, return null.
154 virtual const TargetIntrinsicInfo *getIntrinsicInfo() const {
158 bool requiresStructuredCFG() const { return RequireStructuredCFG; }
159 void setRequiresStructuredCFG(bool Value) { RequireStructuredCFG = Value; }
161 /// Returns the code generation relocation model. The choices are static, PIC,
162 /// and dynamic-no-pic, and target default.
163 Reloc::Model getRelocationModel() const;
165 /// Returns the code model. The choices are small, kernel, medium, large, and
167 CodeModel::Model getCodeModel() const;
169 bool isPositionIndependent() const;
171 bool shouldAssumeDSOLocal(const Module &M, const GlobalValue *GV) const;
173 /// Returns the TLS model which should be used for the given global variable.
174 TLSModel::Model getTLSModel(const GlobalValue *GV) const;
176 /// Returns the optimization level: None, Less, Default, or Aggressive.
177 CodeGenOpt::Level getOptLevel() const;
179 /// \brief Overrides the optimization level.
180 void setOptLevel(CodeGenOpt::Level Level);
182 void setFastISel(bool Enable) { Options.EnableFastISel = Enable; }
183 bool getO0WantsFastISel() { return O0WantsFastISel; }
184 void setO0WantsFastISel(bool Enable) { O0WantsFastISel = Enable; }
186 bool shouldPrintMachineCode() const { return Options.PrintMachineCode; }
188 bool getUniqueSectionNames() const { return Options.UniqueSectionNames; }
190 /// Return true if data objects should be emitted into their own section,
191 /// corresponds to -fdata-sections.
192 bool getDataSections() const {
193 return Options.DataSections;
196 /// Return true if functions should be emitted into their own section,
197 /// corresponding to -ffunction-sections.
198 bool getFunctionSections() const {
199 return Options.FunctionSections;
202 /// \brief Get a \c TargetIRAnalysis appropriate for the target.
204 /// This is used to construct the new pass manager's target IR analysis pass,
205 /// set up appropriately for this target machine. Even the old pass manager
206 /// uses this to answer queries about the IR.
207 virtual TargetIRAnalysis getTargetIRAnalysis();
209 /// Allow the target to modify the pass manager, e.g. by calling
210 /// PassManagerBuilder::addExtension.
211 virtual void adjustPassManager(PassManagerBuilder &) {}
213 /// These enums are meant to be passed into addPassesToEmitFile to indicate
214 /// what type of file to emit, and returned by it to indicate what type of
215 /// file could actually be made.
216 enum CodeGenFileType {
219 CGFT_Null // Do not emit any output.
222 /// Add passes to the specified pass manager to get the specified file
223 /// emitted. Typically this will involve several steps of code generation.
224 /// This method should return true if emission of this file type is not
225 /// supported, or false on success.
226 /// \p MMI is an optional parameter that, if set to non-nullptr,
227 /// will be used to set the MachineModuloInfo for this PM.
228 virtual bool addPassesToEmitFile(PassManagerBase &, raw_pwrite_stream &,
230 bool /*DisableVerify*/ = true,
231 MachineModuleInfo *MMI = nullptr) {
235 /// Add passes to the specified pass manager to get machine code emitted with
236 /// the MCJIT. This method returns true if machine code is not supported. It
237 /// fills the MCContext Ctx pointer which can be used to build custom
240 virtual bool addPassesToEmitMC(PassManagerBase &, MCContext *&,
242 bool /*DisableVerify*/ = true) {
246 /// True if subtarget inserts the final scheduling pass on its own.
248 /// Branch relaxation, which must happen after block placement, can
249 /// on some targets (e.g. SystemZ) expose additional post-RA
250 /// scheduling opportunities.
251 virtual bool targetSchedulesPostRAScheduling() const { return false; };
253 void getNameWithPrefix(SmallVectorImpl<char> &Name, const GlobalValue *GV,
254 Mangler &Mang, bool MayAlwaysUsePrivate = false) const;
255 MCSymbol *getSymbol(const GlobalValue *GV) const;
257 /// True if the target uses physical regs at Prolog/Epilog insertion
258 /// time. If true (most machines), all vregs must be allocated before
259 /// PEI. If false (virtual-register machines), then callee-save register
260 /// spilling and scavenging are not needed or used.
261 virtual bool usesPhysRegsForPEI() const { return true; }
263 /// True if the target wants to use interprocedural register allocation by
264 /// default. The -enable-ipra flag can be used to override this.
265 virtual bool useIPRA() const {
270 /// This class describes a target machine that is implemented with the LLVM
271 /// target-independent code generator.
273 class LLVMTargetMachine : public TargetMachine {
274 protected: // Can only create subclasses.
275 LLVMTargetMachine(const Target &T, StringRef DataLayoutString,
276 const Triple &TargetTriple, StringRef CPU, StringRef FS,
277 const TargetOptions &Options, Reloc::Model RM,
278 CodeModel::Model CM, CodeGenOpt::Level OL);
283 /// \brief Get a TargetIRAnalysis implementation for the target.
285 /// This analysis will produce a TTI result which uses the common code
286 /// generator to answer queries about the IR.
287 TargetIRAnalysis getTargetIRAnalysis() override;
289 /// Create a pass configuration object to be used by addPassToEmitX methods
290 /// for generating a pipeline of CodeGen passes.
291 virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
293 /// Add passes to the specified pass manager to get the specified file
294 /// emitted. Typically this will involve several steps of code generation.
295 /// \p MMI is an optional parameter that, if set to non-nullptr,
296 /// will be used to set the MachineModuloInfofor this PM.
297 bool addPassesToEmitFile(PassManagerBase &PM, raw_pwrite_stream &Out,
298 CodeGenFileType FileType, bool DisableVerify = true,
299 MachineModuleInfo *MMI = nullptr) override;
301 /// Add passes to the specified pass manager to get machine code emitted with
302 /// the MCJIT. This method returns true if machine code is not supported. It
303 /// fills the MCContext Ctx pointer which can be used to build custom
305 bool addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
306 raw_pwrite_stream &OS,
307 bool DisableVerify = true) override;
309 /// Returns true if the target is expected to pass all machine verifier
310 /// checks. This is a stopgap measure to fix targets one by one. We will
311 /// remove this at some point and always enable the verifier when
312 /// EXPENSIVE_CHECKS is enabled.
313 virtual bool isMachineVerifierClean() const { return true; }
315 /// \brief Adds an AsmPrinter pass to the pipeline that prints assembly or
316 /// machine code from the MI representation.
317 bool addAsmPrinter(PassManagerBase &PM, raw_pwrite_stream &Out,
318 CodeGenFileType FileTYpe, MCContext &Context);
321 } // end namespace llvm
323 #endif // LLVM_TARGET_TARGETMACHINE_H