1 //===-- llvm/CodeGen/AllocationOrder.h - Allocation Order -*- C++ -*-------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements an allocation order for virtual registers.
12 // The preferred allocation order for a virtual register depends on allocation
13 // hints and target hooks. The AllocationOrder class encapsulates all of that.
15 //===----------------------------------------------------------------------===//
17 #ifndef LLVM_LIB_CODEGEN_ALLOCATIONORDER_H
18 #define LLVM_LIB_CODEGEN_ALLOCATIONORDER_H
20 #include "llvm/ADT/ArrayRef.h"
21 #include "llvm/ADT/STLExtras.h"
22 #include "llvm/MC/MCRegisterInfo.h"
26 class RegisterClassInfo;
30 class LLVM_LIBRARY_VISIBILITY AllocationOrder {
31 SmallVector<MCPhysReg, 16> Hints;
32 ArrayRef<MCPhysReg> Order;
36 /// Create a new AllocationOrder for VirtReg.
37 /// @param VirtReg Virtual register to allocate for.
38 /// @param VRM Virtual register map for function.
39 /// @param RegClassInfo Information about reserved and allocatable registers.
40 AllocationOrder(unsigned VirtReg,
41 const VirtRegMap &VRM,
42 const RegisterClassInfo &RegClassInfo,
43 const LiveRegMatrix *Matrix);
45 /// Get the allocation order without reordered hints.
46 ArrayRef<MCPhysReg> getOrder() const { return Order; }
48 /// Return the next physical register in the allocation order, or 0.
49 /// It is safe to call next() again after it returned 0, it will keep
50 /// returning 0 until rewind() is called.
51 unsigned next(unsigned Limit = 0) {
53 return Hints.end()[Pos++];
56 while (Pos < int(Limit)) {
57 unsigned Reg = Order[Pos++];
64 /// As next(), but allow duplicates to be returned, and stop before the
65 /// Limit'th register in the RegisterClassInfo allocation order.
67 /// This can produce more than Limit registers if there are hints.
68 unsigned nextWithDups(unsigned Limit) {
70 return Hints.end()[Pos++];
76 /// Start over from the beginning.
77 void rewind() { Pos = -int(Hints.size()); }
79 /// Return true if the last register returned from next() was a preferred register.
80 bool isHint() const { return Pos <= 0; }
82 /// Return true if PhysReg is a preferred register.
83 bool isHint(unsigned PhysReg) const { return is_contained(Hints, PhysReg); }
86 } // end namespace llvm