1 //===- llvm/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp --------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "DbgValueHistoryCalculator.h"
11 #include "llvm/ADT/BitVector.h"
12 #include "llvm/ADT/STLExtras.h"
13 #include "llvm/ADT/SmallVector.h"
14 #include "llvm/CodeGen/MachineBasicBlock.h"
15 #include "llvm/CodeGen/MachineFunction.h"
16 #include "llvm/CodeGen/MachineInstr.h"
17 #include "llvm/CodeGen/MachineOperand.h"
18 #include "llvm/CodeGen/TargetLowering.h"
19 #include "llvm/CodeGen/TargetRegisterInfo.h"
20 #include "llvm/CodeGen/TargetSubtargetInfo.h"
21 #include "llvm/IR/DebugInfoMetadata.h"
22 #include "llvm/IR/DebugLoc.h"
23 #include "llvm/MC/MCRegisterInfo.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Support/raw_ostream.h"
32 #define DEBUG_TYPE "dwarfdebug"
34 // If @MI is a DBG_VALUE with debug value described by a
35 // defined register, returns the number of this register.
36 // In the other case, returns 0.
37 static unsigned isDescribedByReg(const MachineInstr &MI) {
38 assert(MI.isDebugValue());
39 assert(MI.getNumOperands() == 4);
40 // If location of variable is described using a register (directly or
41 // indirectly), this register is always a first operand.
42 return MI.getOperand(0).isReg() ? MI.getOperand(0).getReg() : 0;
45 void DbgValueHistoryMap::startInstrRange(InlinedVariable Var,
46 const MachineInstr &MI) {
47 // Instruction range should start with a DBG_VALUE instruction for the
49 assert(MI.isDebugValue() && "not a DBG_VALUE");
50 auto &Ranges = VarInstrRanges[Var];
51 if (!Ranges.empty() && Ranges.back().second == nullptr &&
52 Ranges.back().first->isIdenticalTo(MI)) {
53 LLVM_DEBUG(dbgs() << "Coalescing identical DBG_VALUE entries:\n"
54 << "\t" << Ranges.back().first << "\t" << MI << "\n");
57 Ranges.push_back(std::make_pair(&MI, nullptr));
60 void DbgValueHistoryMap::endInstrRange(InlinedVariable Var,
61 const MachineInstr &MI) {
62 auto &Ranges = VarInstrRanges[Var];
63 // Verify that the current instruction range is not yet closed.
64 assert(!Ranges.empty() && Ranges.back().second == nullptr);
65 // For now, instruction ranges are not allowed to cross basic block
67 assert(Ranges.back().first->getParent() == MI.getParent());
68 Ranges.back().second = &MI;
71 unsigned DbgValueHistoryMap::getRegisterForVar(InlinedVariable Var) const {
72 const auto &I = VarInstrRanges.find(Var);
73 if (I == VarInstrRanges.end())
75 const auto &Ranges = I->second;
76 if (Ranges.empty() || Ranges.back().second != nullptr)
78 return isDescribedByReg(*Ranges.back().first);
83 // Maps physreg numbers to the variables they describe.
84 using InlinedVariable = DbgValueHistoryMap::InlinedVariable;
85 using RegDescribedVarsMap = std::map<unsigned, SmallVector<InlinedVariable, 1>>;
87 } // end anonymous namespace
89 // Claim that @Var is not described by @RegNo anymore.
90 static void dropRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo,
91 InlinedVariable Var) {
92 const auto &I = RegVars.find(RegNo);
93 assert(RegNo != 0U && I != RegVars.end());
94 auto &VarSet = I->second;
95 const auto &VarPos = llvm::find(VarSet, Var);
96 assert(VarPos != VarSet.end());
98 // Don't keep empty sets in a map to keep it as small as possible.
103 // Claim that @Var is now described by @RegNo.
104 static void addRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo,
105 InlinedVariable Var) {
107 auto &VarSet = RegVars[RegNo];
108 assert(!is_contained(VarSet, Var));
109 VarSet.push_back(Var);
112 // Terminate the location range for variables described by register at
113 // @I by inserting @ClobberingInstr to their history.
114 static void clobberRegisterUses(RegDescribedVarsMap &RegVars,
115 RegDescribedVarsMap::iterator I,
116 DbgValueHistoryMap &HistMap,
117 const MachineInstr &ClobberingInstr) {
118 // Iterate over all variables described by this register and add this
119 // instruction to their history, clobbering it.
120 for (const auto &Var : I->second)
121 HistMap.endInstrRange(Var, ClobberingInstr);
125 // Terminate the location range for variables described by register
126 // @RegNo by inserting @ClobberingInstr to their history.
127 static void clobberRegisterUses(RegDescribedVarsMap &RegVars, unsigned RegNo,
128 DbgValueHistoryMap &HistMap,
129 const MachineInstr &ClobberingInstr) {
130 const auto &I = RegVars.find(RegNo);
131 if (I == RegVars.end())
133 clobberRegisterUses(RegVars, I, HistMap, ClobberingInstr);
136 // Returns the first instruction in @MBB which corresponds to
137 // the function epilogue, or nullptr if @MBB doesn't contain an epilogue.
138 static const MachineInstr *getFirstEpilogueInst(const MachineBasicBlock &MBB) {
139 auto LastMI = MBB.getLastNonDebugInstr();
140 if (LastMI == MBB.end() || !LastMI->isReturn())
142 // Assume that epilogue starts with instruction having the same debug location
143 // as the return instruction.
144 DebugLoc LastLoc = LastMI->getDebugLoc();
146 for (MachineBasicBlock::const_reverse_iterator I = LastMI.getReverse(),
149 if (I->getDebugLoc() != LastLoc)
153 // If all instructions have the same debug location, assume whole MBB is
155 return &*MBB.begin();
158 // Collect registers that are modified in the function body (their
159 // contents is changed outside of the prologue and epilogue).
160 static void collectChangingRegs(const MachineFunction *MF,
161 const TargetRegisterInfo *TRI,
163 for (const auto &MBB : *MF) {
164 auto FirstEpilogueInst = getFirstEpilogueInst(MBB);
166 for (const auto &MI : MBB) {
167 // Avoid looking at prologue or epilogue instructions.
168 if (&MI == FirstEpilogueInst)
170 if (MI.getFlag(MachineInstr::FrameSetup))
173 // Look for register defs and register masks. Register masks are
174 // typically on calls and they clobber everything not in the mask.
175 for (const MachineOperand &MO : MI.operands()) {
176 // Skip virtual registers since they are handled by the parent.
177 if (MO.isReg() && MO.isDef() && MO.getReg() &&
178 !TRI->isVirtualRegister(MO.getReg())) {
179 for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
182 } else if (MO.isRegMask()) {
183 Regs.setBitsNotInMask(MO.getRegMask());
190 void llvm::calculateDbgValueHistory(const MachineFunction *MF,
191 const TargetRegisterInfo *TRI,
192 DbgValueHistoryMap &Result) {
193 BitVector ChangingRegs(TRI->getNumRegs());
194 collectChangingRegs(MF, TRI, ChangingRegs);
196 const TargetLowering *TLI = MF->getSubtarget().getTargetLowering();
197 unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
198 RegDescribedVarsMap RegVars;
199 for (const auto &MBB : *MF) {
200 for (const auto &MI : MBB) {
201 if (!MI.isDebugInstr()) {
202 // Not a DBG_VALUE instruction. It may clobber registers which describe
204 for (const MachineOperand &MO : MI.operands()) {
205 if (MO.isReg() && MO.isDef() && MO.getReg()) {
206 // Ignore call instructions that claim to clobber SP. The AArch64
207 // backend does this for aggregate function arguments.
208 if (MI.isCall() && MO.getReg() == SP)
210 // If this is a virtual register, only clobber it since it doesn't
212 if (TRI->isVirtualRegister(MO.getReg()))
213 clobberRegisterUses(RegVars, MO.getReg(), Result, MI);
214 // If this is a register def operand, it may end a debug value
217 for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
219 if (ChangingRegs.test(*AI))
220 clobberRegisterUses(RegVars, *AI, Result, MI);
222 } else if (MO.isRegMask()) {
223 // If this is a register mask operand, clobber all debug values in
225 for (unsigned I : ChangingRegs.set_bits()) {
226 // Don't consider SP to be clobbered by register masks.
227 if (unsigned(I) != SP && TRI->isPhysicalRegister(I) &&
228 MO.clobbersPhysReg(I)) {
229 clobberRegisterUses(RegVars, I, Result, MI);
237 // Skip DBG_LABEL instructions.
238 if (MI.isDebugLabel())
241 assert(MI.getNumOperands() > 1 && "Invalid DBG_VALUE instruction!");
242 // Use the base variable (without any DW_OP_piece expressions)
243 // as index into History. The full variables including the
244 // piece expressions are attached to the MI.
245 const DILocalVariable *RawVar = MI.getDebugVariable();
246 assert(RawVar->isValidLocationForIntrinsic(MI.getDebugLoc()) &&
247 "Expected inlined-at fields to agree");
248 InlinedVariable Var(RawVar, MI.getDebugLoc()->getInlinedAt());
250 if (unsigned PrevReg = Result.getRegisterForVar(Var))
251 dropRegDescribedVar(RegVars, PrevReg, Var);
253 Result.startInstrRange(Var, MI);
255 if (unsigned NewReg = isDescribedByReg(MI))
256 addRegDescribedVar(RegVars, NewReg, Var);
259 // Make sure locations for register-described variables are valid only
260 // until the end of the basic block (unless it's the last basic block, in
261 // which case let their liveness run off to the end of the function).
262 if (!MBB.empty() && &MBB != &MF->back()) {
263 for (auto I = RegVars.begin(), E = RegVars.end(); I != E;) {
264 auto CurElem = I++; // CurElem can be erased below.
265 if (TRI->isVirtualRegister(CurElem->first) ||
266 ChangingRegs.test(CurElem->first))
267 clobberRegisterUses(RegVars, CurElem, Result, MBB.back());
273 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
274 LLVM_DUMP_METHOD void DbgValueHistoryMap::dump() const {
275 dbgs() << "DbgValueHistoryMap:\n";
276 for (const auto &VarRangePair : *this) {
277 const InlinedVariable &Var = VarRangePair.first;
278 const InstrRanges &Ranges = VarRangePair.second;
280 const DILocalVariable *LocalVar = Var.first;
281 const DILocation *Location = Var.second;
283 dbgs() << " - " << LocalVar->getName() << " at ";
286 dbgs() << Location->getFilename() << ":" << Location->getLine() << ":"
287 << Location->getColumn();
289 dbgs() << "<unknown location>";
293 for (const InstrRange &Range : Ranges) {
294 dbgs() << " Begin: " << *Range.first;
296 dbgs() << " End : " << *Range.second;