1 //===- CodeGenPrepare.cpp - Prepare a function for code generation --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass munges the code in the input function to better prepare it for
11 // SelectionDAG-based code generation. This works around limitations in it's
12 // basic-block-at-a-time approach. It should eventually be removed.
14 //===----------------------------------------------------------------------===//
16 #include "llvm/ADT/DenseMap.h"
17 #include "llvm/ADT/SetVector.h"
18 #include "llvm/ADT/SmallSet.h"
19 #include "llvm/ADT/Statistic.h"
20 #include "llvm/Analysis/BlockFrequencyInfo.h"
21 #include "llvm/Analysis/BranchProbabilityInfo.h"
22 #include "llvm/Analysis/CFG.h"
23 #include "llvm/Analysis/InstructionSimplify.h"
24 #include "llvm/Analysis/LoopInfo.h"
25 #include "llvm/Analysis/MemoryBuiltins.h"
26 #include "llvm/Analysis/ProfileSummaryInfo.h"
27 #include "llvm/Analysis/TargetLibraryInfo.h"
28 #include "llvm/Analysis/TargetTransformInfo.h"
29 #include "llvm/Analysis/ValueTracking.h"
30 #include "llvm/CodeGen/Analysis.h"
31 #include "llvm/CodeGen/Passes.h"
32 #include "llvm/CodeGen/TargetPassConfig.h"
33 #include "llvm/IR/CallSite.h"
34 #include "llvm/IR/Constants.h"
35 #include "llvm/IR/DataLayout.h"
36 #include "llvm/IR/DerivedTypes.h"
37 #include "llvm/IR/Dominators.h"
38 #include "llvm/IR/Function.h"
39 #include "llvm/IR/GetElementPtrTypeIterator.h"
40 #include "llvm/IR/IRBuilder.h"
41 #include "llvm/IR/InlineAsm.h"
42 #include "llvm/IR/Instructions.h"
43 #include "llvm/IR/IntrinsicInst.h"
44 #include "llvm/IR/MDBuilder.h"
45 #include "llvm/IR/PatternMatch.h"
46 #include "llvm/IR/Statepoint.h"
47 #include "llvm/IR/ValueHandle.h"
48 #include "llvm/IR/ValueMap.h"
49 #include "llvm/Pass.h"
50 #include "llvm/Support/BranchProbability.h"
51 #include "llvm/Support/CommandLine.h"
52 #include "llvm/Support/Debug.h"
53 #include "llvm/Support/raw_ostream.h"
54 #include "llvm/Target/TargetLowering.h"
55 #include "llvm/Target/TargetSubtargetInfo.h"
56 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
57 #include "llvm/Transforms/Utils/BuildLibCalls.h"
58 #include "llvm/Transforms/Utils/BypassSlowDivision.h"
59 #include "llvm/Transforms/Utils/Cloning.h"
60 #include "llvm/Transforms/Utils/Local.h"
61 #include "llvm/Transforms/Utils/SimplifyLibCalls.h"
62 #include "llvm/Transforms/Utils/ValueMapper.h"
65 using namespace llvm::PatternMatch;
67 #define DEBUG_TYPE "codegenprepare"
69 STATISTIC(NumBlocksElim, "Number of blocks eliminated");
70 STATISTIC(NumPHIsElim, "Number of trivial PHIs eliminated");
71 STATISTIC(NumGEPsElim, "Number of GEPs converted to casts");
72 STATISTIC(NumCmpUses, "Number of uses of Cmp expressions replaced with uses of "
74 STATISTIC(NumCastUses, "Number of uses of Cast expressions replaced with uses "
76 STATISTIC(NumMemoryInsts, "Number of memory instructions whose address "
77 "computations were sunk");
78 STATISTIC(NumExtsMoved, "Number of [s|z]ext instructions combined with loads");
79 STATISTIC(NumExtUses, "Number of uses of [s|z]ext instructions optimized");
80 STATISTIC(NumAndsAdded,
81 "Number of and mask instructions added to form ext loads");
82 STATISTIC(NumAndUses, "Number of uses of and mask instructions optimized");
83 STATISTIC(NumRetsDup, "Number of return instructions duplicated");
84 STATISTIC(NumDbgValueMoved, "Number of debug value instructions moved");
85 STATISTIC(NumSelectsExpanded, "Number of selects turned into branches");
86 STATISTIC(NumStoreExtractExposed, "Number of store(extractelement) exposed");
88 STATISTIC(NumMemCmpCalls, "Number of memcmp calls");
89 STATISTIC(NumMemCmpNotConstant, "Number of memcmp calls without constant size");
90 STATISTIC(NumMemCmpGreaterThanMax,
91 "Number of memcmp calls with size greater than max size");
92 STATISTIC(NumMemCmpInlined, "Number of inlined memcmp calls");
94 static cl::opt<bool> DisableBranchOpts(
95 "disable-cgp-branch-opts", cl::Hidden, cl::init(false),
96 cl::desc("Disable branch optimizations in CodeGenPrepare"));
99 DisableGCOpts("disable-cgp-gc-opts", cl::Hidden, cl::init(false),
100 cl::desc("Disable GC optimizations in CodeGenPrepare"));
102 static cl::opt<bool> DisableSelectToBranch(
103 "disable-cgp-select2branch", cl::Hidden, cl::init(false),
104 cl::desc("Disable select to branch conversion."));
106 static cl::opt<bool> AddrSinkUsingGEPs(
107 "addr-sink-using-gep", cl::Hidden, cl::init(true),
108 cl::desc("Address sinking in CGP using GEPs."));
110 static cl::opt<bool> EnableAndCmpSinking(
111 "enable-andcmp-sinking", cl::Hidden, cl::init(true),
112 cl::desc("Enable sinkinig and/cmp into branches."));
114 static cl::opt<bool> DisableStoreExtract(
115 "disable-cgp-store-extract", cl::Hidden, cl::init(false),
116 cl::desc("Disable store(extract) optimizations in CodeGenPrepare"));
118 static cl::opt<bool> StressStoreExtract(
119 "stress-cgp-store-extract", cl::Hidden, cl::init(false),
120 cl::desc("Stress test store(extract) optimizations in CodeGenPrepare"));
122 static cl::opt<bool> DisableExtLdPromotion(
123 "disable-cgp-ext-ld-promotion", cl::Hidden, cl::init(false),
124 cl::desc("Disable ext(promotable(ld)) -> promoted(ext(ld)) optimization in "
127 static cl::opt<bool> StressExtLdPromotion(
128 "stress-cgp-ext-ld-promotion", cl::Hidden, cl::init(false),
129 cl::desc("Stress test ext(promotable(ld)) -> promoted(ext(ld)) "
130 "optimization in CodeGenPrepare"));
132 static cl::opt<bool> DisablePreheaderProtect(
133 "disable-preheader-prot", cl::Hidden, cl::init(false),
134 cl::desc("Disable protection against removing loop preheaders"));
136 static cl::opt<bool> ProfileGuidedSectionPrefix(
137 "profile-guided-section-prefix", cl::Hidden, cl::init(true), cl::ZeroOrMore,
138 cl::desc("Use profile info to add section prefix for hot/cold functions"));
140 static cl::opt<unsigned> FreqRatioToSkipMerge(
141 "cgp-freq-ratio-to-skip-merge", cl::Hidden, cl::init(2),
142 cl::desc("Skip merging empty blocks if (frequency of empty block) / "
143 "(frequency of destination block) is greater than this ratio"));
145 static cl::opt<bool> ForceSplitStore(
146 "force-split-store", cl::Hidden, cl::init(false),
147 cl::desc("Force store splitting no matter what the target query says."));
150 EnableTypePromotionMerge("cgp-type-promotion-merge", cl::Hidden,
151 cl::desc("Enable merging of redundant sexts when one is dominating"
152 " the other."), cl::init(true));
154 static cl::opt<unsigned> MemCmpNumLoadsPerBlock(
155 "memcmp-num-loads-per-block", cl::Hidden, cl::init(1),
156 cl::desc("The number of loads per basic block for inline expansion of "
157 "memcmp that is only being compared against zero."));
160 typedef SmallPtrSet<Instruction *, 16> SetOfInstrs;
161 typedef PointerIntPair<Type *, 1, bool> TypeIsSExt;
162 typedef DenseMap<Instruction *, TypeIsSExt> InstrToOrigTy;
163 typedef SmallVector<Instruction *, 16> SExts;
164 typedef DenseMap<Value *, SExts> ValueToSExts;
165 class TypePromotionTransaction;
167 class CodeGenPrepare : public FunctionPass {
168 const TargetMachine *TM;
169 const TargetSubtargetInfo *SubtargetInfo;
170 const TargetLowering *TLI;
171 const TargetRegisterInfo *TRI;
172 const TargetTransformInfo *TTI;
173 const TargetLibraryInfo *TLInfo;
175 std::unique_ptr<BlockFrequencyInfo> BFI;
176 std::unique_ptr<BranchProbabilityInfo> BPI;
178 /// As we scan instructions optimizing them, this is the next instruction
179 /// to optimize. Transforms that can invalidate this should update it.
180 BasicBlock::iterator CurInstIterator;
182 /// Keeps track of non-local addresses that have been sunk into a block.
183 /// This allows us to avoid inserting duplicate code for blocks with
184 /// multiple load/stores of the same address.
185 ValueMap<Value*, Value*> SunkAddrs;
187 /// Keeps track of all instructions inserted for the current function.
188 SetOfInstrs InsertedInsts;
189 /// Keeps track of the type of the related instruction before their
190 /// promotion for the current function.
191 InstrToOrigTy PromotedInsts;
193 /// Keep track of instructions removed during promotion.
194 SetOfInstrs RemovedInsts;
196 /// Keep track of sext chains based on their initial value.
197 DenseMap<Value *, Instruction *> SeenChainsForSExt;
199 /// Keep track of SExt promoted.
200 ValueToSExts ValToSExtendedUses;
202 /// True if CFG is modified in any way.
205 /// True if optimizing for size.
208 /// DataLayout for the Function being processed.
209 const DataLayout *DL;
212 static char ID; // Pass identification, replacement for typeid
214 : FunctionPass(ID), TM(nullptr), TLI(nullptr), TTI(nullptr),
216 initializeCodeGenPreparePass(*PassRegistry::getPassRegistry());
218 bool runOnFunction(Function &F) override;
220 StringRef getPassName() const override { return "CodeGen Prepare"; }
222 void getAnalysisUsage(AnalysisUsage &AU) const override {
223 // FIXME: When we can selectively preserve passes, preserve the domtree.
224 AU.addRequired<ProfileSummaryInfoWrapperPass>();
225 AU.addRequired<TargetLibraryInfoWrapperPass>();
226 AU.addRequired<TargetTransformInfoWrapperPass>();
227 AU.addRequired<LoopInfoWrapperPass>();
231 bool eliminateFallThrough(Function &F);
232 bool eliminateMostlyEmptyBlocks(Function &F);
233 BasicBlock *findDestBlockOfMergeableEmptyBlock(BasicBlock *BB);
234 bool canMergeBlocks(const BasicBlock *BB, const BasicBlock *DestBB) const;
235 void eliminateMostlyEmptyBlock(BasicBlock *BB);
236 bool isMergingEmptyBlockProfitable(BasicBlock *BB, BasicBlock *DestBB,
238 bool optimizeBlock(BasicBlock &BB, bool &ModifiedDT);
239 bool optimizeInst(Instruction *I, bool &ModifiedDT);
240 bool optimizeMemoryInst(Instruction *I, Value *Addr,
241 Type *AccessTy, unsigned AS);
242 bool optimizeInlineAsmInst(CallInst *CS);
243 bool optimizeCallInst(CallInst *CI, bool &ModifiedDT);
244 bool optimizeExt(Instruction *&I);
245 bool optimizeExtUses(Instruction *I);
246 bool optimizeLoadExt(LoadInst *I);
247 bool optimizeSelectInst(SelectInst *SI);
248 bool optimizeShuffleVectorInst(ShuffleVectorInst *SI);
249 bool optimizeSwitchInst(SwitchInst *CI);
250 bool optimizeExtractElementInst(Instruction *Inst);
251 bool dupRetToEnableTailCallOpts(BasicBlock *BB);
252 bool placeDbgValues(Function &F);
253 bool canFormExtLd(const SmallVectorImpl<Instruction *> &MovedExts,
254 LoadInst *&LI, Instruction *&Inst, bool HasPromoted);
255 bool tryToPromoteExts(TypePromotionTransaction &TPT,
256 const SmallVectorImpl<Instruction *> &Exts,
257 SmallVectorImpl<Instruction *> &ProfitablyMovedExts,
258 unsigned CreatedInstsCost = 0);
259 bool mergeSExts(Function &F);
260 bool performAddressTypePromotion(
262 bool AllowPromotionWithoutCommonHeader,
263 bool HasPromoted, TypePromotionTransaction &TPT,
264 SmallVectorImpl<Instruction *> &SpeculativelyMovedExts);
265 bool splitBranchCondition(Function &F);
266 bool simplifyOffsetableRelocate(Instruction &I);
267 bool splitIndirectCriticalEdges(Function &F);
271 char CodeGenPrepare::ID = 0;
272 INITIALIZE_PASS_BEGIN(CodeGenPrepare, DEBUG_TYPE,
273 "Optimize for code generation", false, false)
274 INITIALIZE_PASS_DEPENDENCY(ProfileSummaryInfoWrapperPass)
275 INITIALIZE_PASS_END(CodeGenPrepare, DEBUG_TYPE,
276 "Optimize for code generation", false, false)
278 FunctionPass *llvm::createCodeGenPreparePass() { return new CodeGenPrepare(); }
280 bool CodeGenPrepare::runOnFunction(Function &F) {
284 DL = &F.getParent()->getDataLayout();
286 bool EverMadeChange = false;
287 // Clear per function information.
288 InsertedInsts.clear();
289 PromotedInsts.clear();
294 if (auto *TPC = getAnalysisIfAvailable<TargetPassConfig>()) {
295 TM = &TPC->getTM<TargetMachine>();
296 SubtargetInfo = TM->getSubtargetImpl(F);
297 TLI = SubtargetInfo->getTargetLowering();
298 TRI = SubtargetInfo->getRegisterInfo();
300 TLInfo = &getAnalysis<TargetLibraryInfoWrapperPass>().getTLI();
301 TTI = &getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
302 LI = &getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
303 OptSize = F.optForSize();
305 if (ProfileGuidedSectionPrefix) {
306 ProfileSummaryInfo *PSI =
307 getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI();
308 if (PSI->isFunctionHotInCallGraph(&F))
309 F.setSectionPrefix(".hot");
310 else if (PSI->isFunctionColdInCallGraph(&F))
311 F.setSectionPrefix(".unlikely");
314 /// This optimization identifies DIV instructions that can be
315 /// profitably bypassed and carried out with a shorter, faster divide.
316 if (!OptSize && TLI && TLI->isSlowDivBypassed()) {
317 const DenseMap<unsigned int, unsigned int> &BypassWidths =
318 TLI->getBypassSlowDivWidths();
319 BasicBlock* BB = &*F.begin();
320 while (BB != nullptr) {
321 // bypassSlowDivision may create new BBs, but we don't want to reapply the
322 // optimization to those blocks.
323 BasicBlock* Next = BB->getNextNode();
324 EverMadeChange |= bypassSlowDivision(BB, BypassWidths);
329 // Eliminate blocks that contain only PHI nodes and an
330 // unconditional branch.
331 EverMadeChange |= eliminateMostlyEmptyBlocks(F);
333 // llvm.dbg.value is far away from the value then iSel may not be able
334 // handle it properly. iSel will drop llvm.dbg.value if it can not
335 // find a node corresponding to the value.
336 EverMadeChange |= placeDbgValues(F);
338 if (!DisableBranchOpts)
339 EverMadeChange |= splitBranchCondition(F);
341 // Split some critical edges where one of the sources is an indirect branch,
342 // to help generate sane code for PHIs involving such edges.
343 EverMadeChange |= splitIndirectCriticalEdges(F);
345 bool MadeChange = true;
348 SeenChainsForSExt.clear();
349 ValToSExtendedUses.clear();
350 RemovedInsts.clear();
351 for (Function::iterator I = F.begin(); I != F.end(); ) {
352 BasicBlock *BB = &*I++;
353 bool ModifiedDTOnIteration = false;
354 MadeChange |= optimizeBlock(*BB, ModifiedDTOnIteration);
356 // Restart BB iteration if the dominator tree of the Function was changed
357 if (ModifiedDTOnIteration)
360 if (EnableTypePromotionMerge && !ValToSExtendedUses.empty())
361 MadeChange |= mergeSExts(F);
363 // Really free removed instructions during promotion.
364 for (Instruction *I : RemovedInsts)
367 EverMadeChange |= MadeChange;
372 if (!DisableBranchOpts) {
374 SmallPtrSet<BasicBlock*, 8> WorkList;
375 for (BasicBlock &BB : F) {
376 SmallVector<BasicBlock *, 2> Successors(succ_begin(&BB), succ_end(&BB));
377 MadeChange |= ConstantFoldTerminator(&BB, true);
378 if (!MadeChange) continue;
380 for (SmallVectorImpl<BasicBlock*>::iterator
381 II = Successors.begin(), IE = Successors.end(); II != IE; ++II)
382 if (pred_begin(*II) == pred_end(*II))
383 WorkList.insert(*II);
386 // Delete the dead blocks and any of their dead successors.
387 MadeChange |= !WorkList.empty();
388 while (!WorkList.empty()) {
389 BasicBlock *BB = *WorkList.begin();
391 SmallVector<BasicBlock*, 2> Successors(succ_begin(BB), succ_end(BB));
395 for (SmallVectorImpl<BasicBlock*>::iterator
396 II = Successors.begin(), IE = Successors.end(); II != IE; ++II)
397 if (pred_begin(*II) == pred_end(*II))
398 WorkList.insert(*II);
401 // Merge pairs of basic blocks with unconditional branches, connected by
403 if (EverMadeChange || MadeChange)
404 MadeChange |= eliminateFallThrough(F);
406 EverMadeChange |= MadeChange;
409 if (!DisableGCOpts) {
410 SmallVector<Instruction *, 2> Statepoints;
411 for (BasicBlock &BB : F)
412 for (Instruction &I : BB)
414 Statepoints.push_back(&I);
415 for (auto &I : Statepoints)
416 EverMadeChange |= simplifyOffsetableRelocate(*I);
419 return EverMadeChange;
422 /// Merge basic blocks which are connected by a single edge, where one of the
423 /// basic blocks has a single successor pointing to the other basic block,
424 /// which has a single predecessor.
425 bool CodeGenPrepare::eliminateFallThrough(Function &F) {
426 bool Changed = false;
427 // Scan all of the blocks in the function, except for the entry block.
428 for (Function::iterator I = std::next(F.begin()), E = F.end(); I != E;) {
429 BasicBlock *BB = &*I++;
430 // If the destination block has a single pred, then this is a trivial
431 // edge, just collapse it.
432 BasicBlock *SinglePred = BB->getSinglePredecessor();
434 // Don't merge if BB's address is taken.
435 if (!SinglePred || SinglePred == BB || BB->hasAddressTaken()) continue;
437 BranchInst *Term = dyn_cast<BranchInst>(SinglePred->getTerminator());
438 if (Term && !Term->isConditional()) {
440 DEBUG(dbgs() << "To merge:\n"<< *SinglePred << "\n\n\n");
441 // Remember if SinglePred was the entry block of the function.
442 // If so, we will need to move BB back to the entry position.
443 bool isEntry = SinglePred == &SinglePred->getParent()->getEntryBlock();
444 MergeBasicBlockIntoOnlyPred(BB, nullptr);
446 if (isEntry && BB != &BB->getParent()->getEntryBlock())
447 BB->moveBefore(&BB->getParent()->getEntryBlock());
449 // We have erased a block. Update the iterator.
450 I = BB->getIterator();
456 /// Find a destination block from BB if BB is mergeable empty block.
457 BasicBlock *CodeGenPrepare::findDestBlockOfMergeableEmptyBlock(BasicBlock *BB) {
458 // If this block doesn't end with an uncond branch, ignore it.
459 BranchInst *BI = dyn_cast<BranchInst>(BB->getTerminator());
460 if (!BI || !BI->isUnconditional())
463 // If the instruction before the branch (skipping debug info) isn't a phi
464 // node, then other stuff is happening here.
465 BasicBlock::iterator BBI = BI->getIterator();
466 if (BBI != BB->begin()) {
468 while (isa<DbgInfoIntrinsic>(BBI)) {
469 if (BBI == BB->begin())
473 if (!isa<DbgInfoIntrinsic>(BBI) && !isa<PHINode>(BBI))
477 // Do not break infinite loops.
478 BasicBlock *DestBB = BI->getSuccessor(0);
482 if (!canMergeBlocks(BB, DestBB))
488 // Return the unique indirectbr predecessor of a block. This may return null
489 // even if such a predecessor exists, if it's not useful for splitting.
490 // If a predecessor is found, OtherPreds will contain all other (non-indirectbr)
491 // predecessors of BB.
493 findIBRPredecessor(BasicBlock *BB, SmallVectorImpl<BasicBlock *> &OtherPreds) {
494 // If the block doesn't have any PHIs, we don't care about it, since there's
495 // no point in splitting it.
496 PHINode *PN = dyn_cast<PHINode>(BB->begin());
500 // Verify we have exactly one IBR predecessor.
501 // Conservatively bail out if one of the other predecessors is not a "regular"
502 // terminator (that is, not a switch or a br).
503 BasicBlock *IBB = nullptr;
504 for (unsigned Pred = 0, E = PN->getNumIncomingValues(); Pred != E; ++Pred) {
505 BasicBlock *PredBB = PN->getIncomingBlock(Pred);
506 TerminatorInst *PredTerm = PredBB->getTerminator();
507 switch (PredTerm->getOpcode()) {
508 case Instruction::IndirectBr:
513 case Instruction::Br:
514 case Instruction::Switch:
515 OtherPreds.push_back(PredBB);
525 // Split critical edges where the source of the edge is an indirectbr
526 // instruction. This isn't always possible, but we can handle some easy cases.
527 // This is useful because MI is unable to split such critical edges,
528 // which means it will not be able to sink instructions along those edges.
529 // This is especially painful for indirect branches with many successors, where
530 // we end up having to prepare all outgoing values in the origin block.
532 // Our normal algorithm for splitting critical edges requires us to update
533 // the outgoing edges of the edge origin block, but for an indirectbr this
534 // is hard, since it would require finding and updating the block addresses
535 // the indirect branch uses. But if a block only has a single indirectbr
536 // predecessor, with the others being regular branches, we can do it in a
538 // Say we have A -> D, B -> D, I -> D where only I -> D is an indirectbr.
539 // We can split D into D0 and D1, where D0 contains only the PHIs from D,
540 // and D1 is the D block body. We can then duplicate D0 as D0A and D0B, and
541 // create the following structure:
542 // A -> D0A, B -> D0A, I -> D0B, D0A -> D1, D0B -> D1
543 bool CodeGenPrepare::splitIndirectCriticalEdges(Function &F) {
544 // Check whether the function has any indirectbrs, and collect which blocks
545 // they may jump to. Since most functions don't have indirect branches,
546 // this lowers the common case's overhead to O(Blocks) instead of O(Edges).
547 SmallSetVector<BasicBlock *, 16> Targets;
549 auto *IBI = dyn_cast<IndirectBrInst>(BB.getTerminator());
553 for (unsigned Succ = 0, E = IBI->getNumSuccessors(); Succ != E; ++Succ)
554 Targets.insert(IBI->getSuccessor(Succ));
560 bool Changed = false;
561 for (BasicBlock *Target : Targets) {
562 SmallVector<BasicBlock *, 16> OtherPreds;
563 BasicBlock *IBRPred = findIBRPredecessor(Target, OtherPreds);
564 // If we did not found an indirectbr, or the indirectbr is the only
565 // incoming edge, this isn't the kind of edge we're looking for.
566 if (!IBRPred || OtherPreds.empty())
569 // Don't even think about ehpads/landingpads.
570 Instruction *FirstNonPHI = Target->getFirstNonPHI();
571 if (FirstNonPHI->isEHPad() || Target->isLandingPad())
574 BasicBlock *BodyBlock = Target->splitBasicBlock(FirstNonPHI, ".split");
575 // It's possible Target was its own successor through an indirectbr.
576 // In this case, the indirectbr now comes from BodyBlock.
577 if (IBRPred == Target)
580 // At this point Target only has PHIs, and BodyBlock has the rest of the
581 // block's body. Create a copy of Target that will be used by the "direct"
583 ValueToValueMapTy VMap;
584 BasicBlock *DirectSucc = CloneBasicBlock(Target, VMap, ".clone", &F);
586 for (BasicBlock *Pred : OtherPreds) {
587 // If the target is a loop to itself, then the terminator of the split
588 // block needs to be updated.
590 BodyBlock->getTerminator()->replaceUsesOfWith(Target, DirectSucc);
592 Pred->getTerminator()->replaceUsesOfWith(Target, DirectSucc);
595 // Ok, now fix up the PHIs. We know the two blocks only have PHIs, and that
596 // they are clones, so the number of PHIs are the same.
597 // (a) Remove the edge coming from IBRPred from the "Direct" PHI
598 // (b) Leave that as the only edge in the "Indirect" PHI.
599 // (c) Merge the two in the body block.
600 BasicBlock::iterator Indirect = Target->begin(),
601 End = Target->getFirstNonPHI()->getIterator();
602 BasicBlock::iterator Direct = DirectSucc->begin();
603 BasicBlock::iterator MergeInsert = BodyBlock->getFirstInsertionPt();
605 assert(&*End == Target->getTerminator() &&
606 "Block was expected to only contain PHIs");
608 while (Indirect != End) {
609 PHINode *DirPHI = cast<PHINode>(Direct);
610 PHINode *IndPHI = cast<PHINode>(Indirect);
612 // Now, clean up - the direct block shouldn't get the indirect value,
614 DirPHI->removeIncomingValue(IBRPred);
617 // Advance the pointer here, to avoid invalidation issues when the old
621 PHINode *NewIndPHI = PHINode::Create(IndPHI->getType(), 1, "ind", IndPHI);
622 NewIndPHI->addIncoming(IndPHI->getIncomingValueForBlock(IBRPred),
625 // Create a PHI in the body block, to merge the direct and indirect
628 PHINode::Create(IndPHI->getType(), 2, "merge", &*MergeInsert);
629 MergePHI->addIncoming(NewIndPHI, Target);
630 MergePHI->addIncoming(DirPHI, DirectSucc);
632 IndPHI->replaceAllUsesWith(MergePHI);
633 IndPHI->eraseFromParent();
642 /// Eliminate blocks that contain only PHI nodes, debug info directives, and an
643 /// unconditional branch. Passes before isel (e.g. LSR/loopsimplify) often split
644 /// edges in ways that are non-optimal for isel. Start by eliminating these
645 /// blocks so we can split them the way we want them.
646 bool CodeGenPrepare::eliminateMostlyEmptyBlocks(Function &F) {
647 SmallPtrSet<BasicBlock *, 16> Preheaders;
648 SmallVector<Loop *, 16> LoopList(LI->begin(), LI->end());
649 while (!LoopList.empty()) {
650 Loop *L = LoopList.pop_back_val();
651 LoopList.insert(LoopList.end(), L->begin(), L->end());
652 if (BasicBlock *Preheader = L->getLoopPreheader())
653 Preheaders.insert(Preheader);
656 bool MadeChange = false;
657 // Note that this intentionally skips the entry block.
658 for (Function::iterator I = std::next(F.begin()), E = F.end(); I != E;) {
659 BasicBlock *BB = &*I++;
660 BasicBlock *DestBB = findDestBlockOfMergeableEmptyBlock(BB);
662 !isMergingEmptyBlockProfitable(BB, DestBB, Preheaders.count(BB)))
665 eliminateMostlyEmptyBlock(BB);
671 bool CodeGenPrepare::isMergingEmptyBlockProfitable(BasicBlock *BB,
674 // Do not delete loop preheaders if doing so would create a critical edge.
675 // Loop preheaders can be good locations to spill registers. If the
676 // preheader is deleted and we create a critical edge, registers may be
677 // spilled in the loop body instead.
678 if (!DisablePreheaderProtect && isPreheader &&
679 !(BB->getSinglePredecessor() &&
680 BB->getSinglePredecessor()->getSingleSuccessor()))
683 // Try to skip merging if the unique predecessor of BB is terminated by a
684 // switch or indirect branch instruction, and BB is used as an incoming block
685 // of PHIs in DestBB. In such case, merging BB and DestBB would cause ISel to
686 // add COPY instructions in the predecessor of BB instead of BB (if it is not
687 // merged). Note that the critical edge created by merging such blocks wont be
688 // split in MachineSink because the jump table is not analyzable. By keeping
689 // such empty block (BB), ISel will place COPY instructions in BB, not in the
690 // predecessor of BB.
691 BasicBlock *Pred = BB->getUniquePredecessor();
693 !(isa<SwitchInst>(Pred->getTerminator()) ||
694 isa<IndirectBrInst>(Pred->getTerminator())))
697 if (BB->getTerminator() != BB->getFirstNonPHI())
700 // We use a simple cost heuristic which determine skipping merging is
701 // profitable if the cost of skipping merging is less than the cost of
702 // merging : Cost(skipping merging) < Cost(merging BB), where the
703 // Cost(skipping merging) is Freq(BB) * (Cost(Copy) + Cost(Branch)), and
704 // the Cost(merging BB) is Freq(Pred) * Cost(Copy).
705 // Assuming Cost(Copy) == Cost(Branch), we could simplify it to :
706 // Freq(Pred) / Freq(BB) > 2.
707 // Note that if there are multiple empty blocks sharing the same incoming
708 // value for the PHIs in the DestBB, we consider them together. In such
709 // case, Cost(merging BB) will be the sum of their frequencies.
711 if (!isa<PHINode>(DestBB->begin()))
714 SmallPtrSet<BasicBlock *, 16> SameIncomingValueBBs;
716 // Find all other incoming blocks from which incoming values of all PHIs in
717 // DestBB are the same as the ones from BB.
718 for (pred_iterator PI = pred_begin(DestBB), E = pred_end(DestBB); PI != E;
720 BasicBlock *DestBBPred = *PI;
721 if (DestBBPred == BB)
724 bool HasAllSameValue = true;
725 BasicBlock::const_iterator DestBBI = DestBB->begin();
726 while (const PHINode *DestPN = dyn_cast<PHINode>(DestBBI++)) {
727 if (DestPN->getIncomingValueForBlock(BB) !=
728 DestPN->getIncomingValueForBlock(DestBBPred)) {
729 HasAllSameValue = false;
734 SameIncomingValueBBs.insert(DestBBPred);
737 // See if all BB's incoming values are same as the value from Pred. In this
738 // case, no reason to skip merging because COPYs are expected to be place in
740 if (SameIncomingValueBBs.count(Pred))
744 Function &F = *BB->getParent();
745 LoopInfo LI{DominatorTree(F)};
746 BPI.reset(new BranchProbabilityInfo(F, LI));
747 BFI.reset(new BlockFrequencyInfo(F, *BPI, LI));
750 BlockFrequency PredFreq = BFI->getBlockFreq(Pred);
751 BlockFrequency BBFreq = BFI->getBlockFreq(BB);
753 for (auto SameValueBB : SameIncomingValueBBs)
754 if (SameValueBB->getUniquePredecessor() == Pred &&
755 DestBB == findDestBlockOfMergeableEmptyBlock(SameValueBB))
756 BBFreq += BFI->getBlockFreq(SameValueBB);
758 return PredFreq.getFrequency() <=
759 BBFreq.getFrequency() * FreqRatioToSkipMerge;
762 /// Return true if we can merge BB into DestBB if there is a single
763 /// unconditional branch between them, and BB contains no other non-phi
765 bool CodeGenPrepare::canMergeBlocks(const BasicBlock *BB,
766 const BasicBlock *DestBB) const {
767 // We only want to eliminate blocks whose phi nodes are used by phi nodes in
768 // the successor. If there are more complex condition (e.g. preheaders),
769 // don't mess around with them.
770 BasicBlock::const_iterator BBI = BB->begin();
771 while (const PHINode *PN = dyn_cast<PHINode>(BBI++)) {
772 for (const User *U : PN->users()) {
773 const Instruction *UI = cast<Instruction>(U);
774 if (UI->getParent() != DestBB || !isa<PHINode>(UI))
776 // If User is inside DestBB block and it is a PHINode then check
777 // incoming value. If incoming value is not from BB then this is
778 // a complex condition (e.g. preheaders) we want to avoid here.
779 if (UI->getParent() == DestBB) {
780 if (const PHINode *UPN = dyn_cast<PHINode>(UI))
781 for (unsigned I = 0, E = UPN->getNumIncomingValues(); I != E; ++I) {
782 Instruction *Insn = dyn_cast<Instruction>(UPN->getIncomingValue(I));
783 if (Insn && Insn->getParent() == BB &&
784 Insn->getParent() != UPN->getIncomingBlock(I))
791 // If BB and DestBB contain any common predecessors, then the phi nodes in BB
792 // and DestBB may have conflicting incoming values for the block. If so, we
793 // can't merge the block.
794 const PHINode *DestBBPN = dyn_cast<PHINode>(DestBB->begin());
795 if (!DestBBPN) return true; // no conflict.
797 // Collect the preds of BB.
798 SmallPtrSet<const BasicBlock*, 16> BBPreds;
799 if (const PHINode *BBPN = dyn_cast<PHINode>(BB->begin())) {
800 // It is faster to get preds from a PHI than with pred_iterator.
801 for (unsigned i = 0, e = BBPN->getNumIncomingValues(); i != e; ++i)
802 BBPreds.insert(BBPN->getIncomingBlock(i));
804 BBPreds.insert(pred_begin(BB), pred_end(BB));
807 // Walk the preds of DestBB.
808 for (unsigned i = 0, e = DestBBPN->getNumIncomingValues(); i != e; ++i) {
809 BasicBlock *Pred = DestBBPN->getIncomingBlock(i);
810 if (BBPreds.count(Pred)) { // Common predecessor?
811 BBI = DestBB->begin();
812 while (const PHINode *PN = dyn_cast<PHINode>(BBI++)) {
813 const Value *V1 = PN->getIncomingValueForBlock(Pred);
814 const Value *V2 = PN->getIncomingValueForBlock(BB);
816 // If V2 is a phi node in BB, look up what the mapped value will be.
817 if (const PHINode *V2PN = dyn_cast<PHINode>(V2))
818 if (V2PN->getParent() == BB)
819 V2 = V2PN->getIncomingValueForBlock(Pred);
821 // If there is a conflict, bail out.
822 if (V1 != V2) return false;
831 /// Eliminate a basic block that has only phi's and an unconditional branch in
833 void CodeGenPrepare::eliminateMostlyEmptyBlock(BasicBlock *BB) {
834 BranchInst *BI = cast<BranchInst>(BB->getTerminator());
835 BasicBlock *DestBB = BI->getSuccessor(0);
837 DEBUG(dbgs() << "MERGING MOSTLY EMPTY BLOCKS - BEFORE:\n" << *BB << *DestBB);
839 // If the destination block has a single pred, then this is a trivial edge,
841 if (BasicBlock *SinglePred = DestBB->getSinglePredecessor()) {
842 if (SinglePred != DestBB) {
843 // Remember if SinglePred was the entry block of the function. If so, we
844 // will need to move BB back to the entry position.
845 bool isEntry = SinglePred == &SinglePred->getParent()->getEntryBlock();
846 MergeBasicBlockIntoOnlyPred(DestBB, nullptr);
848 if (isEntry && BB != &BB->getParent()->getEntryBlock())
849 BB->moveBefore(&BB->getParent()->getEntryBlock());
851 DEBUG(dbgs() << "AFTER:\n" << *DestBB << "\n\n\n");
856 // Otherwise, we have multiple predecessors of BB. Update the PHIs in DestBB
857 // to handle the new incoming edges it is about to have.
859 for (BasicBlock::iterator BBI = DestBB->begin();
860 (PN = dyn_cast<PHINode>(BBI)); ++BBI) {
861 // Remove the incoming value for BB, and remember it.
862 Value *InVal = PN->removeIncomingValue(BB, false);
864 // Two options: either the InVal is a phi node defined in BB or it is some
865 // value that dominates BB.
866 PHINode *InValPhi = dyn_cast<PHINode>(InVal);
867 if (InValPhi && InValPhi->getParent() == BB) {
868 // Add all of the input values of the input PHI as inputs of this phi.
869 for (unsigned i = 0, e = InValPhi->getNumIncomingValues(); i != e; ++i)
870 PN->addIncoming(InValPhi->getIncomingValue(i),
871 InValPhi->getIncomingBlock(i));
873 // Otherwise, add one instance of the dominating value for each edge that
874 // we will be adding.
875 if (PHINode *BBPN = dyn_cast<PHINode>(BB->begin())) {
876 for (unsigned i = 0, e = BBPN->getNumIncomingValues(); i != e; ++i)
877 PN->addIncoming(InVal, BBPN->getIncomingBlock(i));
879 for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI)
880 PN->addIncoming(InVal, *PI);
885 // The PHIs are now updated, change everything that refers to BB to use
886 // DestBB and remove BB.
887 BB->replaceAllUsesWith(DestBB);
888 BB->eraseFromParent();
891 DEBUG(dbgs() << "AFTER:\n" << *DestBB << "\n\n\n");
894 // Computes a map of base pointer relocation instructions to corresponding
895 // derived pointer relocation instructions given a vector of all relocate calls
896 static void computeBaseDerivedRelocateMap(
897 const SmallVectorImpl<GCRelocateInst *> &AllRelocateCalls,
898 DenseMap<GCRelocateInst *, SmallVector<GCRelocateInst *, 2>>
900 // Collect information in two maps: one primarily for locating the base object
901 // while filling the second map; the second map is the final structure holding
902 // a mapping between Base and corresponding Derived relocate calls
903 DenseMap<std::pair<unsigned, unsigned>, GCRelocateInst *> RelocateIdxMap;
904 for (auto *ThisRelocate : AllRelocateCalls) {
905 auto K = std::make_pair(ThisRelocate->getBasePtrIndex(),
906 ThisRelocate->getDerivedPtrIndex());
907 RelocateIdxMap.insert(std::make_pair(K, ThisRelocate));
909 for (auto &Item : RelocateIdxMap) {
910 std::pair<unsigned, unsigned> Key = Item.first;
911 if (Key.first == Key.second)
912 // Base relocation: nothing to insert
915 GCRelocateInst *I = Item.second;
916 auto BaseKey = std::make_pair(Key.first, Key.first);
918 // We're iterating over RelocateIdxMap so we cannot modify it.
919 auto MaybeBase = RelocateIdxMap.find(BaseKey);
920 if (MaybeBase == RelocateIdxMap.end())
921 // TODO: We might want to insert a new base object relocate and gep off
922 // that, if there are enough derived object relocates.
925 RelocateInstMap[MaybeBase->second].push_back(I);
929 // Accepts a GEP and extracts the operands into a vector provided they're all
930 // small integer constants
931 static bool getGEPSmallConstantIntOffsetV(GetElementPtrInst *GEP,
932 SmallVectorImpl<Value *> &OffsetV) {
933 for (unsigned i = 1; i < GEP->getNumOperands(); i++) {
934 // Only accept small constant integer operands
935 auto Op = dyn_cast<ConstantInt>(GEP->getOperand(i));
936 if (!Op || Op->getZExtValue() > 20)
940 for (unsigned i = 1; i < GEP->getNumOperands(); i++)
941 OffsetV.push_back(GEP->getOperand(i));
945 // Takes a RelocatedBase (base pointer relocation instruction) and Targets to
946 // replace, computes a replacement, and affects it.
948 simplifyRelocatesOffABase(GCRelocateInst *RelocatedBase,
949 const SmallVectorImpl<GCRelocateInst *> &Targets) {
950 bool MadeChange = false;
951 for (GCRelocateInst *ToReplace : Targets) {
952 assert(ToReplace->getBasePtrIndex() == RelocatedBase->getBasePtrIndex() &&
953 "Not relocating a derived object of the original base object");
954 if (ToReplace->getBasePtrIndex() == ToReplace->getDerivedPtrIndex()) {
955 // A duplicate relocate call. TODO: coalesce duplicates.
959 if (RelocatedBase->getParent() != ToReplace->getParent()) {
960 // Base and derived relocates are in different basic blocks.
961 // In this case transform is only valid when base dominates derived
962 // relocate. However it would be too expensive to check dominance
963 // for each such relocate, so we skip the whole transformation.
967 Value *Base = ToReplace->getBasePtr();
968 auto Derived = dyn_cast<GetElementPtrInst>(ToReplace->getDerivedPtr());
969 if (!Derived || Derived->getPointerOperand() != Base)
972 SmallVector<Value *, 2> OffsetV;
973 if (!getGEPSmallConstantIntOffsetV(Derived, OffsetV))
976 // Create a Builder and replace the target callsite with a gep
977 assert(RelocatedBase->getNextNode() &&
978 "Should always have one since it's not a terminator");
980 // Insert after RelocatedBase
981 IRBuilder<> Builder(RelocatedBase->getNextNode());
982 Builder.SetCurrentDebugLocation(ToReplace->getDebugLoc());
984 // If gc_relocate does not match the actual type, cast it to the right type.
985 // In theory, there must be a bitcast after gc_relocate if the type does not
986 // match, and we should reuse it to get the derived pointer. But it could be
990 // %g1 = call coldcc i8 addrspace(1)* @llvm.experimental.gc.relocate.p1i8(...)
995 // %g2 = call coldcc i8 addrspace(1)* @llvm.experimental.gc.relocate.p1i8(...)
999 // %p1 = phi i8 addrspace(1)* [ %g1, %bb1 ], [ %g2, %bb2 ]
1000 // %cast = bitcast i8 addrspace(1)* %p1 in to i32 addrspace(1)*
1002 // In this case, we can not find the bitcast any more. So we insert a new bitcast
1003 // no matter there is already one or not. In this way, we can handle all cases, and
1004 // the extra bitcast should be optimized away in later passes.
1005 Value *ActualRelocatedBase = RelocatedBase;
1006 if (RelocatedBase->getType() != Base->getType()) {
1007 ActualRelocatedBase =
1008 Builder.CreateBitCast(RelocatedBase, Base->getType());
1010 Value *Replacement = Builder.CreateGEP(
1011 Derived->getSourceElementType(), ActualRelocatedBase, makeArrayRef(OffsetV));
1012 Replacement->takeName(ToReplace);
1013 // If the newly generated derived pointer's type does not match the original derived
1014 // pointer's type, cast the new derived pointer to match it. Same reasoning as above.
1015 Value *ActualReplacement = Replacement;
1016 if (Replacement->getType() != ToReplace->getType()) {
1018 Builder.CreateBitCast(Replacement, ToReplace->getType());
1020 ToReplace->replaceAllUsesWith(ActualReplacement);
1021 ToReplace->eraseFromParent();
1031 // %ptr = gep %base + 15
1032 // %tok = statepoint (%fun, i32 0, i32 0, i32 0, %base, %ptr)
1033 // %base' = relocate(%tok, i32 4, i32 4)
1034 // %ptr' = relocate(%tok, i32 4, i32 5)
1035 // %val = load %ptr'
1040 // %ptr = gep %base + 15
1041 // %tok = statepoint (%fun, i32 0, i32 0, i32 0, %base, %ptr)
1042 // %base' = gc.relocate(%tok, i32 4, i32 4)
1043 // %ptr' = gep %base' + 15
1044 // %val = load %ptr'
1045 bool CodeGenPrepare::simplifyOffsetableRelocate(Instruction &I) {
1046 bool MadeChange = false;
1047 SmallVector<GCRelocateInst *, 2> AllRelocateCalls;
1049 for (auto *U : I.users())
1050 if (GCRelocateInst *Relocate = dyn_cast<GCRelocateInst>(U))
1051 // Collect all the relocate calls associated with a statepoint
1052 AllRelocateCalls.push_back(Relocate);
1054 // We need atleast one base pointer relocation + one derived pointer
1055 // relocation to mangle
1056 if (AllRelocateCalls.size() < 2)
1059 // RelocateInstMap is a mapping from the base relocate instruction to the
1060 // corresponding derived relocate instructions
1061 DenseMap<GCRelocateInst *, SmallVector<GCRelocateInst *, 2>> RelocateInstMap;
1062 computeBaseDerivedRelocateMap(AllRelocateCalls, RelocateInstMap);
1063 if (RelocateInstMap.empty())
1066 for (auto &Item : RelocateInstMap)
1067 // Item.first is the RelocatedBase to offset against
1068 // Item.second is the vector of Targets to replace
1069 MadeChange = simplifyRelocatesOffABase(Item.first, Item.second);
1073 /// SinkCast - Sink the specified cast instruction into its user blocks
1074 static bool SinkCast(CastInst *CI) {
1075 BasicBlock *DefBB = CI->getParent();
1077 /// InsertedCasts - Only insert a cast in each block once.
1078 DenseMap<BasicBlock*, CastInst*> InsertedCasts;
1080 bool MadeChange = false;
1081 for (Value::user_iterator UI = CI->user_begin(), E = CI->user_end();
1083 Use &TheUse = UI.getUse();
1084 Instruction *User = cast<Instruction>(*UI);
1086 // Figure out which BB this cast is used in. For PHI's this is the
1087 // appropriate predecessor block.
1088 BasicBlock *UserBB = User->getParent();
1089 if (PHINode *PN = dyn_cast<PHINode>(User)) {
1090 UserBB = PN->getIncomingBlock(TheUse);
1093 // Preincrement use iterator so we don't invalidate it.
1096 // The first insertion point of a block containing an EH pad is after the
1097 // pad. If the pad is the user, we cannot sink the cast past the pad.
1098 if (User->isEHPad())
1101 // If the block selected to receive the cast is an EH pad that does not
1102 // allow non-PHI instructions before the terminator, we can't sink the
1104 if (UserBB->getTerminator()->isEHPad())
1107 // If this user is in the same block as the cast, don't change the cast.
1108 if (UserBB == DefBB) continue;
1110 // If we have already inserted a cast into this block, use it.
1111 CastInst *&InsertedCast = InsertedCasts[UserBB];
1113 if (!InsertedCast) {
1114 BasicBlock::iterator InsertPt = UserBB->getFirstInsertionPt();
1115 assert(InsertPt != UserBB->end());
1116 InsertedCast = CastInst::Create(CI->getOpcode(), CI->getOperand(0),
1117 CI->getType(), "", &*InsertPt);
1120 // Replace a use of the cast with a use of the new cast.
1121 TheUse = InsertedCast;
1126 // If we removed all uses, nuke the cast.
1127 if (CI->use_empty()) {
1128 CI->eraseFromParent();
1135 /// If the specified cast instruction is a noop copy (e.g. it's casting from
1136 /// one pointer type to another, i32->i8 on PPC), sink it into user blocks to
1137 /// reduce the number of virtual registers that must be created and coalesced.
1139 /// Return true if any changes are made.
1141 static bool OptimizeNoopCopyExpression(CastInst *CI, const TargetLowering &TLI,
1142 const DataLayout &DL) {
1143 // Sink only "cheap" (or nop) address-space casts. This is a weaker condition
1144 // than sinking only nop casts, but is helpful on some platforms.
1145 if (auto *ASC = dyn_cast<AddrSpaceCastInst>(CI)) {
1146 if (!TLI.isCheapAddrSpaceCast(ASC->getSrcAddressSpace(),
1147 ASC->getDestAddressSpace()))
1151 // If this is a noop copy,
1152 EVT SrcVT = TLI.getValueType(DL, CI->getOperand(0)->getType());
1153 EVT DstVT = TLI.getValueType(DL, CI->getType());
1155 // This is an fp<->int conversion?
1156 if (SrcVT.isInteger() != DstVT.isInteger())
1159 // If this is an extension, it will be a zero or sign extension, which
1161 if (SrcVT.bitsLT(DstVT)) return false;
1163 // If these values will be promoted, find out what they will be promoted
1164 // to. This helps us consider truncates on PPC as noop copies when they
1166 if (TLI.getTypeAction(CI->getContext(), SrcVT) ==
1167 TargetLowering::TypePromoteInteger)
1168 SrcVT = TLI.getTypeToTransformTo(CI->getContext(), SrcVT);
1169 if (TLI.getTypeAction(CI->getContext(), DstVT) ==
1170 TargetLowering::TypePromoteInteger)
1171 DstVT = TLI.getTypeToTransformTo(CI->getContext(), DstVT);
1173 // If, after promotion, these are the same types, this is a noop copy.
1177 return SinkCast(CI);
1180 /// Try to combine CI into a call to the llvm.uadd.with.overflow intrinsic if
1183 /// Return true if any changes were made.
1184 static bool CombineUAddWithOverflow(CmpInst *CI) {
1188 m_UAddWithOverflow(m_Value(A), m_Value(B), m_Instruction(AddI))))
1191 Type *Ty = AddI->getType();
1192 if (!isa<IntegerType>(Ty))
1195 // We don't want to move around uses of condition values this late, so we we
1196 // check if it is legal to create the call to the intrinsic in the basic
1197 // block containing the icmp:
1199 if (AddI->getParent() != CI->getParent() && !AddI->hasOneUse())
1203 // Someday m_UAddWithOverflow may get smarter, but this is a safe assumption
1205 if (AddI->hasOneUse())
1206 assert(*AddI->user_begin() == CI && "expected!");
1209 Module *M = CI->getModule();
1210 Value *F = Intrinsic::getDeclaration(M, Intrinsic::uadd_with_overflow, Ty);
1212 auto *InsertPt = AddI->hasOneUse() ? CI : AddI;
1214 auto *UAddWithOverflow =
1215 CallInst::Create(F, {A, B}, "uadd.overflow", InsertPt);
1216 auto *UAdd = ExtractValueInst::Create(UAddWithOverflow, 0, "uadd", InsertPt);
1218 ExtractValueInst::Create(UAddWithOverflow, 1, "overflow", InsertPt);
1220 CI->replaceAllUsesWith(Overflow);
1221 AddI->replaceAllUsesWith(UAdd);
1222 CI->eraseFromParent();
1223 AddI->eraseFromParent();
1227 /// Sink the given CmpInst into user blocks to reduce the number of virtual
1228 /// registers that must be created and coalesced. This is a clear win except on
1229 /// targets with multiple condition code registers (PowerPC), where it might
1230 /// lose; some adjustment may be wanted there.
1232 /// Return true if any changes are made.
1233 static bool SinkCmpExpression(CmpInst *CI, const TargetLowering *TLI) {
1234 BasicBlock *DefBB = CI->getParent();
1236 // Avoid sinking soft-FP comparisons, since this can move them into a loop.
1237 if (TLI && TLI->useSoftFloat() && isa<FCmpInst>(CI))
1240 // Only insert a cmp in each block once.
1241 DenseMap<BasicBlock*, CmpInst*> InsertedCmps;
1243 bool MadeChange = false;
1244 for (Value::user_iterator UI = CI->user_begin(), E = CI->user_end();
1246 Use &TheUse = UI.getUse();
1247 Instruction *User = cast<Instruction>(*UI);
1249 // Preincrement use iterator so we don't invalidate it.
1252 // Don't bother for PHI nodes.
1253 if (isa<PHINode>(User))
1256 // Figure out which BB this cmp is used in.
1257 BasicBlock *UserBB = User->getParent();
1259 // If this user is in the same block as the cmp, don't change the cmp.
1260 if (UserBB == DefBB) continue;
1262 // If we have already inserted a cmp into this block, use it.
1263 CmpInst *&InsertedCmp = InsertedCmps[UserBB];
1266 BasicBlock::iterator InsertPt = UserBB->getFirstInsertionPt();
1267 assert(InsertPt != UserBB->end());
1269 CmpInst::Create(CI->getOpcode(), CI->getPredicate(),
1270 CI->getOperand(0), CI->getOperand(1), "", &*InsertPt);
1271 // Propagate the debug info.
1272 InsertedCmp->setDebugLoc(CI->getDebugLoc());
1275 // Replace a use of the cmp with a use of the new cmp.
1276 TheUse = InsertedCmp;
1281 // If we removed all uses, nuke the cmp.
1282 if (CI->use_empty()) {
1283 CI->eraseFromParent();
1290 static bool OptimizeCmpExpression(CmpInst *CI, const TargetLowering *TLI) {
1291 if (SinkCmpExpression(CI, TLI))
1294 if (CombineUAddWithOverflow(CI))
1300 /// Duplicate and sink the given 'and' instruction into user blocks where it is
1301 /// used in a compare to allow isel to generate better code for targets where
1302 /// this operation can be combined.
1304 /// Return true if any changes are made.
1305 static bool sinkAndCmp0Expression(Instruction *AndI,
1306 const TargetLowering &TLI,
1307 SetOfInstrs &InsertedInsts) {
1308 // Double-check that we're not trying to optimize an instruction that was
1309 // already optimized by some other part of this pass.
1310 assert(!InsertedInsts.count(AndI) &&
1311 "Attempting to optimize already optimized and instruction");
1312 (void) InsertedInsts;
1314 // Nothing to do for single use in same basic block.
1315 if (AndI->hasOneUse() &&
1316 AndI->getParent() == cast<Instruction>(*AndI->user_begin())->getParent())
1319 // Try to avoid cases where sinking/duplicating is likely to increase register
1321 if (!isa<ConstantInt>(AndI->getOperand(0)) &&
1322 !isa<ConstantInt>(AndI->getOperand(1)) &&
1323 AndI->getOperand(0)->hasOneUse() && AndI->getOperand(1)->hasOneUse())
1326 for (auto *U : AndI->users()) {
1327 Instruction *User = cast<Instruction>(U);
1329 // Only sink for and mask feeding icmp with 0.
1330 if (!isa<ICmpInst>(User))
1333 auto *CmpC = dyn_cast<ConstantInt>(User->getOperand(1));
1334 if (!CmpC || !CmpC->isZero())
1338 if (!TLI.isMaskAndCmp0FoldingBeneficial(*AndI))
1341 DEBUG(dbgs() << "found 'and' feeding only icmp 0;\n");
1342 DEBUG(AndI->getParent()->dump());
1344 // Push the 'and' into the same block as the icmp 0. There should only be
1345 // one (icmp (and, 0)) in each block, since CSE/GVN should have removed any
1346 // others, so we don't need to keep track of which BBs we insert into.
1347 for (Value::user_iterator UI = AndI->user_begin(), E = AndI->user_end();
1349 Use &TheUse = UI.getUse();
1350 Instruction *User = cast<Instruction>(*UI);
1352 // Preincrement use iterator so we don't invalidate it.
1355 DEBUG(dbgs() << "sinking 'and' use: " << *User << "\n");
1357 // Keep the 'and' in the same place if the use is already in the same block.
1358 Instruction *InsertPt =
1359 User->getParent() == AndI->getParent() ? AndI : User;
1360 Instruction *InsertedAnd =
1361 BinaryOperator::Create(Instruction::And, AndI->getOperand(0),
1362 AndI->getOperand(1), "", InsertPt);
1363 // Propagate the debug info.
1364 InsertedAnd->setDebugLoc(AndI->getDebugLoc());
1366 // Replace a use of the 'and' with a use of the new 'and'.
1367 TheUse = InsertedAnd;
1369 DEBUG(User->getParent()->dump());
1372 // We removed all uses, nuke the and.
1373 AndI->eraseFromParent();
1377 /// Check if the candidates could be combined with a shift instruction, which
1379 /// 1. Truncate instruction
1380 /// 2. And instruction and the imm is a mask of the low bits:
1381 /// imm & (imm+1) == 0
1382 static bool isExtractBitsCandidateUse(Instruction *User) {
1383 if (!isa<TruncInst>(User)) {
1384 if (User->getOpcode() != Instruction::And ||
1385 !isa<ConstantInt>(User->getOperand(1)))
1388 const APInt &Cimm = cast<ConstantInt>(User->getOperand(1))->getValue();
1390 if ((Cimm & (Cimm + 1)).getBoolValue())
1396 /// Sink both shift and truncate instruction to the use of truncate's BB.
1398 SinkShiftAndTruncate(BinaryOperator *ShiftI, Instruction *User, ConstantInt *CI,
1399 DenseMap<BasicBlock *, BinaryOperator *> &InsertedShifts,
1400 const TargetLowering &TLI, const DataLayout &DL) {
1401 BasicBlock *UserBB = User->getParent();
1402 DenseMap<BasicBlock *, CastInst *> InsertedTruncs;
1403 TruncInst *TruncI = dyn_cast<TruncInst>(User);
1404 bool MadeChange = false;
1406 for (Value::user_iterator TruncUI = TruncI->user_begin(),
1407 TruncE = TruncI->user_end();
1408 TruncUI != TruncE;) {
1410 Use &TruncTheUse = TruncUI.getUse();
1411 Instruction *TruncUser = cast<Instruction>(*TruncUI);
1412 // Preincrement use iterator so we don't invalidate it.
1416 int ISDOpcode = TLI.InstructionOpcodeToISD(TruncUser->getOpcode());
1420 // If the use is actually a legal node, there will not be an
1421 // implicit truncate.
1422 // FIXME: always querying the result type is just an
1423 // approximation; some nodes' legality is determined by the
1424 // operand or other means. There's no good way to find out though.
1425 if (TLI.isOperationLegalOrCustom(
1426 ISDOpcode, TLI.getValueType(DL, TruncUser->getType(), true)))
1429 // Don't bother for PHI nodes.
1430 if (isa<PHINode>(TruncUser))
1433 BasicBlock *TruncUserBB = TruncUser->getParent();
1435 if (UserBB == TruncUserBB)
1438 BinaryOperator *&InsertedShift = InsertedShifts[TruncUserBB];
1439 CastInst *&InsertedTrunc = InsertedTruncs[TruncUserBB];
1441 if (!InsertedShift && !InsertedTrunc) {
1442 BasicBlock::iterator InsertPt = TruncUserBB->getFirstInsertionPt();
1443 assert(InsertPt != TruncUserBB->end());
1445 if (ShiftI->getOpcode() == Instruction::AShr)
1446 InsertedShift = BinaryOperator::CreateAShr(ShiftI->getOperand(0), CI,
1449 InsertedShift = BinaryOperator::CreateLShr(ShiftI->getOperand(0), CI,
1453 BasicBlock::iterator TruncInsertPt = TruncUserBB->getFirstInsertionPt();
1455 assert(TruncInsertPt != TruncUserBB->end());
1457 InsertedTrunc = CastInst::Create(TruncI->getOpcode(), InsertedShift,
1458 TruncI->getType(), "", &*TruncInsertPt);
1462 TruncTheUse = InsertedTrunc;
1468 /// Sink the shift *right* instruction into user blocks if the uses could
1469 /// potentially be combined with this shift instruction and generate BitExtract
1470 /// instruction. It will only be applied if the architecture supports BitExtract
1471 /// instruction. Here is an example:
1473 /// %x.extract.shift = lshr i64 %arg1, 32
1475 /// %x.extract.trunc = trunc i64 %x.extract.shift to i16
1479 /// %x.extract.shift.1 = lshr i64 %arg1, 32
1480 /// %x.extract.trunc = trunc i64 %x.extract.shift.1 to i16
1482 /// CodeGen will recoginze the pattern in BB2 and generate BitExtract
1484 /// Return true if any changes are made.
1485 static bool OptimizeExtractBits(BinaryOperator *ShiftI, ConstantInt *CI,
1486 const TargetLowering &TLI,
1487 const DataLayout &DL) {
1488 BasicBlock *DefBB = ShiftI->getParent();
1490 /// Only insert instructions in each block once.
1491 DenseMap<BasicBlock *, BinaryOperator *> InsertedShifts;
1493 bool shiftIsLegal = TLI.isTypeLegal(TLI.getValueType(DL, ShiftI->getType()));
1495 bool MadeChange = false;
1496 for (Value::user_iterator UI = ShiftI->user_begin(), E = ShiftI->user_end();
1498 Use &TheUse = UI.getUse();
1499 Instruction *User = cast<Instruction>(*UI);
1500 // Preincrement use iterator so we don't invalidate it.
1503 // Don't bother for PHI nodes.
1504 if (isa<PHINode>(User))
1507 if (!isExtractBitsCandidateUse(User))
1510 BasicBlock *UserBB = User->getParent();
1512 if (UserBB == DefBB) {
1513 // If the shift and truncate instruction are in the same BB. The use of
1514 // the truncate(TruncUse) may still introduce another truncate if not
1515 // legal. In this case, we would like to sink both shift and truncate
1516 // instruction to the BB of TruncUse.
1519 // i64 shift.result = lshr i64 opnd, imm
1520 // trunc.result = trunc shift.result to i16
1523 // ----> We will have an implicit truncate here if the architecture does
1524 // not have i16 compare.
1525 // cmp i16 trunc.result, opnd2
1527 if (isa<TruncInst>(User) && shiftIsLegal
1528 // If the type of the truncate is legal, no trucate will be
1529 // introduced in other basic blocks.
1531 (!TLI.isTypeLegal(TLI.getValueType(DL, User->getType()))))
1533 SinkShiftAndTruncate(ShiftI, User, CI, InsertedShifts, TLI, DL);
1537 // If we have already inserted a shift into this block, use it.
1538 BinaryOperator *&InsertedShift = InsertedShifts[UserBB];
1540 if (!InsertedShift) {
1541 BasicBlock::iterator InsertPt = UserBB->getFirstInsertionPt();
1542 assert(InsertPt != UserBB->end());
1544 if (ShiftI->getOpcode() == Instruction::AShr)
1545 InsertedShift = BinaryOperator::CreateAShr(ShiftI->getOperand(0), CI,
1548 InsertedShift = BinaryOperator::CreateLShr(ShiftI->getOperand(0), CI,
1554 // Replace a use of the shift with a use of the new shift.
1555 TheUse = InsertedShift;
1558 // If we removed all uses, nuke the shift.
1559 if (ShiftI->use_empty())
1560 ShiftI->eraseFromParent();
1565 /// If counting leading or trailing zeros is an expensive operation and a zero
1566 /// input is defined, add a check for zero to avoid calling the intrinsic.
1568 /// We want to transform:
1569 /// %z = call i64 @llvm.cttz.i64(i64 %A, i1 false)
1573 /// %cmpz = icmp eq i64 %A, 0
1574 /// br i1 %cmpz, label %cond.end, label %cond.false
1576 /// %z = call i64 @llvm.cttz.i64(i64 %A, i1 true)
1577 /// br label %cond.end
1579 /// %ctz = phi i64 [ 64, %entry ], [ %z, %cond.false ]
1581 /// If the transform is performed, return true and set ModifiedDT to true.
1582 static bool despeculateCountZeros(IntrinsicInst *CountZeros,
1583 const TargetLowering *TLI,
1584 const DataLayout *DL,
1589 // If a zero input is undefined, it doesn't make sense to despeculate that.
1590 if (match(CountZeros->getOperand(1), m_One()))
1593 // If it's cheap to speculate, there's nothing to do.
1594 auto IntrinsicID = CountZeros->getIntrinsicID();
1595 if ((IntrinsicID == Intrinsic::cttz && TLI->isCheapToSpeculateCttz()) ||
1596 (IntrinsicID == Intrinsic::ctlz && TLI->isCheapToSpeculateCtlz()))
1599 // Only handle legal scalar cases. Anything else requires too much work.
1600 Type *Ty = CountZeros->getType();
1601 unsigned SizeInBits = Ty->getPrimitiveSizeInBits();
1602 if (Ty->isVectorTy() || SizeInBits > DL->getLargestLegalIntTypeSizeInBits())
1605 // The intrinsic will be sunk behind a compare against zero and branch.
1606 BasicBlock *StartBlock = CountZeros->getParent();
1607 BasicBlock *CallBlock = StartBlock->splitBasicBlock(CountZeros, "cond.false");
1609 // Create another block after the count zero intrinsic. A PHI will be added
1610 // in this block to select the result of the intrinsic or the bit-width
1611 // constant if the input to the intrinsic is zero.
1612 BasicBlock::iterator SplitPt = ++(BasicBlock::iterator(CountZeros));
1613 BasicBlock *EndBlock = CallBlock->splitBasicBlock(SplitPt, "cond.end");
1615 // Set up a builder to create a compare, conditional branch, and PHI.
1616 IRBuilder<> Builder(CountZeros->getContext());
1617 Builder.SetInsertPoint(StartBlock->getTerminator());
1618 Builder.SetCurrentDebugLocation(CountZeros->getDebugLoc());
1620 // Replace the unconditional branch that was created by the first split with
1621 // a compare against zero and a conditional branch.
1622 Value *Zero = Constant::getNullValue(Ty);
1623 Value *Cmp = Builder.CreateICmpEQ(CountZeros->getOperand(0), Zero, "cmpz");
1624 Builder.CreateCondBr(Cmp, EndBlock, CallBlock);
1625 StartBlock->getTerminator()->eraseFromParent();
1627 // Create a PHI in the end block to select either the output of the intrinsic
1628 // or the bit width of the operand.
1629 Builder.SetInsertPoint(&EndBlock->front());
1630 PHINode *PN = Builder.CreatePHI(Ty, 2, "ctz");
1631 CountZeros->replaceAllUsesWith(PN);
1632 Value *BitWidth = Builder.getInt(APInt(SizeInBits, SizeInBits));
1633 PN->addIncoming(BitWidth, StartBlock);
1634 PN->addIncoming(CountZeros, CallBlock);
1636 // We are explicitly handling the zero case, so we can set the intrinsic's
1637 // undefined zero argument to 'true'. This will also prevent reprocessing the
1638 // intrinsic; we only despeculate when a zero input is defined.
1639 CountZeros->setArgOperand(1, Builder.getTrue());
1644 // This class provides helper functions to expand a memcmp library call into an
1645 // inline expansion.
1646 class MemCmpExpansion {
1647 struct ResultBlock {
1655 ResultBlock ResBlock;
1656 unsigned MaxLoadSize;
1658 unsigned NumBlocksNonOneByte;
1659 unsigned NumLoadsPerBlock;
1660 std::vector<BasicBlock *> LoadCmpBlocks;
1661 BasicBlock *EndBlock;
1663 bool IsUsedForZeroCmp;
1664 const DataLayout &DL;
1666 int calculateNumBlocks(unsigned Size);
1667 void createLoadCmpBlocks();
1668 void createResultBlock();
1669 void setupResultBlockPHINodes();
1670 void setupEndBlockPHINodes();
1671 void emitLoadCompareBlock(unsigned Index, int LoadSize, int GEPIndex);
1672 Value *getCompareLoadPairs(unsigned Index, unsigned Size,
1673 unsigned &NumBytesProcessed, IRBuilder<> &Builder);
1674 void emitLoadCompareBlockMultipleLoads(unsigned Index, unsigned Size,
1675 unsigned &NumBytesProcessed);
1676 void emitLoadCompareByteBlock(unsigned Index, int GEPIndex);
1677 void emitMemCmpResultBlock();
1678 Value *getMemCmpExpansionZeroCase(unsigned Size);
1679 Value *getMemCmpEqZeroOneBlock(unsigned Size);
1680 unsigned getLoadSize(unsigned Size);
1681 unsigned getNumLoads(unsigned Size);
1684 MemCmpExpansion(CallInst *CI, uint64_t Size, unsigned MaxLoadSize,
1685 unsigned NumLoadsPerBlock, const DataLayout &DL);
1686 Value *getMemCmpExpansion(uint64_t Size);
1689 MemCmpExpansion::ResultBlock::ResultBlock()
1690 : BB(nullptr), PhiSrc1(nullptr), PhiSrc2(nullptr) {}
1692 // Initialize the basic block structure required for expansion of memcmp call
1693 // with given maximum load size and memcmp size parameter.
1694 // This structure includes:
1695 // 1. A list of load compare blocks - LoadCmpBlocks.
1696 // 2. An EndBlock, split from original instruction point, which is the block to
1698 // 3. ResultBlock, block to branch to for early exit when a
1699 // LoadCmpBlock finds a difference.
1700 MemCmpExpansion::MemCmpExpansion(CallInst *CI, uint64_t Size,
1701 unsigned MaxLoadSize, unsigned LoadsPerBlock,
1702 const DataLayout &TheDataLayout)
1703 : CI(CI), MaxLoadSize(MaxLoadSize), NumLoadsPerBlock(LoadsPerBlock),
1706 // A memcmp with zero-comparison with only one block of load and compare does
1707 // not need to set up any extra blocks. This case could be handled in the DAG,
1708 // but since we have all of the machinery to flexibly expand any memcpy here,
1709 // we choose to handle this case too to avoid fragmented lowering.
1710 IsUsedForZeroCmp = isOnlyUsedInZeroEqualityComparison(CI);
1711 NumBlocks = calculateNumBlocks(Size);
1712 if (!IsUsedForZeroCmp || NumBlocks != 1) {
1713 BasicBlock *StartBlock = CI->getParent();
1714 EndBlock = StartBlock->splitBasicBlock(CI, "endblock");
1715 setupEndBlockPHINodes();
1716 createResultBlock();
1718 // If return value of memcmp is not used in a zero equality, we need to
1719 // calculate which source was larger. The calculation requires the
1720 // two loaded source values of each load compare block.
1721 // These will be saved in the phi nodes created by setupResultBlockPHINodes.
1722 if (!IsUsedForZeroCmp)
1723 setupResultBlockPHINodes();
1725 // Create the number of required load compare basic blocks.
1726 createLoadCmpBlocks();
1728 // Update the terminator added by splitBasicBlock to branch to the first
1730 StartBlock->getTerminator()->setSuccessor(0, LoadCmpBlocks[0]);
1733 IRBuilder<> Builder(CI->getContext());
1734 Builder.SetCurrentDebugLocation(CI->getDebugLoc());
1737 void MemCmpExpansion::createLoadCmpBlocks() {
1738 for (unsigned i = 0; i < NumBlocks; i++) {
1739 BasicBlock *BB = BasicBlock::Create(CI->getContext(), "loadbb",
1740 EndBlock->getParent(), EndBlock);
1741 LoadCmpBlocks.push_back(BB);
1745 void MemCmpExpansion::createResultBlock() {
1746 ResBlock.BB = BasicBlock::Create(CI->getContext(), "res_block",
1747 EndBlock->getParent(), EndBlock);
1750 // This function creates the IR instructions for loading and comparing 1 byte.
1751 // It loads 1 byte from each source of the memcmp parameters with the given
1752 // GEPIndex. It then subtracts the two loaded values and adds this result to the
1753 // final phi node for selecting the memcmp result.
1754 void MemCmpExpansion::emitLoadCompareByteBlock(unsigned Index, int GEPIndex) {
1755 IRBuilder<> Builder(CI->getContext());
1757 Value *Source1 = CI->getArgOperand(0);
1758 Value *Source2 = CI->getArgOperand(1);
1760 Builder.SetInsertPoint(LoadCmpBlocks[Index]);
1761 Type *LoadSizeType = Type::getInt8Ty(CI->getContext());
1762 // Cast source to LoadSizeType*.
1763 if (Source1->getType() != LoadSizeType)
1764 Source1 = Builder.CreateBitCast(Source1, LoadSizeType->getPointerTo());
1765 if (Source2->getType() != LoadSizeType)
1766 Source2 = Builder.CreateBitCast(Source2, LoadSizeType->getPointerTo());
1768 // Get the base address using the GEPIndex.
1769 if (GEPIndex != 0) {
1770 Source1 = Builder.CreateGEP(LoadSizeType, Source1,
1771 ConstantInt::get(LoadSizeType, GEPIndex));
1772 Source2 = Builder.CreateGEP(LoadSizeType, Source2,
1773 ConstantInt::get(LoadSizeType, GEPIndex));
1776 Value *LoadSrc1 = Builder.CreateLoad(LoadSizeType, Source1);
1777 Value *LoadSrc2 = Builder.CreateLoad(LoadSizeType, Source2);
1779 LoadSrc1 = Builder.CreateZExt(LoadSrc1, Type::getInt32Ty(CI->getContext()));
1780 LoadSrc2 = Builder.CreateZExt(LoadSrc2, Type::getInt32Ty(CI->getContext()));
1781 Value *Diff = Builder.CreateSub(LoadSrc1, LoadSrc2);
1783 PhiRes->addIncoming(Diff, LoadCmpBlocks[Index]);
1785 if (Index < (LoadCmpBlocks.size() - 1)) {
1786 // Early exit branch if difference found to EndBlock. Otherwise, continue to
1787 // next LoadCmpBlock,
1788 Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_NE, Diff,
1789 ConstantInt::get(Diff->getType(), 0));
1791 BranchInst::Create(EndBlock, LoadCmpBlocks[Index + 1], Cmp);
1792 Builder.Insert(CmpBr);
1794 // The last block has an unconditional branch to EndBlock.
1795 BranchInst *CmpBr = BranchInst::Create(EndBlock);
1796 Builder.Insert(CmpBr);
1800 unsigned MemCmpExpansion::getNumLoads(unsigned Size) {
1801 return (Size / MaxLoadSize) + countPopulation(Size % MaxLoadSize);
1804 unsigned MemCmpExpansion::getLoadSize(unsigned Size) {
1805 return MinAlign(PowerOf2Floor(Size), MaxLoadSize);
1808 /// Generate an equality comparison for one or more pairs of loaded values.
1809 /// This is used in the case where the memcmp() call is compared equal or not
1811 Value *MemCmpExpansion::getCompareLoadPairs(unsigned Index, unsigned Size,
1812 unsigned &NumBytesProcessed,
1813 IRBuilder<> &Builder) {
1814 std::vector<Value *> XorList, OrList;
1817 unsigned RemainingBytes = Size - NumBytesProcessed;
1818 unsigned NumLoadsRemaining = getNumLoads(RemainingBytes);
1819 unsigned NumLoads = std::min(NumLoadsRemaining, NumLoadsPerBlock);
1821 // For a single-block expansion, start inserting before the memcmp call.
1822 if (LoadCmpBlocks.empty())
1823 Builder.SetInsertPoint(CI);
1825 Builder.SetInsertPoint(LoadCmpBlocks[Index]);
1827 Value *Cmp = nullptr;
1828 for (unsigned i = 0; i < NumLoads; ++i) {
1829 unsigned LoadSize = getLoadSize(RemainingBytes);
1830 unsigned GEPIndex = NumBytesProcessed / LoadSize;
1831 NumBytesProcessed += LoadSize;
1832 RemainingBytes -= LoadSize;
1834 Type *LoadSizeType = IntegerType::get(CI->getContext(), LoadSize * 8);
1835 Type *MaxLoadType = IntegerType::get(CI->getContext(), MaxLoadSize * 8);
1837 Value *Source1 = CI->getArgOperand(0);
1838 Value *Source2 = CI->getArgOperand(1);
1840 // Cast source to LoadSizeType*.
1841 if (Source1->getType() != LoadSizeType)
1842 Source1 = Builder.CreateBitCast(Source1, LoadSizeType->getPointerTo());
1843 if (Source2->getType() != LoadSizeType)
1844 Source2 = Builder.CreateBitCast(Source2, LoadSizeType->getPointerTo());
1846 // Get the base address using the GEPIndex.
1847 if (GEPIndex != 0) {
1848 Source1 = Builder.CreateGEP(LoadSizeType, Source1,
1849 ConstantInt::get(LoadSizeType, GEPIndex));
1850 Source2 = Builder.CreateGEP(LoadSizeType, Source2,
1851 ConstantInt::get(LoadSizeType, GEPIndex));
1854 // Load LoadSizeType from the base address.
1855 Value *LoadSrc1 = Builder.CreateLoad(LoadSizeType, Source1);
1856 Value *LoadSrc2 = Builder.CreateLoad(LoadSizeType, Source2);
1857 if (NumLoads != 1) {
1858 if (LoadSizeType != MaxLoadType) {
1859 LoadSrc1 = Builder.CreateZExtOrTrunc(LoadSrc1, MaxLoadType);
1860 LoadSrc2 = Builder.CreateZExtOrTrunc(LoadSrc2, MaxLoadType);
1862 // If we have multiple loads per block, we need to generate a composite
1863 // comparison using xor+or.
1864 Diff = Builder.CreateXor(LoadSrc1, LoadSrc2);
1865 Diff = Builder.CreateZExtOrTrunc(Diff, MaxLoadType);
1866 XorList.push_back(Diff);
1868 // If there's only one load per block, we just compare the loaded values.
1869 Cmp = Builder.CreateICmpNE(LoadSrc1, LoadSrc2);
1873 auto pairWiseOr = [&](std::vector<Value *> &InList) -> std::vector<Value *> {
1874 std::vector<Value *> OutList;
1875 for (unsigned i = 0; i < InList.size() - 1; i = i + 2) {
1876 Value *Or = Builder.CreateOr(InList[i], InList[i + 1]);
1877 OutList.push_back(Or);
1879 if (InList.size() % 2 != 0)
1880 OutList.push_back(InList.back());
1885 // Pairwise OR the XOR results.
1886 OrList = pairWiseOr(XorList);
1888 // Pairwise OR the OR results until one result left.
1889 while (OrList.size() != 1) {
1890 OrList = pairWiseOr(OrList);
1892 Cmp = Builder.CreateICmpNE(OrList[0], ConstantInt::get(Diff->getType(), 0));
1898 void MemCmpExpansion::emitLoadCompareBlockMultipleLoads(
1899 unsigned Index, unsigned Size, unsigned &NumBytesProcessed) {
1900 IRBuilder<> Builder(CI->getContext());
1901 Value *Cmp = getCompareLoadPairs(Index, Size, NumBytesProcessed, Builder);
1903 BasicBlock *NextBB = (Index == (LoadCmpBlocks.size() - 1))
1905 : LoadCmpBlocks[Index + 1];
1906 // Early exit branch if difference found to ResultBlock. Otherwise,
1907 // continue to next LoadCmpBlock or EndBlock.
1908 BranchInst *CmpBr = BranchInst::Create(ResBlock.BB, NextBB, Cmp);
1909 Builder.Insert(CmpBr);
1911 // Add a phi edge for the last LoadCmpBlock to Endblock with a value of 0
1912 // since early exit to ResultBlock was not taken (no difference was found in
1913 // any of the bytes).
1914 if (Index == LoadCmpBlocks.size() - 1) {
1915 Value *Zero = ConstantInt::get(Type::getInt32Ty(CI->getContext()), 0);
1916 PhiRes->addIncoming(Zero, LoadCmpBlocks[Index]);
1920 // This function creates the IR intructions for loading and comparing using the
1921 // given LoadSize. It loads the number of bytes specified by LoadSize from each
1922 // source of the memcmp parameters. It then does a subtract to see if there was
1923 // a difference in the loaded values. If a difference is found, it branches
1924 // with an early exit to the ResultBlock for calculating which source was
1925 // larger. Otherwise, it falls through to the either the next LoadCmpBlock or
1926 // the EndBlock if this is the last LoadCmpBlock. Loading 1 byte is handled with
1927 // a special case through emitLoadCompareByteBlock. The special handling can
1928 // simply subtract the loaded values and add it to the result phi node.
1929 void MemCmpExpansion::emitLoadCompareBlock(unsigned Index, int LoadSize,
1931 if (LoadSize == 1) {
1932 MemCmpExpansion::emitLoadCompareByteBlock(Index, GEPIndex);
1936 IRBuilder<> Builder(CI->getContext());
1938 Type *LoadSizeType = IntegerType::get(CI->getContext(), LoadSize * 8);
1939 Type *MaxLoadType = IntegerType::get(CI->getContext(), MaxLoadSize * 8);
1941 Value *Source1 = CI->getArgOperand(0);
1942 Value *Source2 = CI->getArgOperand(1);
1944 Builder.SetInsertPoint(LoadCmpBlocks[Index]);
1945 // Cast source to LoadSizeType*.
1946 if (Source1->getType() != LoadSizeType)
1947 Source1 = Builder.CreateBitCast(Source1, LoadSizeType->getPointerTo());
1948 if (Source2->getType() != LoadSizeType)
1949 Source2 = Builder.CreateBitCast(Source2, LoadSizeType->getPointerTo());
1951 // Get the base address using the GEPIndex.
1952 if (GEPIndex != 0) {
1953 Source1 = Builder.CreateGEP(LoadSizeType, Source1,
1954 ConstantInt::get(LoadSizeType, GEPIndex));
1955 Source2 = Builder.CreateGEP(LoadSizeType, Source2,
1956 ConstantInt::get(LoadSizeType, GEPIndex));
1959 // Load LoadSizeType from the base address.
1960 Value *LoadSrc1 = Builder.CreateLoad(LoadSizeType, Source1);
1961 Value *LoadSrc2 = Builder.CreateLoad(LoadSizeType, Source2);
1963 if (DL.isLittleEndian()) {
1964 Function *F = LoadCmpBlocks[Index]->getParent();
1966 Function *Bswap = Intrinsic::getDeclaration(F->getParent(),
1967 Intrinsic::bswap, LoadSizeType);
1968 LoadSrc1 = Builder.CreateCall(Bswap, LoadSrc1);
1969 LoadSrc2 = Builder.CreateCall(Bswap, LoadSrc2);
1972 if (LoadSizeType != MaxLoadType) {
1973 LoadSrc1 = Builder.CreateZExtOrTrunc(LoadSrc1, MaxLoadType);
1974 LoadSrc2 = Builder.CreateZExtOrTrunc(LoadSrc2, MaxLoadType);
1977 // Add the loaded values to the phi nodes for calculating memcmp result only
1978 // if result is not used in a zero equality.
1979 if (!IsUsedForZeroCmp) {
1980 ResBlock.PhiSrc1->addIncoming(LoadSrc1, LoadCmpBlocks[Index]);
1981 ResBlock.PhiSrc2->addIncoming(LoadSrc2, LoadCmpBlocks[Index]);
1984 Value *Diff = Builder.CreateSub(LoadSrc1, LoadSrc2);
1986 Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_NE, Diff,
1987 ConstantInt::get(Diff->getType(), 0));
1988 BasicBlock *NextBB = (Index == (LoadCmpBlocks.size() - 1))
1990 : LoadCmpBlocks[Index + 1];
1991 // Early exit branch if difference found to ResultBlock. Otherwise, continue
1992 // to next LoadCmpBlock or EndBlock.
1993 BranchInst *CmpBr = BranchInst::Create(ResBlock.BB, NextBB, Cmp);
1994 Builder.Insert(CmpBr);
1996 // Add a phi edge for the last LoadCmpBlock to Endblock with a value of 0
1997 // since early exit to ResultBlock was not taken (no difference was found in
1998 // any of the bytes).
1999 if (Index == LoadCmpBlocks.size() - 1) {
2000 Value *Zero = ConstantInt::get(Type::getInt32Ty(CI->getContext()), 0);
2001 PhiRes->addIncoming(Zero, LoadCmpBlocks[Index]);
2005 // This function populates the ResultBlock with a sequence to calculate the
2006 // memcmp result. It compares the two loaded source values and returns -1 if
2007 // src1 < src2 and 1 if src1 > src2.
2008 void MemCmpExpansion::emitMemCmpResultBlock() {
2009 IRBuilder<> Builder(CI->getContext());
2011 // Special case: if memcmp result is used in a zero equality, result does not
2012 // need to be calculated and can simply return 1.
2013 if (IsUsedForZeroCmp) {
2014 BasicBlock::iterator InsertPt = ResBlock.BB->getFirstInsertionPt();
2015 Builder.SetInsertPoint(ResBlock.BB, InsertPt);
2016 Value *Res = ConstantInt::get(Type::getInt32Ty(CI->getContext()), 1);
2017 PhiRes->addIncoming(Res, ResBlock.BB);
2018 BranchInst *NewBr = BranchInst::Create(EndBlock);
2019 Builder.Insert(NewBr);
2022 BasicBlock::iterator InsertPt = ResBlock.BB->getFirstInsertionPt();
2023 Builder.SetInsertPoint(ResBlock.BB, InsertPt);
2025 Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_ULT, ResBlock.PhiSrc1,
2029 Builder.CreateSelect(Cmp, ConstantInt::get(Builder.getInt32Ty(), -1),
2030 ConstantInt::get(Builder.getInt32Ty(), 1));
2032 BranchInst *NewBr = BranchInst::Create(EndBlock);
2033 Builder.Insert(NewBr);
2034 PhiRes->addIncoming(Res, ResBlock.BB);
2037 int MemCmpExpansion::calculateNumBlocks(unsigned Size) {
2039 bool HaveOneByteLoad = false;
2040 unsigned RemainingSize = Size;
2041 unsigned LoadSize = MaxLoadSize;
2042 while (RemainingSize) {
2044 HaveOneByteLoad = true;
2045 NumBlocks += RemainingSize / LoadSize;
2046 RemainingSize = RemainingSize % LoadSize;
2047 LoadSize = LoadSize / 2;
2049 NumBlocksNonOneByte = HaveOneByteLoad ? (NumBlocks - 1) : NumBlocks;
2051 if (IsUsedForZeroCmp)
2052 NumBlocks = NumBlocks / NumLoadsPerBlock +
2053 (NumBlocks % NumLoadsPerBlock != 0 ? 1 : 0);
2058 void MemCmpExpansion::setupResultBlockPHINodes() {
2059 IRBuilder<> Builder(CI->getContext());
2060 Type *MaxLoadType = IntegerType::get(CI->getContext(), MaxLoadSize * 8);
2061 Builder.SetInsertPoint(ResBlock.BB);
2063 Builder.CreatePHI(MaxLoadType, NumBlocksNonOneByte, "phi.src1");
2065 Builder.CreatePHI(MaxLoadType, NumBlocksNonOneByte, "phi.src2");
2068 void MemCmpExpansion::setupEndBlockPHINodes() {
2069 IRBuilder<> Builder(CI->getContext());
2071 Builder.SetInsertPoint(&EndBlock->front());
2072 PhiRes = Builder.CreatePHI(Type::getInt32Ty(CI->getContext()), 2, "phi.res");
2075 Value *MemCmpExpansion::getMemCmpExpansionZeroCase(unsigned Size) {
2076 unsigned NumBytesProcessed = 0;
2077 // This loop populates each of the LoadCmpBlocks with the IR sequence to
2078 // handle multiple loads per block.
2079 for (unsigned i = 0; i < NumBlocks; ++i)
2080 emitLoadCompareBlockMultipleLoads(i, Size, NumBytesProcessed);
2082 emitMemCmpResultBlock();
2086 /// A memcmp expansion that compares equality with 0 and only has one block of
2087 /// load and compare can bypass the compare, branch, and phi IR that is required
2088 /// in the general case.
2089 Value *MemCmpExpansion::getMemCmpEqZeroOneBlock(unsigned Size) {
2090 unsigned NumBytesProcessed = 0;
2091 IRBuilder<> Builder(CI->getContext());
2092 Value *Cmp = getCompareLoadPairs(0, Size, NumBytesProcessed, Builder);
2093 return Builder.CreateZExt(Cmp, Type::getInt32Ty(CI->getContext()));
2096 // This function expands the memcmp call into an inline expansion and returns
2097 // the memcmp result.
2098 Value *MemCmpExpansion::getMemCmpExpansion(uint64_t Size) {
2099 if (IsUsedForZeroCmp)
2100 return NumBlocks == 1 ? getMemCmpEqZeroOneBlock(Size) :
2101 getMemCmpExpansionZeroCase(Size);
2103 // This loop calls emitLoadCompareBlock for comparing Size bytes of the two
2104 // memcmp sources. It starts with loading using the maximum load size set by
2105 // the target. It processes any remaining bytes using a load size which is the
2106 // next smallest power of 2.
2107 int LoadSize = MaxLoadSize;
2108 int NumBytesToBeProcessed = Size;
2110 while (NumBytesToBeProcessed) {
2111 // Calculate how many blocks we can create with the current load size.
2112 int NumBlocks = NumBytesToBeProcessed / LoadSize;
2113 int GEPIndex = (Size - NumBytesToBeProcessed) / LoadSize;
2114 NumBytesToBeProcessed = NumBytesToBeProcessed % LoadSize;
2116 // For each NumBlocks, populate the instruction sequence for loading and
2117 // comparing LoadSize bytes.
2118 while (NumBlocks--) {
2119 emitLoadCompareBlock(Index, LoadSize, GEPIndex);
2123 // Get the next LoadSize to use.
2124 LoadSize = LoadSize / 2;
2127 emitMemCmpResultBlock();
2131 // This function checks to see if an expansion of memcmp can be generated.
2132 // It checks for constant compare size that is less than the max inline size.
2133 // If an expansion cannot occur, returns false to leave as a library call.
2134 // Otherwise, the library call is replaced with a new IR instruction sequence.
2135 /// We want to transform:
2136 /// %call = call signext i32 @memcmp(i8* %0, i8* %1, i64 15)
2139 /// %0 = bitcast i32* %buffer2 to i8*
2140 /// %1 = bitcast i32* %buffer1 to i8*
2141 /// %2 = bitcast i8* %1 to i64*
2142 /// %3 = bitcast i8* %0 to i64*
2143 /// %4 = load i64, i64* %2
2144 /// %5 = load i64, i64* %3
2145 /// %6 = call i64 @llvm.bswap.i64(i64 %4)
2146 /// %7 = call i64 @llvm.bswap.i64(i64 %5)
2147 /// %8 = sub i64 %6, %7
2148 /// %9 = icmp ne i64 %8, 0
2149 /// br i1 %9, label %res_block, label %loadbb1
2150 /// res_block: ; preds = %loadbb2,
2151 /// %loadbb1, %loadbb
2152 /// %phi.src1 = phi i64 [ %6, %loadbb ], [ %22, %loadbb1 ], [ %36, %loadbb2 ]
2153 /// %phi.src2 = phi i64 [ %7, %loadbb ], [ %23, %loadbb1 ], [ %37, %loadbb2 ]
2154 /// %10 = icmp ult i64 %phi.src1, %phi.src2
2155 /// %11 = select i1 %10, i32 -1, i32 1
2156 /// br label %endblock
2157 /// loadbb1: ; preds = %loadbb
2158 /// %12 = bitcast i32* %buffer2 to i8*
2159 /// %13 = bitcast i32* %buffer1 to i8*
2160 /// %14 = bitcast i8* %13 to i32*
2161 /// %15 = bitcast i8* %12 to i32*
2162 /// %16 = getelementptr i32, i32* %14, i32 2
2163 /// %17 = getelementptr i32, i32* %15, i32 2
2164 /// %18 = load i32, i32* %16
2165 /// %19 = load i32, i32* %17
2166 /// %20 = call i32 @llvm.bswap.i32(i32 %18)
2167 /// %21 = call i32 @llvm.bswap.i32(i32 %19)
2168 /// %22 = zext i32 %20 to i64
2169 /// %23 = zext i32 %21 to i64
2170 /// %24 = sub i64 %22, %23
2171 /// %25 = icmp ne i64 %24, 0
2172 /// br i1 %25, label %res_block, label %loadbb2
2173 /// loadbb2: ; preds = %loadbb1
2174 /// %26 = bitcast i32* %buffer2 to i8*
2175 /// %27 = bitcast i32* %buffer1 to i8*
2176 /// %28 = bitcast i8* %27 to i16*
2177 /// %29 = bitcast i8* %26 to i16*
2178 /// %30 = getelementptr i16, i16* %28, i16 6
2179 /// %31 = getelementptr i16, i16* %29, i16 6
2180 /// %32 = load i16, i16* %30
2181 /// %33 = load i16, i16* %31
2182 /// %34 = call i16 @llvm.bswap.i16(i16 %32)
2183 /// %35 = call i16 @llvm.bswap.i16(i16 %33)
2184 /// %36 = zext i16 %34 to i64
2185 /// %37 = zext i16 %35 to i64
2186 /// %38 = sub i64 %36, %37
2187 /// %39 = icmp ne i64 %38, 0
2188 /// br i1 %39, label %res_block, label %loadbb3
2189 /// loadbb3: ; preds = %loadbb2
2190 /// %40 = bitcast i32* %buffer2 to i8*
2191 /// %41 = bitcast i32* %buffer1 to i8*
2192 /// %42 = getelementptr i8, i8* %41, i8 14
2193 /// %43 = getelementptr i8, i8* %40, i8 14
2194 /// %44 = load i8, i8* %42
2195 /// %45 = load i8, i8* %43
2196 /// %46 = zext i8 %44 to i32
2197 /// %47 = zext i8 %45 to i32
2198 /// %48 = sub i32 %46, %47
2199 /// br label %endblock
2200 /// endblock: ; preds = %res_block,
2202 /// %phi.res = phi i32 [ %48, %loadbb3 ], [ %11, %res_block ]
2203 /// ret i32 %phi.res
2204 static bool expandMemCmp(CallInst *CI, const TargetTransformInfo *TTI,
2205 const TargetLowering *TLI, const DataLayout *DL) {
2207 IRBuilder<> Builder(CI->getContext());
2209 // TTI call to check if target would like to expand memcmp. Also, get the
2211 unsigned MaxLoadSize;
2212 if (!TTI->expandMemCmp(CI, MaxLoadSize))
2215 // Early exit from expansion if -Oz.
2216 if (CI->getFunction()->optForMinSize())
2219 // Early exit from expansion if size is not a constant.
2220 ConstantInt *SizeCast = dyn_cast<ConstantInt>(CI->getArgOperand(2));
2222 NumMemCmpNotConstant++;
2226 // Early exit from expansion if size greater than max bytes to load.
2227 uint64_t SizeVal = SizeCast->getZExtValue();
2228 unsigned NumLoads = 0;
2229 unsigned RemainingSize = SizeVal;
2230 unsigned LoadSize = MaxLoadSize;
2231 while (RemainingSize) {
2232 NumLoads += RemainingSize / LoadSize;
2233 RemainingSize = RemainingSize % LoadSize;
2234 LoadSize = LoadSize / 2;
2237 if (NumLoads > TLI->getMaxExpandSizeMemcmp(CI->getFunction()->optForSize())) {
2238 NumMemCmpGreaterThanMax++;
2244 // MemCmpHelper object creates and sets up basic blocks required for
2245 // expanding memcmp with size SizeVal.
2246 unsigned NumLoadsPerBlock = MemCmpNumLoadsPerBlock;
2247 MemCmpExpansion MemCmpHelper(CI, SizeVal, MaxLoadSize, NumLoadsPerBlock, *DL);
2249 Value *Res = MemCmpHelper.getMemCmpExpansion(SizeVal);
2251 // Replace call with result of expansion and erase call.
2252 CI->replaceAllUsesWith(Res);
2253 CI->eraseFromParent();
2258 bool CodeGenPrepare::optimizeCallInst(CallInst *CI, bool &ModifiedDT) {
2259 BasicBlock *BB = CI->getParent();
2261 // Lower inline assembly if we can.
2262 // If we found an inline asm expession, and if the target knows how to
2263 // lower it to normal LLVM code, do so now.
2264 if (TLI && isa<InlineAsm>(CI->getCalledValue())) {
2265 if (TLI->ExpandInlineAsm(CI)) {
2266 // Avoid invalidating the iterator.
2267 CurInstIterator = BB->begin();
2268 // Avoid processing instructions out of order, which could cause
2269 // reuse before a value is defined.
2273 // Sink address computing for memory operands into the block.
2274 if (optimizeInlineAsmInst(CI))
2278 // Align the pointer arguments to this call if the target thinks it's a good
2280 unsigned MinSize, PrefAlign;
2281 if (TLI && TLI->shouldAlignPointerArgs(CI, MinSize, PrefAlign)) {
2282 for (auto &Arg : CI->arg_operands()) {
2283 // We want to align both objects whose address is used directly and
2284 // objects whose address is used in casts and GEPs, though it only makes
2285 // sense for GEPs if the offset is a multiple of the desired alignment and
2286 // if size - offset meets the size threshold.
2287 if (!Arg->getType()->isPointerTy())
2289 APInt Offset(DL->getPointerSizeInBits(
2290 cast<PointerType>(Arg->getType())->getAddressSpace()),
2292 Value *Val = Arg->stripAndAccumulateInBoundsConstantOffsets(*DL, Offset);
2293 uint64_t Offset2 = Offset.getLimitedValue();
2294 if ((Offset2 & (PrefAlign-1)) != 0)
2297 if ((AI = dyn_cast<AllocaInst>(Val)) && AI->getAlignment() < PrefAlign &&
2298 DL->getTypeAllocSize(AI->getAllocatedType()) >= MinSize + Offset2)
2299 AI->setAlignment(PrefAlign);
2300 // Global variables can only be aligned if they are defined in this
2301 // object (i.e. they are uniquely initialized in this object), and
2302 // over-aligning global variables that have an explicit section is
2305 if ((GV = dyn_cast<GlobalVariable>(Val)) && GV->canIncreaseAlignment() &&
2306 GV->getPointerAlignment(*DL) < PrefAlign &&
2307 DL->getTypeAllocSize(GV->getValueType()) >=
2309 GV->setAlignment(PrefAlign);
2311 // If this is a memcpy (or similar) then we may be able to improve the
2313 if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(CI)) {
2314 unsigned Align = getKnownAlignment(MI->getDest(), *DL);
2315 if (MemTransferInst *MTI = dyn_cast<MemTransferInst>(MI))
2316 Align = std::min(Align, getKnownAlignment(MTI->getSource(), *DL));
2317 if (Align > MI->getAlignment())
2318 MI->setAlignment(ConstantInt::get(MI->getAlignmentType(), Align));
2322 // If we have a cold call site, try to sink addressing computation into the
2323 // cold block. This interacts with our handling for loads and stores to
2324 // ensure that we can fold all uses of a potential addressing computation
2325 // into their uses. TODO: generalize this to work over profiling data
2326 if (!OptSize && CI->hasFnAttr(Attribute::Cold))
2327 for (auto &Arg : CI->arg_operands()) {
2328 if (!Arg->getType()->isPointerTy())
2330 unsigned AS = Arg->getType()->getPointerAddressSpace();
2331 return optimizeMemoryInst(CI, Arg, Arg->getType(), AS);
2334 IntrinsicInst *II = dyn_cast<IntrinsicInst>(CI);
2336 switch (II->getIntrinsicID()) {
2338 case Intrinsic::objectsize: {
2339 // Lower all uses of llvm.objectsize.*
2340 ConstantInt *RetVal =
2341 lowerObjectSizeCall(II, *DL, TLInfo, /*MustSucceed=*/true);
2342 // Substituting this can cause recursive simplifications, which can
2343 // invalidate our iterator. Use a WeakTrackingVH to hold onto it in case
2346 Value *CurValue = &*CurInstIterator;
2347 WeakTrackingVH IterHandle(CurValue);
2349 replaceAndRecursivelySimplify(CI, RetVal, TLInfo, nullptr);
2351 // If the iterator instruction was recursively deleted, start over at the
2352 // start of the block.
2353 if (IterHandle != CurValue) {
2354 CurInstIterator = BB->begin();
2359 case Intrinsic::aarch64_stlxr:
2360 case Intrinsic::aarch64_stxr: {
2361 ZExtInst *ExtVal = dyn_cast<ZExtInst>(CI->getArgOperand(0));
2362 if (!ExtVal || !ExtVal->hasOneUse() ||
2363 ExtVal->getParent() == CI->getParent())
2365 // Sink a zext feeding stlxr/stxr before it, so it can be folded into it.
2366 ExtVal->moveBefore(CI);
2367 // Mark this instruction as "inserted by CGP", so that other
2368 // optimizations don't touch it.
2369 InsertedInsts.insert(ExtVal);
2372 case Intrinsic::invariant_group_barrier:
2373 II->replaceAllUsesWith(II->getArgOperand(0));
2374 II->eraseFromParent();
2377 case Intrinsic::cttz:
2378 case Intrinsic::ctlz:
2379 // If counting zeros is expensive, try to avoid it.
2380 return despeculateCountZeros(II, TLI, DL, ModifiedDT);
2384 SmallVector<Value*, 2> PtrOps;
2386 if (TLI->getAddrModeArguments(II, PtrOps, AccessTy))
2387 while (!PtrOps.empty()) {
2388 Value *PtrVal = PtrOps.pop_back_val();
2389 unsigned AS = PtrVal->getType()->getPointerAddressSpace();
2390 if (optimizeMemoryInst(II, PtrVal, AccessTy, AS))
2396 // From here on out we're working with named functions.
2397 if (!CI->getCalledFunction()) return false;
2399 // Lower all default uses of _chk calls. This is very similar
2400 // to what InstCombineCalls does, but here we are only lowering calls
2401 // to fortified library functions (e.g. __memcpy_chk) that have the default
2402 // "don't know" as the objectsize. Anything else should be left alone.
2403 FortifiedLibCallSimplifier Simplifier(TLInfo, true);
2404 if (Value *V = Simplifier.optimizeCall(CI)) {
2405 CI->replaceAllUsesWith(V);
2406 CI->eraseFromParent();
2411 if (TLInfo->getLibFunc(ImmutableCallSite(CI), Func) &&
2412 Func == LibFunc_memcmp && expandMemCmp(CI, TTI, TLI, DL)) {
2419 /// Look for opportunities to duplicate return instructions to the predecessor
2420 /// to enable tail call optimizations. The case it is currently looking for is:
2423 /// %tmp0 = tail call i32 @f0()
2424 /// br label %return
2426 /// %tmp1 = tail call i32 @f1()
2427 /// br label %return
2429 /// %tmp2 = tail call i32 @f2()
2430 /// br label %return
2432 /// %retval = phi i32 [ %tmp0, %bb0 ], [ %tmp1, %bb1 ], [ %tmp2, %bb2 ]
2440 /// %tmp0 = tail call i32 @f0()
2443 /// %tmp1 = tail call i32 @f1()
2446 /// %tmp2 = tail call i32 @f2()
2449 bool CodeGenPrepare::dupRetToEnableTailCallOpts(BasicBlock *BB) {
2453 ReturnInst *RetI = dyn_cast<ReturnInst>(BB->getTerminator());
2457 PHINode *PN = nullptr;
2458 BitCastInst *BCI = nullptr;
2459 Value *V = RetI->getReturnValue();
2461 BCI = dyn_cast<BitCastInst>(V);
2463 V = BCI->getOperand(0);
2465 PN = dyn_cast<PHINode>(V);
2470 if (PN && PN->getParent() != BB)
2473 // Make sure there are no instructions between the PHI and return, or that the
2474 // return is the first instruction in the block.
2476 BasicBlock::iterator BI = BB->begin();
2477 do { ++BI; } while (isa<DbgInfoIntrinsic>(BI));
2479 // Also skip over the bitcast.
2484 BasicBlock::iterator BI = BB->begin();
2485 while (isa<DbgInfoIntrinsic>(BI)) ++BI;
2490 /// Only dup the ReturnInst if the CallInst is likely to be emitted as a tail
2492 const Function *F = BB->getParent();
2493 SmallVector<CallInst*, 4> TailCalls;
2495 for (unsigned I = 0, E = PN->getNumIncomingValues(); I != E; ++I) {
2496 CallInst *CI = dyn_cast<CallInst>(PN->getIncomingValue(I));
2497 // Make sure the phi value is indeed produced by the tail call.
2498 if (CI && CI->hasOneUse() && CI->getParent() == PN->getIncomingBlock(I) &&
2499 TLI->mayBeEmittedAsTailCall(CI) &&
2500 attributesPermitTailCall(F, CI, RetI, *TLI))
2501 TailCalls.push_back(CI);
2504 SmallPtrSet<BasicBlock*, 4> VisitedBBs;
2505 for (pred_iterator PI = pred_begin(BB), PE = pred_end(BB); PI != PE; ++PI) {
2506 if (!VisitedBBs.insert(*PI).second)
2509 BasicBlock::InstListType &InstList = (*PI)->getInstList();
2510 BasicBlock::InstListType::reverse_iterator RI = InstList.rbegin();
2511 BasicBlock::InstListType::reverse_iterator RE = InstList.rend();
2512 do { ++RI; } while (RI != RE && isa<DbgInfoIntrinsic>(&*RI));
2516 CallInst *CI = dyn_cast<CallInst>(&*RI);
2517 if (CI && CI->use_empty() && TLI->mayBeEmittedAsTailCall(CI) &&
2518 attributesPermitTailCall(F, CI, RetI, *TLI))
2519 TailCalls.push_back(CI);
2523 bool Changed = false;
2524 for (unsigned i = 0, e = TailCalls.size(); i != e; ++i) {
2525 CallInst *CI = TailCalls[i];
2528 // Conservatively require the attributes of the call to match those of the
2529 // return. Ignore noalias because it doesn't affect the call sequence.
2530 AttributeList CalleeAttrs = CS.getAttributes();
2531 if (AttrBuilder(CalleeAttrs, AttributeList::ReturnIndex)
2532 .removeAttribute(Attribute::NoAlias) !=
2533 AttrBuilder(CalleeAttrs, AttributeList::ReturnIndex)
2534 .removeAttribute(Attribute::NoAlias))
2537 // Make sure the call instruction is followed by an unconditional branch to
2538 // the return block.
2539 BasicBlock *CallBB = CI->getParent();
2540 BranchInst *BI = dyn_cast<BranchInst>(CallBB->getTerminator());
2541 if (!BI || !BI->isUnconditional() || BI->getSuccessor(0) != BB)
2544 // Duplicate the return into CallBB.
2545 (void)FoldReturnIntoUncondBranch(RetI, BB, CallBB);
2546 ModifiedDT = Changed = true;
2550 // If we eliminated all predecessors of the block, delete the block now.
2551 if (Changed && !BB->hasAddressTaken() && pred_begin(BB) == pred_end(BB))
2552 BB->eraseFromParent();
2557 //===----------------------------------------------------------------------===//
2558 // Memory Optimization
2559 //===----------------------------------------------------------------------===//
2563 /// This is an extended version of TargetLowering::AddrMode
2564 /// which holds actual Value*'s for register values.
2565 struct ExtAddrMode : public TargetLowering::AddrMode {
2568 ExtAddrMode() : BaseReg(nullptr), ScaledReg(nullptr) {}
2569 void print(raw_ostream &OS) const;
2572 bool operator==(const ExtAddrMode& O) const {
2573 return (BaseReg == O.BaseReg) && (ScaledReg == O.ScaledReg) &&
2574 (BaseGV == O.BaseGV) && (BaseOffs == O.BaseOffs) &&
2575 (HasBaseReg == O.HasBaseReg) && (Scale == O.Scale);
2580 static inline raw_ostream &operator<<(raw_ostream &OS, const ExtAddrMode &AM) {
2586 void ExtAddrMode::print(raw_ostream &OS) const {
2587 bool NeedPlus = false;
2590 OS << (NeedPlus ? " + " : "")
2592 BaseGV->printAsOperand(OS, /*PrintType=*/false);
2597 OS << (NeedPlus ? " + " : "")
2603 OS << (NeedPlus ? " + " : "")
2605 BaseReg->printAsOperand(OS, /*PrintType=*/false);
2609 OS << (NeedPlus ? " + " : "")
2611 ScaledReg->printAsOperand(OS, /*PrintType=*/false);
2617 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
2618 LLVM_DUMP_METHOD void ExtAddrMode::dump() const {
2624 /// \brief This class provides transaction based operation on the IR.
2625 /// Every change made through this class is recorded in the internal state and
2626 /// can be undone (rollback) until commit is called.
2627 class TypePromotionTransaction {
2629 /// \brief This represents the common interface of the individual transaction.
2630 /// Each class implements the logic for doing one specific modification on
2631 /// the IR via the TypePromotionTransaction.
2632 class TypePromotionAction {
2634 /// The Instruction modified.
2638 /// \brief Constructor of the action.
2639 /// The constructor performs the related action on the IR.
2640 TypePromotionAction(Instruction *Inst) : Inst(Inst) {}
2642 virtual ~TypePromotionAction() {}
2644 /// \brief Undo the modification done by this action.
2645 /// When this method is called, the IR must be in the same state as it was
2646 /// before this action was applied.
2647 /// \pre Undoing the action works if and only if the IR is in the exact same
2648 /// state as it was directly after this action was applied.
2649 virtual void undo() = 0;
2651 /// \brief Advocate every change made by this action.
2652 /// When the results on the IR of the action are to be kept, it is important
2653 /// to call this function, otherwise hidden information may be kept forever.
2654 virtual void commit() {
2655 // Nothing to be done, this action is not doing anything.
2659 /// \brief Utility to remember the position of an instruction.
2660 class InsertionHandler {
2661 /// Position of an instruction.
2662 /// Either an instruction:
2663 /// - Is the first in a basic block: BB is used.
2664 /// - Has a previous instructon: PrevInst is used.
2666 Instruction *PrevInst;
2669 /// Remember whether or not the instruction had a previous instruction.
2670 bool HasPrevInstruction;
2673 /// \brief Record the position of \p Inst.
2674 InsertionHandler(Instruction *Inst) {
2675 BasicBlock::iterator It = Inst->getIterator();
2676 HasPrevInstruction = (It != (Inst->getParent()->begin()));
2677 if (HasPrevInstruction)
2678 Point.PrevInst = &*--It;
2680 Point.BB = Inst->getParent();
2683 /// \brief Insert \p Inst at the recorded position.
2684 void insert(Instruction *Inst) {
2685 if (HasPrevInstruction) {
2686 if (Inst->getParent())
2687 Inst->removeFromParent();
2688 Inst->insertAfter(Point.PrevInst);
2690 Instruction *Position = &*Point.BB->getFirstInsertionPt();
2691 if (Inst->getParent())
2692 Inst->moveBefore(Position);
2694 Inst->insertBefore(Position);
2699 /// \brief Move an instruction before another.
2700 class InstructionMoveBefore : public TypePromotionAction {
2701 /// Original position of the instruction.
2702 InsertionHandler Position;
2705 /// \brief Move \p Inst before \p Before.
2706 InstructionMoveBefore(Instruction *Inst, Instruction *Before)
2707 : TypePromotionAction(Inst), Position(Inst) {
2708 DEBUG(dbgs() << "Do: move: " << *Inst << "\nbefore: " << *Before << "\n");
2709 Inst->moveBefore(Before);
2712 /// \brief Move the instruction back to its original position.
2713 void undo() override {
2714 DEBUG(dbgs() << "Undo: moveBefore: " << *Inst << "\n");
2715 Position.insert(Inst);
2719 /// \brief Set the operand of an instruction with a new value.
2720 class OperandSetter : public TypePromotionAction {
2721 /// Original operand of the instruction.
2723 /// Index of the modified instruction.
2727 /// \brief Set \p Idx operand of \p Inst with \p NewVal.
2728 OperandSetter(Instruction *Inst, unsigned Idx, Value *NewVal)
2729 : TypePromotionAction(Inst), Idx(Idx) {
2730 DEBUG(dbgs() << "Do: setOperand: " << Idx << "\n"
2731 << "for:" << *Inst << "\n"
2732 << "with:" << *NewVal << "\n");
2733 Origin = Inst->getOperand(Idx);
2734 Inst->setOperand(Idx, NewVal);
2737 /// \brief Restore the original value of the instruction.
2738 void undo() override {
2739 DEBUG(dbgs() << "Undo: setOperand:" << Idx << "\n"
2740 << "for: " << *Inst << "\n"
2741 << "with: " << *Origin << "\n");
2742 Inst->setOperand(Idx, Origin);
2746 /// \brief Hide the operands of an instruction.
2747 /// Do as if this instruction was not using any of its operands.
2748 class OperandsHider : public TypePromotionAction {
2749 /// The list of original operands.
2750 SmallVector<Value *, 4> OriginalValues;
2753 /// \brief Remove \p Inst from the uses of the operands of \p Inst.
2754 OperandsHider(Instruction *Inst) : TypePromotionAction(Inst) {
2755 DEBUG(dbgs() << "Do: OperandsHider: " << *Inst << "\n");
2756 unsigned NumOpnds = Inst->getNumOperands();
2757 OriginalValues.reserve(NumOpnds);
2758 for (unsigned It = 0; It < NumOpnds; ++It) {
2759 // Save the current operand.
2760 Value *Val = Inst->getOperand(It);
2761 OriginalValues.push_back(Val);
2763 // We could use OperandSetter here, but that would imply an overhead
2764 // that we are not willing to pay.
2765 Inst->setOperand(It, UndefValue::get(Val->getType()));
2769 /// \brief Restore the original list of uses.
2770 void undo() override {
2771 DEBUG(dbgs() << "Undo: OperandsHider: " << *Inst << "\n");
2772 for (unsigned It = 0, EndIt = OriginalValues.size(); It != EndIt; ++It)
2773 Inst->setOperand(It, OriginalValues[It]);
2777 /// \brief Build a truncate instruction.
2778 class TruncBuilder : public TypePromotionAction {
2781 /// \brief Build a truncate instruction of \p Opnd producing a \p Ty
2783 /// trunc Opnd to Ty.
2784 TruncBuilder(Instruction *Opnd, Type *Ty) : TypePromotionAction(Opnd) {
2785 IRBuilder<> Builder(Opnd);
2786 Val = Builder.CreateTrunc(Opnd, Ty, "promoted");
2787 DEBUG(dbgs() << "Do: TruncBuilder: " << *Val << "\n");
2790 /// \brief Get the built value.
2791 Value *getBuiltValue() { return Val; }
2793 /// \brief Remove the built instruction.
2794 void undo() override {
2795 DEBUG(dbgs() << "Undo: TruncBuilder: " << *Val << "\n");
2796 if (Instruction *IVal = dyn_cast<Instruction>(Val))
2797 IVal->eraseFromParent();
2801 /// \brief Build a sign extension instruction.
2802 class SExtBuilder : public TypePromotionAction {
2805 /// \brief Build a sign extension instruction of \p Opnd producing a \p Ty
2807 /// sext Opnd to Ty.
2808 SExtBuilder(Instruction *InsertPt, Value *Opnd, Type *Ty)
2809 : TypePromotionAction(InsertPt) {
2810 IRBuilder<> Builder(InsertPt);
2811 Val = Builder.CreateSExt(Opnd, Ty, "promoted");
2812 DEBUG(dbgs() << "Do: SExtBuilder: " << *Val << "\n");
2815 /// \brief Get the built value.
2816 Value *getBuiltValue() { return Val; }
2818 /// \brief Remove the built instruction.
2819 void undo() override {
2820 DEBUG(dbgs() << "Undo: SExtBuilder: " << *Val << "\n");
2821 if (Instruction *IVal = dyn_cast<Instruction>(Val))
2822 IVal->eraseFromParent();
2826 /// \brief Build a zero extension instruction.
2827 class ZExtBuilder : public TypePromotionAction {
2830 /// \brief Build a zero extension instruction of \p Opnd producing a \p Ty
2832 /// zext Opnd to Ty.
2833 ZExtBuilder(Instruction *InsertPt, Value *Opnd, Type *Ty)
2834 : TypePromotionAction(InsertPt) {
2835 IRBuilder<> Builder(InsertPt);
2836 Val = Builder.CreateZExt(Opnd, Ty, "promoted");
2837 DEBUG(dbgs() << "Do: ZExtBuilder: " << *Val << "\n");
2840 /// \brief Get the built value.
2841 Value *getBuiltValue() { return Val; }
2843 /// \brief Remove the built instruction.
2844 void undo() override {
2845 DEBUG(dbgs() << "Undo: ZExtBuilder: " << *Val << "\n");
2846 if (Instruction *IVal = dyn_cast<Instruction>(Val))
2847 IVal->eraseFromParent();
2851 /// \brief Mutate an instruction to another type.
2852 class TypeMutator : public TypePromotionAction {
2853 /// Record the original type.
2857 /// \brief Mutate the type of \p Inst into \p NewTy.
2858 TypeMutator(Instruction *Inst, Type *NewTy)
2859 : TypePromotionAction(Inst), OrigTy(Inst->getType()) {
2860 DEBUG(dbgs() << "Do: MutateType: " << *Inst << " with " << *NewTy
2862 Inst->mutateType(NewTy);
2865 /// \brief Mutate the instruction back to its original type.
2866 void undo() override {
2867 DEBUG(dbgs() << "Undo: MutateType: " << *Inst << " with " << *OrigTy
2869 Inst->mutateType(OrigTy);
2873 /// \brief Replace the uses of an instruction by another instruction.
2874 class UsesReplacer : public TypePromotionAction {
2875 /// Helper structure to keep track of the replaced uses.
2876 struct InstructionAndIdx {
2877 /// The instruction using the instruction.
2879 /// The index where this instruction is used for Inst.
2881 InstructionAndIdx(Instruction *Inst, unsigned Idx)
2882 : Inst(Inst), Idx(Idx) {}
2885 /// Keep track of the original uses (pair Instruction, Index).
2886 SmallVector<InstructionAndIdx, 4> OriginalUses;
2887 typedef SmallVectorImpl<InstructionAndIdx>::iterator use_iterator;
2890 /// \brief Replace all the use of \p Inst by \p New.
2891 UsesReplacer(Instruction *Inst, Value *New) : TypePromotionAction(Inst) {
2892 DEBUG(dbgs() << "Do: UsersReplacer: " << *Inst << " with " << *New
2894 // Record the original uses.
2895 for (Use &U : Inst->uses()) {
2896 Instruction *UserI = cast<Instruction>(U.getUser());
2897 OriginalUses.push_back(InstructionAndIdx(UserI, U.getOperandNo()));
2899 // Now, we can replace the uses.
2900 Inst->replaceAllUsesWith(New);
2903 /// \brief Reassign the original uses of Inst to Inst.
2904 void undo() override {
2905 DEBUG(dbgs() << "Undo: UsersReplacer: " << *Inst << "\n");
2906 for (use_iterator UseIt = OriginalUses.begin(),
2907 EndIt = OriginalUses.end();
2908 UseIt != EndIt; ++UseIt) {
2909 UseIt->Inst->setOperand(UseIt->Idx, Inst);
2914 /// \brief Remove an instruction from the IR.
2915 class InstructionRemover : public TypePromotionAction {
2916 /// Original position of the instruction.
2917 InsertionHandler Inserter;
2918 /// Helper structure to hide all the link to the instruction. In other
2919 /// words, this helps to do as if the instruction was removed.
2920 OperandsHider Hider;
2921 /// Keep track of the uses replaced, if any.
2922 UsesReplacer *Replacer;
2923 /// Keep track of instructions removed.
2924 SetOfInstrs &RemovedInsts;
2927 /// \brief Remove all reference of \p Inst and optinally replace all its
2929 /// \p RemovedInsts Keep track of the instructions removed by this Action.
2930 /// \pre If !Inst->use_empty(), then New != nullptr
2931 InstructionRemover(Instruction *Inst, SetOfInstrs &RemovedInsts,
2932 Value *New = nullptr)
2933 : TypePromotionAction(Inst), Inserter(Inst), Hider(Inst),
2934 Replacer(nullptr), RemovedInsts(RemovedInsts) {
2936 Replacer = new UsesReplacer(Inst, New);
2937 DEBUG(dbgs() << "Do: InstructionRemover: " << *Inst << "\n");
2938 RemovedInsts.insert(Inst);
2939 /// The instructions removed here will be freed after completing
2940 /// optimizeBlock() for all blocks as we need to keep track of the
2941 /// removed instructions during promotion.
2942 Inst->removeFromParent();
2945 ~InstructionRemover() override { delete Replacer; }
2947 /// \brief Resurrect the instruction and reassign it to the proper uses if
2948 /// new value was provided when build this action.
2949 void undo() override {
2950 DEBUG(dbgs() << "Undo: InstructionRemover: " << *Inst << "\n");
2951 Inserter.insert(Inst);
2955 RemovedInsts.erase(Inst);
2960 /// Restoration point.
2961 /// The restoration point is a pointer to an action instead of an iterator
2962 /// because the iterator may be invalidated but not the pointer.
2963 typedef const TypePromotionAction *ConstRestorationPt;
2965 TypePromotionTransaction(SetOfInstrs &RemovedInsts)
2966 : RemovedInsts(RemovedInsts) {}
2968 /// Advocate every changes made in that transaction.
2970 /// Undo all the changes made after the given point.
2971 void rollback(ConstRestorationPt Point);
2972 /// Get the current restoration point.
2973 ConstRestorationPt getRestorationPoint() const;
2975 /// \name API for IR modification with state keeping to support rollback.
2977 /// Same as Instruction::setOperand.
2978 void setOperand(Instruction *Inst, unsigned Idx, Value *NewVal);
2979 /// Same as Instruction::eraseFromParent.
2980 void eraseInstruction(Instruction *Inst, Value *NewVal = nullptr);
2981 /// Same as Value::replaceAllUsesWith.
2982 void replaceAllUsesWith(Instruction *Inst, Value *New);
2983 /// Same as Value::mutateType.
2984 void mutateType(Instruction *Inst, Type *NewTy);
2985 /// Same as IRBuilder::createTrunc.
2986 Value *createTrunc(Instruction *Opnd, Type *Ty);
2987 /// Same as IRBuilder::createSExt.
2988 Value *createSExt(Instruction *Inst, Value *Opnd, Type *Ty);
2989 /// Same as IRBuilder::createZExt.
2990 Value *createZExt(Instruction *Inst, Value *Opnd, Type *Ty);
2991 /// Same as Instruction::moveBefore.
2992 void moveBefore(Instruction *Inst, Instruction *Before);
2996 /// The ordered list of actions made so far.
2997 SmallVector<std::unique_ptr<TypePromotionAction>, 16> Actions;
2998 typedef SmallVectorImpl<std::unique_ptr<TypePromotionAction>>::iterator CommitPt;
2999 SetOfInstrs &RemovedInsts;
3002 void TypePromotionTransaction::setOperand(Instruction *Inst, unsigned Idx,
3005 make_unique<TypePromotionTransaction::OperandSetter>(Inst, Idx, NewVal));
3008 void TypePromotionTransaction::eraseInstruction(Instruction *Inst,
3011 make_unique<TypePromotionTransaction::InstructionRemover>(Inst,
3012 RemovedInsts, NewVal));
3015 void TypePromotionTransaction::replaceAllUsesWith(Instruction *Inst,
3017 Actions.push_back(make_unique<TypePromotionTransaction::UsesReplacer>(Inst, New));
3020 void TypePromotionTransaction::mutateType(Instruction *Inst, Type *NewTy) {
3021 Actions.push_back(make_unique<TypePromotionTransaction::TypeMutator>(Inst, NewTy));
3024 Value *TypePromotionTransaction::createTrunc(Instruction *Opnd,
3026 std::unique_ptr<TruncBuilder> Ptr(new TruncBuilder(Opnd, Ty));
3027 Value *Val = Ptr->getBuiltValue();
3028 Actions.push_back(std::move(Ptr));
3032 Value *TypePromotionTransaction::createSExt(Instruction *Inst,
3033 Value *Opnd, Type *Ty) {
3034 std::unique_ptr<SExtBuilder> Ptr(new SExtBuilder(Inst, Opnd, Ty));
3035 Value *Val = Ptr->getBuiltValue();
3036 Actions.push_back(std::move(Ptr));
3040 Value *TypePromotionTransaction::createZExt(Instruction *Inst,
3041 Value *Opnd, Type *Ty) {
3042 std::unique_ptr<ZExtBuilder> Ptr(new ZExtBuilder(Inst, Opnd, Ty));
3043 Value *Val = Ptr->getBuiltValue();
3044 Actions.push_back(std::move(Ptr));
3048 void TypePromotionTransaction::moveBefore(Instruction *Inst,
3049 Instruction *Before) {
3051 make_unique<TypePromotionTransaction::InstructionMoveBefore>(Inst, Before));
3054 TypePromotionTransaction::ConstRestorationPt
3055 TypePromotionTransaction::getRestorationPoint() const {
3056 return !Actions.empty() ? Actions.back().get() : nullptr;
3059 void TypePromotionTransaction::commit() {
3060 for (CommitPt It = Actions.begin(), EndIt = Actions.end(); It != EndIt;
3066 void TypePromotionTransaction::rollback(
3067 TypePromotionTransaction::ConstRestorationPt Point) {
3068 while (!Actions.empty() && Point != Actions.back().get()) {
3069 std::unique_ptr<TypePromotionAction> Curr = Actions.pop_back_val();
3074 /// \brief A helper class for matching addressing modes.
3076 /// This encapsulates the logic for matching the target-legal addressing modes.
3077 class AddressingModeMatcher {
3078 SmallVectorImpl<Instruction*> &AddrModeInsts;
3079 const TargetLowering &TLI;
3080 const TargetRegisterInfo &TRI;
3081 const DataLayout &DL;
3083 /// AccessTy/MemoryInst - This is the type for the access (e.g. double) and
3084 /// the memory instruction that we're computing this address for.
3087 Instruction *MemoryInst;
3089 /// This is the addressing mode that we're building up. This is
3090 /// part of the return value of this addressing mode matching stuff.
3091 ExtAddrMode &AddrMode;
3093 /// The instructions inserted by other CodeGenPrepare optimizations.
3094 const SetOfInstrs &InsertedInsts;
3095 /// A map from the instructions to their type before promotion.
3096 InstrToOrigTy &PromotedInsts;
3097 /// The ongoing transaction where every action should be registered.
3098 TypePromotionTransaction &TPT;
3100 /// This is set to true when we should not do profitability checks.
3101 /// When true, IsProfitableToFoldIntoAddressingMode always returns true.
3102 bool IgnoreProfitability;
3104 AddressingModeMatcher(SmallVectorImpl<Instruction *> &AMI,
3105 const TargetLowering &TLI,
3106 const TargetRegisterInfo &TRI,
3107 Type *AT, unsigned AS,
3108 Instruction *MI, ExtAddrMode &AM,
3109 const SetOfInstrs &InsertedInsts,
3110 InstrToOrigTy &PromotedInsts,
3111 TypePromotionTransaction &TPT)
3112 : AddrModeInsts(AMI), TLI(TLI), TRI(TRI),
3113 DL(MI->getModule()->getDataLayout()), AccessTy(AT), AddrSpace(AS),
3114 MemoryInst(MI), AddrMode(AM), InsertedInsts(InsertedInsts),
3115 PromotedInsts(PromotedInsts), TPT(TPT) {
3116 IgnoreProfitability = false;
3120 /// Find the maximal addressing mode that a load/store of V can fold,
3121 /// give an access type of AccessTy. This returns a list of involved
3122 /// instructions in AddrModeInsts.
3123 /// \p InsertedInsts The instructions inserted by other CodeGenPrepare
3125 /// \p PromotedInsts maps the instructions to their type before promotion.
3126 /// \p The ongoing transaction where every action should be registered.
3127 static ExtAddrMode Match(Value *V, Type *AccessTy, unsigned AS,
3128 Instruction *MemoryInst,
3129 SmallVectorImpl<Instruction*> &AddrModeInsts,
3130 const TargetLowering &TLI,
3131 const TargetRegisterInfo &TRI,
3132 const SetOfInstrs &InsertedInsts,
3133 InstrToOrigTy &PromotedInsts,
3134 TypePromotionTransaction &TPT) {
3137 bool Success = AddressingModeMatcher(AddrModeInsts, TLI, TRI,
3139 MemoryInst, Result, InsertedInsts,
3140 PromotedInsts, TPT).matchAddr(V, 0);
3141 (void)Success; assert(Success && "Couldn't select *anything*?");
3145 bool matchScaledValue(Value *ScaleReg, int64_t Scale, unsigned Depth);
3146 bool matchAddr(Value *V, unsigned Depth);
3147 bool matchOperationAddr(User *Operation, unsigned Opcode, unsigned Depth,
3148 bool *MovedAway = nullptr);
3149 bool isProfitableToFoldIntoAddressingMode(Instruction *I,
3150 ExtAddrMode &AMBefore,
3151 ExtAddrMode &AMAfter);
3152 bool valueAlreadyLiveAtInst(Value *Val, Value *KnownLive1, Value *KnownLive2);
3153 bool isPromotionProfitable(unsigned NewCost, unsigned OldCost,
3154 Value *PromotedOperand) const;
3157 /// Try adding ScaleReg*Scale to the current addressing mode.
3158 /// Return true and update AddrMode if this addr mode is legal for the target,
3160 bool AddressingModeMatcher::matchScaledValue(Value *ScaleReg, int64_t Scale,
3162 // If Scale is 1, then this is the same as adding ScaleReg to the addressing
3163 // mode. Just process that directly.
3165 return matchAddr(ScaleReg, Depth);
3167 // If the scale is 0, it takes nothing to add this.
3171 // If we already have a scale of this value, we can add to it, otherwise, we
3172 // need an available scale field.
3173 if (AddrMode.Scale != 0 && AddrMode.ScaledReg != ScaleReg)
3176 ExtAddrMode TestAddrMode = AddrMode;
3178 // Add scale to turn X*4+X*3 -> X*7. This could also do things like
3179 // [A+B + A*7] -> [B+A*8].
3180 TestAddrMode.Scale += Scale;
3181 TestAddrMode.ScaledReg = ScaleReg;
3183 // If the new address isn't legal, bail out.
3184 if (!TLI.isLegalAddressingMode(DL, TestAddrMode, AccessTy, AddrSpace))
3187 // It was legal, so commit it.
3188 AddrMode = TestAddrMode;
3190 // Okay, we decided that we can add ScaleReg+Scale to AddrMode. Check now
3191 // to see if ScaleReg is actually X+C. If so, we can turn this into adding
3192 // X*Scale + C*Scale to addr mode.
3193 ConstantInt *CI = nullptr; Value *AddLHS = nullptr;
3194 if (isa<Instruction>(ScaleReg) && // not a constant expr.
3195 match(ScaleReg, m_Add(m_Value(AddLHS), m_ConstantInt(CI)))) {
3196 TestAddrMode.ScaledReg = AddLHS;
3197 TestAddrMode.BaseOffs += CI->getSExtValue()*TestAddrMode.Scale;
3199 // If this addressing mode is legal, commit it and remember that we folded
3200 // this instruction.
3201 if (TLI.isLegalAddressingMode(DL, TestAddrMode, AccessTy, AddrSpace)) {
3202 AddrModeInsts.push_back(cast<Instruction>(ScaleReg));
3203 AddrMode = TestAddrMode;
3208 // Otherwise, not (x+c)*scale, just return what we have.
3212 /// This is a little filter, which returns true if an addressing computation
3213 /// involving I might be folded into a load/store accessing it.
3214 /// This doesn't need to be perfect, but needs to accept at least
3215 /// the set of instructions that MatchOperationAddr can.
3216 static bool MightBeFoldableInst(Instruction *I) {
3217 switch (I->getOpcode()) {
3218 case Instruction::BitCast:
3219 case Instruction::AddrSpaceCast:
3220 // Don't touch identity bitcasts.
3221 if (I->getType() == I->getOperand(0)->getType())
3223 return I->getType()->isPointerTy() || I->getType()->isIntegerTy();
3224 case Instruction::PtrToInt:
3225 // PtrToInt is always a noop, as we know that the int type is pointer sized.
3227 case Instruction::IntToPtr:
3228 // We know the input is intptr_t, so this is foldable.
3230 case Instruction::Add:
3232 case Instruction::Mul:
3233 case Instruction::Shl:
3234 // Can only handle X*C and X << C.
3235 return isa<ConstantInt>(I->getOperand(1));
3236 case Instruction::GetElementPtr:
3243 /// \brief Check whether or not \p Val is a legal instruction for \p TLI.
3244 /// \note \p Val is assumed to be the product of some type promotion.
3245 /// Therefore if \p Val has an undefined state in \p TLI, this is assumed
3246 /// to be legal, as the non-promoted value would have had the same state.
3247 static bool isPromotedInstructionLegal(const TargetLowering &TLI,
3248 const DataLayout &DL, Value *Val) {
3249 Instruction *PromotedInst = dyn_cast<Instruction>(Val);
3252 int ISDOpcode = TLI.InstructionOpcodeToISD(PromotedInst->getOpcode());
3253 // If the ISDOpcode is undefined, it was undefined before the promotion.
3256 // Otherwise, check if the promoted instruction is legal or not.
3257 return TLI.isOperationLegalOrCustom(
3258 ISDOpcode, TLI.getValueType(DL, PromotedInst->getType()));
3261 /// \brief Hepler class to perform type promotion.
3262 class TypePromotionHelper {
3263 /// \brief Utility function to check whether or not a sign or zero extension
3264 /// of \p Inst with \p ConsideredExtType can be moved through \p Inst by
3265 /// either using the operands of \p Inst or promoting \p Inst.
3266 /// The type of the extension is defined by \p IsSExt.
3267 /// In other words, check if:
3268 /// ext (Ty Inst opnd1 opnd2 ... opndN) to ConsideredExtType.
3269 /// #1 Promotion applies:
3270 /// ConsideredExtType Inst (ext opnd1 to ConsideredExtType, ...).
3271 /// #2 Operand reuses:
3272 /// ext opnd1 to ConsideredExtType.
3273 /// \p PromotedInsts maps the instructions to their type before promotion.
3274 static bool canGetThrough(const Instruction *Inst, Type *ConsideredExtType,
3275 const InstrToOrigTy &PromotedInsts, bool IsSExt);
3277 /// \brief Utility function to determine if \p OpIdx should be promoted when
3278 /// promoting \p Inst.
3279 static bool shouldExtOperand(const Instruction *Inst, int OpIdx) {
3280 return !(isa<SelectInst>(Inst) && OpIdx == 0);
3283 /// \brief Utility function to promote the operand of \p Ext when this
3284 /// operand is a promotable trunc or sext or zext.
3285 /// \p PromotedInsts maps the instructions to their type before promotion.
3286 /// \p CreatedInstsCost[out] contains the cost of all instructions
3287 /// created to promote the operand of Ext.
3288 /// Newly added extensions are inserted in \p Exts.
3289 /// Newly added truncates are inserted in \p Truncs.
3290 /// Should never be called directly.
3291 /// \return The promoted value which is used instead of Ext.
3292 static Value *promoteOperandForTruncAndAnyExt(
3293 Instruction *Ext, TypePromotionTransaction &TPT,
3294 InstrToOrigTy &PromotedInsts, unsigned &CreatedInstsCost,
3295 SmallVectorImpl<Instruction *> *Exts,
3296 SmallVectorImpl<Instruction *> *Truncs, const TargetLowering &TLI);
3298 /// \brief Utility function to promote the operand of \p Ext when this
3299 /// operand is promotable and is not a supported trunc or sext.
3300 /// \p PromotedInsts maps the instructions to their type before promotion.
3301 /// \p CreatedInstsCost[out] contains the cost of all the instructions
3302 /// created to promote the operand of Ext.
3303 /// Newly added extensions are inserted in \p Exts.
3304 /// Newly added truncates are inserted in \p Truncs.
3305 /// Should never be called directly.
3306 /// \return The promoted value which is used instead of Ext.
3307 static Value *promoteOperandForOther(Instruction *Ext,
3308 TypePromotionTransaction &TPT,
3309 InstrToOrigTy &PromotedInsts,
3310 unsigned &CreatedInstsCost,
3311 SmallVectorImpl<Instruction *> *Exts,
3312 SmallVectorImpl<Instruction *> *Truncs,
3313 const TargetLowering &TLI, bool IsSExt);
3315 /// \see promoteOperandForOther.
3316 static Value *signExtendOperandForOther(
3317 Instruction *Ext, TypePromotionTransaction &TPT,
3318 InstrToOrigTy &PromotedInsts, unsigned &CreatedInstsCost,
3319 SmallVectorImpl<Instruction *> *Exts,
3320 SmallVectorImpl<Instruction *> *Truncs, const TargetLowering &TLI) {
3321 return promoteOperandForOther(Ext, TPT, PromotedInsts, CreatedInstsCost,
3322 Exts, Truncs, TLI, true);
3325 /// \see promoteOperandForOther.
3326 static Value *zeroExtendOperandForOther(
3327 Instruction *Ext, TypePromotionTransaction &TPT,
3328 InstrToOrigTy &PromotedInsts, unsigned &CreatedInstsCost,
3329 SmallVectorImpl<Instruction *> *Exts,
3330 SmallVectorImpl<Instruction *> *Truncs, const TargetLowering &TLI) {
3331 return promoteOperandForOther(Ext, TPT, PromotedInsts, CreatedInstsCost,
3332 Exts, Truncs, TLI, false);
3336 /// Type for the utility function that promotes the operand of Ext.
3337 typedef Value *(*Action)(Instruction *Ext, TypePromotionTransaction &TPT,
3338 InstrToOrigTy &PromotedInsts,
3339 unsigned &CreatedInstsCost,
3340 SmallVectorImpl<Instruction *> *Exts,
3341 SmallVectorImpl<Instruction *> *Truncs,
3342 const TargetLowering &TLI);
3343 /// \brief Given a sign/zero extend instruction \p Ext, return the approriate
3344 /// action to promote the operand of \p Ext instead of using Ext.
3345 /// \return NULL if no promotable action is possible with the current
3347 /// \p InsertedInsts keeps track of all the instructions inserted by the
3348 /// other CodeGenPrepare optimizations. This information is important
3349 /// because we do not want to promote these instructions as CodeGenPrepare
3350 /// will reinsert them later. Thus creating an infinite loop: create/remove.
3351 /// \p PromotedInsts maps the instructions to their type before promotion.
3352 static Action getAction(Instruction *Ext, const SetOfInstrs &InsertedInsts,
3353 const TargetLowering &TLI,
3354 const InstrToOrigTy &PromotedInsts);
3357 bool TypePromotionHelper::canGetThrough(const Instruction *Inst,
3358 Type *ConsideredExtType,
3359 const InstrToOrigTy &PromotedInsts,
3361 // The promotion helper does not know how to deal with vector types yet.
3362 // To be able to fix that, we would need to fix the places where we
3363 // statically extend, e.g., constants and such.
3364 if (Inst->getType()->isVectorTy())
3367 // We can always get through zext.
3368 if (isa<ZExtInst>(Inst))
3371 // sext(sext) is ok too.
3372 if (IsSExt && isa<SExtInst>(Inst))
3375 // We can get through binary operator, if it is legal. In other words, the
3376 // binary operator must have a nuw or nsw flag.
3377 const BinaryOperator *BinOp = dyn_cast<BinaryOperator>(Inst);
3378 if (BinOp && isa<OverflowingBinaryOperator>(BinOp) &&
3379 ((!IsSExt && BinOp->hasNoUnsignedWrap()) ||
3380 (IsSExt && BinOp->hasNoSignedWrap())))
3383 // Check if we can do the following simplification.
3384 // ext(trunc(opnd)) --> ext(opnd)
3385 if (!isa<TruncInst>(Inst))
3388 Value *OpndVal = Inst->getOperand(0);
3389 // Check if we can use this operand in the extension.
3390 // If the type is larger than the result type of the extension, we cannot.
3391 if (!OpndVal->getType()->isIntegerTy() ||
3392 OpndVal->getType()->getIntegerBitWidth() >
3393 ConsideredExtType->getIntegerBitWidth())
3396 // If the operand of the truncate is not an instruction, we will not have
3397 // any information on the dropped bits.
3398 // (Actually we could for constant but it is not worth the extra logic).
3399 Instruction *Opnd = dyn_cast<Instruction>(OpndVal);
3403 // Check if the source of the type is narrow enough.
3404 // I.e., check that trunc just drops extended bits of the same kind of
3406 // #1 get the type of the operand and check the kind of the extended bits.
3407 const Type *OpndType;
3408 InstrToOrigTy::const_iterator It = PromotedInsts.find(Opnd);
3409 if (It != PromotedInsts.end() && It->second.getInt() == IsSExt)
3410 OpndType = It->second.getPointer();
3411 else if ((IsSExt && isa<SExtInst>(Opnd)) || (!IsSExt && isa<ZExtInst>(Opnd)))
3412 OpndType = Opnd->getOperand(0)->getType();
3416 // #2 check that the truncate just drops extended bits.
3417 return Inst->getType()->getIntegerBitWidth() >=
3418 OpndType->getIntegerBitWidth();
3421 TypePromotionHelper::Action TypePromotionHelper::getAction(
3422 Instruction *Ext, const SetOfInstrs &InsertedInsts,
3423 const TargetLowering &TLI, const InstrToOrigTy &PromotedInsts) {
3424 assert((isa<SExtInst>(Ext) || isa<ZExtInst>(Ext)) &&
3425 "Unexpected instruction type");
3426 Instruction *ExtOpnd = dyn_cast<Instruction>(Ext->getOperand(0));
3427 Type *ExtTy = Ext->getType();
3428 bool IsSExt = isa<SExtInst>(Ext);
3429 // If the operand of the extension is not an instruction, we cannot
3431 // If it, check we can get through.
3432 if (!ExtOpnd || !canGetThrough(ExtOpnd, ExtTy, PromotedInsts, IsSExt))
3435 // Do not promote if the operand has been added by codegenprepare.
3436 // Otherwise, it means we are undoing an optimization that is likely to be
3437 // redone, thus causing potential infinite loop.
3438 if (isa<TruncInst>(ExtOpnd) && InsertedInsts.count(ExtOpnd))
3441 // SExt or Trunc instructions.
3442 // Return the related handler.
3443 if (isa<SExtInst>(ExtOpnd) || isa<TruncInst>(ExtOpnd) ||
3444 isa<ZExtInst>(ExtOpnd))
3445 return promoteOperandForTruncAndAnyExt;
3447 // Regular instruction.
3448 // Abort early if we will have to insert non-free instructions.
3449 if (!ExtOpnd->hasOneUse() && !TLI.isTruncateFree(ExtTy, ExtOpnd->getType()))
3451 return IsSExt ? signExtendOperandForOther : zeroExtendOperandForOther;
3454 Value *TypePromotionHelper::promoteOperandForTruncAndAnyExt(
3455 llvm::Instruction *SExt, TypePromotionTransaction &TPT,
3456 InstrToOrigTy &PromotedInsts, unsigned &CreatedInstsCost,
3457 SmallVectorImpl<Instruction *> *Exts,
3458 SmallVectorImpl<Instruction *> *Truncs, const TargetLowering &TLI) {
3459 // By construction, the operand of SExt is an instruction. Otherwise we cannot
3460 // get through it and this method should not be called.
3461 Instruction *SExtOpnd = cast<Instruction>(SExt->getOperand(0));
3462 Value *ExtVal = SExt;
3463 bool HasMergedNonFreeExt = false;
3464 if (isa<ZExtInst>(SExtOpnd)) {
3465 // Replace s|zext(zext(opnd))
3467 HasMergedNonFreeExt = !TLI.isExtFree(SExtOpnd);
3469 TPT.createZExt(SExt, SExtOpnd->getOperand(0), SExt->getType());
3470 TPT.replaceAllUsesWith(SExt, ZExt);
3471 TPT.eraseInstruction(SExt);
3474 // Replace z|sext(trunc(opnd)) or sext(sext(opnd))
3476 TPT.setOperand(SExt, 0, SExtOpnd->getOperand(0));
3478 CreatedInstsCost = 0;
3480 // Remove dead code.
3481 if (SExtOpnd->use_empty())
3482 TPT.eraseInstruction(SExtOpnd);
3484 // Check if the extension is still needed.
3485 Instruction *ExtInst = dyn_cast<Instruction>(ExtVal);
3486 if (!ExtInst || ExtInst->getType() != ExtInst->getOperand(0)->getType()) {
3489 Exts->push_back(ExtInst);
3490 CreatedInstsCost = !TLI.isExtFree(ExtInst) && !HasMergedNonFreeExt;
3495 // At this point we have: ext ty opnd to ty.
3496 // Reassign the uses of ExtInst to the opnd and remove ExtInst.
3497 Value *NextVal = ExtInst->getOperand(0);
3498 TPT.eraseInstruction(ExtInst, NextVal);
3502 Value *TypePromotionHelper::promoteOperandForOther(
3503 Instruction *Ext, TypePromotionTransaction &TPT,
3504 InstrToOrigTy &PromotedInsts, unsigned &CreatedInstsCost,
3505 SmallVectorImpl<Instruction *> *Exts,
3506 SmallVectorImpl<Instruction *> *Truncs, const TargetLowering &TLI,
3508 // By construction, the operand of Ext is an instruction. Otherwise we cannot
3509 // get through it and this method should not be called.
3510 Instruction *ExtOpnd = cast<Instruction>(Ext->getOperand(0));
3511 CreatedInstsCost = 0;
3512 if (!ExtOpnd->hasOneUse()) {
3513 // ExtOpnd will be promoted.
3514 // All its uses, but Ext, will need to use a truncated value of the
3515 // promoted version.
3516 // Create the truncate now.
3517 Value *Trunc = TPT.createTrunc(Ext, ExtOpnd->getType());
3518 if (Instruction *ITrunc = dyn_cast<Instruction>(Trunc)) {
3519 ITrunc->removeFromParent();
3520 // Insert it just after the definition.
3521 ITrunc->insertAfter(ExtOpnd);
3523 Truncs->push_back(ITrunc);
3526 TPT.replaceAllUsesWith(ExtOpnd, Trunc);
3527 // Restore the operand of Ext (which has been replaced by the previous call
3528 // to replaceAllUsesWith) to avoid creating a cycle trunc <-> sext.
3529 TPT.setOperand(Ext, 0, ExtOpnd);
3532 // Get through the Instruction:
3533 // 1. Update its type.
3534 // 2. Replace the uses of Ext by Inst.
3535 // 3. Extend each operand that needs to be extended.
3537 // Remember the original type of the instruction before promotion.
3538 // This is useful to know that the high bits are sign extended bits.
3539 PromotedInsts.insert(std::pair<Instruction *, TypeIsSExt>(
3540 ExtOpnd, TypeIsSExt(ExtOpnd->getType(), IsSExt)));
3542 TPT.mutateType(ExtOpnd, Ext->getType());
3544 TPT.replaceAllUsesWith(Ext, ExtOpnd);
3546 Instruction *ExtForOpnd = Ext;
3548 DEBUG(dbgs() << "Propagate Ext to operands\n");
3549 for (int OpIdx = 0, EndOpIdx = ExtOpnd->getNumOperands(); OpIdx != EndOpIdx;
3551 DEBUG(dbgs() << "Operand:\n" << *(ExtOpnd->getOperand(OpIdx)) << '\n');
3552 if (ExtOpnd->getOperand(OpIdx)->getType() == Ext->getType() ||
3553 !shouldExtOperand(ExtOpnd, OpIdx)) {
3554 DEBUG(dbgs() << "No need to propagate\n");
3557 // Check if we can statically extend the operand.
3558 Value *Opnd = ExtOpnd->getOperand(OpIdx);
3559 if (const ConstantInt *Cst = dyn_cast<ConstantInt>(Opnd)) {
3560 DEBUG(dbgs() << "Statically extend\n");
3561 unsigned BitWidth = Ext->getType()->getIntegerBitWidth();
3562 APInt CstVal = IsSExt ? Cst->getValue().sext(BitWidth)
3563 : Cst->getValue().zext(BitWidth);
3564 TPT.setOperand(ExtOpnd, OpIdx, ConstantInt::get(Ext->getType(), CstVal));
3567 // UndefValue are typed, so we have to statically sign extend them.
3568 if (isa<UndefValue>(Opnd)) {
3569 DEBUG(dbgs() << "Statically extend\n");
3570 TPT.setOperand(ExtOpnd, OpIdx, UndefValue::get(Ext->getType()));
3574 // Otherwise we have to explicity sign extend the operand.
3575 // Check if Ext was reused to extend an operand.
3577 // If yes, create a new one.
3578 DEBUG(dbgs() << "More operands to ext\n");
3579 Value *ValForExtOpnd = IsSExt ? TPT.createSExt(Ext, Opnd, Ext->getType())
3580 : TPT.createZExt(Ext, Opnd, Ext->getType());
3581 if (!isa<Instruction>(ValForExtOpnd)) {
3582 TPT.setOperand(ExtOpnd, OpIdx, ValForExtOpnd);
3585 ExtForOpnd = cast<Instruction>(ValForExtOpnd);
3588 Exts->push_back(ExtForOpnd);
3589 TPT.setOperand(ExtForOpnd, 0, Opnd);
3591 // Move the sign extension before the insertion point.
3592 TPT.moveBefore(ExtForOpnd, ExtOpnd);
3593 TPT.setOperand(ExtOpnd, OpIdx, ExtForOpnd);
3594 CreatedInstsCost += !TLI.isExtFree(ExtForOpnd);
3595 // If more sext are required, new instructions will have to be created.
3596 ExtForOpnd = nullptr;
3598 if (ExtForOpnd == Ext) {
3599 DEBUG(dbgs() << "Extension is useless now\n");
3600 TPT.eraseInstruction(Ext);
3605 /// Check whether or not promoting an instruction to a wider type is profitable.
3606 /// \p NewCost gives the cost of extension instructions created by the
3608 /// \p OldCost gives the cost of extension instructions before the promotion
3609 /// plus the number of instructions that have been
3610 /// matched in the addressing mode the promotion.
3611 /// \p PromotedOperand is the value that has been promoted.
3612 /// \return True if the promotion is profitable, false otherwise.
3613 bool AddressingModeMatcher::isPromotionProfitable(
3614 unsigned NewCost, unsigned OldCost, Value *PromotedOperand) const {
3615 DEBUG(dbgs() << "OldCost: " << OldCost << "\tNewCost: " << NewCost << '\n');
3616 // The cost of the new extensions is greater than the cost of the
3617 // old extension plus what we folded.
3618 // This is not profitable.
3619 if (NewCost > OldCost)
3621 if (NewCost < OldCost)
3623 // The promotion is neutral but it may help folding the sign extension in
3624 // loads for instance.
3625 // Check that we did not create an illegal instruction.
3626 return isPromotedInstructionLegal(TLI, DL, PromotedOperand);
3629 /// Given an instruction or constant expr, see if we can fold the operation
3630 /// into the addressing mode. If so, update the addressing mode and return
3631 /// true, otherwise return false without modifying AddrMode.
3632 /// If \p MovedAway is not NULL, it contains the information of whether or
3633 /// not AddrInst has to be folded into the addressing mode on success.
3634 /// If \p MovedAway == true, \p AddrInst will not be part of the addressing
3635 /// because it has been moved away.
3636 /// Thus AddrInst must not be added in the matched instructions.
3637 /// This state can happen when AddrInst is a sext, since it may be moved away.
3638 /// Therefore, AddrInst may not be valid when MovedAway is true and it must
3639 /// not be referenced anymore.
3640 bool AddressingModeMatcher::matchOperationAddr(User *AddrInst, unsigned Opcode,
3643 // Avoid exponential behavior on extremely deep expression trees.
3644 if (Depth >= 5) return false;
3646 // By default, all matched instructions stay in place.
3651 case Instruction::PtrToInt:
3652 // PtrToInt is always a noop, as we know that the int type is pointer sized.
3653 return matchAddr(AddrInst->getOperand(0), Depth);
3654 case Instruction::IntToPtr: {
3655 auto AS = AddrInst->getType()->getPointerAddressSpace();
3656 auto PtrTy = MVT::getIntegerVT(DL.getPointerSizeInBits(AS));
3657 // This inttoptr is a no-op if the integer type is pointer sized.
3658 if (TLI.getValueType(DL, AddrInst->getOperand(0)->getType()) == PtrTy)
3659 return matchAddr(AddrInst->getOperand(0), Depth);
3662 case Instruction::BitCast:
3663 // BitCast is always a noop, and we can handle it as long as it is
3664 // int->int or pointer->pointer (we don't want int<->fp or something).
3665 if ((AddrInst->getOperand(0)->getType()->isPointerTy() ||
3666 AddrInst->getOperand(0)->getType()->isIntegerTy()) &&
3667 // Don't touch identity bitcasts. These were probably put here by LSR,
3668 // and we don't want to mess around with them. Assume it knows what it
3670 AddrInst->getOperand(0)->getType() != AddrInst->getType())
3671 return matchAddr(AddrInst->getOperand(0), Depth);
3673 case Instruction::AddrSpaceCast: {
3675 = AddrInst->getOperand(0)->getType()->getPointerAddressSpace();
3676 unsigned DestAS = AddrInst->getType()->getPointerAddressSpace();
3677 if (TLI.isNoopAddrSpaceCast(SrcAS, DestAS))
3678 return matchAddr(AddrInst->getOperand(0), Depth);
3681 case Instruction::Add: {
3682 // Check to see if we can merge in the RHS then the LHS. If so, we win.
3683 ExtAddrMode BackupAddrMode = AddrMode;
3684 unsigned OldSize = AddrModeInsts.size();
3685 // Start a transaction at this point.
3686 // The LHS may match but not the RHS.
3687 // Therefore, we need a higher level restoration point to undo partially
3688 // matched operation.
3689 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
3690 TPT.getRestorationPoint();
3692 if (matchAddr(AddrInst->getOperand(1), Depth+1) &&
3693 matchAddr(AddrInst->getOperand(0), Depth+1))
3696 // Restore the old addr mode info.
3697 AddrMode = BackupAddrMode;
3698 AddrModeInsts.resize(OldSize);
3699 TPT.rollback(LastKnownGood);
3701 // Otherwise this was over-aggressive. Try merging in the LHS then the RHS.
3702 if (matchAddr(AddrInst->getOperand(0), Depth+1) &&
3703 matchAddr(AddrInst->getOperand(1), Depth+1))
3706 // Otherwise we definitely can't merge the ADD in.
3707 AddrMode = BackupAddrMode;
3708 AddrModeInsts.resize(OldSize);
3709 TPT.rollback(LastKnownGood);
3712 //case Instruction::Or:
3713 // TODO: We can handle "Or Val, Imm" iff this OR is equivalent to an ADD.
3715 case Instruction::Mul:
3716 case Instruction::Shl: {
3717 // Can only handle X*C and X << C.
3718 ConstantInt *RHS = dyn_cast<ConstantInt>(AddrInst->getOperand(1));
3721 int64_t Scale = RHS->getSExtValue();
3722 if (Opcode == Instruction::Shl)
3723 Scale = 1LL << Scale;
3725 return matchScaledValue(AddrInst->getOperand(0), Scale, Depth);
3727 case Instruction::GetElementPtr: {
3728 // Scan the GEP. We check it if it contains constant offsets and at most
3729 // one variable offset.
3730 int VariableOperand = -1;
3731 unsigned VariableScale = 0;
3733 int64_t ConstantOffset = 0;
3734 gep_type_iterator GTI = gep_type_begin(AddrInst);
3735 for (unsigned i = 1, e = AddrInst->getNumOperands(); i != e; ++i, ++GTI) {
3736 if (StructType *STy = GTI.getStructTypeOrNull()) {
3737 const StructLayout *SL = DL.getStructLayout(STy);
3739 cast<ConstantInt>(AddrInst->getOperand(i))->getZExtValue();
3740 ConstantOffset += SL->getElementOffset(Idx);
3742 uint64_t TypeSize = DL.getTypeAllocSize(GTI.getIndexedType());
3743 if (ConstantInt *CI = dyn_cast<ConstantInt>(AddrInst->getOperand(i))) {
3744 ConstantOffset += CI->getSExtValue()*TypeSize;
3745 } else if (TypeSize) { // Scales of zero don't do anything.
3746 // We only allow one variable index at the moment.
3747 if (VariableOperand != -1)
3750 // Remember the variable index.
3751 VariableOperand = i;
3752 VariableScale = TypeSize;
3757 // A common case is for the GEP to only do a constant offset. In this case,
3758 // just add it to the disp field and check validity.
3759 if (VariableOperand == -1) {
3760 AddrMode.BaseOffs += ConstantOffset;
3761 if (ConstantOffset == 0 ||
3762 TLI.isLegalAddressingMode(DL, AddrMode, AccessTy, AddrSpace)) {
3763 // Check to see if we can fold the base pointer in too.
3764 if (matchAddr(AddrInst->getOperand(0), Depth+1))
3767 AddrMode.BaseOffs -= ConstantOffset;
3771 // Save the valid addressing mode in case we can't match.
3772 ExtAddrMode BackupAddrMode = AddrMode;
3773 unsigned OldSize = AddrModeInsts.size();
3775 // See if the scale and offset amount is valid for this target.
3776 AddrMode.BaseOffs += ConstantOffset;
3778 // Match the base operand of the GEP.
3779 if (!matchAddr(AddrInst->getOperand(0), Depth+1)) {
3780 // If it couldn't be matched, just stuff the value in a register.
3781 if (AddrMode.HasBaseReg) {
3782 AddrMode = BackupAddrMode;
3783 AddrModeInsts.resize(OldSize);
3786 AddrMode.HasBaseReg = true;
3787 AddrMode.BaseReg = AddrInst->getOperand(0);
3790 // Match the remaining variable portion of the GEP.
3791 if (!matchScaledValue(AddrInst->getOperand(VariableOperand), VariableScale,
3793 // If it couldn't be matched, try stuffing the base into a register
3794 // instead of matching it, and retrying the match of the scale.
3795 AddrMode = BackupAddrMode;
3796 AddrModeInsts.resize(OldSize);
3797 if (AddrMode.HasBaseReg)
3799 AddrMode.HasBaseReg = true;
3800 AddrMode.BaseReg = AddrInst->getOperand(0);
3801 AddrMode.BaseOffs += ConstantOffset;
3802 if (!matchScaledValue(AddrInst->getOperand(VariableOperand),
3803 VariableScale, Depth)) {
3804 // If even that didn't work, bail.
3805 AddrMode = BackupAddrMode;
3806 AddrModeInsts.resize(OldSize);
3813 case Instruction::SExt:
3814 case Instruction::ZExt: {
3815 Instruction *Ext = dyn_cast<Instruction>(AddrInst);
3819 // Try to move this ext out of the way of the addressing mode.
3820 // Ask for a method for doing so.
3821 TypePromotionHelper::Action TPH =
3822 TypePromotionHelper::getAction(Ext, InsertedInsts, TLI, PromotedInsts);
3826 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
3827 TPT.getRestorationPoint();
3828 unsigned CreatedInstsCost = 0;
3829 unsigned ExtCost = !TLI.isExtFree(Ext);
3830 Value *PromotedOperand =
3831 TPH(Ext, TPT, PromotedInsts, CreatedInstsCost, nullptr, nullptr, TLI);
3832 // SExt has been moved away.
3833 // Thus either it will be rematched later in the recursive calls or it is
3834 // gone. Anyway, we must not fold it into the addressing mode at this point.
3838 // addr = gep base, idx
3840 // promotedOpnd = ext opnd <- no match here
3841 // op = promoted_add promotedOpnd, 1 <- match (later in recursive calls)
3842 // addr = gep base, op <- match
3846 assert(PromotedOperand &&
3847 "TypePromotionHelper should have filtered out those cases");
3849 ExtAddrMode BackupAddrMode = AddrMode;
3850 unsigned OldSize = AddrModeInsts.size();
3852 if (!matchAddr(PromotedOperand, Depth) ||
3853 // The total of the new cost is equal to the cost of the created
3855 // The total of the old cost is equal to the cost of the extension plus
3856 // what we have saved in the addressing mode.
3857 !isPromotionProfitable(CreatedInstsCost,
3858 ExtCost + (AddrModeInsts.size() - OldSize),
3860 AddrMode = BackupAddrMode;
3861 AddrModeInsts.resize(OldSize);
3862 DEBUG(dbgs() << "Sign extension does not pay off: rollback\n");
3863 TPT.rollback(LastKnownGood);
3872 /// If we can, try to add the value of 'Addr' into the current addressing mode.
3873 /// If Addr can't be added to AddrMode this returns false and leaves AddrMode
3874 /// unmodified. This assumes that Addr is either a pointer type or intptr_t
3877 bool AddressingModeMatcher::matchAddr(Value *Addr, unsigned Depth) {
3878 // Start a transaction at this point that we will rollback if the matching
3880 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
3881 TPT.getRestorationPoint();
3882 if (ConstantInt *CI = dyn_cast<ConstantInt>(Addr)) {
3883 // Fold in immediates if legal for the target.
3884 AddrMode.BaseOffs += CI->getSExtValue();
3885 if (TLI.isLegalAddressingMode(DL, AddrMode, AccessTy, AddrSpace))
3887 AddrMode.BaseOffs -= CI->getSExtValue();
3888 } else if (GlobalValue *GV = dyn_cast<GlobalValue>(Addr)) {
3889 // If this is a global variable, try to fold it into the addressing mode.
3890 if (!AddrMode.BaseGV) {
3891 AddrMode.BaseGV = GV;
3892 if (TLI.isLegalAddressingMode(DL, AddrMode, AccessTy, AddrSpace))
3894 AddrMode.BaseGV = nullptr;
3896 } else if (Instruction *I = dyn_cast<Instruction>(Addr)) {
3897 ExtAddrMode BackupAddrMode = AddrMode;
3898 unsigned OldSize = AddrModeInsts.size();
3900 // Check to see if it is possible to fold this operation.
3901 bool MovedAway = false;
3902 if (matchOperationAddr(I, I->getOpcode(), Depth, &MovedAway)) {
3903 // This instruction may have been moved away. If so, there is nothing
3907 // Okay, it's possible to fold this. Check to see if it is actually
3908 // *profitable* to do so. We use a simple cost model to avoid increasing
3909 // register pressure too much.
3910 if (I->hasOneUse() ||
3911 isProfitableToFoldIntoAddressingMode(I, BackupAddrMode, AddrMode)) {
3912 AddrModeInsts.push_back(I);
3916 // It isn't profitable to do this, roll back.
3917 //cerr << "NOT FOLDING: " << *I;
3918 AddrMode = BackupAddrMode;
3919 AddrModeInsts.resize(OldSize);
3920 TPT.rollback(LastKnownGood);
3922 } else if (ConstantExpr *CE = dyn_cast<ConstantExpr>(Addr)) {
3923 if (matchOperationAddr(CE, CE->getOpcode(), Depth))
3925 TPT.rollback(LastKnownGood);
3926 } else if (isa<ConstantPointerNull>(Addr)) {
3927 // Null pointer gets folded without affecting the addressing mode.
3931 // Worse case, the target should support [reg] addressing modes. :)
3932 if (!AddrMode.HasBaseReg) {
3933 AddrMode.HasBaseReg = true;
3934 AddrMode.BaseReg = Addr;
3935 // Still check for legality in case the target supports [imm] but not [i+r].
3936 if (TLI.isLegalAddressingMode(DL, AddrMode, AccessTy, AddrSpace))
3938 AddrMode.HasBaseReg = false;
3939 AddrMode.BaseReg = nullptr;
3942 // If the base register is already taken, see if we can do [r+r].
3943 if (AddrMode.Scale == 0) {
3945 AddrMode.ScaledReg = Addr;
3946 if (TLI.isLegalAddressingMode(DL, AddrMode, AccessTy, AddrSpace))
3949 AddrMode.ScaledReg = nullptr;
3952 TPT.rollback(LastKnownGood);
3956 /// Check to see if all uses of OpVal by the specified inline asm call are due
3957 /// to memory operands. If so, return true, otherwise return false.
3958 static bool IsOperandAMemoryOperand(CallInst *CI, InlineAsm *IA, Value *OpVal,
3959 const TargetLowering &TLI,
3960 const TargetRegisterInfo &TRI) {
3961 const Function *F = CI->getFunction();
3962 TargetLowering::AsmOperandInfoVector TargetConstraints =
3963 TLI.ParseConstraints(F->getParent()->getDataLayout(), &TRI,
3964 ImmutableCallSite(CI));
3966 for (unsigned i = 0, e = TargetConstraints.size(); i != e; ++i) {
3967 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i];
3969 // Compute the constraint code and ConstraintType to use.
3970 TLI.ComputeConstraintToUse(OpInfo, SDValue());
3972 // If this asm operand is our Value*, and if it isn't an indirect memory
3973 // operand, we can't fold it!
3974 if (OpInfo.CallOperandVal == OpVal &&
3975 (OpInfo.ConstraintType != TargetLowering::C_Memory ||
3976 !OpInfo.isIndirect))
3983 /// Recursively walk all the uses of I until we find a memory use.
3984 /// If we find an obviously non-foldable instruction, return true.
3985 /// Add the ultimately found memory instructions to MemoryUses.
3986 static bool FindAllMemoryUses(
3988 SmallVectorImpl<std::pair<Instruction *, unsigned>> &MemoryUses,
3989 SmallPtrSetImpl<Instruction *> &ConsideredInsts,
3990 const TargetLowering &TLI, const TargetRegisterInfo &TRI) {
3991 // If we already considered this instruction, we're done.
3992 if (!ConsideredInsts.insert(I).second)
3995 // If this is an obviously unfoldable instruction, bail out.
3996 if (!MightBeFoldableInst(I))
3999 const bool OptSize = I->getFunction()->optForSize();
4001 // Loop over all the uses, recursively processing them.
4002 for (Use &U : I->uses()) {
4003 Instruction *UserI = cast<Instruction>(U.getUser());
4005 if (LoadInst *LI = dyn_cast<LoadInst>(UserI)) {
4006 MemoryUses.push_back(std::make_pair(LI, U.getOperandNo()));
4010 if (StoreInst *SI = dyn_cast<StoreInst>(UserI)) {
4011 unsigned opNo = U.getOperandNo();
4012 if (opNo != StoreInst::getPointerOperandIndex())
4013 return true; // Storing addr, not into addr.
4014 MemoryUses.push_back(std::make_pair(SI, opNo));
4018 if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(UserI)) {
4019 unsigned opNo = U.getOperandNo();
4020 if (opNo != AtomicRMWInst::getPointerOperandIndex())
4021 return true; // Storing addr, not into addr.
4022 MemoryUses.push_back(std::make_pair(RMW, opNo));
4026 if (AtomicCmpXchgInst *CmpX = dyn_cast<AtomicCmpXchgInst>(UserI)) {
4027 unsigned opNo = U.getOperandNo();
4028 if (opNo != AtomicCmpXchgInst::getPointerOperandIndex())
4029 return true; // Storing addr, not into addr.
4030 MemoryUses.push_back(std::make_pair(CmpX, opNo));
4034 if (CallInst *CI = dyn_cast<CallInst>(UserI)) {
4035 // If this is a cold call, we can sink the addressing calculation into
4036 // the cold path. See optimizeCallInst
4037 if (!OptSize && CI->hasFnAttr(Attribute::Cold))
4040 InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue());
4041 if (!IA) return true;
4043 // If this is a memory operand, we're cool, otherwise bail out.
4044 if (!IsOperandAMemoryOperand(CI, IA, I, TLI, TRI))
4049 if (FindAllMemoryUses(UserI, MemoryUses, ConsideredInsts, TLI, TRI))
4056 /// Return true if Val is already known to be live at the use site that we're
4057 /// folding it into. If so, there is no cost to include it in the addressing
4058 /// mode. KnownLive1 and KnownLive2 are two values that we know are live at the
4059 /// instruction already.
4060 bool AddressingModeMatcher::valueAlreadyLiveAtInst(Value *Val,Value *KnownLive1,
4061 Value *KnownLive2) {
4062 // If Val is either of the known-live values, we know it is live!
4063 if (Val == nullptr || Val == KnownLive1 || Val == KnownLive2)
4066 // All values other than instructions and arguments (e.g. constants) are live.
4067 if (!isa<Instruction>(Val) && !isa<Argument>(Val)) return true;
4069 // If Val is a constant sized alloca in the entry block, it is live, this is
4070 // true because it is just a reference to the stack/frame pointer, which is
4071 // live for the whole function.
4072 if (AllocaInst *AI = dyn_cast<AllocaInst>(Val))
4073 if (AI->isStaticAlloca())
4076 // Check to see if this value is already used in the memory instruction's
4077 // block. If so, it's already live into the block at the very least, so we
4078 // can reasonably fold it.
4079 return Val->isUsedInBasicBlock(MemoryInst->getParent());
4082 /// It is possible for the addressing mode of the machine to fold the specified
4083 /// instruction into a load or store that ultimately uses it.
4084 /// However, the specified instruction has multiple uses.
4085 /// Given this, it may actually increase register pressure to fold it
4086 /// into the load. For example, consider this code:
4090 /// use(Y) -> nonload/store
4094 /// In this case, Y has multiple uses, and can be folded into the load of Z
4095 /// (yielding load [X+2]). However, doing this will cause both "X" and "X+1" to
4096 /// be live at the use(Y) line. If we don't fold Y into load Z, we use one
4097 /// fewer register. Since Y can't be folded into "use(Y)" we don't increase the
4098 /// number of computations either.
4100 /// Note that this (like most of CodeGenPrepare) is just a rough heuristic. If
4101 /// X was live across 'load Z' for other reasons, we actually *would* want to
4102 /// fold the addressing mode in the Z case. This would make Y die earlier.
4103 bool AddressingModeMatcher::
4104 isProfitableToFoldIntoAddressingMode(Instruction *I, ExtAddrMode &AMBefore,
4105 ExtAddrMode &AMAfter) {
4106 if (IgnoreProfitability) return true;
4108 // AMBefore is the addressing mode before this instruction was folded into it,
4109 // and AMAfter is the addressing mode after the instruction was folded. Get
4110 // the set of registers referenced by AMAfter and subtract out those
4111 // referenced by AMBefore: this is the set of values which folding in this
4112 // address extends the lifetime of.
4114 // Note that there are only two potential values being referenced here,
4115 // BaseReg and ScaleReg (global addresses are always available, as are any
4116 // folded immediates).
4117 Value *BaseReg = AMAfter.BaseReg, *ScaledReg = AMAfter.ScaledReg;
4119 // If the BaseReg or ScaledReg was referenced by the previous addrmode, their
4120 // lifetime wasn't extended by adding this instruction.
4121 if (valueAlreadyLiveAtInst(BaseReg, AMBefore.BaseReg, AMBefore.ScaledReg))
4123 if (valueAlreadyLiveAtInst(ScaledReg, AMBefore.BaseReg, AMBefore.ScaledReg))
4124 ScaledReg = nullptr;
4126 // If folding this instruction (and it's subexprs) didn't extend any live
4127 // ranges, we're ok with it.
4128 if (!BaseReg && !ScaledReg)
4131 // If all uses of this instruction can have the address mode sunk into them,
4132 // we can remove the addressing mode and effectively trade one live register
4133 // for another (at worst.) In this context, folding an addressing mode into
4134 // the use is just a particularly nice way of sinking it.
4135 SmallVector<std::pair<Instruction*,unsigned>, 16> MemoryUses;
4136 SmallPtrSet<Instruction*, 16> ConsideredInsts;
4137 if (FindAllMemoryUses(I, MemoryUses, ConsideredInsts, TLI, TRI))
4138 return false; // Has a non-memory, non-foldable use!
4140 // Now that we know that all uses of this instruction are part of a chain of
4141 // computation involving only operations that could theoretically be folded
4142 // into a memory use, loop over each of these memory operation uses and see
4143 // if they could *actually* fold the instruction. The assumption is that
4144 // addressing modes are cheap and that duplicating the computation involved
4145 // many times is worthwhile, even on a fastpath. For sinking candidates
4146 // (i.e. cold call sites), this serves as a way to prevent excessive code
4147 // growth since most architectures have some reasonable small and fast way to
4148 // compute an effective address. (i.e LEA on x86)
4149 SmallVector<Instruction*, 32> MatchedAddrModeInsts;
4150 for (unsigned i = 0, e = MemoryUses.size(); i != e; ++i) {
4151 Instruction *User = MemoryUses[i].first;
4152 unsigned OpNo = MemoryUses[i].second;
4154 // Get the access type of this use. If the use isn't a pointer, we don't
4155 // know what it accesses.
4156 Value *Address = User->getOperand(OpNo);
4157 PointerType *AddrTy = dyn_cast<PointerType>(Address->getType());
4160 Type *AddressAccessTy = AddrTy->getElementType();
4161 unsigned AS = AddrTy->getAddressSpace();
4163 // Do a match against the root of this address, ignoring profitability. This
4164 // will tell us if the addressing mode for the memory operation will
4165 // *actually* cover the shared instruction.
4167 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
4168 TPT.getRestorationPoint();
4169 AddressingModeMatcher Matcher(MatchedAddrModeInsts, TLI, TRI,
4170 AddressAccessTy, AS,
4171 MemoryInst, Result, InsertedInsts,
4172 PromotedInsts, TPT);
4173 Matcher.IgnoreProfitability = true;
4174 bool Success = Matcher.matchAddr(Address, 0);
4175 (void)Success; assert(Success && "Couldn't select *anything*?");
4177 // The match was to check the profitability, the changes made are not
4178 // part of the original matcher. Therefore, they should be dropped
4179 // otherwise the original matcher will not present the right state.
4180 TPT.rollback(LastKnownGood);
4182 // If the match didn't cover I, then it won't be shared by it.
4183 if (!is_contained(MatchedAddrModeInsts, I))
4186 MatchedAddrModeInsts.clear();
4192 } // end anonymous namespace
4194 /// Return true if the specified values are defined in a
4195 /// different basic block than BB.
4196 static bool IsNonLocalValue(Value *V, BasicBlock *BB) {
4197 if (Instruction *I = dyn_cast<Instruction>(V))
4198 return I->getParent() != BB;
4202 /// Sink addressing mode computation immediate before MemoryInst if doing so
4203 /// can be done without increasing register pressure. The need for the
4204 /// register pressure constraint means this can end up being an all or nothing
4205 /// decision for all uses of the same addressing computation.
4207 /// Load and Store Instructions often have addressing modes that can do
4208 /// significant amounts of computation. As such, instruction selection will try
4209 /// to get the load or store to do as much computation as possible for the
4210 /// program. The problem is that isel can only see within a single block. As
4211 /// such, we sink as much legal addressing mode work into the block as possible.
4213 /// This method is used to optimize both load/store and inline asms with memory
4214 /// operands. It's also used to sink addressing computations feeding into cold
4215 /// call sites into their (cold) basic block.
4217 /// The motivation for handling sinking into cold blocks is that doing so can
4218 /// both enable other address mode sinking (by satisfying the register pressure
4219 /// constraint above), and reduce register pressure globally (by removing the
4220 /// addressing mode computation from the fast path entirely.).
4221 bool CodeGenPrepare::optimizeMemoryInst(Instruction *MemoryInst, Value *Addr,
4222 Type *AccessTy, unsigned AddrSpace) {
4225 // Try to collapse single-value PHI nodes. This is necessary to undo
4226 // unprofitable PRE transformations.
4227 SmallVector<Value*, 8> worklist;
4228 SmallPtrSet<Value*, 16> Visited;
4229 worklist.push_back(Addr);
4231 // Use a worklist to iteratively look through PHI nodes, and ensure that
4232 // the addressing mode obtained from the non-PHI roots of the graph
4234 Value *Consensus = nullptr;
4235 unsigned NumUsesConsensus = 0;
4236 bool IsNumUsesConsensusValid = false;
4237 SmallVector<Instruction*, 16> AddrModeInsts;
4238 ExtAddrMode AddrMode;
4239 TypePromotionTransaction TPT(RemovedInsts);
4240 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
4241 TPT.getRestorationPoint();
4242 while (!worklist.empty()) {
4243 Value *V = worklist.back();
4244 worklist.pop_back();
4246 // Break use-def graph loops.
4247 if (!Visited.insert(V).second) {
4248 Consensus = nullptr;
4252 // For a PHI node, push all of its incoming values.
4253 if (PHINode *P = dyn_cast<PHINode>(V)) {
4254 for (Value *IncValue : P->incoming_values())
4255 worklist.push_back(IncValue);
4259 // For non-PHIs, determine the addressing mode being computed. Note that
4260 // the result may differ depending on what other uses our candidate
4261 // addressing instructions might have.
4262 SmallVector<Instruction*, 16> NewAddrModeInsts;
4263 ExtAddrMode NewAddrMode = AddressingModeMatcher::Match(
4264 V, AccessTy, AddrSpace, MemoryInst, NewAddrModeInsts, *TLI, *TRI,
4265 InsertedInsts, PromotedInsts, TPT);
4267 // This check is broken into two cases with very similar code to avoid using
4268 // getNumUses() as much as possible. Some values have a lot of uses, so
4269 // calling getNumUses() unconditionally caused a significant compile-time
4273 AddrMode = NewAddrMode;
4274 AddrModeInsts = NewAddrModeInsts;
4276 } else if (NewAddrMode == AddrMode) {
4277 if (!IsNumUsesConsensusValid) {
4278 NumUsesConsensus = Consensus->getNumUses();
4279 IsNumUsesConsensusValid = true;
4282 // Ensure that the obtained addressing mode is equivalent to that obtained
4283 // for all other roots of the PHI traversal. Also, when choosing one
4284 // such root as representative, select the one with the most uses in order
4285 // to keep the cost modeling heuristics in AddressingModeMatcher
4287 unsigned NumUses = V->getNumUses();
4288 if (NumUses > NumUsesConsensus) {
4290 NumUsesConsensus = NumUses;
4291 AddrModeInsts = NewAddrModeInsts;
4296 Consensus = nullptr;
4300 // If the addressing mode couldn't be determined, or if multiple different
4301 // ones were determined, bail out now.
4303 TPT.rollback(LastKnownGood);
4308 // If all the instructions matched are already in this BB, don't do anything.
4309 if (none_of(AddrModeInsts, [&](Value *V) {
4310 return IsNonLocalValue(V, MemoryInst->getParent());
4312 DEBUG(dbgs() << "CGP: Found local addrmode: " << AddrMode << "\n");
4316 // Insert this computation right after this user. Since our caller is
4317 // scanning from the top of the BB to the bottom, reuse of the expr are
4318 // guaranteed to happen later.
4319 IRBuilder<> Builder(MemoryInst);
4321 // Now that we determined the addressing expression we want to use and know
4322 // that we have to sink it into this block. Check to see if we have already
4323 // done this for some other load/store instr in this block. If so, reuse the
4325 Value *&SunkAddr = SunkAddrs[Addr];
4327 DEBUG(dbgs() << "CGP: Reusing nonlocal addrmode: " << AddrMode << " for "
4328 << *MemoryInst << "\n");
4329 if (SunkAddr->getType() != Addr->getType())
4330 SunkAddr = Builder.CreatePointerCast(SunkAddr, Addr->getType());
4331 } else if (AddrSinkUsingGEPs ||
4332 (!AddrSinkUsingGEPs.getNumOccurrences() && TM &&
4333 SubtargetInfo->useAA())) {
4334 // By default, we use the GEP-based method when AA is used later. This
4335 // prevents new inttoptr/ptrtoint pairs from degrading AA capabilities.
4336 DEBUG(dbgs() << "CGP: SINKING nonlocal addrmode: " << AddrMode << " for "
4337 << *MemoryInst << "\n");
4338 Type *IntPtrTy = DL->getIntPtrType(Addr->getType());
4339 Value *ResultPtr = nullptr, *ResultIndex = nullptr;
4341 // First, find the pointer.
4342 if (AddrMode.BaseReg && AddrMode.BaseReg->getType()->isPointerTy()) {
4343 ResultPtr = AddrMode.BaseReg;
4344 AddrMode.BaseReg = nullptr;
4347 if (AddrMode.Scale && AddrMode.ScaledReg->getType()->isPointerTy()) {
4348 // We can't add more than one pointer together, nor can we scale a
4349 // pointer (both of which seem meaningless).
4350 if (ResultPtr || AddrMode.Scale != 1)
4353 ResultPtr = AddrMode.ScaledReg;
4357 if (AddrMode.BaseGV) {
4361 ResultPtr = AddrMode.BaseGV;
4364 // If the real base value actually came from an inttoptr, then the matcher
4365 // will look through it and provide only the integer value. In that case,
4367 if (!ResultPtr && AddrMode.BaseReg) {
4369 Builder.CreateIntToPtr(AddrMode.BaseReg, Addr->getType(), "sunkaddr");
4370 AddrMode.BaseReg = nullptr;
4371 } else if (!ResultPtr && AddrMode.Scale == 1) {
4373 Builder.CreateIntToPtr(AddrMode.ScaledReg, Addr->getType(), "sunkaddr");
4378 !AddrMode.BaseReg && !AddrMode.Scale && !AddrMode.BaseOffs) {
4379 SunkAddr = Constant::getNullValue(Addr->getType());
4380 } else if (!ResultPtr) {
4384 Builder.getInt8PtrTy(Addr->getType()->getPointerAddressSpace());
4385 Type *I8Ty = Builder.getInt8Ty();
4387 // Start with the base register. Do this first so that subsequent address
4388 // matching finds it last, which will prevent it from trying to match it
4389 // as the scaled value in case it happens to be a mul. That would be
4390 // problematic if we've sunk a different mul for the scale, because then
4391 // we'd end up sinking both muls.
4392 if (AddrMode.BaseReg) {
4393 Value *V = AddrMode.BaseReg;
4394 if (V->getType() != IntPtrTy)
4395 V = Builder.CreateIntCast(V, IntPtrTy, /*isSigned=*/true, "sunkaddr");
4400 // Add the scale value.
4401 if (AddrMode.Scale) {
4402 Value *V = AddrMode.ScaledReg;
4403 if (V->getType() == IntPtrTy) {
4405 } else if (cast<IntegerType>(IntPtrTy)->getBitWidth() <
4406 cast<IntegerType>(V->getType())->getBitWidth()) {
4407 V = Builder.CreateTrunc(V, IntPtrTy, "sunkaddr");
4409 // It is only safe to sign extend the BaseReg if we know that the math
4410 // required to create it did not overflow before we extend it. Since
4411 // the original IR value was tossed in favor of a constant back when
4412 // the AddrMode was created we need to bail out gracefully if widths
4413 // do not match instead of extending it.
4414 Instruction *I = dyn_cast_or_null<Instruction>(ResultIndex);
4415 if (I && (ResultIndex != AddrMode.BaseReg))
4416 I->eraseFromParent();
4420 if (AddrMode.Scale != 1)
4421 V = Builder.CreateMul(V, ConstantInt::get(IntPtrTy, AddrMode.Scale),
4424 ResultIndex = Builder.CreateAdd(ResultIndex, V, "sunkaddr");
4429 // Add in the Base Offset if present.
4430 if (AddrMode.BaseOffs) {
4431 Value *V = ConstantInt::get(IntPtrTy, AddrMode.BaseOffs);
4433 // We need to add this separately from the scale above to help with
4434 // SDAG consecutive load/store merging.
4435 if (ResultPtr->getType() != I8PtrTy)
4436 ResultPtr = Builder.CreatePointerCast(ResultPtr, I8PtrTy);
4437 ResultPtr = Builder.CreateGEP(I8Ty, ResultPtr, ResultIndex, "sunkaddr");
4444 SunkAddr = ResultPtr;
4446 if (ResultPtr->getType() != I8PtrTy)
4447 ResultPtr = Builder.CreatePointerCast(ResultPtr, I8PtrTy);
4448 SunkAddr = Builder.CreateGEP(I8Ty, ResultPtr, ResultIndex, "sunkaddr");
4451 if (SunkAddr->getType() != Addr->getType())
4452 SunkAddr = Builder.CreatePointerCast(SunkAddr, Addr->getType());
4455 DEBUG(dbgs() << "CGP: SINKING nonlocal addrmode: " << AddrMode << " for "
4456 << *MemoryInst << "\n");
4457 Type *IntPtrTy = DL->getIntPtrType(Addr->getType());
4458 Value *Result = nullptr;
4460 // Start with the base register. Do this first so that subsequent address
4461 // matching finds it last, which will prevent it from trying to match it
4462 // as the scaled value in case it happens to be a mul. That would be
4463 // problematic if we've sunk a different mul for the scale, because then
4464 // we'd end up sinking both muls.
4465 if (AddrMode.BaseReg) {
4466 Value *V = AddrMode.BaseReg;
4467 if (V->getType()->isPointerTy())
4468 V = Builder.CreatePtrToInt(V, IntPtrTy, "sunkaddr");
4469 if (V->getType() != IntPtrTy)
4470 V = Builder.CreateIntCast(V, IntPtrTy, /*isSigned=*/true, "sunkaddr");
4474 // Add the scale value.
4475 if (AddrMode.Scale) {
4476 Value *V = AddrMode.ScaledReg;
4477 if (V->getType() == IntPtrTy) {
4479 } else if (V->getType()->isPointerTy()) {
4480 V = Builder.CreatePtrToInt(V, IntPtrTy, "sunkaddr");
4481 } else if (cast<IntegerType>(IntPtrTy)->getBitWidth() <
4482 cast<IntegerType>(V->getType())->getBitWidth()) {
4483 V = Builder.CreateTrunc(V, IntPtrTy, "sunkaddr");
4485 // It is only safe to sign extend the BaseReg if we know that the math
4486 // required to create it did not overflow before we extend it. Since
4487 // the original IR value was tossed in favor of a constant back when
4488 // the AddrMode was created we need to bail out gracefully if widths
4489 // do not match instead of extending it.
4490 Instruction *I = dyn_cast_or_null<Instruction>(Result);
4491 if (I && (Result != AddrMode.BaseReg))
4492 I->eraseFromParent();
4495 if (AddrMode.Scale != 1)
4496 V = Builder.CreateMul(V, ConstantInt::get(IntPtrTy, AddrMode.Scale),
4499 Result = Builder.CreateAdd(Result, V, "sunkaddr");
4504 // Add in the BaseGV if present.
4505 if (AddrMode.BaseGV) {
4506 Value *V = Builder.CreatePtrToInt(AddrMode.BaseGV, IntPtrTy, "sunkaddr");
4508 Result = Builder.CreateAdd(Result, V, "sunkaddr");
4513 // Add in the Base Offset if present.
4514 if (AddrMode.BaseOffs) {
4515 Value *V = ConstantInt::get(IntPtrTy, AddrMode.BaseOffs);
4517 Result = Builder.CreateAdd(Result, V, "sunkaddr");
4523 SunkAddr = Constant::getNullValue(Addr->getType());
4525 SunkAddr = Builder.CreateIntToPtr(Result, Addr->getType(), "sunkaddr");
4528 MemoryInst->replaceUsesOfWith(Repl, SunkAddr);
4530 // If we have no uses, recursively delete the value and all dead instructions
4532 if (Repl->use_empty()) {
4533 // This can cause recursive deletion, which can invalidate our iterator.
4534 // Use a WeakTrackingVH to hold onto it in case this happens.
4535 Value *CurValue = &*CurInstIterator;
4536 WeakTrackingVH IterHandle(CurValue);
4537 BasicBlock *BB = CurInstIterator->getParent();
4539 RecursivelyDeleteTriviallyDeadInstructions(Repl, TLInfo);
4541 if (IterHandle != CurValue) {
4542 // If the iterator instruction was recursively deleted, start over at the
4543 // start of the block.
4544 CurInstIterator = BB->begin();
4552 /// If there are any memory operands, use OptimizeMemoryInst to sink their
4553 /// address computing into the block when possible / profitable.
4554 bool CodeGenPrepare::optimizeInlineAsmInst(CallInst *CS) {
4555 bool MadeChange = false;
4557 const TargetRegisterInfo *TRI =
4558 TM->getSubtargetImpl(*CS->getFunction())->getRegisterInfo();
4559 TargetLowering::AsmOperandInfoVector TargetConstraints =
4560 TLI->ParseConstraints(*DL, TRI, CS);
4562 for (unsigned i = 0, e = TargetConstraints.size(); i != e; ++i) {
4563 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i];
4565 // Compute the constraint code and ConstraintType to use.
4566 TLI->ComputeConstraintToUse(OpInfo, SDValue());
4568 if (OpInfo.ConstraintType == TargetLowering::C_Memory &&
4569 OpInfo.isIndirect) {
4570 Value *OpVal = CS->getArgOperand(ArgNo++);
4571 MadeChange |= optimizeMemoryInst(CS, OpVal, OpVal->getType(), ~0u);
4572 } else if (OpInfo.Type == InlineAsm::isInput)
4579 /// \brief Check if all the uses of \p Val are equivalent (or free) zero or
4580 /// sign extensions.
4581 static bool hasSameExtUse(Value *Val, const TargetLowering &TLI) {
4582 assert(!Val->use_empty() && "Input must have at least one use");
4583 const Instruction *FirstUser = cast<Instruction>(*Val->user_begin());
4584 bool IsSExt = isa<SExtInst>(FirstUser);
4585 Type *ExtTy = FirstUser->getType();
4586 for (const User *U : Val->users()) {
4587 const Instruction *UI = cast<Instruction>(U);
4588 if ((IsSExt && !isa<SExtInst>(UI)) || (!IsSExt && !isa<ZExtInst>(UI)))
4590 Type *CurTy = UI->getType();
4591 // Same input and output types: Same instruction after CSE.
4595 // If IsSExt is true, we are in this situation:
4597 // b = sext ty1 a to ty2
4598 // c = sext ty1 a to ty3
4599 // Assuming ty2 is shorter than ty3, this could be turned into:
4601 // b = sext ty1 a to ty2
4602 // c = sext ty2 b to ty3
4603 // However, the last sext is not free.
4607 // This is a ZExt, maybe this is free to extend from one type to another.
4608 // In that case, we would not account for a different use.
4611 if (ExtTy->getScalarType()->getIntegerBitWidth() >
4612 CurTy->getScalarType()->getIntegerBitWidth()) {
4620 if (!TLI.isZExtFree(NarrowTy, LargeTy))
4623 // All uses are the same or can be derived from one another for free.
4627 /// \brief Try to speculatively promote extensions in \p Exts and continue
4628 /// promoting through newly promoted operands recursively as far as doing so is
4629 /// profitable. Save extensions profitably moved up, in \p ProfitablyMovedExts.
4630 /// When some promotion happened, \p TPT contains the proper state to revert
4633 /// \return true if some promotion happened, false otherwise.
4634 bool CodeGenPrepare::tryToPromoteExts(
4635 TypePromotionTransaction &TPT, const SmallVectorImpl<Instruction *> &Exts,
4636 SmallVectorImpl<Instruction *> &ProfitablyMovedExts,
4637 unsigned CreatedInstsCost) {
4638 bool Promoted = false;
4640 // Iterate over all the extensions to try to promote them.
4641 for (auto I : Exts) {
4642 // Early check if we directly have ext(load).
4643 if (isa<LoadInst>(I->getOperand(0))) {
4644 ProfitablyMovedExts.push_back(I);
4648 // Check whether or not we want to do any promotion. The reason we have
4649 // this check inside the for loop is to catch the case where an extension
4650 // is directly fed by a load because in such case the extension can be moved
4651 // up without any promotion on its operands.
4652 if (!TLI || !TLI->enableExtLdPromotion() || DisableExtLdPromotion)
4655 // Get the action to perform the promotion.
4656 TypePromotionHelper::Action TPH =
4657 TypePromotionHelper::getAction(I, InsertedInsts, *TLI, PromotedInsts);
4658 // Check if we can promote.
4660 // Save the current extension as we cannot move up through its operand.
4661 ProfitablyMovedExts.push_back(I);
4665 // Save the current state.
4666 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
4667 TPT.getRestorationPoint();
4668 SmallVector<Instruction *, 4> NewExts;
4669 unsigned NewCreatedInstsCost = 0;
4670 unsigned ExtCost = !TLI->isExtFree(I);
4672 Value *PromotedVal = TPH(I, TPT, PromotedInsts, NewCreatedInstsCost,
4673 &NewExts, nullptr, *TLI);
4674 assert(PromotedVal &&
4675 "TypePromotionHelper should have filtered out those cases");
4677 // We would be able to merge only one extension in a load.
4678 // Therefore, if we have more than 1 new extension we heuristically
4679 // cut this search path, because it means we degrade the code quality.
4680 // With exactly 2, the transformation is neutral, because we will merge
4681 // one extension but leave one. However, we optimistically keep going,
4682 // because the new extension may be removed too.
4683 long long TotalCreatedInstsCost = CreatedInstsCost + NewCreatedInstsCost;
4684 // FIXME: It would be possible to propagate a negative value instead of
4685 // conservatively ceiling it to 0.
4686 TotalCreatedInstsCost =
4687 std::max((long long)0, (TotalCreatedInstsCost - ExtCost));
4688 if (!StressExtLdPromotion &&
4689 (TotalCreatedInstsCost > 1 ||
4690 !isPromotedInstructionLegal(*TLI, *DL, PromotedVal))) {
4691 // This promotion is not profitable, rollback to the previous state, and
4692 // save the current extension in ProfitablyMovedExts as the latest
4693 // speculative promotion turned out to be unprofitable.
4694 TPT.rollback(LastKnownGood);
4695 ProfitablyMovedExts.push_back(I);
4698 // Continue promoting NewExts as far as doing so is profitable.
4699 SmallVector<Instruction *, 2> NewlyMovedExts;
4700 (void)tryToPromoteExts(TPT, NewExts, NewlyMovedExts, TotalCreatedInstsCost);
4701 bool NewPromoted = false;
4702 for (auto ExtInst : NewlyMovedExts) {
4703 Instruction *MovedExt = cast<Instruction>(ExtInst);
4704 Value *ExtOperand = MovedExt->getOperand(0);
4705 // If we have reached to a load, we need this extra profitability check
4706 // as it could potentially be merged into an ext(load).
4707 if (isa<LoadInst>(ExtOperand) &&
4708 !(StressExtLdPromotion || NewCreatedInstsCost <= ExtCost ||
4709 (ExtOperand->hasOneUse() || hasSameExtUse(ExtOperand, *TLI))))
4712 ProfitablyMovedExts.push_back(MovedExt);
4716 // If none of speculative promotions for NewExts is profitable, rollback
4717 // and save the current extension (I) as the last profitable extension.
4719 TPT.rollback(LastKnownGood);
4720 ProfitablyMovedExts.push_back(I);
4723 // The promotion is profitable.
4729 /// Merging redundant sexts when one is dominating the other.
4730 bool CodeGenPrepare::mergeSExts(Function &F) {
4731 DominatorTree DT(F);
4732 bool Changed = false;
4733 for (auto &Entry : ValToSExtendedUses) {
4734 SExts &Insts = Entry.second;
4736 for (Instruction *Inst : Insts) {
4737 if (RemovedInsts.count(Inst) || !isa<SExtInst>(Inst) ||
4738 Inst->getOperand(0) != Entry.first)
4740 bool inserted = false;
4741 for (auto &Pt : CurPts) {
4742 if (DT.dominates(Inst, Pt)) {
4743 Pt->replaceAllUsesWith(Inst);
4744 RemovedInsts.insert(Pt);
4745 Pt->removeFromParent();
4751 if (!DT.dominates(Pt, Inst))
4752 // Give up if we need to merge in a common dominator as the
4753 // expermients show it is not profitable.
4755 Inst->replaceAllUsesWith(Pt);
4756 RemovedInsts.insert(Inst);
4757 Inst->removeFromParent();
4763 CurPts.push_back(Inst);
4769 /// Return true, if an ext(load) can be formed from an extension in
4771 bool CodeGenPrepare::canFormExtLd(
4772 const SmallVectorImpl<Instruction *> &MovedExts, LoadInst *&LI,
4773 Instruction *&Inst, bool HasPromoted) {
4774 for (auto *MovedExtInst : MovedExts) {
4775 if (isa<LoadInst>(MovedExtInst->getOperand(0))) {
4776 LI = cast<LoadInst>(MovedExtInst->getOperand(0));
4777 Inst = MovedExtInst;
4784 // If they're already in the same block, there's nothing to do.
4785 // Make the cheap checks first if we did not promote.
4786 // If we promoted, we need to check if it is indeed profitable.
4787 if (!HasPromoted && LI->getParent() == Inst->getParent())
4790 EVT VT = TLI->getValueType(*DL, Inst->getType());
4791 EVT LoadVT = TLI->getValueType(*DL, LI->getType());
4793 // If the load has other users and the truncate is not free, this probably
4794 // isn't worthwhile.
4795 if (!LI->hasOneUse() && (TLI->isTypeLegal(LoadVT) || !TLI->isTypeLegal(VT)) &&
4796 !TLI->isTruncateFree(Inst->getType(), LI->getType()))
4799 // Check whether the target supports casts folded into loads.
4801 if (isa<ZExtInst>(Inst))
4802 LType = ISD::ZEXTLOAD;
4804 assert(isa<SExtInst>(Inst) && "Unexpected ext type!");
4805 LType = ISD::SEXTLOAD;
4808 return TLI->isLoadExtLegal(LType, VT, LoadVT);
4811 /// Move a zext or sext fed by a load into the same basic block as the load,
4812 /// unless conditions are unfavorable. This allows SelectionDAG to fold the
4813 /// extend into the load.
4817 /// %ld = load i32* %addr
4818 /// %add = add nuw i32 %ld, 4
4819 /// %zext = zext i32 %add to i64
4823 /// %ld = load i32* %addr
4824 /// %zext = zext i32 %ld to i64
4825 /// %add = add nuw i64 %zext, 4
4827 /// Note that the promotion in %add to i64 is done in tryToPromoteExts(), which
4828 /// allow us to match zext(load i32*) to i64.
4830 /// Also, try to promote the computations used to obtain a sign extended
4831 /// value used into memory accesses.
4834 /// a = add nsw i32 b, 3
4835 /// d = sext i32 a to i64
4836 /// e = getelementptr ..., i64 d
4840 /// f = sext i32 b to i64
4841 /// a = add nsw i64 f, 3
4842 /// e = getelementptr ..., i64 a
4845 /// \p Inst[in/out] the extension may be modified during the process if some
4846 /// promotions apply.
4847 bool CodeGenPrepare::optimizeExt(Instruction *&Inst) {
4848 // ExtLoad formation and address type promotion infrastructure requires TLI to
4853 bool AllowPromotionWithoutCommonHeader = false;
4854 /// See if it is an interesting sext operations for the address type
4855 /// promotion before trying to promote it, e.g., the ones with the right
4856 /// type and used in memory accesses.
4857 bool ATPConsiderable = TTI->shouldConsiderAddressTypePromotion(
4858 *Inst, AllowPromotionWithoutCommonHeader);
4859 TypePromotionTransaction TPT(RemovedInsts);
4860 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
4861 TPT.getRestorationPoint();
4862 SmallVector<Instruction *, 1> Exts;
4863 SmallVector<Instruction *, 2> SpeculativelyMovedExts;
4864 Exts.push_back(Inst);
4866 bool HasPromoted = tryToPromoteExts(TPT, Exts, SpeculativelyMovedExts);
4868 // Look for a load being extended.
4869 LoadInst *LI = nullptr;
4870 Instruction *ExtFedByLoad;
4872 // Try to promote a chain of computation if it allows to form an extended
4874 if (canFormExtLd(SpeculativelyMovedExts, LI, ExtFedByLoad, HasPromoted)) {
4875 assert(LI && ExtFedByLoad && "Expect a valid load and extension");
4877 // Move the extend into the same block as the load
4878 ExtFedByLoad->removeFromParent();
4879 ExtFedByLoad->insertAfter(LI);
4880 // CGP does not check if the zext would be speculatively executed when moved
4881 // to the same basic block as the load. Preserving its original location
4882 // would pessimize the debugging experience, as well as negatively impact
4883 // the quality of sample pgo. We don't want to use "line 0" as that has a
4884 // size cost in the line-table section and logically the zext can be seen as
4885 // part of the load. Therefore we conservatively reuse the same debug
4886 // location for the load and the zext.
4887 ExtFedByLoad->setDebugLoc(LI->getDebugLoc());
4889 Inst = ExtFedByLoad;
4893 // Continue promoting SExts if known as considerable depending on targets.
4894 if (ATPConsiderable &&
4895 performAddressTypePromotion(Inst, AllowPromotionWithoutCommonHeader,
4896 HasPromoted, TPT, SpeculativelyMovedExts))
4899 TPT.rollback(LastKnownGood);
4903 // Perform address type promotion if doing so is profitable.
4904 // If AllowPromotionWithoutCommonHeader == false, we should find other sext
4905 // instructions that sign extended the same initial value. However, if
4906 // AllowPromotionWithoutCommonHeader == true, we expect promoting the
4907 // extension is just profitable.
4908 bool CodeGenPrepare::performAddressTypePromotion(
4909 Instruction *&Inst, bool AllowPromotionWithoutCommonHeader,
4910 bool HasPromoted, TypePromotionTransaction &TPT,
4911 SmallVectorImpl<Instruction *> &SpeculativelyMovedExts) {
4912 bool Promoted = false;
4913 SmallPtrSet<Instruction *, 1> UnhandledExts;
4914 bool AllSeenFirst = true;
4915 for (auto I : SpeculativelyMovedExts) {
4916 Value *HeadOfChain = I->getOperand(0);
4917 DenseMap<Value *, Instruction *>::iterator AlreadySeen =
4918 SeenChainsForSExt.find(HeadOfChain);
4919 // If there is an unhandled SExt which has the same header, try to promote
4921 if (AlreadySeen != SeenChainsForSExt.end()) {
4922 if (AlreadySeen->second != nullptr)
4923 UnhandledExts.insert(AlreadySeen->second);
4924 AllSeenFirst = false;
4928 if (!AllSeenFirst || (AllowPromotionWithoutCommonHeader &&
4929 SpeculativelyMovedExts.size() == 1)) {
4933 for (auto I : SpeculativelyMovedExts) {
4934 Value *HeadOfChain = I->getOperand(0);
4935 SeenChainsForSExt[HeadOfChain] = nullptr;
4936 ValToSExtendedUses[HeadOfChain].push_back(I);
4938 // Update Inst as promotion happen.
4939 Inst = SpeculativelyMovedExts.pop_back_val();
4941 // This is the first chain visited from the header, keep the current chain
4942 // as unhandled. Defer to promote this until we encounter another SExt
4943 // chain derived from the same header.
4944 for (auto I : SpeculativelyMovedExts) {
4945 Value *HeadOfChain = I->getOperand(0);
4946 SeenChainsForSExt[HeadOfChain] = Inst;
4951 if (!AllSeenFirst && !UnhandledExts.empty())
4952 for (auto VisitedSExt : UnhandledExts) {
4953 if (RemovedInsts.count(VisitedSExt))
4955 TypePromotionTransaction TPT(RemovedInsts);
4956 SmallVector<Instruction *, 1> Exts;
4957 SmallVector<Instruction *, 2> Chains;
4958 Exts.push_back(VisitedSExt);
4959 bool HasPromoted = tryToPromoteExts(TPT, Exts, Chains);
4963 for (auto I : Chains) {
4964 Value *HeadOfChain = I->getOperand(0);
4965 // Mark this as handled.
4966 SeenChainsForSExt[HeadOfChain] = nullptr;
4967 ValToSExtendedUses[HeadOfChain].push_back(I);
4973 bool CodeGenPrepare::optimizeExtUses(Instruction *I) {
4974 BasicBlock *DefBB = I->getParent();
4976 // If the result of a {s|z}ext and its source are both live out, rewrite all
4977 // other uses of the source with result of extension.
4978 Value *Src = I->getOperand(0);
4979 if (Src->hasOneUse())
4982 // Only do this xform if truncating is free.
4983 if (TLI && !TLI->isTruncateFree(I->getType(), Src->getType()))
4986 // Only safe to perform the optimization if the source is also defined in
4988 if (!isa<Instruction>(Src) || DefBB != cast<Instruction>(Src)->getParent())
4991 bool DefIsLiveOut = false;
4992 for (User *U : I->users()) {
4993 Instruction *UI = cast<Instruction>(U);
4995 // Figure out which BB this ext is used in.
4996 BasicBlock *UserBB = UI->getParent();
4997 if (UserBB == DefBB) continue;
4998 DefIsLiveOut = true;
5004 // Make sure none of the uses are PHI nodes.
5005 for (User *U : Src->users()) {
5006 Instruction *UI = cast<Instruction>(U);
5007 BasicBlock *UserBB = UI->getParent();
5008 if (UserBB == DefBB) continue;
5009 // Be conservative. We don't want this xform to end up introducing
5010 // reloads just before load / store instructions.
5011 if (isa<PHINode>(UI) || isa<LoadInst>(UI) || isa<StoreInst>(UI))
5015 // InsertedTruncs - Only insert one trunc in each block once.
5016 DenseMap<BasicBlock*, Instruction*> InsertedTruncs;
5018 bool MadeChange = false;
5019 for (Use &U : Src->uses()) {
5020 Instruction *User = cast<Instruction>(U.getUser());
5022 // Figure out which BB this ext is used in.
5023 BasicBlock *UserBB = User->getParent();
5024 if (UserBB == DefBB) continue;
5026 // Both src and def are live in this block. Rewrite the use.
5027 Instruction *&InsertedTrunc = InsertedTruncs[UserBB];
5029 if (!InsertedTrunc) {
5030 BasicBlock::iterator InsertPt = UserBB->getFirstInsertionPt();
5031 assert(InsertPt != UserBB->end());
5032 InsertedTrunc = new TruncInst(I, Src->getType(), "", &*InsertPt);
5033 InsertedInsts.insert(InsertedTrunc);
5036 // Replace a use of the {s|z}ext source with a use of the result.
5045 // Find loads whose uses only use some of the loaded value's bits. Add an "and"
5046 // just after the load if the target can fold this into one extload instruction,
5047 // with the hope of eliminating some of the other later "and" instructions using
5048 // the loaded value. "and"s that are made trivially redundant by the insertion
5049 // of the new "and" are removed by this function, while others (e.g. those whose
5050 // path from the load goes through a phi) are left for isel to potentially
5083 // becomes (after a call to optimizeLoadExt for each load):
5087 // x1' = and x1, 0xff
5091 // x2' = and x2, 0xff
5098 bool CodeGenPrepare::optimizeLoadExt(LoadInst *Load) {
5100 if (!Load->isSimple() ||
5101 !(Load->getType()->isIntegerTy() || Load->getType()->isPointerTy()))
5104 // Skip loads we've already transformed.
5105 if (Load->hasOneUse() &&
5106 InsertedInsts.count(cast<Instruction>(*Load->user_begin())))
5109 // Look at all uses of Load, looking through phis, to determine how many bits
5110 // of the loaded value are needed.
5111 SmallVector<Instruction *, 8> WorkList;
5112 SmallPtrSet<Instruction *, 16> Visited;
5113 SmallVector<Instruction *, 8> AndsToMaybeRemove;
5114 for (auto *U : Load->users())
5115 WorkList.push_back(cast<Instruction>(U));
5117 EVT LoadResultVT = TLI->getValueType(*DL, Load->getType());
5118 unsigned BitWidth = LoadResultVT.getSizeInBits();
5119 APInt DemandBits(BitWidth, 0);
5120 APInt WidestAndBits(BitWidth, 0);
5122 while (!WorkList.empty()) {
5123 Instruction *I = WorkList.back();
5124 WorkList.pop_back();
5126 // Break use-def graph loops.
5127 if (!Visited.insert(I).second)
5130 // For a PHI node, push all of its users.
5131 if (auto *Phi = dyn_cast<PHINode>(I)) {
5132 for (auto *U : Phi->users())
5133 WorkList.push_back(cast<Instruction>(U));
5137 switch (I->getOpcode()) {
5138 case llvm::Instruction::And: {
5139 auto *AndC = dyn_cast<ConstantInt>(I->getOperand(1));
5142 APInt AndBits = AndC->getValue();
5143 DemandBits |= AndBits;
5144 // Keep track of the widest and mask we see.
5145 if (AndBits.ugt(WidestAndBits))
5146 WidestAndBits = AndBits;
5147 if (AndBits == WidestAndBits && I->getOperand(0) == Load)
5148 AndsToMaybeRemove.push_back(I);
5152 case llvm::Instruction::Shl: {
5153 auto *ShlC = dyn_cast<ConstantInt>(I->getOperand(1));
5156 uint64_t ShiftAmt = ShlC->getLimitedValue(BitWidth - 1);
5157 DemandBits.setLowBits(BitWidth - ShiftAmt);
5161 case llvm::Instruction::Trunc: {
5162 EVT TruncVT = TLI->getValueType(*DL, I->getType());
5163 unsigned TruncBitWidth = TruncVT.getSizeInBits();
5164 DemandBits.setLowBits(TruncBitWidth);
5173 uint32_t ActiveBits = DemandBits.getActiveBits();
5174 // Avoid hoisting (and (load x) 1) since it is unlikely to be folded by the
5175 // target even if isLoadExtLegal says an i1 EXTLOAD is valid. For example,
5176 // for the AArch64 target isLoadExtLegal(ZEXTLOAD, i32, i1) returns true, but
5177 // (and (load x) 1) is not matched as a single instruction, rather as a LDR
5178 // followed by an AND.
5179 // TODO: Look into removing this restriction by fixing backends to either
5180 // return false for isLoadExtLegal for i1 or have them select this pattern to
5181 // a single instruction.
5183 // Also avoid hoisting if we didn't see any ands with the exact DemandBits
5184 // mask, since these are the only ands that will be removed by isel.
5185 if (ActiveBits <= 1 || !DemandBits.isMask(ActiveBits) ||
5186 WidestAndBits != DemandBits)
5189 LLVMContext &Ctx = Load->getType()->getContext();
5190 Type *TruncTy = Type::getIntNTy(Ctx, ActiveBits);
5191 EVT TruncVT = TLI->getValueType(*DL, TruncTy);
5193 // Reject cases that won't be matched as extloads.
5194 if (!LoadResultVT.bitsGT(TruncVT) || !TruncVT.isRound() ||
5195 !TLI->isLoadExtLegal(ISD::ZEXTLOAD, LoadResultVT, TruncVT))
5198 IRBuilder<> Builder(Load->getNextNode());
5199 auto *NewAnd = dyn_cast<Instruction>(
5200 Builder.CreateAnd(Load, ConstantInt::get(Ctx, DemandBits)));
5201 // Mark this instruction as "inserted by CGP", so that other
5202 // optimizations don't touch it.
5203 InsertedInsts.insert(NewAnd);
5205 // Replace all uses of load with new and (except for the use of load in the
5207 Load->replaceAllUsesWith(NewAnd);
5208 NewAnd->setOperand(0, Load);
5210 // Remove any and instructions that are now redundant.
5211 for (auto *And : AndsToMaybeRemove)
5212 // Check that the and mask is the same as the one we decided to put on the
5214 if (cast<ConstantInt>(And->getOperand(1))->getValue() == DemandBits) {
5215 And->replaceAllUsesWith(NewAnd);
5216 if (&*CurInstIterator == And)
5217 CurInstIterator = std::next(And->getIterator());
5218 And->eraseFromParent();
5226 /// Check if V (an operand of a select instruction) is an expensive instruction
5227 /// that is only used once.
5228 static bool sinkSelectOperand(const TargetTransformInfo *TTI, Value *V) {
5229 auto *I = dyn_cast<Instruction>(V);
5230 // If it's safe to speculatively execute, then it should not have side
5231 // effects; therefore, it's safe to sink and possibly *not* execute.
5232 return I && I->hasOneUse() && isSafeToSpeculativelyExecute(I) &&
5233 TTI->getUserCost(I) >= TargetTransformInfo::TCC_Expensive;
5236 /// Returns true if a SelectInst should be turned into an explicit branch.
5237 static bool isFormingBranchFromSelectProfitable(const TargetTransformInfo *TTI,
5238 const TargetLowering *TLI,
5240 // If even a predictable select is cheap, then a branch can't be cheaper.
5241 if (!TLI->isPredictableSelectExpensive())
5244 // FIXME: This should use the same heuristics as IfConversion to determine
5245 // whether a select is better represented as a branch.
5247 // If metadata tells us that the select condition is obviously predictable,
5248 // then we want to replace the select with a branch.
5249 uint64_t TrueWeight, FalseWeight;
5250 if (SI->extractProfMetadata(TrueWeight, FalseWeight)) {
5251 uint64_t Max = std::max(TrueWeight, FalseWeight);
5252 uint64_t Sum = TrueWeight + FalseWeight;
5254 auto Probability = BranchProbability::getBranchProbability(Max, Sum);
5255 if (Probability > TLI->getPredictableBranchThreshold())
5260 CmpInst *Cmp = dyn_cast<CmpInst>(SI->getCondition());
5262 // If a branch is predictable, an out-of-order CPU can avoid blocking on its
5263 // comparison condition. If the compare has more than one use, there's
5264 // probably another cmov or setcc around, so it's not worth emitting a branch.
5265 if (!Cmp || !Cmp->hasOneUse())
5268 // If either operand of the select is expensive and only needed on one side
5269 // of the select, we should form a branch.
5270 if (sinkSelectOperand(TTI, SI->getTrueValue()) ||
5271 sinkSelectOperand(TTI, SI->getFalseValue()))
5277 /// If \p isTrue is true, return the true value of \p SI, otherwise return
5278 /// false value of \p SI. If the true/false value of \p SI is defined by any
5279 /// select instructions in \p Selects, look through the defining select
5280 /// instruction until the true/false value is not defined in \p Selects.
5281 static Value *getTrueOrFalseValue(
5282 SelectInst *SI, bool isTrue,
5283 const SmallPtrSet<const Instruction *, 2> &Selects) {
5286 for (SelectInst *DefSI = SI; DefSI != nullptr && Selects.count(DefSI);
5287 DefSI = dyn_cast<SelectInst>(V)) {
5288 assert(DefSI->getCondition() == SI->getCondition() &&
5289 "The condition of DefSI does not match with SI");
5290 V = (isTrue ? DefSI->getTrueValue() : DefSI->getFalseValue());
5295 /// If we have a SelectInst that will likely profit from branch prediction,
5296 /// turn it into a branch.
5297 bool CodeGenPrepare::optimizeSelectInst(SelectInst *SI) {
5298 // Find all consecutive select instructions that share the same condition.
5299 SmallVector<SelectInst *, 2> ASI;
5301 for (BasicBlock::iterator It = ++BasicBlock::iterator(SI);
5302 It != SI->getParent()->end(); ++It) {
5303 SelectInst *I = dyn_cast<SelectInst>(&*It);
5304 if (I && SI->getCondition() == I->getCondition()) {
5311 SelectInst *LastSI = ASI.back();
5312 // Increment the current iterator to skip all the rest of select instructions
5313 // because they will be either "not lowered" or "all lowered" to branch.
5314 CurInstIterator = std::next(LastSI->getIterator());
5316 bool VectorCond = !SI->getCondition()->getType()->isIntegerTy(1);
5318 // Can we convert the 'select' to CF ?
5319 if (DisableSelectToBranch || OptSize || !TLI || VectorCond ||
5320 SI->getMetadata(LLVMContext::MD_unpredictable))
5323 TargetLowering::SelectSupportKind SelectKind;
5325 SelectKind = TargetLowering::VectorMaskSelect;
5326 else if (SI->getType()->isVectorTy())
5327 SelectKind = TargetLowering::ScalarCondVectorVal;
5329 SelectKind = TargetLowering::ScalarValSelect;
5331 if (TLI->isSelectSupported(SelectKind) &&
5332 !isFormingBranchFromSelectProfitable(TTI, TLI, SI))
5337 // Transform a sequence like this:
5339 // %cmp = cmp uge i32 %a, %b
5340 // %sel = select i1 %cmp, i32 %c, i32 %d
5344 // %cmp = cmp uge i32 %a, %b
5345 // br i1 %cmp, label %select.true, label %select.false
5347 // br label %select.end
5349 // br label %select.end
5351 // %sel = phi i32 [ %c, %select.true ], [ %d, %select.false ]
5353 // In addition, we may sink instructions that produce %c or %d from
5354 // the entry block into the destination(s) of the new branch.
5355 // If the true or false blocks do not contain a sunken instruction, that
5356 // block and its branch may be optimized away. In that case, one side of the
5357 // first branch will point directly to select.end, and the corresponding PHI
5358 // predecessor block will be the start block.
5360 // First, we split the block containing the select into 2 blocks.
5361 BasicBlock *StartBlock = SI->getParent();
5362 BasicBlock::iterator SplitPt = ++(BasicBlock::iterator(LastSI));
5363 BasicBlock *EndBlock = StartBlock->splitBasicBlock(SplitPt, "select.end");
5365 // Delete the unconditional branch that was just created by the split.
5366 StartBlock->getTerminator()->eraseFromParent();
5368 // These are the new basic blocks for the conditional branch.
5369 // At least one will become an actual new basic block.
5370 BasicBlock *TrueBlock = nullptr;
5371 BasicBlock *FalseBlock = nullptr;
5372 BranchInst *TrueBranch = nullptr;
5373 BranchInst *FalseBranch = nullptr;
5375 // Sink expensive instructions into the conditional blocks to avoid executing
5376 // them speculatively.
5377 for (SelectInst *SI : ASI) {
5378 if (sinkSelectOperand(TTI, SI->getTrueValue())) {
5379 if (TrueBlock == nullptr) {
5380 TrueBlock = BasicBlock::Create(SI->getContext(), "select.true.sink",
5381 EndBlock->getParent(), EndBlock);
5382 TrueBranch = BranchInst::Create(EndBlock, TrueBlock);
5384 auto *TrueInst = cast<Instruction>(SI->getTrueValue());
5385 TrueInst->moveBefore(TrueBranch);
5387 if (sinkSelectOperand(TTI, SI->getFalseValue())) {
5388 if (FalseBlock == nullptr) {
5389 FalseBlock = BasicBlock::Create(SI->getContext(), "select.false.sink",
5390 EndBlock->getParent(), EndBlock);
5391 FalseBranch = BranchInst::Create(EndBlock, FalseBlock);
5393 auto *FalseInst = cast<Instruction>(SI->getFalseValue());
5394 FalseInst->moveBefore(FalseBranch);
5398 // If there was nothing to sink, then arbitrarily choose the 'false' side
5399 // for a new input value to the PHI.
5400 if (TrueBlock == FalseBlock) {
5401 assert(TrueBlock == nullptr &&
5402 "Unexpected basic block transform while optimizing select");
5404 FalseBlock = BasicBlock::Create(SI->getContext(), "select.false",
5405 EndBlock->getParent(), EndBlock);
5406 BranchInst::Create(EndBlock, FalseBlock);
5409 // Insert the real conditional branch based on the original condition.
5410 // If we did not create a new block for one of the 'true' or 'false' paths
5411 // of the condition, it means that side of the branch goes to the end block
5412 // directly and the path originates from the start block from the point of
5413 // view of the new PHI.
5414 BasicBlock *TT, *FT;
5415 if (TrueBlock == nullptr) {
5418 TrueBlock = StartBlock;
5419 } else if (FalseBlock == nullptr) {
5422 FalseBlock = StartBlock;
5427 IRBuilder<>(SI).CreateCondBr(SI->getCondition(), TT, FT, SI);
5429 SmallPtrSet<const Instruction *, 2> INS;
5430 INS.insert(ASI.begin(), ASI.end());
5431 // Use reverse iterator because later select may use the value of the
5432 // earlier select, and we need to propagate value through earlier select
5433 // to get the PHI operand.
5434 for (auto It = ASI.rbegin(); It != ASI.rend(); ++It) {
5435 SelectInst *SI = *It;
5436 // The select itself is replaced with a PHI Node.
5437 PHINode *PN = PHINode::Create(SI->getType(), 2, "", &EndBlock->front());
5439 PN->addIncoming(getTrueOrFalseValue(SI, true, INS), TrueBlock);
5440 PN->addIncoming(getTrueOrFalseValue(SI, false, INS), FalseBlock);
5442 SI->replaceAllUsesWith(PN);
5443 SI->eraseFromParent();
5445 ++NumSelectsExpanded;
5448 // Instruct OptimizeBlock to skip to the next block.
5449 CurInstIterator = StartBlock->end();
5453 static bool isBroadcastShuffle(ShuffleVectorInst *SVI) {
5454 SmallVector<int, 16> Mask(SVI->getShuffleMask());
5456 for (unsigned i = 0; i < Mask.size(); ++i) {
5457 if (SplatElem != -1 && Mask[i] != -1 && Mask[i] != SplatElem)
5459 SplatElem = Mask[i];
5465 /// Some targets have expensive vector shifts if the lanes aren't all the same
5466 /// (e.g. x86 only introduced "vpsllvd" and friends with AVX2). In these cases
5467 /// it's often worth sinking a shufflevector splat down to its use so that
5468 /// codegen can spot all lanes are identical.
5469 bool CodeGenPrepare::optimizeShuffleVectorInst(ShuffleVectorInst *SVI) {
5470 BasicBlock *DefBB = SVI->getParent();
5472 // Only do this xform if variable vector shifts are particularly expensive.
5473 if (!TLI || !TLI->isVectorShiftByScalarCheap(SVI->getType()))
5476 // We only expect better codegen by sinking a shuffle if we can recognise a
5478 if (!isBroadcastShuffle(SVI))
5481 // InsertedShuffles - Only insert a shuffle in each block once.
5482 DenseMap<BasicBlock*, Instruction*> InsertedShuffles;
5484 bool MadeChange = false;
5485 for (User *U : SVI->users()) {
5486 Instruction *UI = cast<Instruction>(U);
5488 // Figure out which BB this ext is used in.
5489 BasicBlock *UserBB = UI->getParent();
5490 if (UserBB == DefBB) continue;
5492 // For now only apply this when the splat is used by a shift instruction.
5493 if (!UI->isShift()) continue;
5495 // Everything checks out, sink the shuffle if the user's block doesn't
5496 // already have a copy.
5497 Instruction *&InsertedShuffle = InsertedShuffles[UserBB];
5499 if (!InsertedShuffle) {
5500 BasicBlock::iterator InsertPt = UserBB->getFirstInsertionPt();
5501 assert(InsertPt != UserBB->end());
5503 new ShuffleVectorInst(SVI->getOperand(0), SVI->getOperand(1),
5504 SVI->getOperand(2), "", &*InsertPt);
5507 UI->replaceUsesOfWith(SVI, InsertedShuffle);
5511 // If we removed all uses, nuke the shuffle.
5512 if (SVI->use_empty()) {
5513 SVI->eraseFromParent();
5520 bool CodeGenPrepare::optimizeSwitchInst(SwitchInst *SI) {
5524 Value *Cond = SI->getCondition();
5525 Type *OldType = Cond->getType();
5526 LLVMContext &Context = Cond->getContext();
5527 MVT RegType = TLI->getRegisterType(Context, TLI->getValueType(*DL, OldType));
5528 unsigned RegWidth = RegType.getSizeInBits();
5530 if (RegWidth <= cast<IntegerType>(OldType)->getBitWidth())
5533 // If the register width is greater than the type width, expand the condition
5534 // of the switch instruction and each case constant to the width of the
5535 // register. By widening the type of the switch condition, subsequent
5536 // comparisons (for case comparisons) will not need to be extended to the
5537 // preferred register width, so we will potentially eliminate N-1 extends,
5538 // where N is the number of cases in the switch.
5539 auto *NewType = Type::getIntNTy(Context, RegWidth);
5541 // Zero-extend the switch condition and case constants unless the switch
5542 // condition is a function argument that is already being sign-extended.
5543 // In that case, we can avoid an unnecessary mask/extension by sign-extending
5544 // everything instead.
5545 Instruction::CastOps ExtType = Instruction::ZExt;
5546 if (auto *Arg = dyn_cast<Argument>(Cond))
5547 if (Arg->hasSExtAttr())
5548 ExtType = Instruction::SExt;
5550 auto *ExtInst = CastInst::Create(ExtType, Cond, NewType);
5551 ExtInst->insertBefore(SI);
5552 SI->setCondition(ExtInst);
5553 for (auto Case : SI->cases()) {
5554 APInt NarrowConst = Case.getCaseValue()->getValue();
5555 APInt WideConst = (ExtType == Instruction::ZExt) ?
5556 NarrowConst.zext(RegWidth) : NarrowConst.sext(RegWidth);
5557 Case.setValue(ConstantInt::get(Context, WideConst));
5565 /// \brief Helper class to promote a scalar operation to a vector one.
5566 /// This class is used to move downward extractelement transition.
5568 /// a = vector_op <2 x i32>
5569 /// b = extractelement <2 x i32> a, i32 0
5574 /// a = vector_op <2 x i32>
5575 /// c = vector_op a (equivalent to scalar_op on the related lane)
5576 /// * d = extractelement <2 x i32> c, i32 0
5578 /// Assuming both extractelement and store can be combine, we get rid of the
5580 class VectorPromoteHelper {
5581 /// DataLayout associated with the current module.
5582 const DataLayout &DL;
5584 /// Used to perform some checks on the legality of vector operations.
5585 const TargetLowering &TLI;
5587 /// Used to estimated the cost of the promoted chain.
5588 const TargetTransformInfo &TTI;
5590 /// The transition being moved downwards.
5591 Instruction *Transition;
5592 /// The sequence of instructions to be promoted.
5593 SmallVector<Instruction *, 4> InstsToBePromoted;
5594 /// Cost of combining a store and an extract.
5595 unsigned StoreExtractCombineCost;
5596 /// Instruction that will be combined with the transition.
5597 Instruction *CombineInst;
5599 /// \brief The instruction that represents the current end of the transition.
5600 /// Since we are faking the promotion until we reach the end of the chain
5601 /// of computation, we need a way to get the current end of the transition.
5602 Instruction *getEndOfTransition() const {
5603 if (InstsToBePromoted.empty())
5605 return InstsToBePromoted.back();
5608 /// \brief Return the index of the original value in the transition.
5609 /// E.g., for "extractelement <2 x i32> c, i32 1" the original value,
5610 /// c, is at index 0.
5611 unsigned getTransitionOriginalValueIdx() const {
5612 assert(isa<ExtractElementInst>(Transition) &&
5613 "Other kind of transitions are not supported yet");
5617 /// \brief Return the index of the index in the transition.
5618 /// E.g., for "extractelement <2 x i32> c, i32 0" the index
5620 unsigned getTransitionIdx() const {
5621 assert(isa<ExtractElementInst>(Transition) &&
5622 "Other kind of transitions are not supported yet");
5626 /// \brief Get the type of the transition.
5627 /// This is the type of the original value.
5628 /// E.g., for "extractelement <2 x i32> c, i32 1" the type of the
5629 /// transition is <2 x i32>.
5630 Type *getTransitionType() const {
5631 return Transition->getOperand(getTransitionOriginalValueIdx())->getType();
5634 /// \brief Promote \p ToBePromoted by moving \p Def downward through.
5635 /// I.e., we have the following sequence:
5636 /// Def = Transition <ty1> a to <ty2>
5637 /// b = ToBePromoted <ty2> Def, ...
5639 /// b = ToBePromoted <ty1> a, ...
5640 /// Def = Transition <ty1> ToBePromoted to <ty2>
5641 void promoteImpl(Instruction *ToBePromoted);
5643 /// \brief Check whether or not it is profitable to promote all the
5644 /// instructions enqueued to be promoted.
5645 bool isProfitableToPromote() {
5646 Value *ValIdx = Transition->getOperand(getTransitionOriginalValueIdx());
5647 unsigned Index = isa<ConstantInt>(ValIdx)
5648 ? cast<ConstantInt>(ValIdx)->getZExtValue()
5650 Type *PromotedType = getTransitionType();
5652 StoreInst *ST = cast<StoreInst>(CombineInst);
5653 unsigned AS = ST->getPointerAddressSpace();
5654 unsigned Align = ST->getAlignment();
5655 // Check if this store is supported.
5656 if (!TLI.allowsMisalignedMemoryAccesses(
5657 TLI.getValueType(DL, ST->getValueOperand()->getType()), AS,
5659 // If this is not supported, there is no way we can combine
5660 // the extract with the store.
5664 // The scalar chain of computation has to pay for the transition
5665 // scalar to vector.
5666 // The vector chain has to account for the combining cost.
5667 uint64_t ScalarCost =
5668 TTI.getVectorInstrCost(Transition->getOpcode(), PromotedType, Index);
5669 uint64_t VectorCost = StoreExtractCombineCost;
5670 for (const auto &Inst : InstsToBePromoted) {
5671 // Compute the cost.
5672 // By construction, all instructions being promoted are arithmetic ones.
5673 // Moreover, one argument is a constant that can be viewed as a splat
5675 Value *Arg0 = Inst->getOperand(0);
5676 bool IsArg0Constant = isa<UndefValue>(Arg0) || isa<ConstantInt>(Arg0) ||
5677 isa<ConstantFP>(Arg0);
5678 TargetTransformInfo::OperandValueKind Arg0OVK =
5679 IsArg0Constant ? TargetTransformInfo::OK_UniformConstantValue
5680 : TargetTransformInfo::OK_AnyValue;
5681 TargetTransformInfo::OperandValueKind Arg1OVK =
5682 !IsArg0Constant ? TargetTransformInfo::OK_UniformConstantValue
5683 : TargetTransformInfo::OK_AnyValue;
5684 ScalarCost += TTI.getArithmeticInstrCost(
5685 Inst->getOpcode(), Inst->getType(), Arg0OVK, Arg1OVK);
5686 VectorCost += TTI.getArithmeticInstrCost(Inst->getOpcode(), PromotedType,
5689 DEBUG(dbgs() << "Estimated cost of computation to be promoted:\nScalar: "
5690 << ScalarCost << "\nVector: " << VectorCost << '\n');
5691 return ScalarCost > VectorCost;
5694 /// \brief Generate a constant vector with \p Val with the same
5695 /// number of elements as the transition.
5696 /// \p UseSplat defines whether or not \p Val should be replicated
5697 /// across the whole vector.
5698 /// In other words, if UseSplat == true, we generate <Val, Val, ..., Val>,
5699 /// otherwise we generate a vector with as many undef as possible:
5700 /// <undef, ..., undef, Val, undef, ..., undef> where \p Val is only
5701 /// used at the index of the extract.
5702 Value *getConstantVector(Constant *Val, bool UseSplat) const {
5703 unsigned ExtractIdx = UINT_MAX;
5705 // If we cannot determine where the constant must be, we have to
5706 // use a splat constant.
5707 Value *ValExtractIdx = Transition->getOperand(getTransitionIdx());
5708 if (ConstantInt *CstVal = dyn_cast<ConstantInt>(ValExtractIdx))
5709 ExtractIdx = CstVal->getSExtValue();
5714 unsigned End = getTransitionType()->getVectorNumElements();
5716 return ConstantVector::getSplat(End, Val);
5718 SmallVector<Constant *, 4> ConstVec;
5719 UndefValue *UndefVal = UndefValue::get(Val->getType());
5720 for (unsigned Idx = 0; Idx != End; ++Idx) {
5721 if (Idx == ExtractIdx)
5722 ConstVec.push_back(Val);
5724 ConstVec.push_back(UndefVal);
5726 return ConstantVector::get(ConstVec);
5729 /// \brief Check if promoting to a vector type an operand at \p OperandIdx
5730 /// in \p Use can trigger undefined behavior.
5731 static bool canCauseUndefinedBehavior(const Instruction *Use,
5732 unsigned OperandIdx) {
5733 // This is not safe to introduce undef when the operand is on
5734 // the right hand side of a division-like instruction.
5735 if (OperandIdx != 1)
5737 switch (Use->getOpcode()) {
5740 case Instruction::SDiv:
5741 case Instruction::UDiv:
5742 case Instruction::SRem:
5743 case Instruction::URem:
5745 case Instruction::FDiv:
5746 case Instruction::FRem:
5747 return !Use->hasNoNaNs();
5749 llvm_unreachable(nullptr);
5753 VectorPromoteHelper(const DataLayout &DL, const TargetLowering &TLI,
5754 const TargetTransformInfo &TTI, Instruction *Transition,
5755 unsigned CombineCost)
5756 : DL(DL), TLI(TLI), TTI(TTI), Transition(Transition),
5757 StoreExtractCombineCost(CombineCost), CombineInst(nullptr) {
5758 assert(Transition && "Do not know how to promote null");
5761 /// \brief Check if we can promote \p ToBePromoted to \p Type.
5762 bool canPromote(const Instruction *ToBePromoted) const {
5763 // We could support CastInst too.
5764 return isa<BinaryOperator>(ToBePromoted);
5767 /// \brief Check if it is profitable to promote \p ToBePromoted
5768 /// by moving downward the transition through.
5769 bool shouldPromote(const Instruction *ToBePromoted) const {
5770 // Promote only if all the operands can be statically expanded.
5771 // Indeed, we do not want to introduce any new kind of transitions.
5772 for (const Use &U : ToBePromoted->operands()) {
5773 const Value *Val = U.get();
5774 if (Val == getEndOfTransition()) {
5775 // If the use is a division and the transition is on the rhs,
5776 // we cannot promote the operation, otherwise we may create a
5777 // division by zero.
5778 if (canCauseUndefinedBehavior(ToBePromoted, U.getOperandNo()))
5782 if (!isa<ConstantInt>(Val) && !isa<UndefValue>(Val) &&
5783 !isa<ConstantFP>(Val))
5786 // Check that the resulting operation is legal.
5787 int ISDOpcode = TLI.InstructionOpcodeToISD(ToBePromoted->getOpcode());
5790 return StressStoreExtract ||
5791 TLI.isOperationLegalOrCustom(
5792 ISDOpcode, TLI.getValueType(DL, getTransitionType(), true));
5795 /// \brief Check whether or not \p Use can be combined
5796 /// with the transition.
5797 /// I.e., is it possible to do Use(Transition) => AnotherUse?
5798 bool canCombine(const Instruction *Use) { return isa<StoreInst>(Use); }
5800 /// \brief Record \p ToBePromoted as part of the chain to be promoted.
5801 void enqueueForPromotion(Instruction *ToBePromoted) {
5802 InstsToBePromoted.push_back(ToBePromoted);
5805 /// \brief Set the instruction that will be combined with the transition.
5806 void recordCombineInstruction(Instruction *ToBeCombined) {
5807 assert(canCombine(ToBeCombined) && "Unsupported instruction to combine");
5808 CombineInst = ToBeCombined;
5811 /// \brief Promote all the instructions enqueued for promotion if it is
5813 /// \return True if the promotion happened, false otherwise.
5815 // Check if there is something to promote.
5816 // Right now, if we do not have anything to combine with,
5817 // we assume the promotion is not profitable.
5818 if (InstsToBePromoted.empty() || !CombineInst)
5822 if (!StressStoreExtract && !isProfitableToPromote())
5826 for (auto &ToBePromoted : InstsToBePromoted)
5827 promoteImpl(ToBePromoted);
5828 InstsToBePromoted.clear();
5832 } // End of anonymous namespace.
5834 void VectorPromoteHelper::promoteImpl(Instruction *ToBePromoted) {
5835 // At this point, we know that all the operands of ToBePromoted but Def
5836 // can be statically promoted.
5837 // For Def, we need to use its parameter in ToBePromoted:
5838 // b = ToBePromoted ty1 a
5839 // Def = Transition ty1 b to ty2
5840 // Move the transition down.
5841 // 1. Replace all uses of the promoted operation by the transition.
5842 // = ... b => = ... Def.
5843 assert(ToBePromoted->getType() == Transition->getType() &&
5844 "The type of the result of the transition does not match "
5846 ToBePromoted->replaceAllUsesWith(Transition);
5847 // 2. Update the type of the uses.
5848 // b = ToBePromoted ty2 Def => b = ToBePromoted ty1 Def.
5849 Type *TransitionTy = getTransitionType();
5850 ToBePromoted->mutateType(TransitionTy);
5851 // 3. Update all the operands of the promoted operation with promoted
5853 // b = ToBePromoted ty1 Def => b = ToBePromoted ty1 a.
5854 for (Use &U : ToBePromoted->operands()) {
5855 Value *Val = U.get();
5856 Value *NewVal = nullptr;
5857 if (Val == Transition)
5858 NewVal = Transition->getOperand(getTransitionOriginalValueIdx());
5859 else if (isa<UndefValue>(Val) || isa<ConstantInt>(Val) ||
5860 isa<ConstantFP>(Val)) {
5861 // Use a splat constant if it is not safe to use undef.
5862 NewVal = getConstantVector(
5863 cast<Constant>(Val),
5864 isa<UndefValue>(Val) ||
5865 canCauseUndefinedBehavior(ToBePromoted, U.getOperandNo()));
5867 llvm_unreachable("Did you modified shouldPromote and forgot to update "
5869 ToBePromoted->setOperand(U.getOperandNo(), NewVal);
5871 Transition->removeFromParent();
5872 Transition->insertAfter(ToBePromoted);
5873 Transition->setOperand(getTransitionOriginalValueIdx(), ToBePromoted);
5876 /// Some targets can do store(extractelement) with one instruction.
5877 /// Try to push the extractelement towards the stores when the target
5878 /// has this feature and this is profitable.
5879 bool CodeGenPrepare::optimizeExtractElementInst(Instruction *Inst) {
5880 unsigned CombineCost = UINT_MAX;
5881 if (DisableStoreExtract || !TLI ||
5882 (!StressStoreExtract &&
5883 !TLI->canCombineStoreAndExtract(Inst->getOperand(0)->getType(),
5884 Inst->getOperand(1), CombineCost)))
5887 // At this point we know that Inst is a vector to scalar transition.
5888 // Try to move it down the def-use chain, until:
5889 // - We can combine the transition with its single use
5890 // => we got rid of the transition.
5891 // - We escape the current basic block
5892 // => we would need to check that we are moving it at a cheaper place and
5893 // we do not do that for now.
5894 BasicBlock *Parent = Inst->getParent();
5895 DEBUG(dbgs() << "Found an interesting transition: " << *Inst << '\n');
5896 VectorPromoteHelper VPH(*DL, *TLI, *TTI, Inst, CombineCost);
5897 // If the transition has more than one use, assume this is not going to be
5899 while (Inst->hasOneUse()) {
5900 Instruction *ToBePromoted = cast<Instruction>(*Inst->user_begin());
5901 DEBUG(dbgs() << "Use: " << *ToBePromoted << '\n');
5903 if (ToBePromoted->getParent() != Parent) {
5904 DEBUG(dbgs() << "Instruction to promote is in a different block ("
5905 << ToBePromoted->getParent()->getName()
5906 << ") than the transition (" << Parent->getName() << ").\n");
5910 if (VPH.canCombine(ToBePromoted)) {
5911 DEBUG(dbgs() << "Assume " << *Inst << '\n'
5912 << "will be combined with: " << *ToBePromoted << '\n');
5913 VPH.recordCombineInstruction(ToBePromoted);
5914 bool Changed = VPH.promote();
5915 NumStoreExtractExposed += Changed;
5919 DEBUG(dbgs() << "Try promoting.\n");
5920 if (!VPH.canPromote(ToBePromoted) || !VPH.shouldPromote(ToBePromoted))
5923 DEBUG(dbgs() << "Promoting is possible... Enqueue for promotion!\n");
5925 VPH.enqueueForPromotion(ToBePromoted);
5926 Inst = ToBePromoted;
5931 /// For the instruction sequence of store below, F and I values
5932 /// are bundled together as an i64 value before being stored into memory.
5933 /// Sometimes it is more efficent to generate separate stores for F and I,
5934 /// which can remove the bitwise instructions or sink them to colder places.
5936 /// (store (or (zext (bitcast F to i32) to i64),
5937 /// (shl (zext I to i64), 32)), addr) -->
5938 /// (store F, addr) and (store I, addr+4)
5940 /// Similarly, splitting for other merged store can also be beneficial, like:
5941 /// For pair of {i32, i32}, i64 store --> two i32 stores.
5942 /// For pair of {i32, i16}, i64 store --> two i32 stores.
5943 /// For pair of {i16, i16}, i32 store --> two i16 stores.
5944 /// For pair of {i16, i8}, i32 store --> two i16 stores.
5945 /// For pair of {i8, i8}, i16 store --> two i8 stores.
5947 /// We allow each target to determine specifically which kind of splitting is
5950 /// The store patterns are commonly seen from the simple code snippet below
5951 /// if only std::make_pair(...) is sroa transformed before inlined into hoo.
5952 /// void goo(const std::pair<int, float> &);
5955 /// goo(std::make_pair(tmp, ftmp));
5959 /// Although we already have similar splitting in DAG Combine, we duplicate
5960 /// it in CodeGenPrepare to catch the case in which pattern is across
5961 /// multiple BBs. The logic in DAG Combine is kept to catch case generated
5962 /// during code expansion.
5963 static bool splitMergedValStore(StoreInst &SI, const DataLayout &DL,
5964 const TargetLowering &TLI) {
5965 // Handle simple but common cases only.
5966 Type *StoreType = SI.getValueOperand()->getType();
5967 if (DL.getTypeStoreSizeInBits(StoreType) != DL.getTypeSizeInBits(StoreType) ||
5968 DL.getTypeSizeInBits(StoreType) == 0)
5971 unsigned HalfValBitSize = DL.getTypeSizeInBits(StoreType) / 2;
5972 Type *SplitStoreType = Type::getIntNTy(SI.getContext(), HalfValBitSize);
5973 if (DL.getTypeStoreSizeInBits(SplitStoreType) !=
5974 DL.getTypeSizeInBits(SplitStoreType))
5977 // Match the following patterns:
5978 // (store (or (zext LValue to i64),
5979 // (shl (zext HValue to i64), 32)), HalfValBitSize)
5981 // (store (or (shl (zext HValue to i64), 32)), HalfValBitSize)
5982 // (zext LValue to i64),
5983 // Expect both operands of OR and the first operand of SHL have only
5985 Value *LValue, *HValue;
5986 if (!match(SI.getValueOperand(),
5987 m_c_Or(m_OneUse(m_ZExt(m_Value(LValue))),
5988 m_OneUse(m_Shl(m_OneUse(m_ZExt(m_Value(HValue))),
5989 m_SpecificInt(HalfValBitSize))))))
5992 // Check LValue and HValue are int with size less or equal than 32.
5993 if (!LValue->getType()->isIntegerTy() ||
5994 DL.getTypeSizeInBits(LValue->getType()) > HalfValBitSize ||
5995 !HValue->getType()->isIntegerTy() ||
5996 DL.getTypeSizeInBits(HValue->getType()) > HalfValBitSize)
5999 // If LValue/HValue is a bitcast instruction, use the EVT before bitcast
6000 // as the input of target query.
6001 auto *LBC = dyn_cast<BitCastInst>(LValue);
6002 auto *HBC = dyn_cast<BitCastInst>(HValue);
6003 EVT LowTy = LBC ? EVT::getEVT(LBC->getOperand(0)->getType())
6004 : EVT::getEVT(LValue->getType());
6005 EVT HighTy = HBC ? EVT::getEVT(HBC->getOperand(0)->getType())
6006 : EVT::getEVT(HValue->getType());
6007 if (!ForceSplitStore && !TLI.isMultiStoresCheaperThanBitsMerge(LowTy, HighTy))
6010 // Start to split store.
6011 IRBuilder<> Builder(SI.getContext());
6012 Builder.SetInsertPoint(&SI);
6014 // If LValue/HValue is a bitcast in another BB, create a new one in current
6015 // BB so it may be merged with the splitted stores by dag combiner.
6016 if (LBC && LBC->getParent() != SI.getParent())
6017 LValue = Builder.CreateBitCast(LBC->getOperand(0), LBC->getType());
6018 if (HBC && HBC->getParent() != SI.getParent())
6019 HValue = Builder.CreateBitCast(HBC->getOperand(0), HBC->getType());
6021 auto CreateSplitStore = [&](Value *V, bool Upper) {
6022 V = Builder.CreateZExtOrBitCast(V, SplitStoreType);
6023 Value *Addr = Builder.CreateBitCast(
6025 SplitStoreType->getPointerTo(SI.getPointerAddressSpace()));
6027 Addr = Builder.CreateGEP(
6028 SplitStoreType, Addr,
6029 ConstantInt::get(Type::getInt32Ty(SI.getContext()), 1));
6030 Builder.CreateAlignedStore(
6031 V, Addr, Upper ? SI.getAlignment() / 2 : SI.getAlignment());
6034 CreateSplitStore(LValue, false);
6035 CreateSplitStore(HValue, true);
6037 // Delete the old store.
6038 SI.eraseFromParent();
6042 bool CodeGenPrepare::optimizeInst(Instruction *I, bool &ModifiedDT) {
6043 // Bail out if we inserted the instruction to prevent optimizations from
6044 // stepping on each other's toes.
6045 if (InsertedInsts.count(I))
6048 if (PHINode *P = dyn_cast<PHINode>(I)) {
6049 // It is possible for very late stage optimizations (such as SimplifyCFG)
6050 // to introduce PHI nodes too late to be cleaned up. If we detect such a
6051 // trivial PHI, go ahead and zap it here.
6052 if (Value *V = SimplifyInstruction(P, {*DL, TLInfo})) {
6053 P->replaceAllUsesWith(V);
6054 P->eraseFromParent();
6061 if (CastInst *CI = dyn_cast<CastInst>(I)) {
6062 // If the source of the cast is a constant, then this should have
6063 // already been constant folded. The only reason NOT to constant fold
6064 // it is if something (e.g. LSR) was careful to place the constant
6065 // evaluation in a block other than then one that uses it (e.g. to hoist
6066 // the address of globals out of a loop). If this is the case, we don't
6067 // want to forward-subst the cast.
6068 if (isa<Constant>(CI->getOperand(0)))
6071 if (TLI && OptimizeNoopCopyExpression(CI, *TLI, *DL))
6074 if (isa<ZExtInst>(I) || isa<SExtInst>(I)) {
6075 /// Sink a zext or sext into its user blocks if the target type doesn't
6076 /// fit in one register
6078 TLI->getTypeAction(CI->getContext(),
6079 TLI->getValueType(*DL, CI->getType())) ==
6080 TargetLowering::TypeExpandInteger) {
6081 return SinkCast(CI);
6083 bool MadeChange = optimizeExt(I);
6084 return MadeChange | optimizeExtUses(I);
6090 if (CmpInst *CI = dyn_cast<CmpInst>(I))
6091 if (!TLI || !TLI->hasMultipleConditionRegisters())
6092 return OptimizeCmpExpression(CI, TLI);
6094 if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
6095 LI->setMetadata(LLVMContext::MD_invariant_group, nullptr);
6097 bool Modified = optimizeLoadExt(LI);
6098 unsigned AS = LI->getPointerAddressSpace();
6099 Modified |= optimizeMemoryInst(I, I->getOperand(0), LI->getType(), AS);
6105 if (StoreInst *SI = dyn_cast<StoreInst>(I)) {
6106 if (TLI && splitMergedValStore(*SI, *DL, *TLI))
6108 SI->setMetadata(LLVMContext::MD_invariant_group, nullptr);
6110 unsigned AS = SI->getPointerAddressSpace();
6111 return optimizeMemoryInst(I, SI->getOperand(1),
6112 SI->getOperand(0)->getType(), AS);
6117 if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(I)) {
6118 unsigned AS = RMW->getPointerAddressSpace();
6119 return optimizeMemoryInst(I, RMW->getPointerOperand(),
6120 RMW->getType(), AS);
6123 if (AtomicCmpXchgInst *CmpX = dyn_cast<AtomicCmpXchgInst>(I)) {
6124 unsigned AS = CmpX->getPointerAddressSpace();
6125 return optimizeMemoryInst(I, CmpX->getPointerOperand(),
6126 CmpX->getCompareOperand()->getType(), AS);
6129 BinaryOperator *BinOp = dyn_cast<BinaryOperator>(I);
6131 if (BinOp && (BinOp->getOpcode() == Instruction::And) &&
6132 EnableAndCmpSinking && TLI)
6133 return sinkAndCmp0Expression(BinOp, *TLI, InsertedInsts);
6135 if (BinOp && (BinOp->getOpcode() == Instruction::AShr ||
6136 BinOp->getOpcode() == Instruction::LShr)) {
6137 ConstantInt *CI = dyn_cast<ConstantInt>(BinOp->getOperand(1));
6138 if (TLI && CI && TLI->hasExtractBitsInsn())
6139 return OptimizeExtractBits(BinOp, CI, *TLI, *DL);
6144 if (GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(I)) {
6145 if (GEPI->hasAllZeroIndices()) {
6146 /// The GEP operand must be a pointer, so must its result -> BitCast
6147 Instruction *NC = new BitCastInst(GEPI->getOperand(0), GEPI->getType(),
6148 GEPI->getName(), GEPI);
6149 GEPI->replaceAllUsesWith(NC);
6150 GEPI->eraseFromParent();
6152 optimizeInst(NC, ModifiedDT);
6158 if (CallInst *CI = dyn_cast<CallInst>(I))
6159 return optimizeCallInst(CI, ModifiedDT);
6161 if (SelectInst *SI = dyn_cast<SelectInst>(I))
6162 return optimizeSelectInst(SI);
6164 if (ShuffleVectorInst *SVI = dyn_cast<ShuffleVectorInst>(I))
6165 return optimizeShuffleVectorInst(SVI);
6167 if (auto *Switch = dyn_cast<SwitchInst>(I))
6168 return optimizeSwitchInst(Switch);
6170 if (isa<ExtractElementInst>(I))
6171 return optimizeExtractElementInst(I);
6176 /// Given an OR instruction, check to see if this is a bitreverse
6177 /// idiom. If so, insert the new intrinsic and return true.
6178 static bool makeBitReverse(Instruction &I, const DataLayout &DL,
6179 const TargetLowering &TLI) {
6180 if (!I.getType()->isIntegerTy() ||
6181 !TLI.isOperationLegalOrCustom(ISD::BITREVERSE,
6182 TLI.getValueType(DL, I.getType(), true)))
6185 SmallVector<Instruction*, 4> Insts;
6186 if (!recognizeBSwapOrBitReverseIdiom(&I, false, true, Insts))
6188 Instruction *LastInst = Insts.back();
6189 I.replaceAllUsesWith(LastInst);
6190 RecursivelyDeleteTriviallyDeadInstructions(&I);
6194 // In this pass we look for GEP and cast instructions that are used
6195 // across basic blocks and rewrite them to improve basic-block-at-a-time
6197 bool CodeGenPrepare::optimizeBlock(BasicBlock &BB, bool &ModifiedDT) {
6199 bool MadeChange = false;
6201 CurInstIterator = BB.begin();
6202 while (CurInstIterator != BB.end()) {
6203 MadeChange |= optimizeInst(&*CurInstIterator++, ModifiedDT);
6208 bool MadeBitReverse = true;
6209 while (TLI && MadeBitReverse) {
6210 MadeBitReverse = false;
6211 for (auto &I : reverse(BB)) {
6212 if (makeBitReverse(I, *DL, *TLI)) {
6213 MadeBitReverse = MadeChange = true;
6219 MadeChange |= dupRetToEnableTailCallOpts(&BB);
6224 // llvm.dbg.value is far away from the value then iSel may not be able
6225 // handle it properly. iSel will drop llvm.dbg.value if it can not
6226 // find a node corresponding to the value.
6227 bool CodeGenPrepare::placeDbgValues(Function &F) {
6228 bool MadeChange = false;
6229 for (BasicBlock &BB : F) {
6230 Instruction *PrevNonDbgInst = nullptr;
6231 for (BasicBlock::iterator BI = BB.begin(), BE = BB.end(); BI != BE;) {
6232 Instruction *Insn = &*BI++;
6233 DbgValueInst *DVI = dyn_cast<DbgValueInst>(Insn);
6234 // Leave dbg.values that refer to an alloca alone. These
6235 // instrinsics describe the address of a variable (= the alloca)
6236 // being taken. They should not be moved next to the alloca
6237 // (and to the beginning of the scope), but rather stay close to
6238 // where said address is used.
6239 if (!DVI || (DVI->getValue() && isa<AllocaInst>(DVI->getValue()))) {
6240 PrevNonDbgInst = Insn;
6244 Instruction *VI = dyn_cast_or_null<Instruction>(DVI->getValue());
6245 if (VI && VI != PrevNonDbgInst && !VI->isTerminator()) {
6246 // If VI is a phi in a block with an EHPad terminator, we can't insert
6248 if (isa<PHINode>(VI) && VI->getParent()->getTerminator()->isEHPad())
6250 DEBUG(dbgs() << "Moving Debug Value before :\n" << *DVI << ' ' << *VI);
6251 DVI->removeFromParent();
6252 if (isa<PHINode>(VI))
6253 DVI->insertBefore(&*VI->getParent()->getFirstInsertionPt());
6255 DVI->insertAfter(VI);
6264 /// \brief Scale down both weights to fit into uint32_t.
6265 static void scaleWeights(uint64_t &NewTrue, uint64_t &NewFalse) {
6266 uint64_t NewMax = (NewTrue > NewFalse) ? NewTrue : NewFalse;
6267 uint32_t Scale = (NewMax / UINT32_MAX) + 1;
6268 NewTrue = NewTrue / Scale;
6269 NewFalse = NewFalse / Scale;
6272 /// \brief Some targets prefer to split a conditional branch like:
6274 /// %0 = icmp ne i32 %a, 0
6275 /// %1 = icmp ne i32 %b, 0
6276 /// %or.cond = or i1 %0, %1
6277 /// br i1 %or.cond, label %TrueBB, label %FalseBB
6279 /// into multiple branch instructions like:
6282 /// %0 = icmp ne i32 %a, 0
6283 /// br i1 %0, label %TrueBB, label %bb2
6285 /// %1 = icmp ne i32 %b, 0
6286 /// br i1 %1, label %TrueBB, label %FalseBB
6288 /// This usually allows instruction selection to do even further optimizations
6289 /// and combine the compare with the branch instruction. Currently this is
6290 /// applied for targets which have "cheap" jump instructions.
6292 /// FIXME: Remove the (equivalent?) implementation in SelectionDAG.
6294 bool CodeGenPrepare::splitBranchCondition(Function &F) {
6295 if (!TM || !TM->Options.EnableFastISel || !TLI || TLI->isJumpExpensive())
6298 bool MadeChange = false;
6299 for (auto &BB : F) {
6300 // Does this BB end with the following?
6301 // %cond1 = icmp|fcmp|binary instruction ...
6302 // %cond2 = icmp|fcmp|binary instruction ...
6303 // %cond.or = or|and i1 %cond1, cond2
6304 // br i1 %cond.or label %dest1, label %dest2"
6305 BinaryOperator *LogicOp;
6306 BasicBlock *TBB, *FBB;
6307 if (!match(BB.getTerminator(), m_Br(m_OneUse(m_BinOp(LogicOp)), TBB, FBB)))
6310 auto *Br1 = cast<BranchInst>(BB.getTerminator());
6311 if (Br1->getMetadata(LLVMContext::MD_unpredictable))
6315 Value *Cond1, *Cond2;
6316 if (match(LogicOp, m_And(m_OneUse(m_Value(Cond1)),
6317 m_OneUse(m_Value(Cond2)))))
6318 Opc = Instruction::And;
6319 else if (match(LogicOp, m_Or(m_OneUse(m_Value(Cond1)),
6320 m_OneUse(m_Value(Cond2)))))
6321 Opc = Instruction::Or;
6325 if (!match(Cond1, m_CombineOr(m_Cmp(), m_BinOp())) ||
6326 !match(Cond2, m_CombineOr(m_Cmp(), m_BinOp())) )
6329 DEBUG(dbgs() << "Before branch condition splitting\n"; BB.dump());
6333 BasicBlock::Create(BB.getContext(), BB.getName() + ".cond.split",
6334 BB.getParent(), BB.getNextNode());
6336 // Update original basic block by using the first condition directly by the
6337 // branch instruction and removing the no longer needed and/or instruction.
6338 Br1->setCondition(Cond1);
6339 LogicOp->eraseFromParent();
6341 // Depending on the conditon we have to either replace the true or the false
6342 // successor of the original branch instruction.
6343 if (Opc == Instruction::And)
6344 Br1->setSuccessor(0, TmpBB);
6346 Br1->setSuccessor(1, TmpBB);
6348 // Fill in the new basic block.
6349 auto *Br2 = IRBuilder<>(TmpBB).CreateCondBr(Cond2, TBB, FBB);
6350 if (auto *I = dyn_cast<Instruction>(Cond2)) {
6351 I->removeFromParent();
6352 I->insertBefore(Br2);
6355 // Update PHI nodes in both successors. The original BB needs to be
6356 // replaced in one succesor's PHI nodes, because the branch comes now from
6357 // the newly generated BB (NewBB). In the other successor we need to add one
6358 // incoming edge to the PHI nodes, because both branch instructions target
6359 // now the same successor. Depending on the original branch condition
6360 // (and/or) we have to swap the successors (TrueDest, FalseDest), so that
6361 // we perform the correct update for the PHI nodes.
6362 // This doesn't change the successor order of the just created branch
6363 // instruction (or any other instruction).
6364 if (Opc == Instruction::Or)
6365 std::swap(TBB, FBB);
6367 // Replace the old BB with the new BB.
6368 for (auto &I : *TBB) {
6369 PHINode *PN = dyn_cast<PHINode>(&I);
6373 while ((i = PN->getBasicBlockIndex(&BB)) >= 0)
6374 PN->setIncomingBlock(i, TmpBB);
6377 // Add another incoming edge form the new BB.
6378 for (auto &I : *FBB) {
6379 PHINode *PN = dyn_cast<PHINode>(&I);
6382 auto *Val = PN->getIncomingValueForBlock(&BB);
6383 PN->addIncoming(Val, TmpBB);
6386 // Update the branch weights (from SelectionDAGBuilder::
6387 // FindMergedConditions).
6388 if (Opc == Instruction::Or) {
6389 // Codegen X | Y as:
6398 // We have flexibility in setting Prob for BB1 and Prob for NewBB.
6399 // The requirement is that
6400 // TrueProb for BB1 + (FalseProb for BB1 * TrueProb for TmpBB)
6401 // = TrueProb for orignal BB.
6402 // Assuming the orignal weights are A and B, one choice is to set BB1's
6403 // weights to A and A+2B, and set TmpBB's weights to A and 2B. This choice
6405 // TrueProb for BB1 == FalseProb for BB1 * TrueProb for TmpBB.
6406 // Another choice is to assume TrueProb for BB1 equals to TrueProb for
6407 // TmpBB, but the math is more complicated.
6408 uint64_t TrueWeight, FalseWeight;
6409 if (Br1->extractProfMetadata(TrueWeight, FalseWeight)) {
6410 uint64_t NewTrueWeight = TrueWeight;
6411 uint64_t NewFalseWeight = TrueWeight + 2 * FalseWeight;
6412 scaleWeights(NewTrueWeight, NewFalseWeight);
6413 Br1->setMetadata(LLVMContext::MD_prof, MDBuilder(Br1->getContext())
6414 .createBranchWeights(TrueWeight, FalseWeight));
6416 NewTrueWeight = TrueWeight;
6417 NewFalseWeight = 2 * FalseWeight;
6418 scaleWeights(NewTrueWeight, NewFalseWeight);
6419 Br2->setMetadata(LLVMContext::MD_prof, MDBuilder(Br2->getContext())
6420 .createBranchWeights(TrueWeight, FalseWeight));
6423 // Codegen X & Y as:
6431 // This requires creation of TmpBB after CurBB.
6433 // We have flexibility in setting Prob for BB1 and Prob for TmpBB.
6434 // The requirement is that
6435 // FalseProb for BB1 + (TrueProb for BB1 * FalseProb for TmpBB)
6436 // = FalseProb for orignal BB.
6437 // Assuming the orignal weights are A and B, one choice is to set BB1's
6438 // weights to 2A+B and B, and set TmpBB's weights to 2A and B. This choice
6440 // FalseProb for BB1 == TrueProb for BB1 * FalseProb for TmpBB.
6441 uint64_t TrueWeight, FalseWeight;
6442 if (Br1->extractProfMetadata(TrueWeight, FalseWeight)) {
6443 uint64_t NewTrueWeight = 2 * TrueWeight + FalseWeight;
6444 uint64_t NewFalseWeight = FalseWeight;
6445 scaleWeights(NewTrueWeight, NewFalseWeight);
6446 Br1->setMetadata(LLVMContext::MD_prof, MDBuilder(Br1->getContext())
6447 .createBranchWeights(TrueWeight, FalseWeight));
6449 NewTrueWeight = 2 * TrueWeight;
6450 NewFalseWeight = FalseWeight;
6451 scaleWeights(NewTrueWeight, NewFalseWeight);
6452 Br2->setMetadata(LLVMContext::MD_prof, MDBuilder(Br2->getContext())
6453 .createBranchWeights(TrueWeight, FalseWeight));
6457 // Note: No point in getting fancy here, since the DT info is never
6458 // available to CodeGenPrepare.
6463 DEBUG(dbgs() << "After branch condition splitting\n"; BB.dump();