1 //===- CodeGenPrepare.cpp - Prepare a function for code generation --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass munges the code in the input function to better prepare it for
11 // SelectionDAG-based code generation. This works around limitations in it's
12 // basic-block-at-a-time approach. It should eventually be removed.
14 //===----------------------------------------------------------------------===//
16 #include "llvm/ADT/APInt.h"
17 #include "llvm/ADT/ArrayRef.h"
18 #include "llvm/ADT/DenseMap.h"
19 #include "llvm/ADT/PointerIntPair.h"
20 #include "llvm/ADT/STLExtras.h"
21 #include "llvm/ADT/SmallPtrSet.h"
22 #include "llvm/ADT/SmallVector.h"
23 #include "llvm/ADT/Statistic.h"
24 #include "llvm/Analysis/BlockFrequencyInfo.h"
25 #include "llvm/Analysis/BranchProbabilityInfo.h"
26 #include "llvm/Analysis/ConstantFolding.h"
27 #include "llvm/Analysis/InstructionSimplify.h"
28 #include "llvm/Analysis/LoopInfo.h"
29 #include "llvm/Analysis/MemoryBuiltins.h"
30 #include "llvm/Analysis/ProfileSummaryInfo.h"
31 #include "llvm/Analysis/TargetLibraryInfo.h"
32 #include "llvm/Analysis/TargetTransformInfo.h"
33 #include "llvm/Transforms/Utils/Local.h"
34 #include "llvm/Analysis/ValueTracking.h"
35 #include "llvm/CodeGen/Analysis.h"
36 #include "llvm/CodeGen/ISDOpcodes.h"
37 #include "llvm/CodeGen/SelectionDAGNodes.h"
38 #include "llvm/CodeGen/TargetLowering.h"
39 #include "llvm/CodeGen/TargetPassConfig.h"
40 #include "llvm/CodeGen/TargetSubtargetInfo.h"
41 #include "llvm/CodeGen/ValueTypes.h"
42 #include "llvm/Config/llvm-config.h"
43 #include "llvm/IR/Argument.h"
44 #include "llvm/IR/Attributes.h"
45 #include "llvm/IR/BasicBlock.h"
46 #include "llvm/IR/CallSite.h"
47 #include "llvm/IR/Constant.h"
48 #include "llvm/IR/Constants.h"
49 #include "llvm/IR/DataLayout.h"
50 #include "llvm/IR/DerivedTypes.h"
51 #include "llvm/IR/Dominators.h"
52 #include "llvm/IR/Function.h"
53 #include "llvm/IR/GetElementPtrTypeIterator.h"
54 #include "llvm/IR/GlobalValue.h"
55 #include "llvm/IR/GlobalVariable.h"
56 #include "llvm/IR/IRBuilder.h"
57 #include "llvm/IR/InlineAsm.h"
58 #include "llvm/IR/InstrTypes.h"
59 #include "llvm/IR/Instruction.h"
60 #include "llvm/IR/Instructions.h"
61 #include "llvm/IR/IntrinsicInst.h"
62 #include "llvm/IR/Intrinsics.h"
63 #include "llvm/IR/LLVMContext.h"
64 #include "llvm/IR/MDBuilder.h"
65 #include "llvm/IR/Module.h"
66 #include "llvm/IR/Operator.h"
67 #include "llvm/IR/PatternMatch.h"
68 #include "llvm/IR/Statepoint.h"
69 #include "llvm/IR/Type.h"
70 #include "llvm/IR/Use.h"
71 #include "llvm/IR/User.h"
72 #include "llvm/IR/Value.h"
73 #include "llvm/IR/ValueHandle.h"
74 #include "llvm/IR/ValueMap.h"
75 #include "llvm/Pass.h"
76 #include "llvm/Support/BlockFrequency.h"
77 #include "llvm/Support/BranchProbability.h"
78 #include "llvm/Support/Casting.h"
79 #include "llvm/Support/CommandLine.h"
80 #include "llvm/Support/Compiler.h"
81 #include "llvm/Support/Debug.h"
82 #include "llvm/Support/ErrorHandling.h"
83 #include "llvm/Support/MachineValueType.h"
84 #include "llvm/Support/MathExtras.h"
85 #include "llvm/Support/raw_ostream.h"
86 #include "llvm/Target/TargetMachine.h"
87 #include "llvm/Target/TargetOptions.h"
88 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
89 #include "llvm/Transforms/Utils/BypassSlowDivision.h"
90 #include "llvm/Transforms/Utils/SimplifyLibCalls.h"
100 using namespace llvm;
101 using namespace llvm::PatternMatch;
103 #define DEBUG_TYPE "codegenprepare"
105 STATISTIC(NumBlocksElim, "Number of blocks eliminated");
106 STATISTIC(NumPHIsElim, "Number of trivial PHIs eliminated");
107 STATISTIC(NumGEPsElim, "Number of GEPs converted to casts");
108 STATISTIC(NumCmpUses, "Number of uses of Cmp expressions replaced with uses of "
110 STATISTIC(NumCastUses, "Number of uses of Cast expressions replaced with uses "
112 STATISTIC(NumMemoryInsts, "Number of memory instructions whose address "
113 "computations were sunk");
114 STATISTIC(NumMemoryInstsPhiCreated,
115 "Number of phis created when address "
116 "computations were sunk to memory instructions");
117 STATISTIC(NumMemoryInstsSelectCreated,
118 "Number of select created when address "
119 "computations were sunk to memory instructions");
120 STATISTIC(NumExtsMoved, "Number of [s|z]ext instructions combined with loads");
121 STATISTIC(NumExtUses, "Number of uses of [s|z]ext instructions optimized");
122 STATISTIC(NumAndsAdded,
123 "Number of and mask instructions added to form ext loads");
124 STATISTIC(NumAndUses, "Number of uses of and mask instructions optimized");
125 STATISTIC(NumRetsDup, "Number of return instructions duplicated");
126 STATISTIC(NumDbgValueMoved, "Number of debug value instructions moved");
127 STATISTIC(NumSelectsExpanded, "Number of selects turned into branches");
128 STATISTIC(NumStoreExtractExposed, "Number of store(extractelement) exposed");
130 static cl::opt<bool> DisableBranchOpts(
131 "disable-cgp-branch-opts", cl::Hidden, cl::init(false),
132 cl::desc("Disable branch optimizations in CodeGenPrepare"));
135 DisableGCOpts("disable-cgp-gc-opts", cl::Hidden, cl::init(false),
136 cl::desc("Disable GC optimizations in CodeGenPrepare"));
138 static cl::opt<bool> DisableSelectToBranch(
139 "disable-cgp-select2branch", cl::Hidden, cl::init(false),
140 cl::desc("Disable select to branch conversion."));
142 static cl::opt<bool> AddrSinkUsingGEPs(
143 "addr-sink-using-gep", cl::Hidden, cl::init(true),
144 cl::desc("Address sinking in CGP using GEPs."));
146 static cl::opt<bool> EnableAndCmpSinking(
147 "enable-andcmp-sinking", cl::Hidden, cl::init(true),
148 cl::desc("Enable sinkinig and/cmp into branches."));
150 static cl::opt<bool> DisableStoreExtract(
151 "disable-cgp-store-extract", cl::Hidden, cl::init(false),
152 cl::desc("Disable store(extract) optimizations in CodeGenPrepare"));
154 static cl::opt<bool> StressStoreExtract(
155 "stress-cgp-store-extract", cl::Hidden, cl::init(false),
156 cl::desc("Stress test store(extract) optimizations in CodeGenPrepare"));
158 static cl::opt<bool> DisableExtLdPromotion(
159 "disable-cgp-ext-ld-promotion", cl::Hidden, cl::init(false),
160 cl::desc("Disable ext(promotable(ld)) -> promoted(ext(ld)) optimization in "
163 static cl::opt<bool> StressExtLdPromotion(
164 "stress-cgp-ext-ld-promotion", cl::Hidden, cl::init(false),
165 cl::desc("Stress test ext(promotable(ld)) -> promoted(ext(ld)) "
166 "optimization in CodeGenPrepare"));
168 static cl::opt<bool> DisablePreheaderProtect(
169 "disable-preheader-prot", cl::Hidden, cl::init(false),
170 cl::desc("Disable protection against removing loop preheaders"));
172 static cl::opt<bool> ProfileGuidedSectionPrefix(
173 "profile-guided-section-prefix", cl::Hidden, cl::init(true), cl::ZeroOrMore,
174 cl::desc("Use profile info to add section prefix for hot/cold functions"));
176 static cl::opt<unsigned> FreqRatioToSkipMerge(
177 "cgp-freq-ratio-to-skip-merge", cl::Hidden, cl::init(2),
178 cl::desc("Skip merging empty blocks if (frequency of empty block) / "
179 "(frequency of destination block) is greater than this ratio"));
181 static cl::opt<bool> ForceSplitStore(
182 "force-split-store", cl::Hidden, cl::init(false),
183 cl::desc("Force store splitting no matter what the target query says."));
186 EnableTypePromotionMerge("cgp-type-promotion-merge", cl::Hidden,
187 cl::desc("Enable merging of redundant sexts when one is dominating"
188 " the other."), cl::init(true));
190 static cl::opt<bool> DisableComplexAddrModes(
191 "disable-complex-addr-modes", cl::Hidden, cl::init(false),
192 cl::desc("Disables combining addressing modes with different parts "
193 "in optimizeMemoryInst."));
196 AddrSinkNewPhis("addr-sink-new-phis", cl::Hidden, cl::init(false),
197 cl::desc("Allow creation of Phis in Address sinking."));
200 AddrSinkNewSelects("addr-sink-new-select", cl::Hidden, cl::init(true),
201 cl::desc("Allow creation of selects in Address sinking."));
203 static cl::opt<bool> AddrSinkCombineBaseReg(
204 "addr-sink-combine-base-reg", cl::Hidden, cl::init(true),
205 cl::desc("Allow combining of BaseReg field in Address sinking."));
207 static cl::opt<bool> AddrSinkCombineBaseGV(
208 "addr-sink-combine-base-gv", cl::Hidden, cl::init(true),
209 cl::desc("Allow combining of BaseGV field in Address sinking."));
211 static cl::opt<bool> AddrSinkCombineBaseOffs(
212 "addr-sink-combine-base-offs", cl::Hidden, cl::init(true),
213 cl::desc("Allow combining of BaseOffs field in Address sinking."));
215 static cl::opt<bool> AddrSinkCombineScaledReg(
216 "addr-sink-combine-scaled-reg", cl::Hidden, cl::init(true),
217 cl::desc("Allow combining of ScaledReg field in Address sinking."));
220 EnableGEPOffsetSplit("cgp-split-large-offset-gep", cl::Hidden,
222 cl::desc("Enable splitting large offset of GEP."));
227 ZeroExtension, // Zero extension has been seen.
228 SignExtension, // Sign extension has been seen.
229 BothExtension // This extension type is used if we saw sext after
230 // ZeroExtension had been set, or if we saw zext after
231 // SignExtension had been set. It makes the type
232 // information of a promoted instruction invalid.
235 using SetOfInstrs = SmallPtrSet<Instruction *, 16>;
236 using TypeIsSExt = PointerIntPair<Type *, 2, ExtType>;
237 using InstrToOrigTy = DenseMap<Instruction *, TypeIsSExt>;
238 using SExts = SmallVector<Instruction *, 16>;
239 using ValueToSExts = DenseMap<Value *, SExts>;
241 class TypePromotionTransaction;
243 class CodeGenPrepare : public FunctionPass {
244 const TargetMachine *TM = nullptr;
245 const TargetSubtargetInfo *SubtargetInfo;
246 const TargetLowering *TLI = nullptr;
247 const TargetRegisterInfo *TRI;
248 const TargetTransformInfo *TTI = nullptr;
249 const TargetLibraryInfo *TLInfo;
251 std::unique_ptr<BlockFrequencyInfo> BFI;
252 std::unique_ptr<BranchProbabilityInfo> BPI;
254 /// As we scan instructions optimizing them, this is the next instruction
255 /// to optimize. Transforms that can invalidate this should update it.
256 BasicBlock::iterator CurInstIterator;
258 /// Keeps track of non-local addresses that have been sunk into a block.
259 /// This allows us to avoid inserting duplicate code for blocks with
260 /// multiple load/stores of the same address. The usage of WeakTrackingVH
261 /// enables SunkAddrs to be treated as a cache whose entries can be
262 /// invalidated if a sunken address computation has been erased.
263 ValueMap<Value*, WeakTrackingVH> SunkAddrs;
265 /// Keeps track of all instructions inserted for the current function.
266 SetOfInstrs InsertedInsts;
268 /// Keeps track of the type of the related instruction before their
269 /// promotion for the current function.
270 InstrToOrigTy PromotedInsts;
272 /// Keep track of instructions removed during promotion.
273 SetOfInstrs RemovedInsts;
275 /// Keep track of sext chains based on their initial value.
276 DenseMap<Value *, Instruction *> SeenChainsForSExt;
278 /// Keep track of GEPs accessing the same data structures such as structs or
279 /// arrays that are candidates to be split later because of their large
283 SmallVector<std::pair<AssertingVH<GetElementPtrInst>, int64_t>, 32>>
286 /// Keep track of new GEP base after splitting the GEPs having large offset.
287 SmallSet<AssertingVH<Value>, 2> NewGEPBases;
289 /// Map serial numbers to Large offset GEPs.
290 DenseMap<AssertingVH<GetElementPtrInst>, int> LargeOffsetGEPID;
292 /// Keep track of SExt promoted.
293 ValueToSExts ValToSExtendedUses;
295 /// True if CFG is modified in any way.
298 /// True if optimizing for size.
301 /// DataLayout for the Function being processed.
302 const DataLayout *DL = nullptr;
305 static char ID; // Pass identification, replacement for typeid
307 CodeGenPrepare() : FunctionPass(ID) {
308 initializeCodeGenPreparePass(*PassRegistry::getPassRegistry());
311 bool runOnFunction(Function &F) override;
313 StringRef getPassName() const override { return "CodeGen Prepare"; }
315 void getAnalysisUsage(AnalysisUsage &AU) const override {
316 // FIXME: When we can selectively preserve passes, preserve the domtree.
317 AU.addRequired<ProfileSummaryInfoWrapperPass>();
318 AU.addRequired<TargetLibraryInfoWrapperPass>();
319 AU.addRequired<TargetTransformInfoWrapperPass>();
320 AU.addRequired<LoopInfoWrapperPass>();
324 template <typename F>
325 void resetIteratorIfInvalidatedWhileCalling(BasicBlock *BB, F f) {
326 // Substituting can cause recursive simplifications, which can invalidate
327 // our iterator. Use a WeakTrackingVH to hold onto it in case this
329 Value *CurValue = &*CurInstIterator;
330 WeakTrackingVH IterHandle(CurValue);
334 // If the iterator instruction was recursively deleted, start over at the
335 // start of the block.
336 if (IterHandle != CurValue) {
337 CurInstIterator = BB->begin();
342 bool eliminateFallThrough(Function &F);
343 bool eliminateMostlyEmptyBlocks(Function &F);
344 BasicBlock *findDestBlockOfMergeableEmptyBlock(BasicBlock *BB);
345 bool canMergeBlocks(const BasicBlock *BB, const BasicBlock *DestBB) const;
346 void eliminateMostlyEmptyBlock(BasicBlock *BB);
347 bool isMergingEmptyBlockProfitable(BasicBlock *BB, BasicBlock *DestBB,
349 bool optimizeBlock(BasicBlock &BB, bool &ModifiedDT);
350 bool optimizeInst(Instruction *I, bool &ModifiedDT);
351 bool optimizeMemoryInst(Instruction *MemoryInst, Value *Addr,
352 Type *AccessTy, unsigned AddrSpace);
353 bool optimizeInlineAsmInst(CallInst *CS);
354 bool optimizeCallInst(CallInst *CI, bool &ModifiedDT);
355 bool optimizeExt(Instruction *&I);
356 bool optimizeExtUses(Instruction *I);
357 bool optimizeLoadExt(LoadInst *Load);
358 bool optimizeSelectInst(SelectInst *SI);
359 bool optimizeShuffleVectorInst(ShuffleVectorInst *SVI);
360 bool optimizeSwitchInst(SwitchInst *SI);
361 bool optimizeExtractElementInst(Instruction *Inst);
362 bool dupRetToEnableTailCallOpts(BasicBlock *BB);
363 bool placeDbgValues(Function &F);
364 bool canFormExtLd(const SmallVectorImpl<Instruction *> &MovedExts,
365 LoadInst *&LI, Instruction *&Inst, bool HasPromoted);
366 bool tryToPromoteExts(TypePromotionTransaction &TPT,
367 const SmallVectorImpl<Instruction *> &Exts,
368 SmallVectorImpl<Instruction *> &ProfitablyMovedExts,
369 unsigned CreatedInstsCost = 0);
370 bool mergeSExts(Function &F);
371 bool splitLargeGEPOffsets();
372 bool performAddressTypePromotion(
374 bool AllowPromotionWithoutCommonHeader,
375 bool HasPromoted, TypePromotionTransaction &TPT,
376 SmallVectorImpl<Instruction *> &SpeculativelyMovedExts);
377 bool splitBranchCondition(Function &F);
378 bool simplifyOffsetableRelocate(Instruction &I);
381 } // end anonymous namespace
383 char CodeGenPrepare::ID = 0;
385 INITIALIZE_PASS_BEGIN(CodeGenPrepare, DEBUG_TYPE,
386 "Optimize for code generation", false, false)
387 INITIALIZE_PASS_DEPENDENCY(ProfileSummaryInfoWrapperPass)
388 INITIALIZE_PASS_END(CodeGenPrepare, DEBUG_TYPE,
389 "Optimize for code generation", false, false)
391 FunctionPass *llvm::createCodeGenPreparePass() { return new CodeGenPrepare(); }
393 bool CodeGenPrepare::runOnFunction(Function &F) {
397 DL = &F.getParent()->getDataLayout();
399 bool EverMadeChange = false;
400 // Clear per function information.
401 InsertedInsts.clear();
402 PromotedInsts.clear();
405 if (auto *TPC = getAnalysisIfAvailable<TargetPassConfig>()) {
406 TM = &TPC->getTM<TargetMachine>();
407 SubtargetInfo = TM->getSubtargetImpl(F);
408 TLI = SubtargetInfo->getTargetLowering();
409 TRI = SubtargetInfo->getRegisterInfo();
411 TLInfo = &getAnalysis<TargetLibraryInfoWrapperPass>().getTLI();
412 TTI = &getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
413 LI = &getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
414 BPI.reset(new BranchProbabilityInfo(F, *LI));
415 BFI.reset(new BlockFrequencyInfo(F, *BPI, *LI));
416 OptSize = F.optForSize();
418 ProfileSummaryInfo *PSI =
419 &getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI();
420 if (ProfileGuidedSectionPrefix) {
421 if (PSI->isFunctionHotInCallGraph(&F, *BFI))
422 F.setSectionPrefix(".hot");
423 else if (PSI->isFunctionColdInCallGraph(&F, *BFI))
424 F.setSectionPrefix(".unlikely");
427 /// This optimization identifies DIV instructions that can be
428 /// profitably bypassed and carried out with a shorter, faster divide.
429 if (!OptSize && !PSI->hasHugeWorkingSetSize() && TLI &&
430 TLI->isSlowDivBypassed()) {
431 const DenseMap<unsigned int, unsigned int> &BypassWidths =
432 TLI->getBypassSlowDivWidths();
433 BasicBlock* BB = &*F.begin();
434 while (BB != nullptr) {
435 // bypassSlowDivision may create new BBs, but we don't want to reapply the
436 // optimization to those blocks.
437 BasicBlock* Next = BB->getNextNode();
438 EverMadeChange |= bypassSlowDivision(BB, BypassWidths);
443 // Eliminate blocks that contain only PHI nodes and an
444 // unconditional branch.
445 EverMadeChange |= eliminateMostlyEmptyBlocks(F);
447 if (!DisableBranchOpts)
448 EverMadeChange |= splitBranchCondition(F);
450 // Split some critical edges where one of the sources is an indirect branch,
451 // to help generate sane code for PHIs involving such edges.
452 EverMadeChange |= SplitIndirectBrCriticalEdges(F);
454 bool MadeChange = true;
457 for (Function::iterator I = F.begin(); I != F.end(); ) {
458 BasicBlock *BB = &*I++;
459 bool ModifiedDTOnIteration = false;
460 MadeChange |= optimizeBlock(*BB, ModifiedDTOnIteration);
462 // Restart BB iteration if the dominator tree of the Function was changed
463 if (ModifiedDTOnIteration)
466 if (EnableTypePromotionMerge && !ValToSExtendedUses.empty())
467 MadeChange |= mergeSExts(F);
468 if (!LargeOffsetGEPMap.empty())
469 MadeChange |= splitLargeGEPOffsets();
471 // Really free removed instructions during promotion.
472 for (Instruction *I : RemovedInsts)
475 EverMadeChange |= MadeChange;
476 SeenChainsForSExt.clear();
477 ValToSExtendedUses.clear();
478 RemovedInsts.clear();
479 LargeOffsetGEPMap.clear();
480 LargeOffsetGEPID.clear();
485 if (!DisableBranchOpts) {
487 // Use a set vector to get deterministic iteration order. The order the
488 // blocks are removed may affect whether or not PHI nodes in successors
490 SmallSetVector<BasicBlock*, 8> WorkList;
491 for (BasicBlock &BB : F) {
492 SmallVector<BasicBlock *, 2> Successors(succ_begin(&BB), succ_end(&BB));
493 MadeChange |= ConstantFoldTerminator(&BB, true);
494 if (!MadeChange) continue;
496 for (SmallVectorImpl<BasicBlock*>::iterator
497 II = Successors.begin(), IE = Successors.end(); II != IE; ++II)
498 if (pred_begin(*II) == pred_end(*II))
499 WorkList.insert(*II);
502 // Delete the dead blocks and any of their dead successors.
503 MadeChange |= !WorkList.empty();
504 while (!WorkList.empty()) {
505 BasicBlock *BB = WorkList.pop_back_val();
506 SmallVector<BasicBlock*, 2> Successors(succ_begin(BB), succ_end(BB));
510 for (SmallVectorImpl<BasicBlock*>::iterator
511 II = Successors.begin(), IE = Successors.end(); II != IE; ++II)
512 if (pred_begin(*II) == pred_end(*II))
513 WorkList.insert(*II);
516 // Merge pairs of basic blocks with unconditional branches, connected by
518 if (EverMadeChange || MadeChange)
519 MadeChange |= eliminateFallThrough(F);
521 EverMadeChange |= MadeChange;
524 if (!DisableGCOpts) {
525 SmallVector<Instruction *, 2> Statepoints;
526 for (BasicBlock &BB : F)
527 for (Instruction &I : BB)
529 Statepoints.push_back(&I);
530 for (auto &I : Statepoints)
531 EverMadeChange |= simplifyOffsetableRelocate(*I);
534 // Do this last to clean up use-before-def scenarios introduced by other
535 // preparatory transforms.
536 EverMadeChange |= placeDbgValues(F);
538 return EverMadeChange;
541 /// Merge basic blocks which are connected by a single edge, where one of the
542 /// basic blocks has a single successor pointing to the other basic block,
543 /// which has a single predecessor.
544 bool CodeGenPrepare::eliminateFallThrough(Function &F) {
545 bool Changed = false;
546 // Scan all of the blocks in the function, except for the entry block.
547 // Use a temporary array to avoid iterator being invalidated when
549 SmallVector<WeakTrackingVH, 16> Blocks;
550 for (auto &Block : llvm::make_range(std::next(F.begin()), F.end()))
551 Blocks.push_back(&Block);
553 for (auto &Block : Blocks) {
554 auto *BB = cast_or_null<BasicBlock>(Block);
557 // If the destination block has a single pred, then this is a trivial
558 // edge, just collapse it.
559 BasicBlock *SinglePred = BB->getSinglePredecessor();
561 // Don't merge if BB's address is taken.
562 if (!SinglePred || SinglePred == BB || BB->hasAddressTaken()) continue;
564 BranchInst *Term = dyn_cast<BranchInst>(SinglePred->getTerminator());
565 if (Term && !Term->isConditional()) {
567 LLVM_DEBUG(dbgs() << "To merge:\n" << *BB << "\n\n\n");
569 // Merge BB into SinglePred and delete it.
570 MergeBlockIntoPredecessor(BB);
576 /// Find a destination block from BB if BB is mergeable empty block.
577 BasicBlock *CodeGenPrepare::findDestBlockOfMergeableEmptyBlock(BasicBlock *BB) {
578 // If this block doesn't end with an uncond branch, ignore it.
579 BranchInst *BI = dyn_cast<BranchInst>(BB->getTerminator());
580 if (!BI || !BI->isUnconditional())
583 // If the instruction before the branch (skipping debug info) isn't a phi
584 // node, then other stuff is happening here.
585 BasicBlock::iterator BBI = BI->getIterator();
586 if (BBI != BB->begin()) {
588 while (isa<DbgInfoIntrinsic>(BBI)) {
589 if (BBI == BB->begin())
593 if (!isa<DbgInfoIntrinsic>(BBI) && !isa<PHINode>(BBI))
597 // Do not break infinite loops.
598 BasicBlock *DestBB = BI->getSuccessor(0);
602 if (!canMergeBlocks(BB, DestBB))
608 /// Eliminate blocks that contain only PHI nodes, debug info directives, and an
609 /// unconditional branch. Passes before isel (e.g. LSR/loopsimplify) often split
610 /// edges in ways that are non-optimal for isel. Start by eliminating these
611 /// blocks so we can split them the way we want them.
612 bool CodeGenPrepare::eliminateMostlyEmptyBlocks(Function &F) {
613 SmallPtrSet<BasicBlock *, 16> Preheaders;
614 SmallVector<Loop *, 16> LoopList(LI->begin(), LI->end());
615 while (!LoopList.empty()) {
616 Loop *L = LoopList.pop_back_val();
617 LoopList.insert(LoopList.end(), L->begin(), L->end());
618 if (BasicBlock *Preheader = L->getLoopPreheader())
619 Preheaders.insert(Preheader);
622 bool MadeChange = false;
623 // Copy blocks into a temporary array to avoid iterator invalidation issues
624 // as we remove them.
625 // Note that this intentionally skips the entry block.
626 SmallVector<WeakTrackingVH, 16> Blocks;
627 for (auto &Block : llvm::make_range(std::next(F.begin()), F.end()))
628 Blocks.push_back(&Block);
630 for (auto &Block : Blocks) {
631 BasicBlock *BB = cast_or_null<BasicBlock>(Block);
634 BasicBlock *DestBB = findDestBlockOfMergeableEmptyBlock(BB);
636 !isMergingEmptyBlockProfitable(BB, DestBB, Preheaders.count(BB)))
639 eliminateMostlyEmptyBlock(BB);
645 bool CodeGenPrepare::isMergingEmptyBlockProfitable(BasicBlock *BB,
648 // Do not delete loop preheaders if doing so would create a critical edge.
649 // Loop preheaders can be good locations to spill registers. If the
650 // preheader is deleted and we create a critical edge, registers may be
651 // spilled in the loop body instead.
652 if (!DisablePreheaderProtect && isPreheader &&
653 !(BB->getSinglePredecessor() &&
654 BB->getSinglePredecessor()->getSingleSuccessor()))
657 // Try to skip merging if the unique predecessor of BB is terminated by a
658 // switch or indirect branch instruction, and BB is used as an incoming block
659 // of PHIs in DestBB. In such case, merging BB and DestBB would cause ISel to
660 // add COPY instructions in the predecessor of BB instead of BB (if it is not
661 // merged). Note that the critical edge created by merging such blocks wont be
662 // split in MachineSink because the jump table is not analyzable. By keeping
663 // such empty block (BB), ISel will place COPY instructions in BB, not in the
664 // predecessor of BB.
665 BasicBlock *Pred = BB->getUniquePredecessor();
667 !(isa<SwitchInst>(Pred->getTerminator()) ||
668 isa<IndirectBrInst>(Pred->getTerminator())))
671 if (BB->getTerminator() != BB->getFirstNonPHIOrDbg())
674 // We use a simple cost heuristic which determine skipping merging is
675 // profitable if the cost of skipping merging is less than the cost of
676 // merging : Cost(skipping merging) < Cost(merging BB), where the
677 // Cost(skipping merging) is Freq(BB) * (Cost(Copy) + Cost(Branch)), and
678 // the Cost(merging BB) is Freq(Pred) * Cost(Copy).
679 // Assuming Cost(Copy) == Cost(Branch), we could simplify it to :
680 // Freq(Pred) / Freq(BB) > 2.
681 // Note that if there are multiple empty blocks sharing the same incoming
682 // value for the PHIs in the DestBB, we consider them together. In such
683 // case, Cost(merging BB) will be the sum of their frequencies.
685 if (!isa<PHINode>(DestBB->begin()))
688 SmallPtrSet<BasicBlock *, 16> SameIncomingValueBBs;
690 // Find all other incoming blocks from which incoming values of all PHIs in
691 // DestBB are the same as the ones from BB.
692 for (pred_iterator PI = pred_begin(DestBB), E = pred_end(DestBB); PI != E;
694 BasicBlock *DestBBPred = *PI;
695 if (DestBBPred == BB)
698 if (llvm::all_of(DestBB->phis(), [&](const PHINode &DestPN) {
699 return DestPN.getIncomingValueForBlock(BB) ==
700 DestPN.getIncomingValueForBlock(DestBBPred);
702 SameIncomingValueBBs.insert(DestBBPred);
705 // See if all BB's incoming values are same as the value from Pred. In this
706 // case, no reason to skip merging because COPYs are expected to be place in
708 if (SameIncomingValueBBs.count(Pred))
711 BlockFrequency PredFreq = BFI->getBlockFreq(Pred);
712 BlockFrequency BBFreq = BFI->getBlockFreq(BB);
714 for (auto SameValueBB : SameIncomingValueBBs)
715 if (SameValueBB->getUniquePredecessor() == Pred &&
716 DestBB == findDestBlockOfMergeableEmptyBlock(SameValueBB))
717 BBFreq += BFI->getBlockFreq(SameValueBB);
719 return PredFreq.getFrequency() <=
720 BBFreq.getFrequency() * FreqRatioToSkipMerge;
723 /// Return true if we can merge BB into DestBB if there is a single
724 /// unconditional branch between them, and BB contains no other non-phi
726 bool CodeGenPrepare::canMergeBlocks(const BasicBlock *BB,
727 const BasicBlock *DestBB) const {
728 // We only want to eliminate blocks whose phi nodes are used by phi nodes in
729 // the successor. If there are more complex condition (e.g. preheaders),
730 // don't mess around with them.
731 for (const PHINode &PN : BB->phis()) {
732 for (const User *U : PN.users()) {
733 const Instruction *UI = cast<Instruction>(U);
734 if (UI->getParent() != DestBB || !isa<PHINode>(UI))
736 // If User is inside DestBB block and it is a PHINode then check
737 // incoming value. If incoming value is not from BB then this is
738 // a complex condition (e.g. preheaders) we want to avoid here.
739 if (UI->getParent() == DestBB) {
740 if (const PHINode *UPN = dyn_cast<PHINode>(UI))
741 for (unsigned I = 0, E = UPN->getNumIncomingValues(); I != E; ++I) {
742 Instruction *Insn = dyn_cast<Instruction>(UPN->getIncomingValue(I));
743 if (Insn && Insn->getParent() == BB &&
744 Insn->getParent() != UPN->getIncomingBlock(I))
751 // If BB and DestBB contain any common predecessors, then the phi nodes in BB
752 // and DestBB may have conflicting incoming values for the block. If so, we
753 // can't merge the block.
754 const PHINode *DestBBPN = dyn_cast<PHINode>(DestBB->begin());
755 if (!DestBBPN) return true; // no conflict.
757 // Collect the preds of BB.
758 SmallPtrSet<const BasicBlock*, 16> BBPreds;
759 if (const PHINode *BBPN = dyn_cast<PHINode>(BB->begin())) {
760 // It is faster to get preds from a PHI than with pred_iterator.
761 for (unsigned i = 0, e = BBPN->getNumIncomingValues(); i != e; ++i)
762 BBPreds.insert(BBPN->getIncomingBlock(i));
764 BBPreds.insert(pred_begin(BB), pred_end(BB));
767 // Walk the preds of DestBB.
768 for (unsigned i = 0, e = DestBBPN->getNumIncomingValues(); i != e; ++i) {
769 BasicBlock *Pred = DestBBPN->getIncomingBlock(i);
770 if (BBPreds.count(Pred)) { // Common predecessor?
771 for (const PHINode &PN : DestBB->phis()) {
772 const Value *V1 = PN.getIncomingValueForBlock(Pred);
773 const Value *V2 = PN.getIncomingValueForBlock(BB);
775 // If V2 is a phi node in BB, look up what the mapped value will be.
776 if (const PHINode *V2PN = dyn_cast<PHINode>(V2))
777 if (V2PN->getParent() == BB)
778 V2 = V2PN->getIncomingValueForBlock(Pred);
780 // If there is a conflict, bail out.
781 if (V1 != V2) return false;
789 /// Eliminate a basic block that has only phi's and an unconditional branch in
791 void CodeGenPrepare::eliminateMostlyEmptyBlock(BasicBlock *BB) {
792 BranchInst *BI = cast<BranchInst>(BB->getTerminator());
793 BasicBlock *DestBB = BI->getSuccessor(0);
795 LLVM_DEBUG(dbgs() << "MERGING MOSTLY EMPTY BLOCKS - BEFORE:\n"
798 // If the destination block has a single pred, then this is a trivial edge,
800 if (BasicBlock *SinglePred = DestBB->getSinglePredecessor()) {
801 if (SinglePred != DestBB) {
802 assert(SinglePred == BB &&
803 "Single predecessor not the same as predecessor");
804 // Merge DestBB into SinglePred/BB and delete it.
805 MergeBlockIntoPredecessor(DestBB);
806 // Note: BB(=SinglePred) will not be deleted on this path.
807 // DestBB(=its single successor) is the one that was deleted.
808 LLVM_DEBUG(dbgs() << "AFTER:\n" << *SinglePred << "\n\n\n");
813 // Otherwise, we have multiple predecessors of BB. Update the PHIs in DestBB
814 // to handle the new incoming edges it is about to have.
815 for (PHINode &PN : DestBB->phis()) {
816 // Remove the incoming value for BB, and remember it.
817 Value *InVal = PN.removeIncomingValue(BB, false);
819 // Two options: either the InVal is a phi node defined in BB or it is some
820 // value that dominates BB.
821 PHINode *InValPhi = dyn_cast<PHINode>(InVal);
822 if (InValPhi && InValPhi->getParent() == BB) {
823 // Add all of the input values of the input PHI as inputs of this phi.
824 for (unsigned i = 0, e = InValPhi->getNumIncomingValues(); i != e; ++i)
825 PN.addIncoming(InValPhi->getIncomingValue(i),
826 InValPhi->getIncomingBlock(i));
828 // Otherwise, add one instance of the dominating value for each edge that
829 // we will be adding.
830 if (PHINode *BBPN = dyn_cast<PHINode>(BB->begin())) {
831 for (unsigned i = 0, e = BBPN->getNumIncomingValues(); i != e; ++i)
832 PN.addIncoming(InVal, BBPN->getIncomingBlock(i));
834 for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI)
835 PN.addIncoming(InVal, *PI);
840 // The PHIs are now updated, change everything that refers to BB to use
841 // DestBB and remove BB.
842 BB->replaceAllUsesWith(DestBB);
843 BB->eraseFromParent();
846 LLVM_DEBUG(dbgs() << "AFTER:\n" << *DestBB << "\n\n\n");
849 // Computes a map of base pointer relocation instructions to corresponding
850 // derived pointer relocation instructions given a vector of all relocate calls
851 static void computeBaseDerivedRelocateMap(
852 const SmallVectorImpl<GCRelocateInst *> &AllRelocateCalls,
853 DenseMap<GCRelocateInst *, SmallVector<GCRelocateInst *, 2>>
855 // Collect information in two maps: one primarily for locating the base object
856 // while filling the second map; the second map is the final structure holding
857 // a mapping between Base and corresponding Derived relocate calls
858 DenseMap<std::pair<unsigned, unsigned>, GCRelocateInst *> RelocateIdxMap;
859 for (auto *ThisRelocate : AllRelocateCalls) {
860 auto K = std::make_pair(ThisRelocate->getBasePtrIndex(),
861 ThisRelocate->getDerivedPtrIndex());
862 RelocateIdxMap.insert(std::make_pair(K, ThisRelocate));
864 for (auto &Item : RelocateIdxMap) {
865 std::pair<unsigned, unsigned> Key = Item.first;
866 if (Key.first == Key.second)
867 // Base relocation: nothing to insert
870 GCRelocateInst *I = Item.second;
871 auto BaseKey = std::make_pair(Key.first, Key.first);
873 // We're iterating over RelocateIdxMap so we cannot modify it.
874 auto MaybeBase = RelocateIdxMap.find(BaseKey);
875 if (MaybeBase == RelocateIdxMap.end())
876 // TODO: We might want to insert a new base object relocate and gep off
877 // that, if there are enough derived object relocates.
880 RelocateInstMap[MaybeBase->second].push_back(I);
884 // Accepts a GEP and extracts the operands into a vector provided they're all
885 // small integer constants
886 static bool getGEPSmallConstantIntOffsetV(GetElementPtrInst *GEP,
887 SmallVectorImpl<Value *> &OffsetV) {
888 for (unsigned i = 1; i < GEP->getNumOperands(); i++) {
889 // Only accept small constant integer operands
890 auto Op = dyn_cast<ConstantInt>(GEP->getOperand(i));
891 if (!Op || Op->getZExtValue() > 20)
895 for (unsigned i = 1; i < GEP->getNumOperands(); i++)
896 OffsetV.push_back(GEP->getOperand(i));
900 // Takes a RelocatedBase (base pointer relocation instruction) and Targets to
901 // replace, computes a replacement, and affects it.
903 simplifyRelocatesOffABase(GCRelocateInst *RelocatedBase,
904 const SmallVectorImpl<GCRelocateInst *> &Targets) {
905 bool MadeChange = false;
906 // We must ensure the relocation of derived pointer is defined after
907 // relocation of base pointer. If we find a relocation corresponding to base
908 // defined earlier than relocation of base then we move relocation of base
909 // right before found relocation. We consider only relocation in the same
910 // basic block as relocation of base. Relocations from other basic block will
911 // be skipped by optimization and we do not care about them.
912 for (auto R = RelocatedBase->getParent()->getFirstInsertionPt();
913 &*R != RelocatedBase; ++R)
914 if (auto RI = dyn_cast<GCRelocateInst>(R))
915 if (RI->getStatepoint() == RelocatedBase->getStatepoint())
916 if (RI->getBasePtrIndex() == RelocatedBase->getBasePtrIndex()) {
917 RelocatedBase->moveBefore(RI);
921 for (GCRelocateInst *ToReplace : Targets) {
922 assert(ToReplace->getBasePtrIndex() == RelocatedBase->getBasePtrIndex() &&
923 "Not relocating a derived object of the original base object");
924 if (ToReplace->getBasePtrIndex() == ToReplace->getDerivedPtrIndex()) {
925 // A duplicate relocate call. TODO: coalesce duplicates.
929 if (RelocatedBase->getParent() != ToReplace->getParent()) {
930 // Base and derived relocates are in different basic blocks.
931 // In this case transform is only valid when base dominates derived
932 // relocate. However it would be too expensive to check dominance
933 // for each such relocate, so we skip the whole transformation.
937 Value *Base = ToReplace->getBasePtr();
938 auto Derived = dyn_cast<GetElementPtrInst>(ToReplace->getDerivedPtr());
939 if (!Derived || Derived->getPointerOperand() != Base)
942 SmallVector<Value *, 2> OffsetV;
943 if (!getGEPSmallConstantIntOffsetV(Derived, OffsetV))
946 // Create a Builder and replace the target callsite with a gep
947 assert(RelocatedBase->getNextNode() &&
948 "Should always have one since it's not a terminator");
950 // Insert after RelocatedBase
951 IRBuilder<> Builder(RelocatedBase->getNextNode());
952 Builder.SetCurrentDebugLocation(ToReplace->getDebugLoc());
954 // If gc_relocate does not match the actual type, cast it to the right type.
955 // In theory, there must be a bitcast after gc_relocate if the type does not
956 // match, and we should reuse it to get the derived pointer. But it could be
960 // %g1 = call coldcc i8 addrspace(1)* @llvm.experimental.gc.relocate.p1i8(...)
965 // %g2 = call coldcc i8 addrspace(1)* @llvm.experimental.gc.relocate.p1i8(...)
969 // %p1 = phi i8 addrspace(1)* [ %g1, %bb1 ], [ %g2, %bb2 ]
970 // %cast = bitcast i8 addrspace(1)* %p1 in to i32 addrspace(1)*
972 // In this case, we can not find the bitcast any more. So we insert a new bitcast
973 // no matter there is already one or not. In this way, we can handle all cases, and
974 // the extra bitcast should be optimized away in later passes.
975 Value *ActualRelocatedBase = RelocatedBase;
976 if (RelocatedBase->getType() != Base->getType()) {
977 ActualRelocatedBase =
978 Builder.CreateBitCast(RelocatedBase, Base->getType());
980 Value *Replacement = Builder.CreateGEP(
981 Derived->getSourceElementType(), ActualRelocatedBase, makeArrayRef(OffsetV));
982 Replacement->takeName(ToReplace);
983 // If the newly generated derived pointer's type does not match the original derived
984 // pointer's type, cast the new derived pointer to match it. Same reasoning as above.
985 Value *ActualReplacement = Replacement;
986 if (Replacement->getType() != ToReplace->getType()) {
988 Builder.CreateBitCast(Replacement, ToReplace->getType());
990 ToReplace->replaceAllUsesWith(ActualReplacement);
991 ToReplace->eraseFromParent();
1001 // %ptr = gep %base + 15
1002 // %tok = statepoint (%fun, i32 0, i32 0, i32 0, %base, %ptr)
1003 // %base' = relocate(%tok, i32 4, i32 4)
1004 // %ptr' = relocate(%tok, i32 4, i32 5)
1005 // %val = load %ptr'
1010 // %ptr = gep %base + 15
1011 // %tok = statepoint (%fun, i32 0, i32 0, i32 0, %base, %ptr)
1012 // %base' = gc.relocate(%tok, i32 4, i32 4)
1013 // %ptr' = gep %base' + 15
1014 // %val = load %ptr'
1015 bool CodeGenPrepare::simplifyOffsetableRelocate(Instruction &I) {
1016 bool MadeChange = false;
1017 SmallVector<GCRelocateInst *, 2> AllRelocateCalls;
1019 for (auto *U : I.users())
1020 if (GCRelocateInst *Relocate = dyn_cast<GCRelocateInst>(U))
1021 // Collect all the relocate calls associated with a statepoint
1022 AllRelocateCalls.push_back(Relocate);
1024 // We need atleast one base pointer relocation + one derived pointer
1025 // relocation to mangle
1026 if (AllRelocateCalls.size() < 2)
1029 // RelocateInstMap is a mapping from the base relocate instruction to the
1030 // corresponding derived relocate instructions
1031 DenseMap<GCRelocateInst *, SmallVector<GCRelocateInst *, 2>> RelocateInstMap;
1032 computeBaseDerivedRelocateMap(AllRelocateCalls, RelocateInstMap);
1033 if (RelocateInstMap.empty())
1036 for (auto &Item : RelocateInstMap)
1037 // Item.first is the RelocatedBase to offset against
1038 // Item.second is the vector of Targets to replace
1039 MadeChange = simplifyRelocatesOffABase(Item.first, Item.second);
1043 /// SinkCast - Sink the specified cast instruction into its user blocks
1044 static bool SinkCast(CastInst *CI) {
1045 BasicBlock *DefBB = CI->getParent();
1047 /// InsertedCasts - Only insert a cast in each block once.
1048 DenseMap<BasicBlock*, CastInst*> InsertedCasts;
1050 bool MadeChange = false;
1051 for (Value::user_iterator UI = CI->user_begin(), E = CI->user_end();
1053 Use &TheUse = UI.getUse();
1054 Instruction *User = cast<Instruction>(*UI);
1056 // Figure out which BB this cast is used in. For PHI's this is the
1057 // appropriate predecessor block.
1058 BasicBlock *UserBB = User->getParent();
1059 if (PHINode *PN = dyn_cast<PHINode>(User)) {
1060 UserBB = PN->getIncomingBlock(TheUse);
1063 // Preincrement use iterator so we don't invalidate it.
1066 // The first insertion point of a block containing an EH pad is after the
1067 // pad. If the pad is the user, we cannot sink the cast past the pad.
1068 if (User->isEHPad())
1071 // If the block selected to receive the cast is an EH pad that does not
1072 // allow non-PHI instructions before the terminator, we can't sink the
1074 if (UserBB->getTerminator()->isEHPad())
1077 // If this user is in the same block as the cast, don't change the cast.
1078 if (UserBB == DefBB) continue;
1080 // If we have already inserted a cast into this block, use it.
1081 CastInst *&InsertedCast = InsertedCasts[UserBB];
1083 if (!InsertedCast) {
1084 BasicBlock::iterator InsertPt = UserBB->getFirstInsertionPt();
1085 assert(InsertPt != UserBB->end());
1086 InsertedCast = CastInst::Create(CI->getOpcode(), CI->getOperand(0),
1087 CI->getType(), "", &*InsertPt);
1088 InsertedCast->setDebugLoc(CI->getDebugLoc());
1091 // Replace a use of the cast with a use of the new cast.
1092 TheUse = InsertedCast;
1097 // If we removed all uses, nuke the cast.
1098 if (CI->use_empty()) {
1099 salvageDebugInfo(*CI);
1100 CI->eraseFromParent();
1107 /// If the specified cast instruction is a noop copy (e.g. it's casting from
1108 /// one pointer type to another, i32->i8 on PPC), sink it into user blocks to
1109 /// reduce the number of virtual registers that must be created and coalesced.
1111 /// Return true if any changes are made.
1112 static bool OptimizeNoopCopyExpression(CastInst *CI, const TargetLowering &TLI,
1113 const DataLayout &DL) {
1114 // Sink only "cheap" (or nop) address-space casts. This is a weaker condition
1115 // than sinking only nop casts, but is helpful on some platforms.
1116 if (auto *ASC = dyn_cast<AddrSpaceCastInst>(CI)) {
1117 if (!TLI.isCheapAddrSpaceCast(ASC->getSrcAddressSpace(),
1118 ASC->getDestAddressSpace()))
1122 // If this is a noop copy,
1123 EVT SrcVT = TLI.getValueType(DL, CI->getOperand(0)->getType());
1124 EVT DstVT = TLI.getValueType(DL, CI->getType());
1126 // This is an fp<->int conversion?
1127 if (SrcVT.isInteger() != DstVT.isInteger())
1130 // If this is an extension, it will be a zero or sign extension, which
1132 if (SrcVT.bitsLT(DstVT)) return false;
1134 // If these values will be promoted, find out what they will be promoted
1135 // to. This helps us consider truncates on PPC as noop copies when they
1137 if (TLI.getTypeAction(CI->getContext(), SrcVT) ==
1138 TargetLowering::TypePromoteInteger)
1139 SrcVT = TLI.getTypeToTransformTo(CI->getContext(), SrcVT);
1140 if (TLI.getTypeAction(CI->getContext(), DstVT) ==
1141 TargetLowering::TypePromoteInteger)
1142 DstVT = TLI.getTypeToTransformTo(CI->getContext(), DstVT);
1144 // If, after promotion, these are the same types, this is a noop copy.
1148 return SinkCast(CI);
1151 /// Try to combine CI into a call to the llvm.uadd.with.overflow intrinsic if
1154 /// Return true if any changes were made.
1155 static bool CombineUAddWithOverflow(CmpInst *CI) {
1159 m_UAddWithOverflow(m_Value(A), m_Value(B), m_Instruction(AddI))))
1162 Type *Ty = AddI->getType();
1163 if (!isa<IntegerType>(Ty))
1166 // We don't want to move around uses of condition values this late, so we we
1167 // check if it is legal to create the call to the intrinsic in the basic
1168 // block containing the icmp:
1170 if (AddI->getParent() != CI->getParent() && !AddI->hasOneUse())
1174 // Someday m_UAddWithOverflow may get smarter, but this is a safe assumption
1176 if (AddI->hasOneUse())
1177 assert(*AddI->user_begin() == CI && "expected!");
1180 Module *M = CI->getModule();
1181 Value *F = Intrinsic::getDeclaration(M, Intrinsic::uadd_with_overflow, Ty);
1183 auto *InsertPt = AddI->hasOneUse() ? CI : AddI;
1185 DebugLoc Loc = CI->getDebugLoc();
1186 auto *UAddWithOverflow =
1187 CallInst::Create(F, {A, B}, "uadd.overflow", InsertPt);
1188 UAddWithOverflow->setDebugLoc(Loc);
1189 auto *UAdd = ExtractValueInst::Create(UAddWithOverflow, 0, "uadd", InsertPt);
1190 UAdd->setDebugLoc(Loc);
1192 ExtractValueInst::Create(UAddWithOverflow, 1, "overflow", InsertPt);
1193 Overflow->setDebugLoc(Loc);
1195 CI->replaceAllUsesWith(Overflow);
1196 AddI->replaceAllUsesWith(UAdd);
1197 CI->eraseFromParent();
1198 AddI->eraseFromParent();
1202 /// Sink the given CmpInst into user blocks to reduce the number of virtual
1203 /// registers that must be created and coalesced. This is a clear win except on
1204 /// targets with multiple condition code registers (PowerPC), where it might
1205 /// lose; some adjustment may be wanted there.
1207 /// Return true if any changes are made.
1208 static bool SinkCmpExpression(CmpInst *CI, const TargetLowering *TLI) {
1209 BasicBlock *DefBB = CI->getParent();
1211 // Avoid sinking soft-FP comparisons, since this can move them into a loop.
1212 if (TLI && TLI->useSoftFloat() && isa<FCmpInst>(CI))
1215 // Only insert a cmp in each block once.
1216 DenseMap<BasicBlock*, CmpInst*> InsertedCmps;
1218 bool MadeChange = false;
1219 for (Value::user_iterator UI = CI->user_begin(), E = CI->user_end();
1221 Use &TheUse = UI.getUse();
1222 Instruction *User = cast<Instruction>(*UI);
1224 // Preincrement use iterator so we don't invalidate it.
1227 // Don't bother for PHI nodes.
1228 if (isa<PHINode>(User))
1231 // Figure out which BB this cmp is used in.
1232 BasicBlock *UserBB = User->getParent();
1234 // If this user is in the same block as the cmp, don't change the cmp.
1235 if (UserBB == DefBB) continue;
1237 // If we have already inserted a cmp into this block, use it.
1238 CmpInst *&InsertedCmp = InsertedCmps[UserBB];
1241 BasicBlock::iterator InsertPt = UserBB->getFirstInsertionPt();
1242 assert(InsertPt != UserBB->end());
1244 CmpInst::Create(CI->getOpcode(), CI->getPredicate(),
1245 CI->getOperand(0), CI->getOperand(1), "", &*InsertPt);
1246 // Propagate the debug info.
1247 InsertedCmp->setDebugLoc(CI->getDebugLoc());
1250 // Replace a use of the cmp with a use of the new cmp.
1251 TheUse = InsertedCmp;
1256 // If we removed all uses, nuke the cmp.
1257 if (CI->use_empty()) {
1258 CI->eraseFromParent();
1265 static bool OptimizeCmpExpression(CmpInst *CI, const TargetLowering *TLI) {
1266 if (SinkCmpExpression(CI, TLI))
1269 if (CombineUAddWithOverflow(CI))
1275 /// Duplicate and sink the given 'and' instruction into user blocks where it is
1276 /// used in a compare to allow isel to generate better code for targets where
1277 /// this operation can be combined.
1279 /// Return true if any changes are made.
1280 static bool sinkAndCmp0Expression(Instruction *AndI,
1281 const TargetLowering &TLI,
1282 SetOfInstrs &InsertedInsts) {
1283 // Double-check that we're not trying to optimize an instruction that was
1284 // already optimized by some other part of this pass.
1285 assert(!InsertedInsts.count(AndI) &&
1286 "Attempting to optimize already optimized and instruction");
1287 (void) InsertedInsts;
1289 // Nothing to do for single use in same basic block.
1290 if (AndI->hasOneUse() &&
1291 AndI->getParent() == cast<Instruction>(*AndI->user_begin())->getParent())
1294 // Try to avoid cases where sinking/duplicating is likely to increase register
1296 if (!isa<ConstantInt>(AndI->getOperand(0)) &&
1297 !isa<ConstantInt>(AndI->getOperand(1)) &&
1298 AndI->getOperand(0)->hasOneUse() && AndI->getOperand(1)->hasOneUse())
1301 for (auto *U : AndI->users()) {
1302 Instruction *User = cast<Instruction>(U);
1304 // Only sink for and mask feeding icmp with 0.
1305 if (!isa<ICmpInst>(User))
1308 auto *CmpC = dyn_cast<ConstantInt>(User->getOperand(1));
1309 if (!CmpC || !CmpC->isZero())
1313 if (!TLI.isMaskAndCmp0FoldingBeneficial(*AndI))
1316 LLVM_DEBUG(dbgs() << "found 'and' feeding only icmp 0;\n");
1317 LLVM_DEBUG(AndI->getParent()->dump());
1319 // Push the 'and' into the same block as the icmp 0. There should only be
1320 // one (icmp (and, 0)) in each block, since CSE/GVN should have removed any
1321 // others, so we don't need to keep track of which BBs we insert into.
1322 for (Value::user_iterator UI = AndI->user_begin(), E = AndI->user_end();
1324 Use &TheUse = UI.getUse();
1325 Instruction *User = cast<Instruction>(*UI);
1327 // Preincrement use iterator so we don't invalidate it.
1330 LLVM_DEBUG(dbgs() << "sinking 'and' use: " << *User << "\n");
1332 // Keep the 'and' in the same place if the use is already in the same block.
1333 Instruction *InsertPt =
1334 User->getParent() == AndI->getParent() ? AndI : User;
1335 Instruction *InsertedAnd =
1336 BinaryOperator::Create(Instruction::And, AndI->getOperand(0),
1337 AndI->getOperand(1), "", InsertPt);
1338 // Propagate the debug info.
1339 InsertedAnd->setDebugLoc(AndI->getDebugLoc());
1341 // Replace a use of the 'and' with a use of the new 'and'.
1342 TheUse = InsertedAnd;
1344 LLVM_DEBUG(User->getParent()->dump());
1347 // We removed all uses, nuke the and.
1348 AndI->eraseFromParent();
1352 /// Check if the candidates could be combined with a shift instruction, which
1354 /// 1. Truncate instruction
1355 /// 2. And instruction and the imm is a mask of the low bits:
1356 /// imm & (imm+1) == 0
1357 static bool isExtractBitsCandidateUse(Instruction *User) {
1358 if (!isa<TruncInst>(User)) {
1359 if (User->getOpcode() != Instruction::And ||
1360 !isa<ConstantInt>(User->getOperand(1)))
1363 const APInt &Cimm = cast<ConstantInt>(User->getOperand(1))->getValue();
1365 if ((Cimm & (Cimm + 1)).getBoolValue())
1371 /// Sink both shift and truncate instruction to the use of truncate's BB.
1373 SinkShiftAndTruncate(BinaryOperator *ShiftI, Instruction *User, ConstantInt *CI,
1374 DenseMap<BasicBlock *, BinaryOperator *> &InsertedShifts,
1375 const TargetLowering &TLI, const DataLayout &DL) {
1376 BasicBlock *UserBB = User->getParent();
1377 DenseMap<BasicBlock *, CastInst *> InsertedTruncs;
1378 TruncInst *TruncI = dyn_cast<TruncInst>(User);
1379 bool MadeChange = false;
1381 for (Value::user_iterator TruncUI = TruncI->user_begin(),
1382 TruncE = TruncI->user_end();
1383 TruncUI != TruncE;) {
1385 Use &TruncTheUse = TruncUI.getUse();
1386 Instruction *TruncUser = cast<Instruction>(*TruncUI);
1387 // Preincrement use iterator so we don't invalidate it.
1391 int ISDOpcode = TLI.InstructionOpcodeToISD(TruncUser->getOpcode());
1395 // If the use is actually a legal node, there will not be an
1396 // implicit truncate.
1397 // FIXME: always querying the result type is just an
1398 // approximation; some nodes' legality is determined by the
1399 // operand or other means. There's no good way to find out though.
1400 if (TLI.isOperationLegalOrCustom(
1401 ISDOpcode, TLI.getValueType(DL, TruncUser->getType(), true)))
1404 // Don't bother for PHI nodes.
1405 if (isa<PHINode>(TruncUser))
1408 BasicBlock *TruncUserBB = TruncUser->getParent();
1410 if (UserBB == TruncUserBB)
1413 BinaryOperator *&InsertedShift = InsertedShifts[TruncUserBB];
1414 CastInst *&InsertedTrunc = InsertedTruncs[TruncUserBB];
1416 if (!InsertedShift && !InsertedTrunc) {
1417 BasicBlock::iterator InsertPt = TruncUserBB->getFirstInsertionPt();
1418 assert(InsertPt != TruncUserBB->end());
1420 if (ShiftI->getOpcode() == Instruction::AShr)
1421 InsertedShift = BinaryOperator::CreateAShr(ShiftI->getOperand(0), CI,
1424 InsertedShift = BinaryOperator::CreateLShr(ShiftI->getOperand(0), CI,
1426 InsertedShift->setDebugLoc(ShiftI->getDebugLoc());
1429 BasicBlock::iterator TruncInsertPt = TruncUserBB->getFirstInsertionPt();
1431 assert(TruncInsertPt != TruncUserBB->end());
1433 InsertedTrunc = CastInst::Create(TruncI->getOpcode(), InsertedShift,
1434 TruncI->getType(), "", &*TruncInsertPt);
1435 InsertedTrunc->setDebugLoc(TruncI->getDebugLoc());
1439 TruncTheUse = InsertedTrunc;
1445 /// Sink the shift *right* instruction into user blocks if the uses could
1446 /// potentially be combined with this shift instruction and generate BitExtract
1447 /// instruction. It will only be applied if the architecture supports BitExtract
1448 /// instruction. Here is an example:
1450 /// %x.extract.shift = lshr i64 %arg1, 32
1452 /// %x.extract.trunc = trunc i64 %x.extract.shift to i16
1456 /// %x.extract.shift.1 = lshr i64 %arg1, 32
1457 /// %x.extract.trunc = trunc i64 %x.extract.shift.1 to i16
1459 /// CodeGen will recognize the pattern in BB2 and generate BitExtract
1461 /// Return true if any changes are made.
1462 static bool OptimizeExtractBits(BinaryOperator *ShiftI, ConstantInt *CI,
1463 const TargetLowering &TLI,
1464 const DataLayout &DL) {
1465 BasicBlock *DefBB = ShiftI->getParent();
1467 /// Only insert instructions in each block once.
1468 DenseMap<BasicBlock *, BinaryOperator *> InsertedShifts;
1470 bool shiftIsLegal = TLI.isTypeLegal(TLI.getValueType(DL, ShiftI->getType()));
1472 bool MadeChange = false;
1473 for (Value::user_iterator UI = ShiftI->user_begin(), E = ShiftI->user_end();
1475 Use &TheUse = UI.getUse();
1476 Instruction *User = cast<Instruction>(*UI);
1477 // Preincrement use iterator so we don't invalidate it.
1480 // Don't bother for PHI nodes.
1481 if (isa<PHINode>(User))
1484 if (!isExtractBitsCandidateUse(User))
1487 BasicBlock *UserBB = User->getParent();
1489 if (UserBB == DefBB) {
1490 // If the shift and truncate instruction are in the same BB. The use of
1491 // the truncate(TruncUse) may still introduce another truncate if not
1492 // legal. In this case, we would like to sink both shift and truncate
1493 // instruction to the BB of TruncUse.
1496 // i64 shift.result = lshr i64 opnd, imm
1497 // trunc.result = trunc shift.result to i16
1500 // ----> We will have an implicit truncate here if the architecture does
1501 // not have i16 compare.
1502 // cmp i16 trunc.result, opnd2
1504 if (isa<TruncInst>(User) && shiftIsLegal
1505 // If the type of the truncate is legal, no truncate will be
1506 // introduced in other basic blocks.
1508 (!TLI.isTypeLegal(TLI.getValueType(DL, User->getType()))))
1510 SinkShiftAndTruncate(ShiftI, User, CI, InsertedShifts, TLI, DL);
1514 // If we have already inserted a shift into this block, use it.
1515 BinaryOperator *&InsertedShift = InsertedShifts[UserBB];
1517 if (!InsertedShift) {
1518 BasicBlock::iterator InsertPt = UserBB->getFirstInsertionPt();
1519 assert(InsertPt != UserBB->end());
1521 if (ShiftI->getOpcode() == Instruction::AShr)
1522 InsertedShift = BinaryOperator::CreateAShr(ShiftI->getOperand(0), CI,
1525 InsertedShift = BinaryOperator::CreateLShr(ShiftI->getOperand(0), CI,
1527 InsertedShift->setDebugLoc(ShiftI->getDebugLoc());
1532 // Replace a use of the shift with a use of the new shift.
1533 TheUse = InsertedShift;
1536 // If we removed all uses, nuke the shift.
1537 if (ShiftI->use_empty()) {
1538 salvageDebugInfo(*ShiftI);
1539 ShiftI->eraseFromParent();
1545 /// If counting leading or trailing zeros is an expensive operation and a zero
1546 /// input is defined, add a check for zero to avoid calling the intrinsic.
1548 /// We want to transform:
1549 /// %z = call i64 @llvm.cttz.i64(i64 %A, i1 false)
1553 /// %cmpz = icmp eq i64 %A, 0
1554 /// br i1 %cmpz, label %cond.end, label %cond.false
1556 /// %z = call i64 @llvm.cttz.i64(i64 %A, i1 true)
1557 /// br label %cond.end
1559 /// %ctz = phi i64 [ 64, %entry ], [ %z, %cond.false ]
1561 /// If the transform is performed, return true and set ModifiedDT to true.
1562 static bool despeculateCountZeros(IntrinsicInst *CountZeros,
1563 const TargetLowering *TLI,
1564 const DataLayout *DL,
1569 // If a zero input is undefined, it doesn't make sense to despeculate that.
1570 if (match(CountZeros->getOperand(1), m_One()))
1573 // If it's cheap to speculate, there's nothing to do.
1574 auto IntrinsicID = CountZeros->getIntrinsicID();
1575 if ((IntrinsicID == Intrinsic::cttz && TLI->isCheapToSpeculateCttz()) ||
1576 (IntrinsicID == Intrinsic::ctlz && TLI->isCheapToSpeculateCtlz()))
1579 // Only handle legal scalar cases. Anything else requires too much work.
1580 Type *Ty = CountZeros->getType();
1581 unsigned SizeInBits = Ty->getPrimitiveSizeInBits();
1582 if (Ty->isVectorTy() || SizeInBits > DL->getLargestLegalIntTypeSizeInBits())
1585 // The intrinsic will be sunk behind a compare against zero and branch.
1586 BasicBlock *StartBlock = CountZeros->getParent();
1587 BasicBlock *CallBlock = StartBlock->splitBasicBlock(CountZeros, "cond.false");
1589 // Create another block after the count zero intrinsic. A PHI will be added
1590 // in this block to select the result of the intrinsic or the bit-width
1591 // constant if the input to the intrinsic is zero.
1592 BasicBlock::iterator SplitPt = ++(BasicBlock::iterator(CountZeros));
1593 BasicBlock *EndBlock = CallBlock->splitBasicBlock(SplitPt, "cond.end");
1595 // Set up a builder to create a compare, conditional branch, and PHI.
1596 IRBuilder<> Builder(CountZeros->getContext());
1597 Builder.SetInsertPoint(StartBlock->getTerminator());
1598 Builder.SetCurrentDebugLocation(CountZeros->getDebugLoc());
1600 // Replace the unconditional branch that was created by the first split with
1601 // a compare against zero and a conditional branch.
1602 Value *Zero = Constant::getNullValue(Ty);
1603 Value *Cmp = Builder.CreateICmpEQ(CountZeros->getOperand(0), Zero, "cmpz");
1604 Builder.CreateCondBr(Cmp, EndBlock, CallBlock);
1605 StartBlock->getTerminator()->eraseFromParent();
1607 // Create a PHI in the end block to select either the output of the intrinsic
1608 // or the bit width of the operand.
1609 Builder.SetInsertPoint(&EndBlock->front());
1610 PHINode *PN = Builder.CreatePHI(Ty, 2, "ctz");
1611 CountZeros->replaceAllUsesWith(PN);
1612 Value *BitWidth = Builder.getInt(APInt(SizeInBits, SizeInBits));
1613 PN->addIncoming(BitWidth, StartBlock);
1614 PN->addIncoming(CountZeros, CallBlock);
1616 // We are explicitly handling the zero case, so we can set the intrinsic's
1617 // undefined zero argument to 'true'. This will also prevent reprocessing the
1618 // intrinsic; we only despeculate when a zero input is defined.
1619 CountZeros->setArgOperand(1, Builder.getTrue());
1624 bool CodeGenPrepare::optimizeCallInst(CallInst *CI, bool &ModifiedDT) {
1625 BasicBlock *BB = CI->getParent();
1627 // Lower inline assembly if we can.
1628 // If we found an inline asm expession, and if the target knows how to
1629 // lower it to normal LLVM code, do so now.
1630 if (TLI && isa<InlineAsm>(CI->getCalledValue())) {
1631 if (TLI->ExpandInlineAsm(CI)) {
1632 // Avoid invalidating the iterator.
1633 CurInstIterator = BB->begin();
1634 // Avoid processing instructions out of order, which could cause
1635 // reuse before a value is defined.
1639 // Sink address computing for memory operands into the block.
1640 if (optimizeInlineAsmInst(CI))
1644 // Align the pointer arguments to this call if the target thinks it's a good
1646 unsigned MinSize, PrefAlign;
1647 if (TLI && TLI->shouldAlignPointerArgs(CI, MinSize, PrefAlign)) {
1648 for (auto &Arg : CI->arg_operands()) {
1649 // We want to align both objects whose address is used directly and
1650 // objects whose address is used in casts and GEPs, though it only makes
1651 // sense for GEPs if the offset is a multiple of the desired alignment and
1652 // if size - offset meets the size threshold.
1653 if (!Arg->getType()->isPointerTy())
1655 APInt Offset(DL->getIndexSizeInBits(
1656 cast<PointerType>(Arg->getType())->getAddressSpace()),
1658 Value *Val = Arg->stripAndAccumulateInBoundsConstantOffsets(*DL, Offset);
1659 uint64_t Offset2 = Offset.getLimitedValue();
1660 if ((Offset2 & (PrefAlign-1)) != 0)
1663 if ((AI = dyn_cast<AllocaInst>(Val)) && AI->getAlignment() < PrefAlign &&
1664 DL->getTypeAllocSize(AI->getAllocatedType()) >= MinSize + Offset2)
1665 AI->setAlignment(PrefAlign);
1666 // Global variables can only be aligned if they are defined in this
1667 // object (i.e. they are uniquely initialized in this object), and
1668 // over-aligning global variables that have an explicit section is
1671 if ((GV = dyn_cast<GlobalVariable>(Val)) && GV->canIncreaseAlignment() &&
1672 GV->getPointerAlignment(*DL) < PrefAlign &&
1673 DL->getTypeAllocSize(GV->getValueType()) >=
1675 GV->setAlignment(PrefAlign);
1677 // If this is a memcpy (or similar) then we may be able to improve the
1679 if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(CI)) {
1680 unsigned DestAlign = getKnownAlignment(MI->getDest(), *DL);
1681 if (DestAlign > MI->getDestAlignment())
1682 MI->setDestAlignment(DestAlign);
1683 if (MemTransferInst *MTI = dyn_cast<MemTransferInst>(MI)) {
1684 unsigned SrcAlign = getKnownAlignment(MTI->getSource(), *DL);
1685 if (SrcAlign > MTI->getSourceAlignment())
1686 MTI->setSourceAlignment(SrcAlign);
1691 // If we have a cold call site, try to sink addressing computation into the
1692 // cold block. This interacts with our handling for loads and stores to
1693 // ensure that we can fold all uses of a potential addressing computation
1694 // into their uses. TODO: generalize this to work over profiling data
1695 if (!OptSize && CI->hasFnAttr(Attribute::Cold))
1696 for (auto &Arg : CI->arg_operands()) {
1697 if (!Arg->getType()->isPointerTy())
1699 unsigned AS = Arg->getType()->getPointerAddressSpace();
1700 return optimizeMemoryInst(CI, Arg, Arg->getType(), AS);
1703 IntrinsicInst *II = dyn_cast<IntrinsicInst>(CI);
1705 switch (II->getIntrinsicID()) {
1707 case Intrinsic::objectsize: {
1708 // Lower all uses of llvm.objectsize.*
1709 ConstantInt *RetVal =
1710 lowerObjectSizeCall(II, *DL, TLInfo, /*MustSucceed=*/true);
1712 resetIteratorIfInvalidatedWhileCalling(BB, [&]() {
1713 replaceAndRecursivelySimplify(CI, RetVal, TLInfo, nullptr);
1717 case Intrinsic::is_constant: {
1718 // If is_constant hasn't folded away yet, lower it to false now.
1719 Constant *RetVal = ConstantInt::get(II->getType(), 0);
1720 resetIteratorIfInvalidatedWhileCalling(BB, [&]() {
1721 replaceAndRecursivelySimplify(CI, RetVal, TLInfo, nullptr);
1725 case Intrinsic::aarch64_stlxr:
1726 case Intrinsic::aarch64_stxr: {
1727 ZExtInst *ExtVal = dyn_cast<ZExtInst>(CI->getArgOperand(0));
1728 if (!ExtVal || !ExtVal->hasOneUse() ||
1729 ExtVal->getParent() == CI->getParent())
1731 // Sink a zext feeding stlxr/stxr before it, so it can be folded into it.
1732 ExtVal->moveBefore(CI);
1733 // Mark this instruction as "inserted by CGP", so that other
1734 // optimizations don't touch it.
1735 InsertedInsts.insert(ExtVal);
1738 case Intrinsic::launder_invariant_group:
1739 case Intrinsic::strip_invariant_group: {
1740 Value *ArgVal = II->getArgOperand(0);
1741 auto it = LargeOffsetGEPMap.find(II);
1742 if (it != LargeOffsetGEPMap.end()) {
1743 // Merge entries in LargeOffsetGEPMap to reflect the RAUW.
1744 // Make sure not to have to deal with iterator invalidation
1745 // after possibly adding ArgVal to LargeOffsetGEPMap.
1746 auto GEPs = std::move(it->second);
1747 LargeOffsetGEPMap[ArgVal].append(GEPs.begin(), GEPs.end());
1748 LargeOffsetGEPMap.erase(II);
1751 II->replaceAllUsesWith(ArgVal);
1752 II->eraseFromParent();
1755 case Intrinsic::cttz:
1756 case Intrinsic::ctlz:
1757 // If counting zeros is expensive, try to avoid it.
1758 return despeculateCountZeros(II, TLI, DL, ModifiedDT);
1762 SmallVector<Value*, 2> PtrOps;
1764 if (TLI->getAddrModeArguments(II, PtrOps, AccessTy))
1765 while (!PtrOps.empty()) {
1766 Value *PtrVal = PtrOps.pop_back_val();
1767 unsigned AS = PtrVal->getType()->getPointerAddressSpace();
1768 if (optimizeMemoryInst(II, PtrVal, AccessTy, AS))
1774 // From here on out we're working with named functions.
1775 if (!CI->getCalledFunction()) return false;
1777 // Lower all default uses of _chk calls. This is very similar
1778 // to what InstCombineCalls does, but here we are only lowering calls
1779 // to fortified library functions (e.g. __memcpy_chk) that have the default
1780 // "don't know" as the objectsize. Anything else should be left alone.
1781 FortifiedLibCallSimplifier Simplifier(TLInfo, true);
1782 if (Value *V = Simplifier.optimizeCall(CI)) {
1783 CI->replaceAllUsesWith(V);
1784 CI->eraseFromParent();
1791 /// Look for opportunities to duplicate return instructions to the predecessor
1792 /// to enable tail call optimizations. The case it is currently looking for is:
1795 /// %tmp0 = tail call i32 @f0()
1796 /// br label %return
1798 /// %tmp1 = tail call i32 @f1()
1799 /// br label %return
1801 /// %tmp2 = tail call i32 @f2()
1802 /// br label %return
1804 /// %retval = phi i32 [ %tmp0, %bb0 ], [ %tmp1, %bb1 ], [ %tmp2, %bb2 ]
1812 /// %tmp0 = tail call i32 @f0()
1815 /// %tmp1 = tail call i32 @f1()
1818 /// %tmp2 = tail call i32 @f2()
1821 bool CodeGenPrepare::dupRetToEnableTailCallOpts(BasicBlock *BB) {
1825 ReturnInst *RetI = dyn_cast<ReturnInst>(BB->getTerminator());
1829 PHINode *PN = nullptr;
1830 BitCastInst *BCI = nullptr;
1831 Value *V = RetI->getReturnValue();
1833 BCI = dyn_cast<BitCastInst>(V);
1835 V = BCI->getOperand(0);
1837 PN = dyn_cast<PHINode>(V);
1842 if (PN && PN->getParent() != BB)
1845 // Make sure there are no instructions between the PHI and return, or that the
1846 // return is the first instruction in the block.
1848 BasicBlock::iterator BI = BB->begin();
1849 do { ++BI; } while (isa<DbgInfoIntrinsic>(BI));
1851 // Also skip over the bitcast.
1856 BasicBlock::iterator BI = BB->begin();
1857 while (isa<DbgInfoIntrinsic>(BI)) ++BI;
1862 /// Only dup the ReturnInst if the CallInst is likely to be emitted as a tail
1864 const Function *F = BB->getParent();
1865 SmallVector<CallInst*, 4> TailCalls;
1867 for (unsigned I = 0, E = PN->getNumIncomingValues(); I != E; ++I) {
1868 CallInst *CI = dyn_cast<CallInst>(PN->getIncomingValue(I));
1869 // Make sure the phi value is indeed produced by the tail call.
1870 if (CI && CI->hasOneUse() && CI->getParent() == PN->getIncomingBlock(I) &&
1871 TLI->mayBeEmittedAsTailCall(CI) &&
1872 attributesPermitTailCall(F, CI, RetI, *TLI))
1873 TailCalls.push_back(CI);
1876 SmallPtrSet<BasicBlock*, 4> VisitedBBs;
1877 for (pred_iterator PI = pred_begin(BB), PE = pred_end(BB); PI != PE; ++PI) {
1878 if (!VisitedBBs.insert(*PI).second)
1881 BasicBlock::InstListType &InstList = (*PI)->getInstList();
1882 BasicBlock::InstListType::reverse_iterator RI = InstList.rbegin();
1883 BasicBlock::InstListType::reverse_iterator RE = InstList.rend();
1884 do { ++RI; } while (RI != RE && isa<DbgInfoIntrinsic>(&*RI));
1888 CallInst *CI = dyn_cast<CallInst>(&*RI);
1889 if (CI && CI->use_empty() && TLI->mayBeEmittedAsTailCall(CI) &&
1890 attributesPermitTailCall(F, CI, RetI, *TLI))
1891 TailCalls.push_back(CI);
1895 bool Changed = false;
1896 for (unsigned i = 0, e = TailCalls.size(); i != e; ++i) {
1897 CallInst *CI = TailCalls[i];
1900 // Make sure the call instruction is followed by an unconditional branch to
1901 // the return block.
1902 BasicBlock *CallBB = CI->getParent();
1903 BranchInst *BI = dyn_cast<BranchInst>(CallBB->getTerminator());
1904 if (!BI || !BI->isUnconditional() || BI->getSuccessor(0) != BB)
1907 // Duplicate the return into CallBB.
1908 (void)FoldReturnIntoUncondBranch(RetI, BB, CallBB);
1909 ModifiedDT = Changed = true;
1913 // If we eliminated all predecessors of the block, delete the block now.
1914 if (Changed && !BB->hasAddressTaken() && pred_begin(BB) == pred_end(BB))
1915 BB->eraseFromParent();
1920 //===----------------------------------------------------------------------===//
1921 // Memory Optimization
1922 //===----------------------------------------------------------------------===//
1926 /// This is an extended version of TargetLowering::AddrMode
1927 /// which holds actual Value*'s for register values.
1928 struct ExtAddrMode : public TargetLowering::AddrMode {
1929 Value *BaseReg = nullptr;
1930 Value *ScaledReg = nullptr;
1931 Value *OriginalValue = nullptr;
1935 BaseRegField = 0x01,
1937 BaseOffsField = 0x04,
1938 ScaledRegField = 0x08,
1940 MultipleFields = 0xff
1943 ExtAddrMode() = default;
1945 void print(raw_ostream &OS) const;
1948 FieldName compare(const ExtAddrMode &other) {
1949 // First check that the types are the same on each field, as differing types
1950 // is something we can't cope with later on.
1951 if (BaseReg && other.BaseReg &&
1952 BaseReg->getType() != other.BaseReg->getType())
1953 return MultipleFields;
1954 if (BaseGV && other.BaseGV &&
1955 BaseGV->getType() != other.BaseGV->getType())
1956 return MultipleFields;
1957 if (ScaledReg && other.ScaledReg &&
1958 ScaledReg->getType() != other.ScaledReg->getType())
1959 return MultipleFields;
1961 // Check each field to see if it differs.
1962 unsigned Result = NoField;
1963 if (BaseReg != other.BaseReg)
1964 Result |= BaseRegField;
1965 if (BaseGV != other.BaseGV)
1966 Result |= BaseGVField;
1967 if (BaseOffs != other.BaseOffs)
1968 Result |= BaseOffsField;
1969 if (ScaledReg != other.ScaledReg)
1970 Result |= ScaledRegField;
1971 // Don't count 0 as being a different scale, because that actually means
1972 // unscaled (which will already be counted by having no ScaledReg).
1973 if (Scale && other.Scale && Scale != other.Scale)
1974 Result |= ScaleField;
1976 if (countPopulation(Result) > 1)
1977 return MultipleFields;
1979 return static_cast<FieldName>(Result);
1982 // An AddrMode is trivial if it involves no calculation i.e. it is just a base
1985 // An AddrMode is (BaseGV + BaseReg + BaseOffs + ScaleReg * Scale) so it is
1986 // trivial if at most one of these terms is nonzero, except that BaseGV and
1987 // BaseReg both being zero actually means a null pointer value, which we
1988 // consider to be 'non-zero' here.
1989 return !BaseOffs && !Scale && !(BaseGV && BaseReg);
1992 Value *GetFieldAsValue(FieldName Field, Type *IntPtrTy) {
2000 case ScaledRegField:
2003 return ConstantInt::get(IntPtrTy, BaseOffs);
2007 void SetCombinedField(FieldName Field, Value *V,
2008 const SmallVectorImpl<ExtAddrMode> &AddrModes) {
2011 llvm_unreachable("Unhandled fields are expected to be rejected earlier");
2013 case ExtAddrMode::BaseRegField:
2016 case ExtAddrMode::BaseGVField:
2017 // A combined BaseGV is an Instruction, not a GlobalValue, so it goes
2018 // in the BaseReg field.
2019 assert(BaseReg == nullptr);
2023 case ExtAddrMode::ScaledRegField:
2025 // If we have a mix of scaled and unscaled addrmodes then we want scale
2026 // to be the scale and not zero.
2028 for (const ExtAddrMode &AM : AddrModes)
2034 case ExtAddrMode::BaseOffsField:
2035 // The offset is no longer a constant, so it goes in ScaledReg with a
2037 assert(ScaledReg == nullptr);
2046 } // end anonymous namespace
2049 static inline raw_ostream &operator<<(raw_ostream &OS, const ExtAddrMode &AM) {
2055 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
2056 void ExtAddrMode::print(raw_ostream &OS) const {
2057 bool NeedPlus = false;
2060 OS << (NeedPlus ? " + " : "")
2062 BaseGV->printAsOperand(OS, /*PrintType=*/false);
2067 OS << (NeedPlus ? " + " : "")
2073 OS << (NeedPlus ? " + " : "")
2075 BaseReg->printAsOperand(OS, /*PrintType=*/false);
2079 OS << (NeedPlus ? " + " : "")
2081 ScaledReg->printAsOperand(OS, /*PrintType=*/false);
2087 LLVM_DUMP_METHOD void ExtAddrMode::dump() const {
2095 /// This class provides transaction based operation on the IR.
2096 /// Every change made through this class is recorded in the internal state and
2097 /// can be undone (rollback) until commit is called.
2098 class TypePromotionTransaction {
2099 /// This represents the common interface of the individual transaction.
2100 /// Each class implements the logic for doing one specific modification on
2101 /// the IR via the TypePromotionTransaction.
2102 class TypePromotionAction {
2104 /// The Instruction modified.
2108 /// Constructor of the action.
2109 /// The constructor performs the related action on the IR.
2110 TypePromotionAction(Instruction *Inst) : Inst(Inst) {}
2112 virtual ~TypePromotionAction() = default;
2114 /// Undo the modification done by this action.
2115 /// When this method is called, the IR must be in the same state as it was
2116 /// before this action was applied.
2117 /// \pre Undoing the action works if and only if the IR is in the exact same
2118 /// state as it was directly after this action was applied.
2119 virtual void undo() = 0;
2121 /// Advocate every change made by this action.
2122 /// When the results on the IR of the action are to be kept, it is important
2123 /// to call this function, otherwise hidden information may be kept forever.
2124 virtual void commit() {
2125 // Nothing to be done, this action is not doing anything.
2129 /// Utility to remember the position of an instruction.
2130 class InsertionHandler {
2131 /// Position of an instruction.
2132 /// Either an instruction:
2133 /// - Is the first in a basic block: BB is used.
2134 /// - Has a previous instruction: PrevInst is used.
2136 Instruction *PrevInst;
2140 /// Remember whether or not the instruction had a previous instruction.
2141 bool HasPrevInstruction;
2144 /// Record the position of \p Inst.
2145 InsertionHandler(Instruction *Inst) {
2146 BasicBlock::iterator It = Inst->getIterator();
2147 HasPrevInstruction = (It != (Inst->getParent()->begin()));
2148 if (HasPrevInstruction)
2149 Point.PrevInst = &*--It;
2151 Point.BB = Inst->getParent();
2154 /// Insert \p Inst at the recorded position.
2155 void insert(Instruction *Inst) {
2156 if (HasPrevInstruction) {
2157 if (Inst->getParent())
2158 Inst->removeFromParent();
2159 Inst->insertAfter(Point.PrevInst);
2161 Instruction *Position = &*Point.BB->getFirstInsertionPt();
2162 if (Inst->getParent())
2163 Inst->moveBefore(Position);
2165 Inst->insertBefore(Position);
2170 /// Move an instruction before another.
2171 class InstructionMoveBefore : public TypePromotionAction {
2172 /// Original position of the instruction.
2173 InsertionHandler Position;
2176 /// Move \p Inst before \p Before.
2177 InstructionMoveBefore(Instruction *Inst, Instruction *Before)
2178 : TypePromotionAction(Inst), Position(Inst) {
2179 LLVM_DEBUG(dbgs() << "Do: move: " << *Inst << "\nbefore: " << *Before
2181 Inst->moveBefore(Before);
2184 /// Move the instruction back to its original position.
2185 void undo() override {
2186 LLVM_DEBUG(dbgs() << "Undo: moveBefore: " << *Inst << "\n");
2187 Position.insert(Inst);
2191 /// Set the operand of an instruction with a new value.
2192 class OperandSetter : public TypePromotionAction {
2193 /// Original operand of the instruction.
2196 /// Index of the modified instruction.
2200 /// Set \p Idx operand of \p Inst with \p NewVal.
2201 OperandSetter(Instruction *Inst, unsigned Idx, Value *NewVal)
2202 : TypePromotionAction(Inst), Idx(Idx) {
2203 LLVM_DEBUG(dbgs() << "Do: setOperand: " << Idx << "\n"
2204 << "for:" << *Inst << "\n"
2205 << "with:" << *NewVal << "\n");
2206 Origin = Inst->getOperand(Idx);
2207 Inst->setOperand(Idx, NewVal);
2210 /// Restore the original value of the instruction.
2211 void undo() override {
2212 LLVM_DEBUG(dbgs() << "Undo: setOperand:" << Idx << "\n"
2213 << "for: " << *Inst << "\n"
2214 << "with: " << *Origin << "\n");
2215 Inst->setOperand(Idx, Origin);
2219 /// Hide the operands of an instruction.
2220 /// Do as if this instruction was not using any of its operands.
2221 class OperandsHider : public TypePromotionAction {
2222 /// The list of original operands.
2223 SmallVector<Value *, 4> OriginalValues;
2226 /// Remove \p Inst from the uses of the operands of \p Inst.
2227 OperandsHider(Instruction *Inst) : TypePromotionAction(Inst) {
2228 LLVM_DEBUG(dbgs() << "Do: OperandsHider: " << *Inst << "\n");
2229 unsigned NumOpnds = Inst->getNumOperands();
2230 OriginalValues.reserve(NumOpnds);
2231 for (unsigned It = 0; It < NumOpnds; ++It) {
2232 // Save the current operand.
2233 Value *Val = Inst->getOperand(It);
2234 OriginalValues.push_back(Val);
2236 // We could use OperandSetter here, but that would imply an overhead
2237 // that we are not willing to pay.
2238 Inst->setOperand(It, UndefValue::get(Val->getType()));
2242 /// Restore the original list of uses.
2243 void undo() override {
2244 LLVM_DEBUG(dbgs() << "Undo: OperandsHider: " << *Inst << "\n");
2245 for (unsigned It = 0, EndIt = OriginalValues.size(); It != EndIt; ++It)
2246 Inst->setOperand(It, OriginalValues[It]);
2250 /// Build a truncate instruction.
2251 class TruncBuilder : public TypePromotionAction {
2255 /// Build a truncate instruction of \p Opnd producing a \p Ty
2257 /// trunc Opnd to Ty.
2258 TruncBuilder(Instruction *Opnd, Type *Ty) : TypePromotionAction(Opnd) {
2259 IRBuilder<> Builder(Opnd);
2260 Val = Builder.CreateTrunc(Opnd, Ty, "promoted");
2261 LLVM_DEBUG(dbgs() << "Do: TruncBuilder: " << *Val << "\n");
2264 /// Get the built value.
2265 Value *getBuiltValue() { return Val; }
2267 /// Remove the built instruction.
2268 void undo() override {
2269 LLVM_DEBUG(dbgs() << "Undo: TruncBuilder: " << *Val << "\n");
2270 if (Instruction *IVal = dyn_cast<Instruction>(Val))
2271 IVal->eraseFromParent();
2275 /// Build a sign extension instruction.
2276 class SExtBuilder : public TypePromotionAction {
2280 /// Build a sign extension instruction of \p Opnd producing a \p Ty
2282 /// sext Opnd to Ty.
2283 SExtBuilder(Instruction *InsertPt, Value *Opnd, Type *Ty)
2284 : TypePromotionAction(InsertPt) {
2285 IRBuilder<> Builder(InsertPt);
2286 Val = Builder.CreateSExt(Opnd, Ty, "promoted");
2287 LLVM_DEBUG(dbgs() << "Do: SExtBuilder: " << *Val << "\n");
2290 /// Get the built value.
2291 Value *getBuiltValue() { return Val; }
2293 /// Remove the built instruction.
2294 void undo() override {
2295 LLVM_DEBUG(dbgs() << "Undo: SExtBuilder: " << *Val << "\n");
2296 if (Instruction *IVal = dyn_cast<Instruction>(Val))
2297 IVal->eraseFromParent();
2301 /// Build a zero extension instruction.
2302 class ZExtBuilder : public TypePromotionAction {
2306 /// Build a zero extension instruction of \p Opnd producing a \p Ty
2308 /// zext Opnd to Ty.
2309 ZExtBuilder(Instruction *InsertPt, Value *Opnd, Type *Ty)
2310 : TypePromotionAction(InsertPt) {
2311 IRBuilder<> Builder(InsertPt);
2312 Val = Builder.CreateZExt(Opnd, Ty, "promoted");
2313 LLVM_DEBUG(dbgs() << "Do: ZExtBuilder: " << *Val << "\n");
2316 /// Get the built value.
2317 Value *getBuiltValue() { return Val; }
2319 /// Remove the built instruction.
2320 void undo() override {
2321 LLVM_DEBUG(dbgs() << "Undo: ZExtBuilder: " << *Val << "\n");
2322 if (Instruction *IVal = dyn_cast<Instruction>(Val))
2323 IVal->eraseFromParent();
2327 /// Mutate an instruction to another type.
2328 class TypeMutator : public TypePromotionAction {
2329 /// Record the original type.
2333 /// Mutate the type of \p Inst into \p NewTy.
2334 TypeMutator(Instruction *Inst, Type *NewTy)
2335 : TypePromotionAction(Inst), OrigTy(Inst->getType()) {
2336 LLVM_DEBUG(dbgs() << "Do: MutateType: " << *Inst << " with " << *NewTy
2338 Inst->mutateType(NewTy);
2341 /// Mutate the instruction back to its original type.
2342 void undo() override {
2343 LLVM_DEBUG(dbgs() << "Undo: MutateType: " << *Inst << " with " << *OrigTy
2345 Inst->mutateType(OrigTy);
2349 /// Replace the uses of an instruction by another instruction.
2350 class UsesReplacer : public TypePromotionAction {
2351 /// Helper structure to keep track of the replaced uses.
2352 struct InstructionAndIdx {
2353 /// The instruction using the instruction.
2356 /// The index where this instruction is used for Inst.
2359 InstructionAndIdx(Instruction *Inst, unsigned Idx)
2360 : Inst(Inst), Idx(Idx) {}
2363 /// Keep track of the original uses (pair Instruction, Index).
2364 SmallVector<InstructionAndIdx, 4> OriginalUses;
2365 /// Keep track of the debug users.
2366 SmallVector<DbgValueInst *, 1> DbgValues;
2368 using use_iterator = SmallVectorImpl<InstructionAndIdx>::iterator;
2371 /// Replace all the use of \p Inst by \p New.
2372 UsesReplacer(Instruction *Inst, Value *New) : TypePromotionAction(Inst) {
2373 LLVM_DEBUG(dbgs() << "Do: UsersReplacer: " << *Inst << " with " << *New
2375 // Record the original uses.
2376 for (Use &U : Inst->uses()) {
2377 Instruction *UserI = cast<Instruction>(U.getUser());
2378 OriginalUses.push_back(InstructionAndIdx(UserI, U.getOperandNo()));
2380 // Record the debug uses separately. They are not in the instruction's
2381 // use list, but they are replaced by RAUW.
2382 findDbgValues(DbgValues, Inst);
2384 // Now, we can replace the uses.
2385 Inst->replaceAllUsesWith(New);
2388 /// Reassign the original uses of Inst to Inst.
2389 void undo() override {
2390 LLVM_DEBUG(dbgs() << "Undo: UsersReplacer: " << *Inst << "\n");
2391 for (use_iterator UseIt = OriginalUses.begin(),
2392 EndIt = OriginalUses.end();
2393 UseIt != EndIt; ++UseIt) {
2394 UseIt->Inst->setOperand(UseIt->Idx, Inst);
2396 // RAUW has replaced all original uses with references to the new value,
2397 // including the debug uses. Since we are undoing the replacements,
2398 // the original debug uses must also be reinstated to maintain the
2399 // correctness and utility of debug value instructions.
2400 for (auto *DVI: DbgValues) {
2401 LLVMContext &Ctx = Inst->getType()->getContext();
2402 auto *MV = MetadataAsValue::get(Ctx, ValueAsMetadata::get(Inst));
2403 DVI->setOperand(0, MV);
2408 /// Remove an instruction from the IR.
2409 class InstructionRemover : public TypePromotionAction {
2410 /// Original position of the instruction.
2411 InsertionHandler Inserter;
2413 /// Helper structure to hide all the link to the instruction. In other
2414 /// words, this helps to do as if the instruction was removed.
2415 OperandsHider Hider;
2417 /// Keep track of the uses replaced, if any.
2418 UsesReplacer *Replacer = nullptr;
2420 /// Keep track of instructions removed.
2421 SetOfInstrs &RemovedInsts;
2424 /// Remove all reference of \p Inst and optionally replace all its
2426 /// \p RemovedInsts Keep track of the instructions removed by this Action.
2427 /// \pre If !Inst->use_empty(), then New != nullptr
2428 InstructionRemover(Instruction *Inst, SetOfInstrs &RemovedInsts,
2429 Value *New = nullptr)
2430 : TypePromotionAction(Inst), Inserter(Inst), Hider(Inst),
2431 RemovedInsts(RemovedInsts) {
2433 Replacer = new UsesReplacer(Inst, New);
2434 LLVM_DEBUG(dbgs() << "Do: InstructionRemover: " << *Inst << "\n");
2435 RemovedInsts.insert(Inst);
2436 /// The instructions removed here will be freed after completing
2437 /// optimizeBlock() for all blocks as we need to keep track of the
2438 /// removed instructions during promotion.
2439 Inst->removeFromParent();
2442 ~InstructionRemover() override { delete Replacer; }
2444 /// Resurrect the instruction and reassign it to the proper uses if
2445 /// new value was provided when build this action.
2446 void undo() override {
2447 LLVM_DEBUG(dbgs() << "Undo: InstructionRemover: " << *Inst << "\n");
2448 Inserter.insert(Inst);
2452 RemovedInsts.erase(Inst);
2457 /// Restoration point.
2458 /// The restoration point is a pointer to an action instead of an iterator
2459 /// because the iterator may be invalidated but not the pointer.
2460 using ConstRestorationPt = const TypePromotionAction *;
2462 TypePromotionTransaction(SetOfInstrs &RemovedInsts)
2463 : RemovedInsts(RemovedInsts) {}
2465 /// Advocate every changes made in that transaction.
2468 /// Undo all the changes made after the given point.
2469 void rollback(ConstRestorationPt Point);
2471 /// Get the current restoration point.
2472 ConstRestorationPt getRestorationPoint() const;
2474 /// \name API for IR modification with state keeping to support rollback.
2476 /// Same as Instruction::setOperand.
2477 void setOperand(Instruction *Inst, unsigned Idx, Value *NewVal);
2479 /// Same as Instruction::eraseFromParent.
2480 void eraseInstruction(Instruction *Inst, Value *NewVal = nullptr);
2482 /// Same as Value::replaceAllUsesWith.
2483 void replaceAllUsesWith(Instruction *Inst, Value *New);
2485 /// Same as Value::mutateType.
2486 void mutateType(Instruction *Inst, Type *NewTy);
2488 /// Same as IRBuilder::createTrunc.
2489 Value *createTrunc(Instruction *Opnd, Type *Ty);
2491 /// Same as IRBuilder::createSExt.
2492 Value *createSExt(Instruction *Inst, Value *Opnd, Type *Ty);
2494 /// Same as IRBuilder::createZExt.
2495 Value *createZExt(Instruction *Inst, Value *Opnd, Type *Ty);
2497 /// Same as Instruction::moveBefore.
2498 void moveBefore(Instruction *Inst, Instruction *Before);
2502 /// The ordered list of actions made so far.
2503 SmallVector<std::unique_ptr<TypePromotionAction>, 16> Actions;
2505 using CommitPt = SmallVectorImpl<std::unique_ptr<TypePromotionAction>>::iterator;
2507 SetOfInstrs &RemovedInsts;
2510 } // end anonymous namespace
2512 void TypePromotionTransaction::setOperand(Instruction *Inst, unsigned Idx,
2514 Actions.push_back(llvm::make_unique<TypePromotionTransaction::OperandSetter>(
2515 Inst, Idx, NewVal));
2518 void TypePromotionTransaction::eraseInstruction(Instruction *Inst,
2521 llvm::make_unique<TypePromotionTransaction::InstructionRemover>(
2522 Inst, RemovedInsts, NewVal));
2525 void TypePromotionTransaction::replaceAllUsesWith(Instruction *Inst,
2528 llvm::make_unique<TypePromotionTransaction::UsesReplacer>(Inst, New));
2531 void TypePromotionTransaction::mutateType(Instruction *Inst, Type *NewTy) {
2533 llvm::make_unique<TypePromotionTransaction::TypeMutator>(Inst, NewTy));
2536 Value *TypePromotionTransaction::createTrunc(Instruction *Opnd,
2538 std::unique_ptr<TruncBuilder> Ptr(new TruncBuilder(Opnd, Ty));
2539 Value *Val = Ptr->getBuiltValue();
2540 Actions.push_back(std::move(Ptr));
2544 Value *TypePromotionTransaction::createSExt(Instruction *Inst,
2545 Value *Opnd, Type *Ty) {
2546 std::unique_ptr<SExtBuilder> Ptr(new SExtBuilder(Inst, Opnd, Ty));
2547 Value *Val = Ptr->getBuiltValue();
2548 Actions.push_back(std::move(Ptr));
2552 Value *TypePromotionTransaction::createZExt(Instruction *Inst,
2553 Value *Opnd, Type *Ty) {
2554 std::unique_ptr<ZExtBuilder> Ptr(new ZExtBuilder(Inst, Opnd, Ty));
2555 Value *Val = Ptr->getBuiltValue();
2556 Actions.push_back(std::move(Ptr));
2560 void TypePromotionTransaction::moveBefore(Instruction *Inst,
2561 Instruction *Before) {
2563 llvm::make_unique<TypePromotionTransaction::InstructionMoveBefore>(
2567 TypePromotionTransaction::ConstRestorationPt
2568 TypePromotionTransaction::getRestorationPoint() const {
2569 return !Actions.empty() ? Actions.back().get() : nullptr;
2572 void TypePromotionTransaction::commit() {
2573 for (CommitPt It = Actions.begin(), EndIt = Actions.end(); It != EndIt;
2579 void TypePromotionTransaction::rollback(
2580 TypePromotionTransaction::ConstRestorationPt Point) {
2581 while (!Actions.empty() && Point != Actions.back().get()) {
2582 std::unique_ptr<TypePromotionAction> Curr = Actions.pop_back_val();
2589 /// A helper class for matching addressing modes.
2591 /// This encapsulates the logic for matching the target-legal addressing modes.
2592 class AddressingModeMatcher {
2593 SmallVectorImpl<Instruction*> &AddrModeInsts;
2594 const TargetLowering &TLI;
2595 const TargetRegisterInfo &TRI;
2596 const DataLayout &DL;
2598 /// AccessTy/MemoryInst - This is the type for the access (e.g. double) and
2599 /// the memory instruction that we're computing this address for.
2602 Instruction *MemoryInst;
2604 /// This is the addressing mode that we're building up. This is
2605 /// part of the return value of this addressing mode matching stuff.
2606 ExtAddrMode &AddrMode;
2608 /// The instructions inserted by other CodeGenPrepare optimizations.
2609 const SetOfInstrs &InsertedInsts;
2611 /// A map from the instructions to their type before promotion.
2612 InstrToOrigTy &PromotedInsts;
2614 /// The ongoing transaction where every action should be registered.
2615 TypePromotionTransaction &TPT;
2617 // A GEP which has too large offset to be folded into the addressing mode.
2618 std::pair<AssertingVH<GetElementPtrInst>, int64_t> &LargeOffsetGEP;
2620 /// This is set to true when we should not do profitability checks.
2621 /// When true, IsProfitableToFoldIntoAddressingMode always returns true.
2622 bool IgnoreProfitability;
2624 AddressingModeMatcher(
2625 SmallVectorImpl<Instruction *> &AMI, const TargetLowering &TLI,
2626 const TargetRegisterInfo &TRI, Type *AT, unsigned AS, Instruction *MI,
2627 ExtAddrMode &AM, const SetOfInstrs &InsertedInsts,
2628 InstrToOrigTy &PromotedInsts, TypePromotionTransaction &TPT,
2629 std::pair<AssertingVH<GetElementPtrInst>, int64_t> &LargeOffsetGEP)
2630 : AddrModeInsts(AMI), TLI(TLI), TRI(TRI),
2631 DL(MI->getModule()->getDataLayout()), AccessTy(AT), AddrSpace(AS),
2632 MemoryInst(MI), AddrMode(AM), InsertedInsts(InsertedInsts),
2633 PromotedInsts(PromotedInsts), TPT(TPT), LargeOffsetGEP(LargeOffsetGEP) {
2634 IgnoreProfitability = false;
2638 /// Find the maximal addressing mode that a load/store of V can fold,
2639 /// give an access type of AccessTy. This returns a list of involved
2640 /// instructions in AddrModeInsts.
2641 /// \p InsertedInsts The instructions inserted by other CodeGenPrepare
2643 /// \p PromotedInsts maps the instructions to their type before promotion.
2644 /// \p The ongoing transaction where every action should be registered.
2646 Match(Value *V, Type *AccessTy, unsigned AS, Instruction *MemoryInst,
2647 SmallVectorImpl<Instruction *> &AddrModeInsts,
2648 const TargetLowering &TLI, const TargetRegisterInfo &TRI,
2649 const SetOfInstrs &InsertedInsts, InstrToOrigTy &PromotedInsts,
2650 TypePromotionTransaction &TPT,
2651 std::pair<AssertingVH<GetElementPtrInst>, int64_t> &LargeOffsetGEP) {
2654 bool Success = AddressingModeMatcher(AddrModeInsts, TLI, TRI, AccessTy, AS,
2655 MemoryInst, Result, InsertedInsts,
2656 PromotedInsts, TPT, LargeOffsetGEP)
2658 (void)Success; assert(Success && "Couldn't select *anything*?");
2663 bool matchScaledValue(Value *ScaleReg, int64_t Scale, unsigned Depth);
2664 bool matchAddr(Value *Addr, unsigned Depth);
2665 bool matchOperationAddr(User *AddrInst, unsigned Opcode, unsigned Depth,
2666 bool *MovedAway = nullptr);
2667 bool isProfitableToFoldIntoAddressingMode(Instruction *I,
2668 ExtAddrMode &AMBefore,
2669 ExtAddrMode &AMAfter);
2670 bool valueAlreadyLiveAtInst(Value *Val, Value *KnownLive1, Value *KnownLive2);
2671 bool isPromotionProfitable(unsigned NewCost, unsigned OldCost,
2672 Value *PromotedOperand) const;
2677 /// An iterator for PhiNodeSet.
2678 class PhiNodeSetIterator {
2679 PhiNodeSet * const Set;
2680 size_t CurrentIndex = 0;
2683 /// The constructor. Start should point to either a valid element, or be equal
2684 /// to the size of the underlying SmallVector of the PhiNodeSet.
2685 PhiNodeSetIterator(PhiNodeSet * const Set, size_t Start);
2686 PHINode * operator*() const;
2687 PhiNodeSetIterator& operator++();
2688 bool operator==(const PhiNodeSetIterator &RHS) const;
2689 bool operator!=(const PhiNodeSetIterator &RHS) const;
2692 /// Keeps a set of PHINodes.
2694 /// This is a minimal set implementation for a specific use case:
2695 /// It is very fast when there are very few elements, but also provides good
2696 /// performance when there are many. It is similar to SmallPtrSet, but also
2697 /// provides iteration by insertion order, which is deterministic and stable
2698 /// across runs. It is also similar to SmallSetVector, but provides removing
2699 /// elements in O(1) time. This is achieved by not actually removing the element
2700 /// from the underlying vector, so comes at the cost of using more memory, but
2701 /// that is fine, since PhiNodeSets are used as short lived objects.
2703 friend class PhiNodeSetIterator;
2705 using MapType = SmallDenseMap<PHINode *, size_t, 32>;
2706 using iterator = PhiNodeSetIterator;
2708 /// Keeps the elements in the order of their insertion in the underlying
2709 /// vector. To achieve constant time removal, it never deletes any element.
2710 SmallVector<PHINode *, 32> NodeList;
2712 /// Keeps the elements in the underlying set implementation. This (and not the
2713 /// NodeList defined above) is the source of truth on whether an element
2714 /// is actually in the collection.
2717 /// Points to the first valid (not deleted) element when the set is not empty
2718 /// and the value is not zero. Equals to the size of the underlying vector
2719 /// when the set is empty. When the value is 0, as in the beginning, the
2720 /// first element may or may not be valid.
2721 size_t FirstValidElement = 0;
2724 /// Inserts a new element to the collection.
2725 /// \returns true if the element is actually added, i.e. was not in the
2726 /// collection before the operation.
2727 bool insert(PHINode *Ptr) {
2728 if (NodeMap.insert(std::make_pair(Ptr, NodeList.size())).second) {
2729 NodeList.push_back(Ptr);
2735 /// Removes the element from the collection.
2736 /// \returns whether the element is actually removed, i.e. was in the
2737 /// collection before the operation.
2738 bool erase(PHINode *Ptr) {
2739 auto it = NodeMap.find(Ptr);
2740 if (it != NodeMap.end()) {
2742 SkipRemovedElements(FirstValidElement);
2748 /// Removes all elements and clears the collection.
2752 FirstValidElement = 0;
2755 /// \returns an iterator that will iterate the elements in the order of
2758 if (FirstValidElement == 0)
2759 SkipRemovedElements(FirstValidElement);
2760 return PhiNodeSetIterator(this, FirstValidElement);
2763 /// \returns an iterator that points to the end of the collection.
2764 iterator end() { return PhiNodeSetIterator(this, NodeList.size()); }
2766 /// Returns the number of elements in the collection.
2767 size_t size() const {
2768 return NodeMap.size();
2771 /// \returns 1 if the given element is in the collection, and 0 if otherwise.
2772 size_t count(PHINode *Ptr) const {
2773 return NodeMap.count(Ptr);
2777 /// Updates the CurrentIndex so that it will point to a valid element.
2779 /// If the element of NodeList at CurrentIndex is valid, it does not
2780 /// change it. If there are no more valid elements, it updates CurrentIndex
2781 /// to point to the end of the NodeList.
2782 void SkipRemovedElements(size_t &CurrentIndex) {
2783 while (CurrentIndex < NodeList.size()) {
2784 auto it = NodeMap.find(NodeList[CurrentIndex]);
2785 // If the element has been deleted and added again later, NodeMap will
2786 // point to a different index, so CurrentIndex will still be invalid.
2787 if (it != NodeMap.end() && it->second == CurrentIndex)
2794 PhiNodeSetIterator::PhiNodeSetIterator(PhiNodeSet *const Set, size_t Start)
2795 : Set(Set), CurrentIndex(Start) {}
2797 PHINode * PhiNodeSetIterator::operator*() const {
2798 assert(CurrentIndex < Set->NodeList.size() &&
2799 "PhiNodeSet access out of range");
2800 return Set->NodeList[CurrentIndex];
2803 PhiNodeSetIterator& PhiNodeSetIterator::operator++() {
2804 assert(CurrentIndex < Set->NodeList.size() &&
2805 "PhiNodeSet access out of range");
2807 Set->SkipRemovedElements(CurrentIndex);
2811 bool PhiNodeSetIterator::operator==(const PhiNodeSetIterator &RHS) const {
2812 return CurrentIndex == RHS.CurrentIndex;
2815 bool PhiNodeSetIterator::operator!=(const PhiNodeSetIterator &RHS) const {
2816 return !((*this) == RHS);
2819 /// Keep track of simplification of Phi nodes.
2820 /// Accept the set of all phi nodes and erase phi node from this set
2821 /// if it is simplified.
2822 class SimplificationTracker {
2823 DenseMap<Value *, Value *> Storage;
2824 const SimplifyQuery &SQ;
2825 // Tracks newly created Phi nodes. The elements are iterated by insertion
2827 PhiNodeSet AllPhiNodes;
2828 // Tracks newly created Select nodes.
2829 SmallPtrSet<SelectInst *, 32> AllSelectNodes;
2832 SimplificationTracker(const SimplifyQuery &sq)
2835 Value *Get(Value *V) {
2837 auto SV = Storage.find(V);
2838 if (SV == Storage.end())
2844 Value *Simplify(Value *Val) {
2845 SmallVector<Value *, 32> WorkList;
2846 SmallPtrSet<Value *, 32> Visited;
2847 WorkList.push_back(Val);
2848 while (!WorkList.empty()) {
2849 auto P = WorkList.pop_back_val();
2850 if (!Visited.insert(P).second)
2852 if (auto *PI = dyn_cast<Instruction>(P))
2853 if (Value *V = SimplifyInstruction(cast<Instruction>(PI), SQ)) {
2854 for (auto *U : PI->users())
2855 WorkList.push_back(cast<Value>(U));
2857 PI->replaceAllUsesWith(V);
2858 if (auto *PHI = dyn_cast<PHINode>(PI))
2859 AllPhiNodes.erase(PHI);
2860 if (auto *Select = dyn_cast<SelectInst>(PI))
2861 AllSelectNodes.erase(Select);
2862 PI->eraseFromParent();
2868 void Put(Value *From, Value *To) {
2869 Storage.insert({ From, To });
2872 void ReplacePhi(PHINode *From, PHINode *To) {
2873 Value* OldReplacement = Get(From);
2874 while (OldReplacement != From) {
2876 To = dyn_cast<PHINode>(OldReplacement);
2877 OldReplacement = Get(From);
2879 assert(Get(To) == To && "Replacement PHI node is already replaced.");
2881 From->replaceAllUsesWith(To);
2882 AllPhiNodes.erase(From);
2883 From->eraseFromParent();
2886 PhiNodeSet& newPhiNodes() { return AllPhiNodes; }
2888 void insertNewPhi(PHINode *PN) { AllPhiNodes.insert(PN); }
2890 void insertNewSelect(SelectInst *SI) { AllSelectNodes.insert(SI); }
2892 unsigned countNewPhiNodes() const { return AllPhiNodes.size(); }
2894 unsigned countNewSelectNodes() const { return AllSelectNodes.size(); }
2896 void destroyNewNodes(Type *CommonType) {
2897 // For safe erasing, replace the uses with dummy value first.
2898 auto Dummy = UndefValue::get(CommonType);
2899 for (auto I : AllPhiNodes) {
2900 I->replaceAllUsesWith(Dummy);
2901 I->eraseFromParent();
2903 AllPhiNodes.clear();
2904 for (auto I : AllSelectNodes) {
2905 I->replaceAllUsesWith(Dummy);
2906 I->eraseFromParent();
2908 AllSelectNodes.clear();
2912 /// A helper class for combining addressing modes.
2913 class AddressingModeCombiner {
2914 typedef DenseMap<Value *, Value *> FoldAddrToValueMapping;
2915 typedef std::pair<PHINode *, PHINode *> PHIPair;
2918 /// The addressing modes we've collected.
2919 SmallVector<ExtAddrMode, 16> AddrModes;
2921 /// The field in which the AddrModes differ, when we have more than one.
2922 ExtAddrMode::FieldName DifferentField = ExtAddrMode::NoField;
2924 /// Are the AddrModes that we have all just equal to their original values?
2925 bool AllAddrModesTrivial = true;
2927 /// Common Type for all different fields in addressing modes.
2930 /// SimplifyQuery for simplifyInstruction utility.
2931 const SimplifyQuery &SQ;
2933 /// Original Address.
2937 AddressingModeCombiner(const SimplifyQuery &_SQ, Value *OriginalValue)
2938 : CommonType(nullptr), SQ(_SQ), Original(OriginalValue) {}
2940 /// Get the combined AddrMode
2941 const ExtAddrMode &getAddrMode() const {
2942 return AddrModes[0];
2945 /// Add a new AddrMode if it's compatible with the AddrModes we already
2947 /// \return True iff we succeeded in doing so.
2948 bool addNewAddrMode(ExtAddrMode &NewAddrMode) {
2949 // Take note of if we have any non-trivial AddrModes, as we need to detect
2950 // when all AddrModes are trivial as then we would introduce a phi or select
2951 // which just duplicates what's already there.
2952 AllAddrModesTrivial = AllAddrModesTrivial && NewAddrMode.isTrivial();
2954 // If this is the first addrmode then everything is fine.
2955 if (AddrModes.empty()) {
2956 AddrModes.emplace_back(NewAddrMode);
2960 // Figure out how different this is from the other address modes, which we
2961 // can do just by comparing against the first one given that we only care
2962 // about the cumulative difference.
2963 ExtAddrMode::FieldName ThisDifferentField =
2964 AddrModes[0].compare(NewAddrMode);
2965 if (DifferentField == ExtAddrMode::NoField)
2966 DifferentField = ThisDifferentField;
2967 else if (DifferentField != ThisDifferentField)
2968 DifferentField = ExtAddrMode::MultipleFields;
2970 // If NewAddrMode differs in more than one dimension we cannot handle it.
2971 bool CanHandle = DifferentField != ExtAddrMode::MultipleFields;
2973 // If Scale Field is different then we reject.
2974 CanHandle = CanHandle && DifferentField != ExtAddrMode::ScaleField;
2976 // We also must reject the case when base offset is different and
2977 // scale reg is not null, we cannot handle this case due to merge of
2978 // different offsets will be used as ScaleReg.
2979 CanHandle = CanHandle && (DifferentField != ExtAddrMode::BaseOffsField ||
2980 !NewAddrMode.ScaledReg);
2982 // We also must reject the case when GV is different and BaseReg installed
2983 // due to we want to use base reg as a merge of GV values.
2984 CanHandle = CanHandle && (DifferentField != ExtAddrMode::BaseGVField ||
2985 !NewAddrMode.HasBaseReg);
2987 // Even if NewAddMode is the same we still need to collect it due to
2988 // original value is different. And later we will need all original values
2989 // as anchors during finding the common Phi node.
2991 AddrModes.emplace_back(NewAddrMode);
2998 /// Combine the addressing modes we've collected into a single
2999 /// addressing mode.
3000 /// \return True iff we successfully combined them or we only had one so
3001 /// didn't need to combine them anyway.
3002 bool combineAddrModes() {
3003 // If we have no AddrModes then they can't be combined.
3004 if (AddrModes.size() == 0)
3007 // A single AddrMode can trivially be combined.
3008 if (AddrModes.size() == 1 || DifferentField == ExtAddrMode::NoField)
3011 // If the AddrModes we collected are all just equal to the value they are
3012 // derived from then combining them wouldn't do anything useful.
3013 if (AllAddrModesTrivial)
3016 if (!addrModeCombiningAllowed())
3019 // Build a map between <original value, basic block where we saw it> to
3020 // value of base register.
3021 // Bail out if there is no common type.
3022 FoldAddrToValueMapping Map;
3023 if (!initializeMap(Map))
3026 Value *CommonValue = findCommon(Map);
3028 AddrModes[0].SetCombinedField(DifferentField, CommonValue, AddrModes);
3029 return CommonValue != nullptr;
3033 /// Initialize Map with anchor values. For address seen
3034 /// we set the value of different field saw in this address.
3035 /// At the same time we find a common type for different field we will
3036 /// use to create new Phi/Select nodes. Keep it in CommonType field.
3037 /// Return false if there is no common type found.
3038 bool initializeMap(FoldAddrToValueMapping &Map) {
3039 // Keep track of keys where the value is null. We will need to replace it
3040 // with constant null when we know the common type.
3041 SmallVector<Value *, 2> NullValue;
3042 Type *IntPtrTy = SQ.DL.getIntPtrType(AddrModes[0].OriginalValue->getType());
3043 for (auto &AM : AddrModes) {
3044 Value *DV = AM.GetFieldAsValue(DifferentField, IntPtrTy);
3046 auto *Type = DV->getType();
3047 if (CommonType && CommonType != Type)
3050 Map[AM.OriginalValue] = DV;
3052 NullValue.push_back(AM.OriginalValue);
3055 assert(CommonType && "At least one non-null value must be!");
3056 for (auto *V : NullValue)
3057 Map[V] = Constant::getNullValue(CommonType);
3061 /// We have mapping between value A and other value B where B was a field in
3062 /// addressing mode represented by A. Also we have an original value C
3063 /// representing an address we start with. Traversing from C through phi and
3064 /// selects we ended up with A's in a map. This utility function tries to find
3065 /// a value V which is a field in addressing mode C and traversing through phi
3066 /// nodes and selects we will end up in corresponded values B in a map.
3067 /// The utility will create a new Phi/Selects if needed.
3068 // The simple example looks as follows:
3076 // p = phi [p1, BB1], [p2, BB2]
3083 // The function tries to find or build phi [b1, BB1], [b2, BB2] in BB3.
3084 Value *findCommon(FoldAddrToValueMapping &Map) {
3085 // Tracks the simplification of newly created phi nodes. The reason we use
3086 // this mapping is because we will add new created Phi nodes in AddrToBase.
3087 // Simplification of Phi nodes is recursive, so some Phi node may
3088 // be simplified after we added it to AddrToBase. In reality this
3089 // simplification is possible only if original phi/selects were not
3091 // Using this mapping we can find the current value in AddrToBase.
3092 SimplificationTracker ST(SQ);
3094 // First step, DFS to create PHI nodes for all intermediate blocks.
3095 // Also fill traverse order for the second step.
3096 SmallVector<Value *, 32> TraverseOrder;
3097 InsertPlaceholders(Map, TraverseOrder, ST);
3099 // Second Step, fill new nodes by merged values and simplify if possible.
3100 FillPlaceholders(Map, TraverseOrder, ST);
3102 if (!AddrSinkNewSelects && ST.countNewSelectNodes() > 0) {
3103 ST.destroyNewNodes(CommonType);
3107 // Now we'd like to match New Phi nodes to existed ones.
3108 unsigned PhiNotMatchedCount = 0;
3109 if (!MatchPhiSet(ST, AddrSinkNewPhis, PhiNotMatchedCount)) {
3110 ST.destroyNewNodes(CommonType);
3114 auto *Result = ST.Get(Map.find(Original)->second);
3116 NumMemoryInstsPhiCreated += ST.countNewPhiNodes() + PhiNotMatchedCount;
3117 NumMemoryInstsSelectCreated += ST.countNewSelectNodes();
3122 /// Try to match PHI node to Candidate.
3123 /// Matcher tracks the matched Phi nodes.
3124 bool MatchPhiNode(PHINode *PHI, PHINode *Candidate,
3125 SmallSetVector<PHIPair, 8> &Matcher,
3126 PhiNodeSet &PhiNodesToMatch) {
3127 SmallVector<PHIPair, 8> WorkList;
3128 Matcher.insert({ PHI, Candidate });
3129 WorkList.push_back({ PHI, Candidate });
3130 SmallSet<PHIPair, 8> Visited;
3131 while (!WorkList.empty()) {
3132 auto Item = WorkList.pop_back_val();
3133 if (!Visited.insert(Item).second)
3135 // We iterate over all incoming values to Phi to compare them.
3136 // If values are different and both of them Phi and the first one is a
3137 // Phi we added (subject to match) and both of them is in the same basic
3138 // block then we can match our pair if values match. So we state that
3139 // these values match and add it to work list to verify that.
3140 for (auto B : Item.first->blocks()) {
3141 Value *FirstValue = Item.first->getIncomingValueForBlock(B);
3142 Value *SecondValue = Item.second->getIncomingValueForBlock(B);
3143 if (FirstValue == SecondValue)
3146 PHINode *FirstPhi = dyn_cast<PHINode>(FirstValue);
3147 PHINode *SecondPhi = dyn_cast<PHINode>(SecondValue);
3149 // One of them is not Phi or
3150 // The first one is not Phi node from the set we'd like to match or
3151 // Phi nodes from different basic blocks then
3152 // we will not be able to match.
3153 if (!FirstPhi || !SecondPhi || !PhiNodesToMatch.count(FirstPhi) ||
3154 FirstPhi->getParent() != SecondPhi->getParent())
3157 // If we already matched them then continue.
3158 if (Matcher.count({ FirstPhi, SecondPhi }))
3160 // So the values are different and does not match. So we need them to
3162 Matcher.insert({ FirstPhi, SecondPhi });
3163 // But me must check it.
3164 WorkList.push_back({ FirstPhi, SecondPhi });
3170 /// For the given set of PHI nodes (in the SimplificationTracker) try
3171 /// to find their equivalents.
3172 /// Returns false if this matching fails and creation of new Phi is disabled.
3173 bool MatchPhiSet(SimplificationTracker &ST, bool AllowNewPhiNodes,
3174 unsigned &PhiNotMatchedCount) {
3175 // Matched and PhiNodesToMatch iterate their elements in a deterministic
3176 // order, so the replacements (ReplacePhi) are also done in a deterministic
3178 SmallSetVector<PHIPair, 8> Matched;
3179 SmallPtrSet<PHINode *, 8> WillNotMatch;
3180 PhiNodeSet &PhiNodesToMatch = ST.newPhiNodes();
3181 while (PhiNodesToMatch.size()) {
3182 PHINode *PHI = *PhiNodesToMatch.begin();
3184 // Add us, if no Phi nodes in the basic block we do not match.
3185 WillNotMatch.clear();
3186 WillNotMatch.insert(PHI);
3188 // Traverse all Phis until we found equivalent or fail to do that.
3189 bool IsMatched = false;
3190 for (auto &P : PHI->getParent()->phis()) {
3193 if ((IsMatched = MatchPhiNode(PHI, &P, Matched, PhiNodesToMatch)))
3195 // If it does not match, collect all Phi nodes from matcher.
3196 // if we end up with no match, them all these Phi nodes will not match
3198 for (auto M : Matched)
3199 WillNotMatch.insert(M.first);
3203 // Replace all matched values and erase them.
3204 for (auto MV : Matched)
3205 ST.ReplacePhi(MV.first, MV.second);
3209 // If we are not allowed to create new nodes then bail out.
3210 if (!AllowNewPhiNodes)
3212 // Just remove all seen values in matcher. They will not match anything.
3213 PhiNotMatchedCount += WillNotMatch.size();
3214 for (auto *P : WillNotMatch)
3215 PhiNodesToMatch.erase(P);
3219 /// Fill the placeholders with values from predecessors and simplify them.
3220 void FillPlaceholders(FoldAddrToValueMapping &Map,
3221 SmallVectorImpl<Value *> &TraverseOrder,
3222 SimplificationTracker &ST) {
3223 while (!TraverseOrder.empty()) {
3224 Value *Current = TraverseOrder.pop_back_val();
3225 assert(Map.find(Current) != Map.end() && "No node to fill!!!");
3226 Value *V = Map[Current];
3228 if (SelectInst *Select = dyn_cast<SelectInst>(V)) {
3229 // CurrentValue also must be Select.
3230 auto *CurrentSelect = cast<SelectInst>(Current);
3231 auto *TrueValue = CurrentSelect->getTrueValue();
3232 assert(Map.find(TrueValue) != Map.end() && "No True Value!");
3233 Select->setTrueValue(ST.Get(Map[TrueValue]));
3234 auto *FalseValue = CurrentSelect->getFalseValue();
3235 assert(Map.find(FalseValue) != Map.end() && "No False Value!");
3236 Select->setFalseValue(ST.Get(Map[FalseValue]));
3238 // Must be a Phi node then.
3239 PHINode *PHI = cast<PHINode>(V);
3240 auto *CurrentPhi = dyn_cast<PHINode>(Current);
3241 // Fill the Phi node with values from predecessors.
3242 for (auto B : predecessors(PHI->getParent())) {
3243 Value *PV = CurrentPhi->getIncomingValueForBlock(B);
3244 assert(Map.find(PV) != Map.end() && "No predecessor Value!");
3245 PHI->addIncoming(ST.Get(Map[PV]), B);
3248 Map[Current] = ST.Simplify(V);
3252 /// Starting from original value recursively iterates over def-use chain up to
3253 /// known ending values represented in a map. For each traversed phi/select
3254 /// inserts a placeholder Phi or Select.
3255 /// Reports all new created Phi/Select nodes by adding them to set.
3256 /// Also reports and order in what values have been traversed.
3257 void InsertPlaceholders(FoldAddrToValueMapping &Map,
3258 SmallVectorImpl<Value *> &TraverseOrder,
3259 SimplificationTracker &ST) {
3260 SmallVector<Value *, 32> Worklist;
3261 assert((isa<PHINode>(Original) || isa<SelectInst>(Original)) &&
3262 "Address must be a Phi or Select node");
3263 auto *Dummy = UndefValue::get(CommonType);
3264 Worklist.push_back(Original);
3265 while (!Worklist.empty()) {
3266 Value *Current = Worklist.pop_back_val();
3267 // if it is already visited or it is an ending value then skip it.
3268 if (Map.find(Current) != Map.end())
3270 TraverseOrder.push_back(Current);
3272 // CurrentValue must be a Phi node or select. All others must be covered
3274 if (SelectInst *CurrentSelect = dyn_cast<SelectInst>(Current)) {
3275 // Is it OK to get metadata from OrigSelect?!
3276 // Create a Select placeholder with dummy value.
3277 SelectInst *Select = SelectInst::Create(
3278 CurrentSelect->getCondition(), Dummy, Dummy,
3279 CurrentSelect->getName(), CurrentSelect, CurrentSelect);
3280 Map[Current] = Select;
3281 ST.insertNewSelect(Select);
3282 // We are interested in True and False values.
3283 Worklist.push_back(CurrentSelect->getTrueValue());
3284 Worklist.push_back(CurrentSelect->getFalseValue());
3286 // It must be a Phi node then.
3287 PHINode *CurrentPhi = cast<PHINode>(Current);
3288 unsigned PredCount = CurrentPhi->getNumIncomingValues();
3290 PHINode::Create(CommonType, PredCount, "sunk_phi", CurrentPhi);
3292 ST.insertNewPhi(PHI);
3293 for (Value *P : CurrentPhi->incoming_values())
3294 Worklist.push_back(P);
3299 bool addrModeCombiningAllowed() {
3300 if (DisableComplexAddrModes)
3302 switch (DifferentField) {
3305 case ExtAddrMode::BaseRegField:
3306 return AddrSinkCombineBaseReg;
3307 case ExtAddrMode::BaseGVField:
3308 return AddrSinkCombineBaseGV;
3309 case ExtAddrMode::BaseOffsField:
3310 return AddrSinkCombineBaseOffs;
3311 case ExtAddrMode::ScaledRegField:
3312 return AddrSinkCombineScaledReg;
3316 } // end anonymous namespace
3318 /// Try adding ScaleReg*Scale to the current addressing mode.
3319 /// Return true and update AddrMode if this addr mode is legal for the target,
3321 bool AddressingModeMatcher::matchScaledValue(Value *ScaleReg, int64_t Scale,
3323 // If Scale is 1, then this is the same as adding ScaleReg to the addressing
3324 // mode. Just process that directly.
3326 return matchAddr(ScaleReg, Depth);
3328 // If the scale is 0, it takes nothing to add this.
3332 // If we already have a scale of this value, we can add to it, otherwise, we
3333 // need an available scale field.
3334 if (AddrMode.Scale != 0 && AddrMode.ScaledReg != ScaleReg)
3337 ExtAddrMode TestAddrMode = AddrMode;
3339 // Add scale to turn X*4+X*3 -> X*7. This could also do things like
3340 // [A+B + A*7] -> [B+A*8].
3341 TestAddrMode.Scale += Scale;
3342 TestAddrMode.ScaledReg = ScaleReg;
3344 // If the new address isn't legal, bail out.
3345 if (!TLI.isLegalAddressingMode(DL, TestAddrMode, AccessTy, AddrSpace))
3348 // It was legal, so commit it.
3349 AddrMode = TestAddrMode;
3351 // Okay, we decided that we can add ScaleReg+Scale to AddrMode. Check now
3352 // to see if ScaleReg is actually X+C. If so, we can turn this into adding
3353 // X*Scale + C*Scale to addr mode.
3354 ConstantInt *CI = nullptr; Value *AddLHS = nullptr;
3355 if (isa<Instruction>(ScaleReg) && // not a constant expr.
3356 match(ScaleReg, m_Add(m_Value(AddLHS), m_ConstantInt(CI)))) {
3357 TestAddrMode.ScaledReg = AddLHS;
3358 TestAddrMode.BaseOffs += CI->getSExtValue()*TestAddrMode.Scale;
3360 // If this addressing mode is legal, commit it and remember that we folded
3361 // this instruction.
3362 if (TLI.isLegalAddressingMode(DL, TestAddrMode, AccessTy, AddrSpace)) {
3363 AddrModeInsts.push_back(cast<Instruction>(ScaleReg));
3364 AddrMode = TestAddrMode;
3369 // Otherwise, not (x+c)*scale, just return what we have.
3373 /// This is a little filter, which returns true if an addressing computation
3374 /// involving I might be folded into a load/store accessing it.
3375 /// This doesn't need to be perfect, but needs to accept at least
3376 /// the set of instructions that MatchOperationAddr can.
3377 static bool MightBeFoldableInst(Instruction *I) {
3378 switch (I->getOpcode()) {
3379 case Instruction::BitCast:
3380 case Instruction::AddrSpaceCast:
3381 // Don't touch identity bitcasts.
3382 if (I->getType() == I->getOperand(0)->getType())
3384 return I->getType()->isIntOrPtrTy();
3385 case Instruction::PtrToInt:
3386 // PtrToInt is always a noop, as we know that the int type is pointer sized.
3388 case Instruction::IntToPtr:
3389 // We know the input is intptr_t, so this is foldable.
3391 case Instruction::Add:
3393 case Instruction::Mul:
3394 case Instruction::Shl:
3395 // Can only handle X*C and X << C.
3396 return isa<ConstantInt>(I->getOperand(1));
3397 case Instruction::GetElementPtr:
3404 /// Check whether or not \p Val is a legal instruction for \p TLI.
3405 /// \note \p Val is assumed to be the product of some type promotion.
3406 /// Therefore if \p Val has an undefined state in \p TLI, this is assumed
3407 /// to be legal, as the non-promoted value would have had the same state.
3408 static bool isPromotedInstructionLegal(const TargetLowering &TLI,
3409 const DataLayout &DL, Value *Val) {
3410 Instruction *PromotedInst = dyn_cast<Instruction>(Val);
3413 int ISDOpcode = TLI.InstructionOpcodeToISD(PromotedInst->getOpcode());
3414 // If the ISDOpcode is undefined, it was undefined before the promotion.
3417 // Otherwise, check if the promoted instruction is legal or not.
3418 return TLI.isOperationLegalOrCustom(
3419 ISDOpcode, TLI.getValueType(DL, PromotedInst->getType()));
3424 /// Hepler class to perform type promotion.
3425 class TypePromotionHelper {
3426 /// Utility function to add a promoted instruction \p ExtOpnd to
3427 /// \p PromotedInsts and record the type of extension we have seen.
3428 static void addPromotedInst(InstrToOrigTy &PromotedInsts,
3429 Instruction *ExtOpnd,
3431 ExtType ExtTy = IsSExt ? SignExtension : ZeroExtension;
3432 InstrToOrigTy::iterator It = PromotedInsts.find(ExtOpnd);
3433 if (It != PromotedInsts.end()) {
3434 // If the new extension is same as original, the information in
3435 // PromotedInsts[ExtOpnd] is still correct.
3436 if (It->second.getInt() == ExtTy)
3439 // Now the new extension is different from old extension, we make
3440 // the type information invalid by setting extension type to
3442 ExtTy = BothExtension;
3444 PromotedInsts[ExtOpnd] = TypeIsSExt(ExtOpnd->getType(), ExtTy);
3447 /// Utility function to query the original type of instruction \p Opnd
3448 /// with a matched extension type. If the extension doesn't match, we
3449 /// cannot use the information we had on the original type.
3450 /// BothExtension doesn't match any extension type.
3451 static const Type *getOrigType(const InstrToOrigTy &PromotedInsts,
3454 ExtType ExtTy = IsSExt ? SignExtension : ZeroExtension;
3455 InstrToOrigTy::const_iterator It = PromotedInsts.find(Opnd);
3456 if (It != PromotedInsts.end() && It->second.getInt() == ExtTy)
3457 return It->second.getPointer();
3461 /// Utility function to check whether or not a sign or zero extension
3462 /// of \p Inst with \p ConsideredExtType can be moved through \p Inst by
3463 /// either using the operands of \p Inst or promoting \p Inst.
3464 /// The type of the extension is defined by \p IsSExt.
3465 /// In other words, check if:
3466 /// ext (Ty Inst opnd1 opnd2 ... opndN) to ConsideredExtType.
3467 /// #1 Promotion applies:
3468 /// ConsideredExtType Inst (ext opnd1 to ConsideredExtType, ...).
3469 /// #2 Operand reuses:
3470 /// ext opnd1 to ConsideredExtType.
3471 /// \p PromotedInsts maps the instructions to their type before promotion.
3472 static bool canGetThrough(const Instruction *Inst, Type *ConsideredExtType,
3473 const InstrToOrigTy &PromotedInsts, bool IsSExt);
3475 /// Utility function to determine if \p OpIdx should be promoted when
3476 /// promoting \p Inst.
3477 static bool shouldExtOperand(const Instruction *Inst, int OpIdx) {
3478 return !(isa<SelectInst>(Inst) && OpIdx == 0);
3481 /// Utility function to promote the operand of \p Ext when this
3482 /// operand is a promotable trunc or sext or zext.
3483 /// \p PromotedInsts maps the instructions to their type before promotion.
3484 /// \p CreatedInstsCost[out] contains the cost of all instructions
3485 /// created to promote the operand of Ext.
3486 /// Newly added extensions are inserted in \p Exts.
3487 /// Newly added truncates are inserted in \p Truncs.
3488 /// Should never be called directly.
3489 /// \return The promoted value which is used instead of Ext.
3490 static Value *promoteOperandForTruncAndAnyExt(
3491 Instruction *Ext, TypePromotionTransaction &TPT,
3492 InstrToOrigTy &PromotedInsts, unsigned &CreatedInstsCost,
3493 SmallVectorImpl<Instruction *> *Exts,
3494 SmallVectorImpl<Instruction *> *Truncs, const TargetLowering &TLI);
3496 /// Utility function to promote the operand of \p Ext when this
3497 /// operand is promotable and is not a supported trunc or sext.
3498 /// \p PromotedInsts maps the instructions to their type before promotion.
3499 /// \p CreatedInstsCost[out] contains the cost of all the instructions
3500 /// created to promote the operand of Ext.
3501 /// Newly added extensions are inserted in \p Exts.
3502 /// Newly added truncates are inserted in \p Truncs.
3503 /// Should never be called directly.
3504 /// \return The promoted value which is used instead of Ext.
3505 static Value *promoteOperandForOther(Instruction *Ext,
3506 TypePromotionTransaction &TPT,
3507 InstrToOrigTy &PromotedInsts,
3508 unsigned &CreatedInstsCost,
3509 SmallVectorImpl<Instruction *> *Exts,
3510 SmallVectorImpl<Instruction *> *Truncs,
3511 const TargetLowering &TLI, bool IsSExt);
3513 /// \see promoteOperandForOther.
3514 static Value *signExtendOperandForOther(
3515 Instruction *Ext, TypePromotionTransaction &TPT,
3516 InstrToOrigTy &PromotedInsts, unsigned &CreatedInstsCost,
3517 SmallVectorImpl<Instruction *> *Exts,
3518 SmallVectorImpl<Instruction *> *Truncs, const TargetLowering &TLI) {
3519 return promoteOperandForOther(Ext, TPT, PromotedInsts, CreatedInstsCost,
3520 Exts, Truncs, TLI, true);
3523 /// \see promoteOperandForOther.
3524 static Value *zeroExtendOperandForOther(
3525 Instruction *Ext, TypePromotionTransaction &TPT,
3526 InstrToOrigTy &PromotedInsts, unsigned &CreatedInstsCost,
3527 SmallVectorImpl<Instruction *> *Exts,
3528 SmallVectorImpl<Instruction *> *Truncs, const TargetLowering &TLI) {
3529 return promoteOperandForOther(Ext, TPT, PromotedInsts, CreatedInstsCost,
3530 Exts, Truncs, TLI, false);
3534 /// Type for the utility function that promotes the operand of Ext.
3535 using Action = Value *(*)(Instruction *Ext, TypePromotionTransaction &TPT,
3536 InstrToOrigTy &PromotedInsts,
3537 unsigned &CreatedInstsCost,
3538 SmallVectorImpl<Instruction *> *Exts,
3539 SmallVectorImpl<Instruction *> *Truncs,
3540 const TargetLowering &TLI);
3542 /// Given a sign/zero extend instruction \p Ext, return the appropriate
3543 /// action to promote the operand of \p Ext instead of using Ext.
3544 /// \return NULL if no promotable action is possible with the current
3546 /// \p InsertedInsts keeps track of all the instructions inserted by the
3547 /// other CodeGenPrepare optimizations. This information is important
3548 /// because we do not want to promote these instructions as CodeGenPrepare
3549 /// will reinsert them later. Thus creating an infinite loop: create/remove.
3550 /// \p PromotedInsts maps the instructions to their type before promotion.
3551 static Action getAction(Instruction *Ext, const SetOfInstrs &InsertedInsts,
3552 const TargetLowering &TLI,
3553 const InstrToOrigTy &PromotedInsts);
3556 } // end anonymous namespace
3558 bool TypePromotionHelper::canGetThrough(const Instruction *Inst,
3559 Type *ConsideredExtType,
3560 const InstrToOrigTy &PromotedInsts,
3562 // The promotion helper does not know how to deal with vector types yet.
3563 // To be able to fix that, we would need to fix the places where we
3564 // statically extend, e.g., constants and such.
3565 if (Inst->getType()->isVectorTy())
3568 // We can always get through zext.
3569 if (isa<ZExtInst>(Inst))
3572 // sext(sext) is ok too.
3573 if (IsSExt && isa<SExtInst>(Inst))
3576 // We can get through binary operator, if it is legal. In other words, the
3577 // binary operator must have a nuw or nsw flag.
3578 const BinaryOperator *BinOp = dyn_cast<BinaryOperator>(Inst);
3579 if (BinOp && isa<OverflowingBinaryOperator>(BinOp) &&
3580 ((!IsSExt && BinOp->hasNoUnsignedWrap()) ||
3581 (IsSExt && BinOp->hasNoSignedWrap())))
3584 // ext(and(opnd, cst)) --> and(ext(opnd), ext(cst))
3585 if ((Inst->getOpcode() == Instruction::And ||
3586 Inst->getOpcode() == Instruction::Or))
3589 // ext(xor(opnd, cst)) --> xor(ext(opnd), ext(cst))
3590 if (Inst->getOpcode() == Instruction::Xor) {
3591 const ConstantInt *Cst = dyn_cast<ConstantInt>(Inst->getOperand(1));
3592 // Make sure it is not a NOT.
3593 if (Cst && !Cst->getValue().isAllOnesValue())
3597 // zext(shrl(opnd, cst)) --> shrl(zext(opnd), zext(cst))
3598 // It may change a poisoned value into a regular value, like
3599 // zext i32 (shrl i8 %val, 12) --> shrl i32 (zext i8 %val), 12
3600 // poisoned value regular value
3601 // It should be OK since undef covers valid value.
3602 if (Inst->getOpcode() == Instruction::LShr && !IsSExt)
3605 // and(ext(shl(opnd, cst)), cst) --> and(shl(ext(opnd), ext(cst)), cst)
3606 // It may change a poisoned value into a regular value, like
3607 // zext i32 (shl i8 %val, 12) --> shl i32 (zext i8 %val), 12
3608 // poisoned value regular value
3609 // It should be OK since undef covers valid value.
3610 if (Inst->getOpcode() == Instruction::Shl && Inst->hasOneUse()) {
3611 const Instruction *ExtInst =
3612 dyn_cast<const Instruction>(*Inst->user_begin());
3613 if (ExtInst->hasOneUse()) {
3614 const Instruction *AndInst =
3615 dyn_cast<const Instruction>(*ExtInst->user_begin());
3616 if (AndInst && AndInst->getOpcode() == Instruction::And) {
3617 const ConstantInt *Cst = dyn_cast<ConstantInt>(AndInst->getOperand(1));
3619 Cst->getValue().isIntN(Inst->getType()->getIntegerBitWidth()))
3625 // Check if we can do the following simplification.
3626 // ext(trunc(opnd)) --> ext(opnd)
3627 if (!isa<TruncInst>(Inst))
3630 Value *OpndVal = Inst->getOperand(0);
3631 // Check if we can use this operand in the extension.
3632 // If the type is larger than the result type of the extension, we cannot.
3633 if (!OpndVal->getType()->isIntegerTy() ||
3634 OpndVal->getType()->getIntegerBitWidth() >
3635 ConsideredExtType->getIntegerBitWidth())
3638 // If the operand of the truncate is not an instruction, we will not have
3639 // any information on the dropped bits.
3640 // (Actually we could for constant but it is not worth the extra logic).
3641 Instruction *Opnd = dyn_cast<Instruction>(OpndVal);
3645 // Check if the source of the type is narrow enough.
3646 // I.e., check that trunc just drops extended bits of the same kind of
3648 // #1 get the type of the operand and check the kind of the extended bits.
3649 const Type *OpndType = getOrigType(PromotedInsts, Opnd, IsSExt);
3652 else if ((IsSExt && isa<SExtInst>(Opnd)) || (!IsSExt && isa<ZExtInst>(Opnd)))
3653 OpndType = Opnd->getOperand(0)->getType();
3657 // #2 check that the truncate just drops extended bits.
3658 return Inst->getType()->getIntegerBitWidth() >=
3659 OpndType->getIntegerBitWidth();
3662 TypePromotionHelper::Action TypePromotionHelper::getAction(
3663 Instruction *Ext, const SetOfInstrs &InsertedInsts,
3664 const TargetLowering &TLI, const InstrToOrigTy &PromotedInsts) {
3665 assert((isa<SExtInst>(Ext) || isa<ZExtInst>(Ext)) &&
3666 "Unexpected instruction type");
3667 Instruction *ExtOpnd = dyn_cast<Instruction>(Ext->getOperand(0));
3668 Type *ExtTy = Ext->getType();
3669 bool IsSExt = isa<SExtInst>(Ext);
3670 // If the operand of the extension is not an instruction, we cannot
3672 // If it, check we can get through.
3673 if (!ExtOpnd || !canGetThrough(ExtOpnd, ExtTy, PromotedInsts, IsSExt))
3676 // Do not promote if the operand has been added by codegenprepare.
3677 // Otherwise, it means we are undoing an optimization that is likely to be
3678 // redone, thus causing potential infinite loop.
3679 if (isa<TruncInst>(ExtOpnd) && InsertedInsts.count(ExtOpnd))
3682 // SExt or Trunc instructions.
3683 // Return the related handler.
3684 if (isa<SExtInst>(ExtOpnd) || isa<TruncInst>(ExtOpnd) ||
3685 isa<ZExtInst>(ExtOpnd))
3686 return promoteOperandForTruncAndAnyExt;
3688 // Regular instruction.
3689 // Abort early if we will have to insert non-free instructions.
3690 if (!ExtOpnd->hasOneUse() && !TLI.isTruncateFree(ExtTy, ExtOpnd->getType()))
3692 return IsSExt ? signExtendOperandForOther : zeroExtendOperandForOther;
3695 Value *TypePromotionHelper::promoteOperandForTruncAndAnyExt(
3696 Instruction *SExt, TypePromotionTransaction &TPT,
3697 InstrToOrigTy &PromotedInsts, unsigned &CreatedInstsCost,
3698 SmallVectorImpl<Instruction *> *Exts,
3699 SmallVectorImpl<Instruction *> *Truncs, const TargetLowering &TLI) {
3700 // By construction, the operand of SExt is an instruction. Otherwise we cannot
3701 // get through it and this method should not be called.
3702 Instruction *SExtOpnd = cast<Instruction>(SExt->getOperand(0));
3703 Value *ExtVal = SExt;
3704 bool HasMergedNonFreeExt = false;
3705 if (isa<ZExtInst>(SExtOpnd)) {
3706 // Replace s|zext(zext(opnd))
3708 HasMergedNonFreeExt = !TLI.isExtFree(SExtOpnd);
3710 TPT.createZExt(SExt, SExtOpnd->getOperand(0), SExt->getType());
3711 TPT.replaceAllUsesWith(SExt, ZExt);
3712 TPT.eraseInstruction(SExt);
3715 // Replace z|sext(trunc(opnd)) or sext(sext(opnd))
3717 TPT.setOperand(SExt, 0, SExtOpnd->getOperand(0));
3719 CreatedInstsCost = 0;
3721 // Remove dead code.
3722 if (SExtOpnd->use_empty())
3723 TPT.eraseInstruction(SExtOpnd);
3725 // Check if the extension is still needed.
3726 Instruction *ExtInst = dyn_cast<Instruction>(ExtVal);
3727 if (!ExtInst || ExtInst->getType() != ExtInst->getOperand(0)->getType()) {
3730 Exts->push_back(ExtInst);
3731 CreatedInstsCost = !TLI.isExtFree(ExtInst) && !HasMergedNonFreeExt;
3736 // At this point we have: ext ty opnd to ty.
3737 // Reassign the uses of ExtInst to the opnd and remove ExtInst.
3738 Value *NextVal = ExtInst->getOperand(0);
3739 TPT.eraseInstruction(ExtInst, NextVal);
3743 Value *TypePromotionHelper::promoteOperandForOther(
3744 Instruction *Ext, TypePromotionTransaction &TPT,
3745 InstrToOrigTy &PromotedInsts, unsigned &CreatedInstsCost,
3746 SmallVectorImpl<Instruction *> *Exts,
3747 SmallVectorImpl<Instruction *> *Truncs, const TargetLowering &TLI,
3749 // By construction, the operand of Ext is an instruction. Otherwise we cannot
3750 // get through it and this method should not be called.
3751 Instruction *ExtOpnd = cast<Instruction>(Ext->getOperand(0));
3752 CreatedInstsCost = 0;
3753 if (!ExtOpnd->hasOneUse()) {
3754 // ExtOpnd will be promoted.
3755 // All its uses, but Ext, will need to use a truncated value of the
3756 // promoted version.
3757 // Create the truncate now.
3758 Value *Trunc = TPT.createTrunc(Ext, ExtOpnd->getType());
3759 if (Instruction *ITrunc = dyn_cast<Instruction>(Trunc)) {
3760 // Insert it just after the definition.
3761 ITrunc->moveAfter(ExtOpnd);
3763 Truncs->push_back(ITrunc);
3766 TPT.replaceAllUsesWith(ExtOpnd, Trunc);
3767 // Restore the operand of Ext (which has been replaced by the previous call
3768 // to replaceAllUsesWith) to avoid creating a cycle trunc <-> sext.
3769 TPT.setOperand(Ext, 0, ExtOpnd);
3772 // Get through the Instruction:
3773 // 1. Update its type.
3774 // 2. Replace the uses of Ext by Inst.
3775 // 3. Extend each operand that needs to be extended.
3777 // Remember the original type of the instruction before promotion.
3778 // This is useful to know that the high bits are sign extended bits.
3779 addPromotedInst(PromotedInsts, ExtOpnd, IsSExt);
3781 TPT.mutateType(ExtOpnd, Ext->getType());
3783 TPT.replaceAllUsesWith(Ext, ExtOpnd);
3785 Instruction *ExtForOpnd = Ext;
3787 LLVM_DEBUG(dbgs() << "Propagate Ext to operands\n");
3788 for (int OpIdx = 0, EndOpIdx = ExtOpnd->getNumOperands(); OpIdx != EndOpIdx;
3790 LLVM_DEBUG(dbgs() << "Operand:\n" << *(ExtOpnd->getOperand(OpIdx)) << '\n');
3791 if (ExtOpnd->getOperand(OpIdx)->getType() == Ext->getType() ||
3792 !shouldExtOperand(ExtOpnd, OpIdx)) {
3793 LLVM_DEBUG(dbgs() << "No need to propagate\n");
3796 // Check if we can statically extend the operand.
3797 Value *Opnd = ExtOpnd->getOperand(OpIdx);
3798 if (const ConstantInt *Cst = dyn_cast<ConstantInt>(Opnd)) {
3799 LLVM_DEBUG(dbgs() << "Statically extend\n");
3800 unsigned BitWidth = Ext->getType()->getIntegerBitWidth();
3801 APInt CstVal = IsSExt ? Cst->getValue().sext(BitWidth)
3802 : Cst->getValue().zext(BitWidth);
3803 TPT.setOperand(ExtOpnd, OpIdx, ConstantInt::get(Ext->getType(), CstVal));
3806 // UndefValue are typed, so we have to statically sign extend them.
3807 if (isa<UndefValue>(Opnd)) {
3808 LLVM_DEBUG(dbgs() << "Statically extend\n");
3809 TPT.setOperand(ExtOpnd, OpIdx, UndefValue::get(Ext->getType()));
3813 // Otherwise we have to explicitly sign extend the operand.
3814 // Check if Ext was reused to extend an operand.
3816 // If yes, create a new one.
3817 LLVM_DEBUG(dbgs() << "More operands to ext\n");
3818 Value *ValForExtOpnd = IsSExt ? TPT.createSExt(Ext, Opnd, Ext->getType())
3819 : TPT.createZExt(Ext, Opnd, Ext->getType());
3820 if (!isa<Instruction>(ValForExtOpnd)) {
3821 TPT.setOperand(ExtOpnd, OpIdx, ValForExtOpnd);
3824 ExtForOpnd = cast<Instruction>(ValForExtOpnd);
3827 Exts->push_back(ExtForOpnd);
3828 TPT.setOperand(ExtForOpnd, 0, Opnd);
3830 // Move the sign extension before the insertion point.
3831 TPT.moveBefore(ExtForOpnd, ExtOpnd);
3832 TPT.setOperand(ExtOpnd, OpIdx, ExtForOpnd);
3833 CreatedInstsCost += !TLI.isExtFree(ExtForOpnd);
3834 // If more sext are required, new instructions will have to be created.
3835 ExtForOpnd = nullptr;
3837 if (ExtForOpnd == Ext) {
3838 LLVM_DEBUG(dbgs() << "Extension is useless now\n");
3839 TPT.eraseInstruction(Ext);
3844 /// Check whether or not promoting an instruction to a wider type is profitable.
3845 /// \p NewCost gives the cost of extension instructions created by the
3847 /// \p OldCost gives the cost of extension instructions before the promotion
3848 /// plus the number of instructions that have been
3849 /// matched in the addressing mode the promotion.
3850 /// \p PromotedOperand is the value that has been promoted.
3851 /// \return True if the promotion is profitable, false otherwise.
3852 bool AddressingModeMatcher::isPromotionProfitable(
3853 unsigned NewCost, unsigned OldCost, Value *PromotedOperand) const {
3854 LLVM_DEBUG(dbgs() << "OldCost: " << OldCost << "\tNewCost: " << NewCost
3856 // The cost of the new extensions is greater than the cost of the
3857 // old extension plus what we folded.
3858 // This is not profitable.
3859 if (NewCost > OldCost)
3861 if (NewCost < OldCost)
3863 // The promotion is neutral but it may help folding the sign extension in
3864 // loads for instance.
3865 // Check that we did not create an illegal instruction.
3866 return isPromotedInstructionLegal(TLI, DL, PromotedOperand);
3869 /// Given an instruction or constant expr, see if we can fold the operation
3870 /// into the addressing mode. If so, update the addressing mode and return
3871 /// true, otherwise return false without modifying AddrMode.
3872 /// If \p MovedAway is not NULL, it contains the information of whether or
3873 /// not AddrInst has to be folded into the addressing mode on success.
3874 /// If \p MovedAway == true, \p AddrInst will not be part of the addressing
3875 /// because it has been moved away.
3876 /// Thus AddrInst must not be added in the matched instructions.
3877 /// This state can happen when AddrInst is a sext, since it may be moved away.
3878 /// Therefore, AddrInst may not be valid when MovedAway is true and it must
3879 /// not be referenced anymore.
3880 bool AddressingModeMatcher::matchOperationAddr(User *AddrInst, unsigned Opcode,
3883 // Avoid exponential behavior on extremely deep expression trees.
3884 if (Depth >= 5) return false;
3886 // By default, all matched instructions stay in place.
3891 case Instruction::PtrToInt:
3892 // PtrToInt is always a noop, as we know that the int type is pointer sized.
3893 return matchAddr(AddrInst->getOperand(0), Depth);
3894 case Instruction::IntToPtr: {
3895 auto AS = AddrInst->getType()->getPointerAddressSpace();
3896 auto PtrTy = MVT::getIntegerVT(DL.getPointerSizeInBits(AS));
3897 // This inttoptr is a no-op if the integer type is pointer sized.
3898 if (TLI.getValueType(DL, AddrInst->getOperand(0)->getType()) == PtrTy)
3899 return matchAddr(AddrInst->getOperand(0), Depth);
3902 case Instruction::BitCast:
3903 // BitCast is always a noop, and we can handle it as long as it is
3904 // int->int or pointer->pointer (we don't want int<->fp or something).
3905 if (AddrInst->getOperand(0)->getType()->isIntOrPtrTy() &&
3906 // Don't touch identity bitcasts. These were probably put here by LSR,
3907 // and we don't want to mess around with them. Assume it knows what it
3909 AddrInst->getOperand(0)->getType() != AddrInst->getType())
3910 return matchAddr(AddrInst->getOperand(0), Depth);
3912 case Instruction::AddrSpaceCast: {
3914 = AddrInst->getOperand(0)->getType()->getPointerAddressSpace();
3915 unsigned DestAS = AddrInst->getType()->getPointerAddressSpace();
3916 if (TLI.isNoopAddrSpaceCast(SrcAS, DestAS))
3917 return matchAddr(AddrInst->getOperand(0), Depth);
3920 case Instruction::Add: {
3921 // Check to see if we can merge in the RHS then the LHS. If so, we win.
3922 ExtAddrMode BackupAddrMode = AddrMode;
3923 unsigned OldSize = AddrModeInsts.size();
3924 // Start a transaction at this point.
3925 // The LHS may match but not the RHS.
3926 // Therefore, we need a higher level restoration point to undo partially
3927 // matched operation.
3928 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
3929 TPT.getRestorationPoint();
3931 if (matchAddr(AddrInst->getOperand(1), Depth+1) &&
3932 matchAddr(AddrInst->getOperand(0), Depth+1))
3935 // Restore the old addr mode info.
3936 AddrMode = BackupAddrMode;
3937 AddrModeInsts.resize(OldSize);
3938 TPT.rollback(LastKnownGood);
3940 // Otherwise this was over-aggressive. Try merging in the LHS then the RHS.
3941 if (matchAddr(AddrInst->getOperand(0), Depth+1) &&
3942 matchAddr(AddrInst->getOperand(1), Depth+1))
3945 // Otherwise we definitely can't merge the ADD in.
3946 AddrMode = BackupAddrMode;
3947 AddrModeInsts.resize(OldSize);
3948 TPT.rollback(LastKnownGood);
3951 //case Instruction::Or:
3952 // TODO: We can handle "Or Val, Imm" iff this OR is equivalent to an ADD.
3954 case Instruction::Mul:
3955 case Instruction::Shl: {
3956 // Can only handle X*C and X << C.
3957 ConstantInt *RHS = dyn_cast<ConstantInt>(AddrInst->getOperand(1));
3958 if (!RHS || RHS->getBitWidth() > 64)
3960 int64_t Scale = RHS->getSExtValue();
3961 if (Opcode == Instruction::Shl)
3962 Scale = 1LL << Scale;
3964 return matchScaledValue(AddrInst->getOperand(0), Scale, Depth);
3966 case Instruction::GetElementPtr: {
3967 // Scan the GEP. We check it if it contains constant offsets and at most
3968 // one variable offset.
3969 int VariableOperand = -1;
3970 unsigned VariableScale = 0;
3972 int64_t ConstantOffset = 0;
3973 gep_type_iterator GTI = gep_type_begin(AddrInst);
3974 for (unsigned i = 1, e = AddrInst->getNumOperands(); i != e; ++i, ++GTI) {
3975 if (StructType *STy = GTI.getStructTypeOrNull()) {
3976 const StructLayout *SL = DL.getStructLayout(STy);
3978 cast<ConstantInt>(AddrInst->getOperand(i))->getZExtValue();
3979 ConstantOffset += SL->getElementOffset(Idx);
3981 uint64_t TypeSize = DL.getTypeAllocSize(GTI.getIndexedType());
3982 if (ConstantInt *CI = dyn_cast<ConstantInt>(AddrInst->getOperand(i))) {
3983 const APInt &CVal = CI->getValue();
3984 if (CVal.getMinSignedBits() <= 64) {
3985 ConstantOffset += CVal.getSExtValue() * TypeSize;
3989 if (TypeSize) { // Scales of zero don't do anything.
3990 // We only allow one variable index at the moment.
3991 if (VariableOperand != -1)
3994 // Remember the variable index.
3995 VariableOperand = i;
3996 VariableScale = TypeSize;
4001 // A common case is for the GEP to only do a constant offset. In this case,
4002 // just add it to the disp field and check validity.
4003 if (VariableOperand == -1) {
4004 AddrMode.BaseOffs += ConstantOffset;
4005 if (ConstantOffset == 0 ||
4006 TLI.isLegalAddressingMode(DL, AddrMode, AccessTy, AddrSpace)) {
4007 // Check to see if we can fold the base pointer in too.
4008 if (matchAddr(AddrInst->getOperand(0), Depth+1))
4010 } else if (EnableGEPOffsetSplit && isa<GetElementPtrInst>(AddrInst) &&
4011 TLI.shouldConsiderGEPOffsetSplit() && Depth == 0 &&
4012 ConstantOffset > 0) {
4013 // Record GEPs with non-zero offsets as candidates for splitting in the
4014 // event that the offset cannot fit into the r+i addressing mode.
4015 // Simple and common case that only one GEP is used in calculating the
4016 // address for the memory access.
4017 Value *Base = AddrInst->getOperand(0);
4018 auto *BaseI = dyn_cast<Instruction>(Base);
4019 auto *GEP = cast<GetElementPtrInst>(AddrInst);
4020 if (isa<Argument>(Base) || isa<GlobalValue>(Base) ||
4021 (BaseI && !isa<CastInst>(BaseI) &&
4022 !isa<GetElementPtrInst>(BaseI))) {
4023 // If the base is an instruction, make sure the GEP is not in the same
4024 // basic block as the base. If the base is an argument or global
4025 // value, make sure the GEP is not in the entry block. Otherwise,
4026 // instruction selection can undo the split. Also make sure the
4027 // parent block allows inserting non-PHI instructions before the
4029 BasicBlock *Parent =
4030 BaseI ? BaseI->getParent() : &GEP->getFunction()->getEntryBlock();
4031 if (GEP->getParent() != Parent && !Parent->getTerminator()->isEHPad())
4032 LargeOffsetGEP = std::make_pair(GEP, ConstantOffset);
4035 AddrMode.BaseOffs -= ConstantOffset;
4039 // Save the valid addressing mode in case we can't match.
4040 ExtAddrMode BackupAddrMode = AddrMode;
4041 unsigned OldSize = AddrModeInsts.size();
4043 // See if the scale and offset amount is valid for this target.
4044 AddrMode.BaseOffs += ConstantOffset;
4046 // Match the base operand of the GEP.
4047 if (!matchAddr(AddrInst->getOperand(0), Depth+1)) {
4048 // If it couldn't be matched, just stuff the value in a register.
4049 if (AddrMode.HasBaseReg) {
4050 AddrMode = BackupAddrMode;
4051 AddrModeInsts.resize(OldSize);
4054 AddrMode.HasBaseReg = true;
4055 AddrMode.BaseReg = AddrInst->getOperand(0);
4058 // Match the remaining variable portion of the GEP.
4059 if (!matchScaledValue(AddrInst->getOperand(VariableOperand), VariableScale,
4061 // If it couldn't be matched, try stuffing the base into a register
4062 // instead of matching it, and retrying the match of the scale.
4063 AddrMode = BackupAddrMode;
4064 AddrModeInsts.resize(OldSize);
4065 if (AddrMode.HasBaseReg)
4067 AddrMode.HasBaseReg = true;
4068 AddrMode.BaseReg = AddrInst->getOperand(0);
4069 AddrMode.BaseOffs += ConstantOffset;
4070 if (!matchScaledValue(AddrInst->getOperand(VariableOperand),
4071 VariableScale, Depth)) {
4072 // If even that didn't work, bail.
4073 AddrMode = BackupAddrMode;
4074 AddrModeInsts.resize(OldSize);
4081 case Instruction::SExt:
4082 case Instruction::ZExt: {
4083 Instruction *Ext = dyn_cast<Instruction>(AddrInst);
4087 // Try to move this ext out of the way of the addressing mode.
4088 // Ask for a method for doing so.
4089 TypePromotionHelper::Action TPH =
4090 TypePromotionHelper::getAction(Ext, InsertedInsts, TLI, PromotedInsts);
4094 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
4095 TPT.getRestorationPoint();
4096 unsigned CreatedInstsCost = 0;
4097 unsigned ExtCost = !TLI.isExtFree(Ext);
4098 Value *PromotedOperand =
4099 TPH(Ext, TPT, PromotedInsts, CreatedInstsCost, nullptr, nullptr, TLI);
4100 // SExt has been moved away.
4101 // Thus either it will be rematched later in the recursive calls or it is
4102 // gone. Anyway, we must not fold it into the addressing mode at this point.
4106 // addr = gep base, idx
4108 // promotedOpnd = ext opnd <- no match here
4109 // op = promoted_add promotedOpnd, 1 <- match (later in recursive calls)
4110 // addr = gep base, op <- match
4114 assert(PromotedOperand &&
4115 "TypePromotionHelper should have filtered out those cases");
4117 ExtAddrMode BackupAddrMode = AddrMode;
4118 unsigned OldSize = AddrModeInsts.size();
4120 if (!matchAddr(PromotedOperand, Depth) ||
4121 // The total of the new cost is equal to the cost of the created
4123 // The total of the old cost is equal to the cost of the extension plus
4124 // what we have saved in the addressing mode.
4125 !isPromotionProfitable(CreatedInstsCost,
4126 ExtCost + (AddrModeInsts.size() - OldSize),
4128 AddrMode = BackupAddrMode;
4129 AddrModeInsts.resize(OldSize);
4130 LLVM_DEBUG(dbgs() << "Sign extension does not pay off: rollback\n");
4131 TPT.rollback(LastKnownGood);
4140 /// If we can, try to add the value of 'Addr' into the current addressing mode.
4141 /// If Addr can't be added to AddrMode this returns false and leaves AddrMode
4142 /// unmodified. This assumes that Addr is either a pointer type or intptr_t
4145 bool AddressingModeMatcher::matchAddr(Value *Addr, unsigned Depth) {
4146 // Start a transaction at this point that we will rollback if the matching
4148 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
4149 TPT.getRestorationPoint();
4150 if (ConstantInt *CI = dyn_cast<ConstantInt>(Addr)) {
4151 // Fold in immediates if legal for the target.
4152 AddrMode.BaseOffs += CI->getSExtValue();
4153 if (TLI.isLegalAddressingMode(DL, AddrMode, AccessTy, AddrSpace))
4155 AddrMode.BaseOffs -= CI->getSExtValue();
4156 } else if (GlobalValue *GV = dyn_cast<GlobalValue>(Addr)) {
4157 // If this is a global variable, try to fold it into the addressing mode.
4158 if (!AddrMode.BaseGV) {
4159 AddrMode.BaseGV = GV;
4160 if (TLI.isLegalAddressingMode(DL, AddrMode, AccessTy, AddrSpace))
4162 AddrMode.BaseGV = nullptr;
4164 } else if (Instruction *I = dyn_cast<Instruction>(Addr)) {
4165 ExtAddrMode BackupAddrMode = AddrMode;
4166 unsigned OldSize = AddrModeInsts.size();
4168 // Check to see if it is possible to fold this operation.
4169 bool MovedAway = false;
4170 if (matchOperationAddr(I, I->getOpcode(), Depth, &MovedAway)) {
4171 // This instruction may have been moved away. If so, there is nothing
4175 // Okay, it's possible to fold this. Check to see if it is actually
4176 // *profitable* to do so. We use a simple cost model to avoid increasing
4177 // register pressure too much.
4178 if (I->hasOneUse() ||
4179 isProfitableToFoldIntoAddressingMode(I, BackupAddrMode, AddrMode)) {
4180 AddrModeInsts.push_back(I);
4184 // It isn't profitable to do this, roll back.
4185 //cerr << "NOT FOLDING: " << *I;
4186 AddrMode = BackupAddrMode;
4187 AddrModeInsts.resize(OldSize);
4188 TPT.rollback(LastKnownGood);
4190 } else if (ConstantExpr *CE = dyn_cast<ConstantExpr>(Addr)) {
4191 if (matchOperationAddr(CE, CE->getOpcode(), Depth))
4193 TPT.rollback(LastKnownGood);
4194 } else if (isa<ConstantPointerNull>(Addr)) {
4195 // Null pointer gets folded without affecting the addressing mode.
4199 // Worse case, the target should support [reg] addressing modes. :)
4200 if (!AddrMode.HasBaseReg) {
4201 AddrMode.HasBaseReg = true;
4202 AddrMode.BaseReg = Addr;
4203 // Still check for legality in case the target supports [imm] but not [i+r].
4204 if (TLI.isLegalAddressingMode(DL, AddrMode, AccessTy, AddrSpace))
4206 AddrMode.HasBaseReg = false;
4207 AddrMode.BaseReg = nullptr;
4210 // If the base register is already taken, see if we can do [r+r].
4211 if (AddrMode.Scale == 0) {
4213 AddrMode.ScaledReg = Addr;
4214 if (TLI.isLegalAddressingMode(DL, AddrMode, AccessTy, AddrSpace))
4217 AddrMode.ScaledReg = nullptr;
4220 TPT.rollback(LastKnownGood);
4224 /// Check to see if all uses of OpVal by the specified inline asm call are due
4225 /// to memory operands. If so, return true, otherwise return false.
4226 static bool IsOperandAMemoryOperand(CallInst *CI, InlineAsm *IA, Value *OpVal,
4227 const TargetLowering &TLI,
4228 const TargetRegisterInfo &TRI) {
4229 const Function *F = CI->getFunction();
4230 TargetLowering::AsmOperandInfoVector TargetConstraints =
4231 TLI.ParseConstraints(F->getParent()->getDataLayout(), &TRI,
4232 ImmutableCallSite(CI));
4234 for (unsigned i = 0, e = TargetConstraints.size(); i != e; ++i) {
4235 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i];
4237 // Compute the constraint code and ConstraintType to use.
4238 TLI.ComputeConstraintToUse(OpInfo, SDValue());
4240 // If this asm operand is our Value*, and if it isn't an indirect memory
4241 // operand, we can't fold it!
4242 if (OpInfo.CallOperandVal == OpVal &&
4243 (OpInfo.ConstraintType != TargetLowering::C_Memory ||
4244 !OpInfo.isIndirect))
4251 // Max number of memory uses to look at before aborting the search to conserve
4253 static constexpr int MaxMemoryUsesToScan = 20;
4255 /// Recursively walk all the uses of I until we find a memory use.
4256 /// If we find an obviously non-foldable instruction, return true.
4257 /// Add the ultimately found memory instructions to MemoryUses.
4258 static bool FindAllMemoryUses(
4260 SmallVectorImpl<std::pair<Instruction *, unsigned>> &MemoryUses,
4261 SmallPtrSetImpl<Instruction *> &ConsideredInsts, const TargetLowering &TLI,
4262 const TargetRegisterInfo &TRI, int SeenInsts = 0) {
4263 // If we already considered this instruction, we're done.
4264 if (!ConsideredInsts.insert(I).second)
4267 // If this is an obviously unfoldable instruction, bail out.
4268 if (!MightBeFoldableInst(I))
4271 const bool OptSize = I->getFunction()->optForSize();
4273 // Loop over all the uses, recursively processing them.
4274 for (Use &U : I->uses()) {
4275 // Conservatively return true if we're seeing a large number or a deep chain
4276 // of users. This avoids excessive compilation times in pathological cases.
4277 if (SeenInsts++ >= MaxMemoryUsesToScan)
4280 Instruction *UserI = cast<Instruction>(U.getUser());
4281 if (LoadInst *LI = dyn_cast<LoadInst>(UserI)) {
4282 MemoryUses.push_back(std::make_pair(LI, U.getOperandNo()));
4286 if (StoreInst *SI = dyn_cast<StoreInst>(UserI)) {
4287 unsigned opNo = U.getOperandNo();
4288 if (opNo != StoreInst::getPointerOperandIndex())
4289 return true; // Storing addr, not into addr.
4290 MemoryUses.push_back(std::make_pair(SI, opNo));
4294 if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(UserI)) {
4295 unsigned opNo = U.getOperandNo();
4296 if (opNo != AtomicRMWInst::getPointerOperandIndex())
4297 return true; // Storing addr, not into addr.
4298 MemoryUses.push_back(std::make_pair(RMW, opNo));
4302 if (AtomicCmpXchgInst *CmpX = dyn_cast<AtomicCmpXchgInst>(UserI)) {
4303 unsigned opNo = U.getOperandNo();
4304 if (opNo != AtomicCmpXchgInst::getPointerOperandIndex())
4305 return true; // Storing addr, not into addr.
4306 MemoryUses.push_back(std::make_pair(CmpX, opNo));
4310 if (CallInst *CI = dyn_cast<CallInst>(UserI)) {
4311 // If this is a cold call, we can sink the addressing calculation into
4312 // the cold path. See optimizeCallInst
4313 if (!OptSize && CI->hasFnAttr(Attribute::Cold))
4316 InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue());
4317 if (!IA) return true;
4319 // If this is a memory operand, we're cool, otherwise bail out.
4320 if (!IsOperandAMemoryOperand(CI, IA, I, TLI, TRI))
4325 if (FindAllMemoryUses(UserI, MemoryUses, ConsideredInsts, TLI, TRI,
4333 /// Return true if Val is already known to be live at the use site that we're
4334 /// folding it into. If so, there is no cost to include it in the addressing
4335 /// mode. KnownLive1 and KnownLive2 are two values that we know are live at the
4336 /// instruction already.
4337 bool AddressingModeMatcher::valueAlreadyLiveAtInst(Value *Val,Value *KnownLive1,
4338 Value *KnownLive2) {
4339 // If Val is either of the known-live values, we know it is live!
4340 if (Val == nullptr || Val == KnownLive1 || Val == KnownLive2)
4343 // All values other than instructions and arguments (e.g. constants) are live.
4344 if (!isa<Instruction>(Val) && !isa<Argument>(Val)) return true;
4346 // If Val is a constant sized alloca in the entry block, it is live, this is
4347 // true because it is just a reference to the stack/frame pointer, which is
4348 // live for the whole function.
4349 if (AllocaInst *AI = dyn_cast<AllocaInst>(Val))
4350 if (AI->isStaticAlloca())
4353 // Check to see if this value is already used in the memory instruction's
4354 // block. If so, it's already live into the block at the very least, so we
4355 // can reasonably fold it.
4356 return Val->isUsedInBasicBlock(MemoryInst->getParent());
4359 /// It is possible for the addressing mode of the machine to fold the specified
4360 /// instruction into a load or store that ultimately uses it.
4361 /// However, the specified instruction has multiple uses.
4362 /// Given this, it may actually increase register pressure to fold it
4363 /// into the load. For example, consider this code:
4367 /// use(Y) -> nonload/store
4371 /// In this case, Y has multiple uses, and can be folded into the load of Z
4372 /// (yielding load [X+2]). However, doing this will cause both "X" and "X+1" to
4373 /// be live at the use(Y) line. If we don't fold Y into load Z, we use one
4374 /// fewer register. Since Y can't be folded into "use(Y)" we don't increase the
4375 /// number of computations either.
4377 /// Note that this (like most of CodeGenPrepare) is just a rough heuristic. If
4378 /// X was live across 'load Z' for other reasons, we actually *would* want to
4379 /// fold the addressing mode in the Z case. This would make Y die earlier.
4380 bool AddressingModeMatcher::
4381 isProfitableToFoldIntoAddressingMode(Instruction *I, ExtAddrMode &AMBefore,
4382 ExtAddrMode &AMAfter) {
4383 if (IgnoreProfitability) return true;
4385 // AMBefore is the addressing mode before this instruction was folded into it,
4386 // and AMAfter is the addressing mode after the instruction was folded. Get
4387 // the set of registers referenced by AMAfter and subtract out those
4388 // referenced by AMBefore: this is the set of values which folding in this
4389 // address extends the lifetime of.
4391 // Note that there are only two potential values being referenced here,
4392 // BaseReg and ScaleReg (global addresses are always available, as are any
4393 // folded immediates).
4394 Value *BaseReg = AMAfter.BaseReg, *ScaledReg = AMAfter.ScaledReg;
4396 // If the BaseReg or ScaledReg was referenced by the previous addrmode, their
4397 // lifetime wasn't extended by adding this instruction.
4398 if (valueAlreadyLiveAtInst(BaseReg, AMBefore.BaseReg, AMBefore.ScaledReg))
4400 if (valueAlreadyLiveAtInst(ScaledReg, AMBefore.BaseReg, AMBefore.ScaledReg))
4401 ScaledReg = nullptr;
4403 // If folding this instruction (and it's subexprs) didn't extend any live
4404 // ranges, we're ok with it.
4405 if (!BaseReg && !ScaledReg)
4408 // If all uses of this instruction can have the address mode sunk into them,
4409 // we can remove the addressing mode and effectively trade one live register
4410 // for another (at worst.) In this context, folding an addressing mode into
4411 // the use is just a particularly nice way of sinking it.
4412 SmallVector<std::pair<Instruction*,unsigned>, 16> MemoryUses;
4413 SmallPtrSet<Instruction*, 16> ConsideredInsts;
4414 if (FindAllMemoryUses(I, MemoryUses, ConsideredInsts, TLI, TRI))
4415 return false; // Has a non-memory, non-foldable use!
4417 // Now that we know that all uses of this instruction are part of a chain of
4418 // computation involving only operations that could theoretically be folded
4419 // into a memory use, loop over each of these memory operation uses and see
4420 // if they could *actually* fold the instruction. The assumption is that
4421 // addressing modes are cheap and that duplicating the computation involved
4422 // many times is worthwhile, even on a fastpath. For sinking candidates
4423 // (i.e. cold call sites), this serves as a way to prevent excessive code
4424 // growth since most architectures have some reasonable small and fast way to
4425 // compute an effective address. (i.e LEA on x86)
4426 SmallVector<Instruction*, 32> MatchedAddrModeInsts;
4427 for (unsigned i = 0, e = MemoryUses.size(); i != e; ++i) {
4428 Instruction *User = MemoryUses[i].first;
4429 unsigned OpNo = MemoryUses[i].second;
4431 // Get the access type of this use. If the use isn't a pointer, we don't
4432 // know what it accesses.
4433 Value *Address = User->getOperand(OpNo);
4434 PointerType *AddrTy = dyn_cast<PointerType>(Address->getType());
4437 Type *AddressAccessTy = AddrTy->getElementType();
4438 unsigned AS = AddrTy->getAddressSpace();
4440 // Do a match against the root of this address, ignoring profitability. This
4441 // will tell us if the addressing mode for the memory operation will
4442 // *actually* cover the shared instruction.
4444 std::pair<AssertingVH<GetElementPtrInst>, int64_t> LargeOffsetGEP(nullptr,
4446 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
4447 TPT.getRestorationPoint();
4448 AddressingModeMatcher Matcher(
4449 MatchedAddrModeInsts, TLI, TRI, AddressAccessTy, AS, MemoryInst, Result,
4450 InsertedInsts, PromotedInsts, TPT, LargeOffsetGEP);
4451 Matcher.IgnoreProfitability = true;
4452 bool Success = Matcher.matchAddr(Address, 0);
4453 (void)Success; assert(Success && "Couldn't select *anything*?");
4455 // The match was to check the profitability, the changes made are not
4456 // part of the original matcher. Therefore, they should be dropped
4457 // otherwise the original matcher will not present the right state.
4458 TPT.rollback(LastKnownGood);
4460 // If the match didn't cover I, then it won't be shared by it.
4461 if (!is_contained(MatchedAddrModeInsts, I))
4464 MatchedAddrModeInsts.clear();
4470 /// Return true if the specified values are defined in a
4471 /// different basic block than BB.
4472 static bool IsNonLocalValue(Value *V, BasicBlock *BB) {
4473 if (Instruction *I = dyn_cast<Instruction>(V))
4474 return I->getParent() != BB;
4478 /// Sink addressing mode computation immediate before MemoryInst if doing so
4479 /// can be done without increasing register pressure. The need for the
4480 /// register pressure constraint means this can end up being an all or nothing
4481 /// decision for all uses of the same addressing computation.
4483 /// Load and Store Instructions often have addressing modes that can do
4484 /// significant amounts of computation. As such, instruction selection will try
4485 /// to get the load or store to do as much computation as possible for the
4486 /// program. The problem is that isel can only see within a single block. As
4487 /// such, we sink as much legal addressing mode work into the block as possible.
4489 /// This method is used to optimize both load/store and inline asms with memory
4490 /// operands. It's also used to sink addressing computations feeding into cold
4491 /// call sites into their (cold) basic block.
4493 /// The motivation for handling sinking into cold blocks is that doing so can
4494 /// both enable other address mode sinking (by satisfying the register pressure
4495 /// constraint above), and reduce register pressure globally (by removing the
4496 /// addressing mode computation from the fast path entirely.).
4497 bool CodeGenPrepare::optimizeMemoryInst(Instruction *MemoryInst, Value *Addr,
4498 Type *AccessTy, unsigned AddrSpace) {
4501 // Try to collapse single-value PHI nodes. This is necessary to undo
4502 // unprofitable PRE transformations.
4503 SmallVector<Value*, 8> worklist;
4504 SmallPtrSet<Value*, 16> Visited;
4505 worklist.push_back(Addr);
4507 // Use a worklist to iteratively look through PHI and select nodes, and
4508 // ensure that the addressing mode obtained from the non-PHI/select roots of
4509 // the graph are compatible.
4510 bool PhiOrSelectSeen = false;
4511 SmallVector<Instruction*, 16> AddrModeInsts;
4512 const SimplifyQuery SQ(*DL, TLInfo);
4513 AddressingModeCombiner AddrModes(SQ, Addr);
4514 TypePromotionTransaction TPT(RemovedInsts);
4515 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
4516 TPT.getRestorationPoint();
4517 while (!worklist.empty()) {
4518 Value *V = worklist.back();
4519 worklist.pop_back();
4521 // We allow traversing cyclic Phi nodes.
4522 // In case of success after this loop we ensure that traversing through
4523 // Phi nodes ends up with all cases to compute address of the form
4524 // BaseGV + Base + Scale * Index + Offset
4525 // where Scale and Offset are constans and BaseGV, Base and Index
4526 // are exactly the same Values in all cases.
4527 // It means that BaseGV, Scale and Offset dominate our memory instruction
4528 // and have the same value as they had in address computation represented
4529 // as Phi. So we can safely sink address computation to memory instruction.
4530 if (!Visited.insert(V).second)
4533 // For a PHI node, push all of its incoming values.
4534 if (PHINode *P = dyn_cast<PHINode>(V)) {
4535 for (Value *IncValue : P->incoming_values())
4536 worklist.push_back(IncValue);
4537 PhiOrSelectSeen = true;
4540 // Similar for select.
4541 if (SelectInst *SI = dyn_cast<SelectInst>(V)) {
4542 worklist.push_back(SI->getFalseValue());
4543 worklist.push_back(SI->getTrueValue());
4544 PhiOrSelectSeen = true;
4548 // For non-PHIs, determine the addressing mode being computed. Note that
4549 // the result may differ depending on what other uses our candidate
4550 // addressing instructions might have.
4551 AddrModeInsts.clear();
4552 std::pair<AssertingVH<GetElementPtrInst>, int64_t> LargeOffsetGEP(nullptr,
4554 ExtAddrMode NewAddrMode = AddressingModeMatcher::Match(
4555 V, AccessTy, AddrSpace, MemoryInst, AddrModeInsts, *TLI, *TRI,
4556 InsertedInsts, PromotedInsts, TPT, LargeOffsetGEP);
4558 GetElementPtrInst *GEP = LargeOffsetGEP.first;
4559 if (GEP && GEP->getParent() != MemoryInst->getParent() &&
4560 !NewGEPBases.count(GEP)) {
4561 // If splitting the underlying data structure can reduce the offset of a
4562 // GEP, collect the GEP. Skip the GEPs that are the new bases of
4563 // previously split data structures.
4564 LargeOffsetGEPMap[GEP->getPointerOperand()].push_back(LargeOffsetGEP);
4565 if (LargeOffsetGEPID.find(GEP) == LargeOffsetGEPID.end())
4566 LargeOffsetGEPID[GEP] = LargeOffsetGEPID.size();
4569 NewAddrMode.OriginalValue = V;
4570 if (!AddrModes.addNewAddrMode(NewAddrMode))
4574 // Try to combine the AddrModes we've collected. If we couldn't collect any,
4575 // or we have multiple but either couldn't combine them or combining them
4576 // wouldn't do anything useful, bail out now.
4577 if (!AddrModes.combineAddrModes()) {
4578 TPT.rollback(LastKnownGood);
4583 // Get the combined AddrMode (or the only AddrMode, if we only had one).
4584 ExtAddrMode AddrMode = AddrModes.getAddrMode();
4586 // If all the instructions matched are already in this BB, don't do anything.
4587 // If we saw a Phi node then it is not local definitely, and if we saw a select
4588 // then we want to push the address calculation past it even if it's already
4590 if (!PhiOrSelectSeen && none_of(AddrModeInsts, [&](Value *V) {
4591 return IsNonLocalValue(V, MemoryInst->getParent());
4593 LLVM_DEBUG(dbgs() << "CGP: Found local addrmode: " << AddrMode
4598 // Insert this computation right after this user. Since our caller is
4599 // scanning from the top of the BB to the bottom, reuse of the expr are
4600 // guaranteed to happen later.
4601 IRBuilder<> Builder(MemoryInst);
4603 // Now that we determined the addressing expression we want to use and know
4604 // that we have to sink it into this block. Check to see if we have already
4605 // done this for some other load/store instr in this block. If so, reuse
4606 // the computation. Before attempting reuse, check if the address is valid
4607 // as it may have been erased.
4609 WeakTrackingVH SunkAddrVH = SunkAddrs[Addr];
4611 Value * SunkAddr = SunkAddrVH.pointsToAliveValue() ? SunkAddrVH : nullptr;
4613 LLVM_DEBUG(dbgs() << "CGP: Reusing nonlocal addrmode: " << AddrMode
4614 << " for " << *MemoryInst << "\n");
4615 if (SunkAddr->getType() != Addr->getType())
4616 SunkAddr = Builder.CreatePointerCast(SunkAddr, Addr->getType());
4617 } else if (AddrSinkUsingGEPs ||
4618 (!AddrSinkUsingGEPs.getNumOccurrences() && TM && TTI->useAA())) {
4619 // By default, we use the GEP-based method when AA is used later. This
4620 // prevents new inttoptr/ptrtoint pairs from degrading AA capabilities.
4621 LLVM_DEBUG(dbgs() << "CGP: SINKING nonlocal addrmode: " << AddrMode
4622 << " for " << *MemoryInst << "\n");
4623 Type *IntPtrTy = DL->getIntPtrType(Addr->getType());
4624 Value *ResultPtr = nullptr, *ResultIndex = nullptr;
4626 // First, find the pointer.
4627 if (AddrMode.BaseReg && AddrMode.BaseReg->getType()->isPointerTy()) {
4628 ResultPtr = AddrMode.BaseReg;
4629 AddrMode.BaseReg = nullptr;
4632 if (AddrMode.Scale && AddrMode.ScaledReg->getType()->isPointerTy()) {
4633 // We can't add more than one pointer together, nor can we scale a
4634 // pointer (both of which seem meaningless).
4635 if (ResultPtr || AddrMode.Scale != 1)
4638 ResultPtr = AddrMode.ScaledReg;
4642 // It is only safe to sign extend the BaseReg if we know that the math
4643 // required to create it did not overflow before we extend it. Since
4644 // the original IR value was tossed in favor of a constant back when
4645 // the AddrMode was created we need to bail out gracefully if widths
4646 // do not match instead of extending it.
4648 // (See below for code to add the scale.)
4649 if (AddrMode.Scale) {
4650 Type *ScaledRegTy = AddrMode.ScaledReg->getType();
4651 if (cast<IntegerType>(IntPtrTy)->getBitWidth() >
4652 cast<IntegerType>(ScaledRegTy)->getBitWidth())
4656 if (AddrMode.BaseGV) {
4660 ResultPtr = AddrMode.BaseGV;
4663 // If the real base value actually came from an inttoptr, then the matcher
4664 // will look through it and provide only the integer value. In that case,
4666 if (!DL->isNonIntegralPointerType(Addr->getType())) {
4667 if (!ResultPtr && AddrMode.BaseReg) {
4668 ResultPtr = Builder.CreateIntToPtr(AddrMode.BaseReg, Addr->getType(),
4670 AddrMode.BaseReg = nullptr;
4671 } else if (!ResultPtr && AddrMode.Scale == 1) {
4672 ResultPtr = Builder.CreateIntToPtr(AddrMode.ScaledReg, Addr->getType(),
4679 !AddrMode.BaseReg && !AddrMode.Scale && !AddrMode.BaseOffs) {
4680 SunkAddr = Constant::getNullValue(Addr->getType());
4681 } else if (!ResultPtr) {
4685 Builder.getInt8PtrTy(Addr->getType()->getPointerAddressSpace());
4686 Type *I8Ty = Builder.getInt8Ty();
4688 // Start with the base register. Do this first so that subsequent address
4689 // matching finds it last, which will prevent it from trying to match it
4690 // as the scaled value in case it happens to be a mul. That would be
4691 // problematic if we've sunk a different mul for the scale, because then
4692 // we'd end up sinking both muls.
4693 if (AddrMode.BaseReg) {
4694 Value *V = AddrMode.BaseReg;
4695 if (V->getType() != IntPtrTy)
4696 V = Builder.CreateIntCast(V, IntPtrTy, /*isSigned=*/true, "sunkaddr");
4701 // Add the scale value.
4702 if (AddrMode.Scale) {
4703 Value *V = AddrMode.ScaledReg;
4704 if (V->getType() == IntPtrTy) {
4707 assert(cast<IntegerType>(IntPtrTy)->getBitWidth() <
4708 cast<IntegerType>(V->getType())->getBitWidth() &&
4709 "We can't transform if ScaledReg is too narrow");
4710 V = Builder.CreateTrunc(V, IntPtrTy, "sunkaddr");
4713 if (AddrMode.Scale != 1)
4714 V = Builder.CreateMul(V, ConstantInt::get(IntPtrTy, AddrMode.Scale),
4717 ResultIndex = Builder.CreateAdd(ResultIndex, V, "sunkaddr");
4722 // Add in the Base Offset if present.
4723 if (AddrMode.BaseOffs) {
4724 Value *V = ConstantInt::get(IntPtrTy, AddrMode.BaseOffs);
4726 // We need to add this separately from the scale above to help with
4727 // SDAG consecutive load/store merging.
4728 if (ResultPtr->getType() != I8PtrTy)
4729 ResultPtr = Builder.CreatePointerCast(ResultPtr, I8PtrTy);
4730 ResultPtr = Builder.CreateGEP(I8Ty, ResultPtr, ResultIndex, "sunkaddr");
4737 SunkAddr = ResultPtr;
4739 if (ResultPtr->getType() != I8PtrTy)
4740 ResultPtr = Builder.CreatePointerCast(ResultPtr, I8PtrTy);
4741 SunkAddr = Builder.CreateGEP(I8Ty, ResultPtr, ResultIndex, "sunkaddr");
4744 if (SunkAddr->getType() != Addr->getType())
4745 SunkAddr = Builder.CreatePointerCast(SunkAddr, Addr->getType());
4748 // We'd require a ptrtoint/inttoptr down the line, which we can't do for
4749 // non-integral pointers, so in that case bail out now.
4750 Type *BaseTy = AddrMode.BaseReg ? AddrMode.BaseReg->getType() : nullptr;
4751 Type *ScaleTy = AddrMode.Scale ? AddrMode.ScaledReg->getType() : nullptr;
4752 PointerType *BasePtrTy = dyn_cast_or_null<PointerType>(BaseTy);
4753 PointerType *ScalePtrTy = dyn_cast_or_null<PointerType>(ScaleTy);
4754 if (DL->isNonIntegralPointerType(Addr->getType()) ||
4755 (BasePtrTy && DL->isNonIntegralPointerType(BasePtrTy)) ||
4756 (ScalePtrTy && DL->isNonIntegralPointerType(ScalePtrTy)) ||
4758 DL->isNonIntegralPointerType(AddrMode.BaseGV->getType())))
4761 LLVM_DEBUG(dbgs() << "CGP: SINKING nonlocal addrmode: " << AddrMode
4762 << " for " << *MemoryInst << "\n");
4763 Type *IntPtrTy = DL->getIntPtrType(Addr->getType());
4764 Value *Result = nullptr;
4766 // Start with the base register. Do this first so that subsequent address
4767 // matching finds it last, which will prevent it from trying to match it
4768 // as the scaled value in case it happens to be a mul. That would be
4769 // problematic if we've sunk a different mul for the scale, because then
4770 // we'd end up sinking both muls.
4771 if (AddrMode.BaseReg) {
4772 Value *V = AddrMode.BaseReg;
4773 if (V->getType()->isPointerTy())
4774 V = Builder.CreatePtrToInt(V, IntPtrTy, "sunkaddr");
4775 if (V->getType() != IntPtrTy)
4776 V = Builder.CreateIntCast(V, IntPtrTy, /*isSigned=*/true, "sunkaddr");
4780 // Add the scale value.
4781 if (AddrMode.Scale) {
4782 Value *V = AddrMode.ScaledReg;
4783 if (V->getType() == IntPtrTy) {
4785 } else if (V->getType()->isPointerTy()) {
4786 V = Builder.CreatePtrToInt(V, IntPtrTy, "sunkaddr");
4787 } else if (cast<IntegerType>(IntPtrTy)->getBitWidth() <
4788 cast<IntegerType>(V->getType())->getBitWidth()) {
4789 V = Builder.CreateTrunc(V, IntPtrTy, "sunkaddr");
4791 // It is only safe to sign extend the BaseReg if we know that the math
4792 // required to create it did not overflow before we extend it. Since
4793 // the original IR value was tossed in favor of a constant back when
4794 // the AddrMode was created we need to bail out gracefully if widths
4795 // do not match instead of extending it.
4796 Instruction *I = dyn_cast_or_null<Instruction>(Result);
4797 if (I && (Result != AddrMode.BaseReg))
4798 I->eraseFromParent();
4801 if (AddrMode.Scale != 1)
4802 V = Builder.CreateMul(V, ConstantInt::get(IntPtrTy, AddrMode.Scale),
4805 Result = Builder.CreateAdd(Result, V, "sunkaddr");
4810 // Add in the BaseGV if present.
4811 if (AddrMode.BaseGV) {
4812 Value *V = Builder.CreatePtrToInt(AddrMode.BaseGV, IntPtrTy, "sunkaddr");
4814 Result = Builder.CreateAdd(Result, V, "sunkaddr");
4819 // Add in the Base Offset if present.
4820 if (AddrMode.BaseOffs) {
4821 Value *V = ConstantInt::get(IntPtrTy, AddrMode.BaseOffs);
4823 Result = Builder.CreateAdd(Result, V, "sunkaddr");
4829 SunkAddr = Constant::getNullValue(Addr->getType());
4831 SunkAddr = Builder.CreateIntToPtr(Result, Addr->getType(), "sunkaddr");
4834 MemoryInst->replaceUsesOfWith(Repl, SunkAddr);
4835 // Store the newly computed address into the cache. In the case we reused a
4836 // value, this should be idempotent.
4837 SunkAddrs[Addr] = WeakTrackingVH(SunkAddr);
4839 // If we have no uses, recursively delete the value and all dead instructions
4841 if (Repl->use_empty()) {
4842 // This can cause recursive deletion, which can invalidate our iterator.
4843 // Use a WeakTrackingVH to hold onto it in case this happens.
4844 Value *CurValue = &*CurInstIterator;
4845 WeakTrackingVH IterHandle(CurValue);
4846 BasicBlock *BB = CurInstIterator->getParent();
4848 RecursivelyDeleteTriviallyDeadInstructions(Repl, TLInfo);
4850 if (IterHandle != CurValue) {
4851 // If the iterator instruction was recursively deleted, start over at the
4852 // start of the block.
4853 CurInstIterator = BB->begin();
4861 /// If there are any memory operands, use OptimizeMemoryInst to sink their
4862 /// address computing into the block when possible / profitable.
4863 bool CodeGenPrepare::optimizeInlineAsmInst(CallInst *CS) {
4864 bool MadeChange = false;
4866 const TargetRegisterInfo *TRI =
4867 TM->getSubtargetImpl(*CS->getFunction())->getRegisterInfo();
4868 TargetLowering::AsmOperandInfoVector TargetConstraints =
4869 TLI->ParseConstraints(*DL, TRI, CS);
4871 for (unsigned i = 0, e = TargetConstraints.size(); i != e; ++i) {
4872 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i];
4874 // Compute the constraint code and ConstraintType to use.
4875 TLI->ComputeConstraintToUse(OpInfo, SDValue());
4877 if (OpInfo.ConstraintType == TargetLowering::C_Memory &&
4878 OpInfo.isIndirect) {
4879 Value *OpVal = CS->getArgOperand(ArgNo++);
4880 MadeChange |= optimizeMemoryInst(CS, OpVal, OpVal->getType(), ~0u);
4881 } else if (OpInfo.Type == InlineAsm::isInput)
4888 /// Check if all the uses of \p Val are equivalent (or free) zero or
4889 /// sign extensions.
4890 static bool hasSameExtUse(Value *Val, const TargetLowering &TLI) {
4891 assert(!Val->use_empty() && "Input must have at least one use");
4892 const Instruction *FirstUser = cast<Instruction>(*Val->user_begin());
4893 bool IsSExt = isa<SExtInst>(FirstUser);
4894 Type *ExtTy = FirstUser->getType();
4895 for (const User *U : Val->users()) {
4896 const Instruction *UI = cast<Instruction>(U);
4897 if ((IsSExt && !isa<SExtInst>(UI)) || (!IsSExt && !isa<ZExtInst>(UI)))
4899 Type *CurTy = UI->getType();
4900 // Same input and output types: Same instruction after CSE.
4904 // If IsSExt is true, we are in this situation:
4906 // b = sext ty1 a to ty2
4907 // c = sext ty1 a to ty3
4908 // Assuming ty2 is shorter than ty3, this could be turned into:
4910 // b = sext ty1 a to ty2
4911 // c = sext ty2 b to ty3
4912 // However, the last sext is not free.
4916 // This is a ZExt, maybe this is free to extend from one type to another.
4917 // In that case, we would not account for a different use.
4920 if (ExtTy->getScalarType()->getIntegerBitWidth() >
4921 CurTy->getScalarType()->getIntegerBitWidth()) {
4929 if (!TLI.isZExtFree(NarrowTy, LargeTy))
4932 // All uses are the same or can be derived from one another for free.
4936 /// Try to speculatively promote extensions in \p Exts and continue
4937 /// promoting through newly promoted operands recursively as far as doing so is
4938 /// profitable. Save extensions profitably moved up, in \p ProfitablyMovedExts.
4939 /// When some promotion happened, \p TPT contains the proper state to revert
4942 /// \return true if some promotion happened, false otherwise.
4943 bool CodeGenPrepare::tryToPromoteExts(
4944 TypePromotionTransaction &TPT, const SmallVectorImpl<Instruction *> &Exts,
4945 SmallVectorImpl<Instruction *> &ProfitablyMovedExts,
4946 unsigned CreatedInstsCost) {
4947 bool Promoted = false;
4949 // Iterate over all the extensions to try to promote them.
4950 for (auto I : Exts) {
4951 // Early check if we directly have ext(load).
4952 if (isa<LoadInst>(I->getOperand(0))) {
4953 ProfitablyMovedExts.push_back(I);
4957 // Check whether or not we want to do any promotion. The reason we have
4958 // this check inside the for loop is to catch the case where an extension
4959 // is directly fed by a load because in such case the extension can be moved
4960 // up without any promotion on its operands.
4961 if (!TLI || !TLI->enableExtLdPromotion() || DisableExtLdPromotion)
4964 // Get the action to perform the promotion.
4965 TypePromotionHelper::Action TPH =
4966 TypePromotionHelper::getAction(I, InsertedInsts, *TLI, PromotedInsts);
4967 // Check if we can promote.
4969 // Save the current extension as we cannot move up through its operand.
4970 ProfitablyMovedExts.push_back(I);
4974 // Save the current state.
4975 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
4976 TPT.getRestorationPoint();
4977 SmallVector<Instruction *, 4> NewExts;
4978 unsigned NewCreatedInstsCost = 0;
4979 unsigned ExtCost = !TLI->isExtFree(I);
4981 Value *PromotedVal = TPH(I, TPT, PromotedInsts, NewCreatedInstsCost,
4982 &NewExts, nullptr, *TLI);
4983 assert(PromotedVal &&
4984 "TypePromotionHelper should have filtered out those cases");
4986 // We would be able to merge only one extension in a load.
4987 // Therefore, if we have more than 1 new extension we heuristically
4988 // cut this search path, because it means we degrade the code quality.
4989 // With exactly 2, the transformation is neutral, because we will merge
4990 // one extension but leave one. However, we optimistically keep going,
4991 // because the new extension may be removed too.
4992 long long TotalCreatedInstsCost = CreatedInstsCost + NewCreatedInstsCost;
4993 // FIXME: It would be possible to propagate a negative value instead of
4994 // conservatively ceiling it to 0.
4995 TotalCreatedInstsCost =
4996 std::max((long long)0, (TotalCreatedInstsCost - ExtCost));
4997 if (!StressExtLdPromotion &&
4998 (TotalCreatedInstsCost > 1 ||
4999 !isPromotedInstructionLegal(*TLI, *DL, PromotedVal))) {
5000 // This promotion is not profitable, rollback to the previous state, and
5001 // save the current extension in ProfitablyMovedExts as the latest
5002 // speculative promotion turned out to be unprofitable.
5003 TPT.rollback(LastKnownGood);
5004 ProfitablyMovedExts.push_back(I);
5007 // Continue promoting NewExts as far as doing so is profitable.
5008 SmallVector<Instruction *, 2> NewlyMovedExts;
5009 (void)tryToPromoteExts(TPT, NewExts, NewlyMovedExts, TotalCreatedInstsCost);
5010 bool NewPromoted = false;
5011 for (auto ExtInst : NewlyMovedExts) {
5012 Instruction *MovedExt = cast<Instruction>(ExtInst);
5013 Value *ExtOperand = MovedExt->getOperand(0);
5014 // If we have reached to a load, we need this extra profitability check
5015 // as it could potentially be merged into an ext(load).
5016 if (isa<LoadInst>(ExtOperand) &&
5017 !(StressExtLdPromotion || NewCreatedInstsCost <= ExtCost ||
5018 (ExtOperand->hasOneUse() || hasSameExtUse(ExtOperand, *TLI))))
5021 ProfitablyMovedExts.push_back(MovedExt);
5025 // If none of speculative promotions for NewExts is profitable, rollback
5026 // and save the current extension (I) as the last profitable extension.
5028 TPT.rollback(LastKnownGood);
5029 ProfitablyMovedExts.push_back(I);
5032 // The promotion is profitable.
5038 /// Merging redundant sexts when one is dominating the other.
5039 bool CodeGenPrepare::mergeSExts(Function &F) {
5040 DominatorTree DT(F);
5041 bool Changed = false;
5042 for (auto &Entry : ValToSExtendedUses) {
5043 SExts &Insts = Entry.second;
5045 for (Instruction *Inst : Insts) {
5046 if (RemovedInsts.count(Inst) || !isa<SExtInst>(Inst) ||
5047 Inst->getOperand(0) != Entry.first)
5049 bool inserted = false;
5050 for (auto &Pt : CurPts) {
5051 if (DT.dominates(Inst, Pt)) {
5052 Pt->replaceAllUsesWith(Inst);
5053 RemovedInsts.insert(Pt);
5054 Pt->removeFromParent();
5060 if (!DT.dominates(Pt, Inst))
5061 // Give up if we need to merge in a common dominator as the
5062 // experiments show it is not profitable.
5064 Inst->replaceAllUsesWith(Pt);
5065 RemovedInsts.insert(Inst);
5066 Inst->removeFromParent();
5072 CurPts.push_back(Inst);
5078 // Spliting large data structures so that the GEPs accessing them can have
5079 // smaller offsets so that they can be sunk to the same blocks as their users.
5080 // For example, a large struct starting from %base is splitted into two parts
5081 // where the second part starts from %new_base.
5088 // %gep0 = gep %base, off0
5089 // %gep1 = gep %base, off1
5090 // %gep2 = gep %base, off2
5093 // %load1 = load %gep0
5094 // %load2 = load %gep1
5095 // %load3 = load %gep2
5100 // %new_base = gep %base, off0
5103 // %new_gep0 = %new_base
5104 // %new_gep1 = gep %new_base, off1 - off0
5105 // %new_gep2 = gep %new_base, off2 - off0
5108 // %load1 = load i32, i32* %new_gep0
5109 // %load2 = load i32, i32* %new_gep1
5110 // %load3 = load i32, i32* %new_gep2
5112 // %new_gep1 and %new_gep2 can be sunk to BB2 now after the splitting because
5113 // their offsets are smaller enough to fit into the addressing mode.
5114 bool CodeGenPrepare::splitLargeGEPOffsets() {
5115 bool Changed = false;
5116 for (auto &Entry : LargeOffsetGEPMap) {
5117 Value *OldBase = Entry.first;
5118 SmallVectorImpl<std::pair<AssertingVH<GetElementPtrInst>, int64_t>>
5119 &LargeOffsetGEPs = Entry.second;
5120 auto compareGEPOffset =
5121 [&](const std::pair<GetElementPtrInst *, int64_t> &LHS,
5122 const std::pair<GetElementPtrInst *, int64_t> &RHS) {
5123 if (LHS.first == RHS.first)
5125 if (LHS.second != RHS.second)
5126 return LHS.second < RHS.second;
5127 return LargeOffsetGEPID[LHS.first] < LargeOffsetGEPID[RHS.first];
5129 // Sorting all the GEPs of the same data structures based on the offsets.
5130 llvm::sort(LargeOffsetGEPs, compareGEPOffset);
5131 LargeOffsetGEPs.erase(
5132 std::unique(LargeOffsetGEPs.begin(), LargeOffsetGEPs.end()),
5133 LargeOffsetGEPs.end());
5134 // Skip if all the GEPs have the same offsets.
5135 if (LargeOffsetGEPs.front().second == LargeOffsetGEPs.back().second)
5137 GetElementPtrInst *BaseGEP = LargeOffsetGEPs.begin()->first;
5138 int64_t BaseOffset = LargeOffsetGEPs.begin()->second;
5139 Value *NewBaseGEP = nullptr;
5141 auto LargeOffsetGEP = LargeOffsetGEPs.begin();
5142 while (LargeOffsetGEP != LargeOffsetGEPs.end()) {
5143 GetElementPtrInst *GEP = LargeOffsetGEP->first;
5144 int64_t Offset = LargeOffsetGEP->second;
5145 if (Offset != BaseOffset) {
5146 TargetLowering::AddrMode AddrMode;
5147 AddrMode.BaseOffs = Offset - BaseOffset;
5148 // The result type of the GEP might not be the type of the memory
5150 if (!TLI->isLegalAddressingMode(*DL, AddrMode,
5151 GEP->getResultElementType(),
5152 GEP->getAddressSpace())) {
5153 // We need to create a new base if the offset to the current base is
5154 // too large to fit into the addressing mode. So, a very large struct
5155 // may be splitted into several parts.
5157 BaseOffset = Offset;
5158 NewBaseGEP = nullptr;
5162 // Generate a new GEP to replace the current one.
5163 LLVMContext &Ctx = GEP->getContext();
5164 Type *IntPtrTy = DL->getIntPtrType(GEP->getType());
5166 Type::getInt8PtrTy(Ctx, GEP->getType()->getPointerAddressSpace());
5167 Type *I8Ty = Type::getInt8Ty(Ctx);
5170 // Create a new base if we don't have one yet. Find the insertion
5171 // pointer for the new base first.
5172 BasicBlock::iterator NewBaseInsertPt;
5173 BasicBlock *NewBaseInsertBB;
5174 if (auto *BaseI = dyn_cast<Instruction>(OldBase)) {
5175 // If the base of the struct is an instruction, the new base will be
5176 // inserted close to it.
5177 NewBaseInsertBB = BaseI->getParent();
5178 if (isa<PHINode>(BaseI))
5179 NewBaseInsertPt = NewBaseInsertBB->getFirstInsertionPt();
5180 else if (InvokeInst *Invoke = dyn_cast<InvokeInst>(BaseI)) {
5182 SplitEdge(NewBaseInsertBB, Invoke->getNormalDest());
5183 NewBaseInsertPt = NewBaseInsertBB->getFirstInsertionPt();
5185 NewBaseInsertPt = std::next(BaseI->getIterator());
5187 // If the current base is an argument or global value, the new base
5188 // will be inserted to the entry block.
5189 NewBaseInsertBB = &BaseGEP->getFunction()->getEntryBlock();
5190 NewBaseInsertPt = NewBaseInsertBB->getFirstInsertionPt();
5192 IRBuilder<> NewBaseBuilder(NewBaseInsertBB, NewBaseInsertPt);
5193 // Create a new base.
5194 Value *BaseIndex = ConstantInt::get(IntPtrTy, BaseOffset);
5195 NewBaseGEP = OldBase;
5196 if (NewBaseGEP->getType() != I8PtrTy)
5197 NewBaseGEP = NewBaseBuilder.CreatePointerCast(NewBaseGEP, I8PtrTy);
5199 NewBaseBuilder.CreateGEP(I8Ty, NewBaseGEP, BaseIndex, "splitgep");
5200 NewGEPBases.insert(NewBaseGEP);
5203 IRBuilder<> Builder(GEP);
5204 Value *NewGEP = NewBaseGEP;
5205 if (Offset == BaseOffset) {
5206 if (GEP->getType() != I8PtrTy)
5207 NewGEP = Builder.CreatePointerCast(NewGEP, GEP->getType());
5209 // Calculate the new offset for the new GEP.
5210 Value *Index = ConstantInt::get(IntPtrTy, Offset - BaseOffset);
5211 NewGEP = Builder.CreateGEP(I8Ty, NewBaseGEP, Index);
5213 if (GEP->getType() != I8PtrTy)
5214 NewGEP = Builder.CreatePointerCast(NewGEP, GEP->getType());
5216 GEP->replaceAllUsesWith(NewGEP);
5217 LargeOffsetGEPID.erase(GEP);
5218 LargeOffsetGEP = LargeOffsetGEPs.erase(LargeOffsetGEP);
5219 GEP->eraseFromParent();
5226 /// Return true, if an ext(load) can be formed from an extension in
5228 bool CodeGenPrepare::canFormExtLd(
5229 const SmallVectorImpl<Instruction *> &MovedExts, LoadInst *&LI,
5230 Instruction *&Inst, bool HasPromoted) {
5231 for (auto *MovedExtInst : MovedExts) {
5232 if (isa<LoadInst>(MovedExtInst->getOperand(0))) {
5233 LI = cast<LoadInst>(MovedExtInst->getOperand(0));
5234 Inst = MovedExtInst;
5241 // If they're already in the same block, there's nothing to do.
5242 // Make the cheap checks first if we did not promote.
5243 // If we promoted, we need to check if it is indeed profitable.
5244 if (!HasPromoted && LI->getParent() == Inst->getParent())
5247 return TLI->isExtLoad(LI, Inst, *DL);
5250 /// Move a zext or sext fed by a load into the same basic block as the load,
5251 /// unless conditions are unfavorable. This allows SelectionDAG to fold the
5252 /// extend into the load.
5256 /// %ld = load i32* %addr
5257 /// %add = add nuw i32 %ld, 4
5258 /// %zext = zext i32 %add to i64
5262 /// %ld = load i32* %addr
5263 /// %zext = zext i32 %ld to i64
5264 /// %add = add nuw i64 %zext, 4
5266 /// Note that the promotion in %add to i64 is done in tryToPromoteExts(), which
5267 /// allow us to match zext(load i32*) to i64.
5269 /// Also, try to promote the computations used to obtain a sign extended
5270 /// value used into memory accesses.
5273 /// a = add nsw i32 b, 3
5274 /// d = sext i32 a to i64
5275 /// e = getelementptr ..., i64 d
5279 /// f = sext i32 b to i64
5280 /// a = add nsw i64 f, 3
5281 /// e = getelementptr ..., i64 a
5284 /// \p Inst[in/out] the extension may be modified during the process if some
5285 /// promotions apply.
5286 bool CodeGenPrepare::optimizeExt(Instruction *&Inst) {
5287 // ExtLoad formation and address type promotion infrastructure requires TLI to
5292 bool AllowPromotionWithoutCommonHeader = false;
5293 /// See if it is an interesting sext operations for the address type
5294 /// promotion before trying to promote it, e.g., the ones with the right
5295 /// type and used in memory accesses.
5296 bool ATPConsiderable = TTI->shouldConsiderAddressTypePromotion(
5297 *Inst, AllowPromotionWithoutCommonHeader);
5298 TypePromotionTransaction TPT(RemovedInsts);
5299 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
5300 TPT.getRestorationPoint();
5301 SmallVector<Instruction *, 1> Exts;
5302 SmallVector<Instruction *, 2> SpeculativelyMovedExts;
5303 Exts.push_back(Inst);
5305 bool HasPromoted = tryToPromoteExts(TPT, Exts, SpeculativelyMovedExts);
5307 // Look for a load being extended.
5308 LoadInst *LI = nullptr;
5309 Instruction *ExtFedByLoad;
5311 // Try to promote a chain of computation if it allows to form an extended
5313 if (canFormExtLd(SpeculativelyMovedExts, LI, ExtFedByLoad, HasPromoted)) {
5314 assert(LI && ExtFedByLoad && "Expect a valid load and extension");
5316 // Move the extend into the same block as the load
5317 ExtFedByLoad->moveAfter(LI);
5318 // CGP does not check if the zext would be speculatively executed when moved
5319 // to the same basic block as the load. Preserving its original location
5320 // would pessimize the debugging experience, as well as negatively impact
5321 // the quality of sample pgo. We don't want to use "line 0" as that has a
5322 // size cost in the line-table section and logically the zext can be seen as
5323 // part of the load. Therefore we conservatively reuse the same debug
5324 // location for the load and the zext.
5325 ExtFedByLoad->setDebugLoc(LI->getDebugLoc());
5327 Inst = ExtFedByLoad;
5331 // Continue promoting SExts if known as considerable depending on targets.
5332 if (ATPConsiderable &&
5333 performAddressTypePromotion(Inst, AllowPromotionWithoutCommonHeader,
5334 HasPromoted, TPT, SpeculativelyMovedExts))
5337 TPT.rollback(LastKnownGood);
5341 // Perform address type promotion if doing so is profitable.
5342 // If AllowPromotionWithoutCommonHeader == false, we should find other sext
5343 // instructions that sign extended the same initial value. However, if
5344 // AllowPromotionWithoutCommonHeader == true, we expect promoting the
5345 // extension is just profitable.
5346 bool CodeGenPrepare::performAddressTypePromotion(
5347 Instruction *&Inst, bool AllowPromotionWithoutCommonHeader,
5348 bool HasPromoted, TypePromotionTransaction &TPT,
5349 SmallVectorImpl<Instruction *> &SpeculativelyMovedExts) {
5350 bool Promoted = false;
5351 SmallPtrSet<Instruction *, 1> UnhandledExts;
5352 bool AllSeenFirst = true;
5353 for (auto I : SpeculativelyMovedExts) {
5354 Value *HeadOfChain = I->getOperand(0);
5355 DenseMap<Value *, Instruction *>::iterator AlreadySeen =
5356 SeenChainsForSExt.find(HeadOfChain);
5357 // If there is an unhandled SExt which has the same header, try to promote
5359 if (AlreadySeen != SeenChainsForSExt.end()) {
5360 if (AlreadySeen->second != nullptr)
5361 UnhandledExts.insert(AlreadySeen->second);
5362 AllSeenFirst = false;
5366 if (!AllSeenFirst || (AllowPromotionWithoutCommonHeader &&
5367 SpeculativelyMovedExts.size() == 1)) {
5371 for (auto I : SpeculativelyMovedExts) {
5372 Value *HeadOfChain = I->getOperand(0);
5373 SeenChainsForSExt[HeadOfChain] = nullptr;
5374 ValToSExtendedUses[HeadOfChain].push_back(I);
5376 // Update Inst as promotion happen.
5377 Inst = SpeculativelyMovedExts.pop_back_val();
5379 // This is the first chain visited from the header, keep the current chain
5380 // as unhandled. Defer to promote this until we encounter another SExt
5381 // chain derived from the same header.
5382 for (auto I : SpeculativelyMovedExts) {
5383 Value *HeadOfChain = I->getOperand(0);
5384 SeenChainsForSExt[HeadOfChain] = Inst;
5389 if (!AllSeenFirst && !UnhandledExts.empty())
5390 for (auto VisitedSExt : UnhandledExts) {
5391 if (RemovedInsts.count(VisitedSExt))
5393 TypePromotionTransaction TPT(RemovedInsts);
5394 SmallVector<Instruction *, 1> Exts;
5395 SmallVector<Instruction *, 2> Chains;
5396 Exts.push_back(VisitedSExt);
5397 bool HasPromoted = tryToPromoteExts(TPT, Exts, Chains);
5401 for (auto I : Chains) {
5402 Value *HeadOfChain = I->getOperand(0);
5403 // Mark this as handled.
5404 SeenChainsForSExt[HeadOfChain] = nullptr;
5405 ValToSExtendedUses[HeadOfChain].push_back(I);
5411 bool CodeGenPrepare::optimizeExtUses(Instruction *I) {
5412 BasicBlock *DefBB = I->getParent();
5414 // If the result of a {s|z}ext and its source are both live out, rewrite all
5415 // other uses of the source with result of extension.
5416 Value *Src = I->getOperand(0);
5417 if (Src->hasOneUse())
5420 // Only do this xform if truncating is free.
5421 if (TLI && !TLI->isTruncateFree(I->getType(), Src->getType()))
5424 // Only safe to perform the optimization if the source is also defined in
5426 if (!isa<Instruction>(Src) || DefBB != cast<Instruction>(Src)->getParent())
5429 bool DefIsLiveOut = false;
5430 for (User *U : I->users()) {
5431 Instruction *UI = cast<Instruction>(U);
5433 // Figure out which BB this ext is used in.
5434 BasicBlock *UserBB = UI->getParent();
5435 if (UserBB == DefBB) continue;
5436 DefIsLiveOut = true;
5442 // Make sure none of the uses are PHI nodes.
5443 for (User *U : Src->users()) {
5444 Instruction *UI = cast<Instruction>(U);
5445 BasicBlock *UserBB = UI->getParent();
5446 if (UserBB == DefBB) continue;
5447 // Be conservative. We don't want this xform to end up introducing
5448 // reloads just before load / store instructions.
5449 if (isa<PHINode>(UI) || isa<LoadInst>(UI) || isa<StoreInst>(UI))
5453 // InsertedTruncs - Only insert one trunc in each block once.
5454 DenseMap<BasicBlock*, Instruction*> InsertedTruncs;
5456 bool MadeChange = false;
5457 for (Use &U : Src->uses()) {
5458 Instruction *User = cast<Instruction>(U.getUser());
5460 // Figure out which BB this ext is used in.
5461 BasicBlock *UserBB = User->getParent();
5462 if (UserBB == DefBB) continue;
5464 // Both src and def are live in this block. Rewrite the use.
5465 Instruction *&InsertedTrunc = InsertedTruncs[UserBB];
5467 if (!InsertedTrunc) {
5468 BasicBlock::iterator InsertPt = UserBB->getFirstInsertionPt();
5469 assert(InsertPt != UserBB->end());
5470 InsertedTrunc = new TruncInst(I, Src->getType(), "", &*InsertPt);
5471 InsertedInsts.insert(InsertedTrunc);
5474 // Replace a use of the {s|z}ext source with a use of the result.
5483 // Find loads whose uses only use some of the loaded value's bits. Add an "and"
5484 // just after the load if the target can fold this into one extload instruction,
5485 // with the hope of eliminating some of the other later "and" instructions using
5486 // the loaded value. "and"s that are made trivially redundant by the insertion
5487 // of the new "and" are removed by this function, while others (e.g. those whose
5488 // path from the load goes through a phi) are left for isel to potentially
5521 // becomes (after a call to optimizeLoadExt for each load):
5525 // x1' = and x1, 0xff
5529 // x2' = and x2, 0xff
5534 bool CodeGenPrepare::optimizeLoadExt(LoadInst *Load) {
5535 if (!Load->isSimple() || !Load->getType()->isIntOrPtrTy())
5538 // Skip loads we've already transformed.
5539 if (Load->hasOneUse() &&
5540 InsertedInsts.count(cast<Instruction>(*Load->user_begin())))
5543 // Look at all uses of Load, looking through phis, to determine how many bits
5544 // of the loaded value are needed.
5545 SmallVector<Instruction *, 8> WorkList;
5546 SmallPtrSet<Instruction *, 16> Visited;
5547 SmallVector<Instruction *, 8> AndsToMaybeRemove;
5548 for (auto *U : Load->users())
5549 WorkList.push_back(cast<Instruction>(U));
5551 EVT LoadResultVT = TLI->getValueType(*DL, Load->getType());
5552 unsigned BitWidth = LoadResultVT.getSizeInBits();
5553 APInt DemandBits(BitWidth, 0);
5554 APInt WidestAndBits(BitWidth, 0);
5556 while (!WorkList.empty()) {
5557 Instruction *I = WorkList.back();
5558 WorkList.pop_back();
5560 // Break use-def graph loops.
5561 if (!Visited.insert(I).second)
5564 // For a PHI node, push all of its users.
5565 if (auto *Phi = dyn_cast<PHINode>(I)) {
5566 for (auto *U : Phi->users())
5567 WorkList.push_back(cast<Instruction>(U));
5571 switch (I->getOpcode()) {
5572 case Instruction::And: {
5573 auto *AndC = dyn_cast<ConstantInt>(I->getOperand(1));
5576 APInt AndBits = AndC->getValue();
5577 DemandBits |= AndBits;
5578 // Keep track of the widest and mask we see.
5579 if (AndBits.ugt(WidestAndBits))
5580 WidestAndBits = AndBits;
5581 if (AndBits == WidestAndBits && I->getOperand(0) == Load)
5582 AndsToMaybeRemove.push_back(I);
5586 case Instruction::Shl: {
5587 auto *ShlC = dyn_cast<ConstantInt>(I->getOperand(1));
5590 uint64_t ShiftAmt = ShlC->getLimitedValue(BitWidth - 1);
5591 DemandBits.setLowBits(BitWidth - ShiftAmt);
5595 case Instruction::Trunc: {
5596 EVT TruncVT = TLI->getValueType(*DL, I->getType());
5597 unsigned TruncBitWidth = TruncVT.getSizeInBits();
5598 DemandBits.setLowBits(TruncBitWidth);
5607 uint32_t ActiveBits = DemandBits.getActiveBits();
5608 // Avoid hoisting (and (load x) 1) since it is unlikely to be folded by the
5609 // target even if isLoadExtLegal says an i1 EXTLOAD is valid. For example,
5610 // for the AArch64 target isLoadExtLegal(ZEXTLOAD, i32, i1) returns true, but
5611 // (and (load x) 1) is not matched as a single instruction, rather as a LDR
5612 // followed by an AND.
5613 // TODO: Look into removing this restriction by fixing backends to either
5614 // return false for isLoadExtLegal for i1 or have them select this pattern to
5615 // a single instruction.
5617 // Also avoid hoisting if we didn't see any ands with the exact DemandBits
5618 // mask, since these are the only ands that will be removed by isel.
5619 if (ActiveBits <= 1 || !DemandBits.isMask(ActiveBits) ||
5620 WidestAndBits != DemandBits)
5623 LLVMContext &Ctx = Load->getType()->getContext();
5624 Type *TruncTy = Type::getIntNTy(Ctx, ActiveBits);
5625 EVT TruncVT = TLI->getValueType(*DL, TruncTy);
5627 // Reject cases that won't be matched as extloads.
5628 if (!LoadResultVT.bitsGT(TruncVT) || !TruncVT.isRound() ||
5629 !TLI->isLoadExtLegal(ISD::ZEXTLOAD, LoadResultVT, TruncVT))
5632 IRBuilder<> Builder(Load->getNextNode());
5633 auto *NewAnd = dyn_cast<Instruction>(
5634 Builder.CreateAnd(Load, ConstantInt::get(Ctx, DemandBits)));
5635 // Mark this instruction as "inserted by CGP", so that other
5636 // optimizations don't touch it.
5637 InsertedInsts.insert(NewAnd);
5639 // Replace all uses of load with new and (except for the use of load in the
5641 Load->replaceAllUsesWith(NewAnd);
5642 NewAnd->setOperand(0, Load);
5644 // Remove any and instructions that are now redundant.
5645 for (auto *And : AndsToMaybeRemove)
5646 // Check that the and mask is the same as the one we decided to put on the
5648 if (cast<ConstantInt>(And->getOperand(1))->getValue() == DemandBits) {
5649 And->replaceAllUsesWith(NewAnd);
5650 if (&*CurInstIterator == And)
5651 CurInstIterator = std::next(And->getIterator());
5652 And->eraseFromParent();
5660 /// Check if V (an operand of a select instruction) is an expensive instruction
5661 /// that is only used once.
5662 static bool sinkSelectOperand(const TargetTransformInfo *TTI, Value *V) {
5663 auto *I = dyn_cast<Instruction>(V);
5664 // If it's safe to speculatively execute, then it should not have side
5665 // effects; therefore, it's safe to sink and possibly *not* execute.
5666 return I && I->hasOneUse() && isSafeToSpeculativelyExecute(I) &&
5667 TTI->getUserCost(I) >= TargetTransformInfo::TCC_Expensive;
5670 /// Returns true if a SelectInst should be turned into an explicit branch.
5671 static bool isFormingBranchFromSelectProfitable(const TargetTransformInfo *TTI,
5672 const TargetLowering *TLI,
5674 // If even a predictable select is cheap, then a branch can't be cheaper.
5675 if (!TLI->isPredictableSelectExpensive())
5678 // FIXME: This should use the same heuristics as IfConversion to determine
5679 // whether a select is better represented as a branch.
5681 // If metadata tells us that the select condition is obviously predictable,
5682 // then we want to replace the select with a branch.
5683 uint64_t TrueWeight, FalseWeight;
5684 if (SI->extractProfMetadata(TrueWeight, FalseWeight)) {
5685 uint64_t Max = std::max(TrueWeight, FalseWeight);
5686 uint64_t Sum = TrueWeight + FalseWeight;
5688 auto Probability = BranchProbability::getBranchProbability(Max, Sum);
5689 if (Probability > TLI->getPredictableBranchThreshold())
5694 CmpInst *Cmp = dyn_cast<CmpInst>(SI->getCondition());
5696 // If a branch is predictable, an out-of-order CPU can avoid blocking on its
5697 // comparison condition. If the compare has more than one use, there's
5698 // probably another cmov or setcc around, so it's not worth emitting a branch.
5699 if (!Cmp || !Cmp->hasOneUse())
5702 // If either operand of the select is expensive and only needed on one side
5703 // of the select, we should form a branch.
5704 if (sinkSelectOperand(TTI, SI->getTrueValue()) ||
5705 sinkSelectOperand(TTI, SI->getFalseValue()))
5711 /// If \p isTrue is true, return the true value of \p SI, otherwise return
5712 /// false value of \p SI. If the true/false value of \p SI is defined by any
5713 /// select instructions in \p Selects, look through the defining select
5714 /// instruction until the true/false value is not defined in \p Selects.
5715 static Value *getTrueOrFalseValue(
5716 SelectInst *SI, bool isTrue,
5717 const SmallPtrSet<const Instruction *, 2> &Selects) {
5720 for (SelectInst *DefSI = SI; DefSI != nullptr && Selects.count(DefSI);
5721 DefSI = dyn_cast<SelectInst>(V)) {
5722 assert(DefSI->getCondition() == SI->getCondition() &&
5723 "The condition of DefSI does not match with SI");
5724 V = (isTrue ? DefSI->getTrueValue() : DefSI->getFalseValue());
5729 /// If we have a SelectInst that will likely profit from branch prediction,
5730 /// turn it into a branch.
5731 bool CodeGenPrepare::optimizeSelectInst(SelectInst *SI) {
5732 // If branch conversion isn't desirable, exit early.
5733 if (DisableSelectToBranch || OptSize || !TLI)
5736 // Find all consecutive select instructions that share the same condition.
5737 SmallVector<SelectInst *, 2> ASI;
5739 for (BasicBlock::iterator It = ++BasicBlock::iterator(SI);
5740 It != SI->getParent()->end(); ++It) {
5741 SelectInst *I = dyn_cast<SelectInst>(&*It);
5742 if (I && SI->getCondition() == I->getCondition()) {
5749 SelectInst *LastSI = ASI.back();
5750 // Increment the current iterator to skip all the rest of select instructions
5751 // because they will be either "not lowered" or "all lowered" to branch.
5752 CurInstIterator = std::next(LastSI->getIterator());
5754 bool VectorCond = !SI->getCondition()->getType()->isIntegerTy(1);
5756 // Can we convert the 'select' to CF ?
5757 if (VectorCond || SI->getMetadata(LLVMContext::MD_unpredictable))
5760 TargetLowering::SelectSupportKind SelectKind;
5762 SelectKind = TargetLowering::VectorMaskSelect;
5763 else if (SI->getType()->isVectorTy())
5764 SelectKind = TargetLowering::ScalarCondVectorVal;
5766 SelectKind = TargetLowering::ScalarValSelect;
5768 if (TLI->isSelectSupported(SelectKind) &&
5769 !isFormingBranchFromSelectProfitable(TTI, TLI, SI))
5774 // Transform a sequence like this:
5776 // %cmp = cmp uge i32 %a, %b
5777 // %sel = select i1 %cmp, i32 %c, i32 %d
5781 // %cmp = cmp uge i32 %a, %b
5782 // br i1 %cmp, label %select.true, label %select.false
5784 // br label %select.end
5786 // br label %select.end
5788 // %sel = phi i32 [ %c, %select.true ], [ %d, %select.false ]
5790 // In addition, we may sink instructions that produce %c or %d from
5791 // the entry block into the destination(s) of the new branch.
5792 // If the true or false blocks do not contain a sunken instruction, that
5793 // block and its branch may be optimized away. In that case, one side of the
5794 // first branch will point directly to select.end, and the corresponding PHI
5795 // predecessor block will be the start block.
5797 // First, we split the block containing the select into 2 blocks.
5798 BasicBlock *StartBlock = SI->getParent();
5799 BasicBlock::iterator SplitPt = ++(BasicBlock::iterator(LastSI));
5800 BasicBlock *EndBlock = StartBlock->splitBasicBlock(SplitPt, "select.end");
5802 // Delete the unconditional branch that was just created by the split.
5803 StartBlock->getTerminator()->eraseFromParent();
5805 // These are the new basic blocks for the conditional branch.
5806 // At least one will become an actual new basic block.
5807 BasicBlock *TrueBlock = nullptr;
5808 BasicBlock *FalseBlock = nullptr;
5809 BranchInst *TrueBranch = nullptr;
5810 BranchInst *FalseBranch = nullptr;
5812 // Sink expensive instructions into the conditional blocks to avoid executing
5813 // them speculatively.
5814 for (SelectInst *SI : ASI) {
5815 if (sinkSelectOperand(TTI, SI->getTrueValue())) {
5816 if (TrueBlock == nullptr) {
5817 TrueBlock = BasicBlock::Create(SI->getContext(), "select.true.sink",
5818 EndBlock->getParent(), EndBlock);
5819 TrueBranch = BranchInst::Create(EndBlock, TrueBlock);
5820 TrueBranch->setDebugLoc(SI->getDebugLoc());
5822 auto *TrueInst = cast<Instruction>(SI->getTrueValue());
5823 TrueInst->moveBefore(TrueBranch);
5825 if (sinkSelectOperand(TTI, SI->getFalseValue())) {
5826 if (FalseBlock == nullptr) {
5827 FalseBlock = BasicBlock::Create(SI->getContext(), "select.false.sink",
5828 EndBlock->getParent(), EndBlock);
5829 FalseBranch = BranchInst::Create(EndBlock, FalseBlock);
5830 FalseBranch->setDebugLoc(SI->getDebugLoc());
5832 auto *FalseInst = cast<Instruction>(SI->getFalseValue());
5833 FalseInst->moveBefore(FalseBranch);
5837 // If there was nothing to sink, then arbitrarily choose the 'false' side
5838 // for a new input value to the PHI.
5839 if (TrueBlock == FalseBlock) {
5840 assert(TrueBlock == nullptr &&
5841 "Unexpected basic block transform while optimizing select");
5843 FalseBlock = BasicBlock::Create(SI->getContext(), "select.false",
5844 EndBlock->getParent(), EndBlock);
5845 auto *FalseBranch = BranchInst::Create(EndBlock, FalseBlock);
5846 FalseBranch->setDebugLoc(SI->getDebugLoc());
5849 // Insert the real conditional branch based on the original condition.
5850 // If we did not create a new block for one of the 'true' or 'false' paths
5851 // of the condition, it means that side of the branch goes to the end block
5852 // directly and the path originates from the start block from the point of
5853 // view of the new PHI.
5854 BasicBlock *TT, *FT;
5855 if (TrueBlock == nullptr) {
5858 TrueBlock = StartBlock;
5859 } else if (FalseBlock == nullptr) {
5862 FalseBlock = StartBlock;
5867 IRBuilder<>(SI).CreateCondBr(SI->getCondition(), TT, FT, SI);
5869 SmallPtrSet<const Instruction *, 2> INS;
5870 INS.insert(ASI.begin(), ASI.end());
5871 // Use reverse iterator because later select may use the value of the
5872 // earlier select, and we need to propagate value through earlier select
5873 // to get the PHI operand.
5874 for (auto It = ASI.rbegin(); It != ASI.rend(); ++It) {
5875 SelectInst *SI = *It;
5876 // The select itself is replaced with a PHI Node.
5877 PHINode *PN = PHINode::Create(SI->getType(), 2, "", &EndBlock->front());
5879 PN->addIncoming(getTrueOrFalseValue(SI, true, INS), TrueBlock);
5880 PN->addIncoming(getTrueOrFalseValue(SI, false, INS), FalseBlock);
5881 PN->setDebugLoc(SI->getDebugLoc());
5883 SI->replaceAllUsesWith(PN);
5884 SI->eraseFromParent();
5886 ++NumSelectsExpanded;
5889 // Instruct OptimizeBlock to skip to the next block.
5890 CurInstIterator = StartBlock->end();
5894 static bool isBroadcastShuffle(ShuffleVectorInst *SVI) {
5895 SmallVector<int, 16> Mask(SVI->getShuffleMask());
5897 for (unsigned i = 0; i < Mask.size(); ++i) {
5898 if (SplatElem != -1 && Mask[i] != -1 && Mask[i] != SplatElem)
5900 SplatElem = Mask[i];
5906 /// Some targets have expensive vector shifts if the lanes aren't all the same
5907 /// (e.g. x86 only introduced "vpsllvd" and friends with AVX2). In these cases
5908 /// it's often worth sinking a shufflevector splat down to its use so that
5909 /// codegen can spot all lanes are identical.
5910 bool CodeGenPrepare::optimizeShuffleVectorInst(ShuffleVectorInst *SVI) {
5911 BasicBlock *DefBB = SVI->getParent();
5913 // Only do this xform if variable vector shifts are particularly expensive.
5914 if (!TLI || !TLI->isVectorShiftByScalarCheap(SVI->getType()))
5917 // We only expect better codegen by sinking a shuffle if we can recognise a
5919 if (!isBroadcastShuffle(SVI))
5922 // InsertedShuffles - Only insert a shuffle in each block once.
5923 DenseMap<BasicBlock*, Instruction*> InsertedShuffles;
5925 bool MadeChange = false;
5926 for (User *U : SVI->users()) {
5927 Instruction *UI = cast<Instruction>(U);
5929 // Figure out which BB this ext is used in.
5930 BasicBlock *UserBB = UI->getParent();
5931 if (UserBB == DefBB) continue;
5933 // For now only apply this when the splat is used by a shift instruction.
5934 if (!UI->isShift()) continue;
5936 // Everything checks out, sink the shuffle if the user's block doesn't
5937 // already have a copy.
5938 Instruction *&InsertedShuffle = InsertedShuffles[UserBB];
5940 if (!InsertedShuffle) {
5941 BasicBlock::iterator InsertPt = UserBB->getFirstInsertionPt();
5942 assert(InsertPt != UserBB->end());
5944 new ShuffleVectorInst(SVI->getOperand(0), SVI->getOperand(1),
5945 SVI->getOperand(2), "", &*InsertPt);
5948 UI->replaceUsesOfWith(SVI, InsertedShuffle);
5952 // If we removed all uses, nuke the shuffle.
5953 if (SVI->use_empty()) {
5954 SVI->eraseFromParent();
5961 bool CodeGenPrepare::optimizeSwitchInst(SwitchInst *SI) {
5965 Value *Cond = SI->getCondition();
5966 Type *OldType = Cond->getType();
5967 LLVMContext &Context = Cond->getContext();
5968 MVT RegType = TLI->getRegisterType(Context, TLI->getValueType(*DL, OldType));
5969 unsigned RegWidth = RegType.getSizeInBits();
5971 if (RegWidth <= cast<IntegerType>(OldType)->getBitWidth())
5974 // If the register width is greater than the type width, expand the condition
5975 // of the switch instruction and each case constant to the width of the
5976 // register. By widening the type of the switch condition, subsequent
5977 // comparisons (for case comparisons) will not need to be extended to the
5978 // preferred register width, so we will potentially eliminate N-1 extends,
5979 // where N is the number of cases in the switch.
5980 auto *NewType = Type::getIntNTy(Context, RegWidth);
5982 // Zero-extend the switch condition and case constants unless the switch
5983 // condition is a function argument that is already being sign-extended.
5984 // In that case, we can avoid an unnecessary mask/extension by sign-extending
5985 // everything instead.
5986 Instruction::CastOps ExtType = Instruction::ZExt;
5987 if (auto *Arg = dyn_cast<Argument>(Cond))
5988 if (Arg->hasSExtAttr())
5989 ExtType = Instruction::SExt;
5991 auto *ExtInst = CastInst::Create(ExtType, Cond, NewType);
5992 ExtInst->insertBefore(SI);
5993 ExtInst->setDebugLoc(SI->getDebugLoc());
5994 SI->setCondition(ExtInst);
5995 for (auto Case : SI->cases()) {
5996 APInt NarrowConst = Case.getCaseValue()->getValue();
5997 APInt WideConst = (ExtType == Instruction::ZExt) ?
5998 NarrowConst.zext(RegWidth) : NarrowConst.sext(RegWidth);
5999 Case.setValue(ConstantInt::get(Context, WideConst));
6008 /// Helper class to promote a scalar operation to a vector one.
6009 /// This class is used to move downward extractelement transition.
6011 /// a = vector_op <2 x i32>
6012 /// b = extractelement <2 x i32> a, i32 0
6017 /// a = vector_op <2 x i32>
6018 /// c = vector_op a (equivalent to scalar_op on the related lane)
6019 /// * d = extractelement <2 x i32> c, i32 0
6021 /// Assuming both extractelement and store can be combine, we get rid of the
6023 class VectorPromoteHelper {
6024 /// DataLayout associated with the current module.
6025 const DataLayout &DL;
6027 /// Used to perform some checks on the legality of vector operations.
6028 const TargetLowering &TLI;
6030 /// Used to estimated the cost of the promoted chain.
6031 const TargetTransformInfo &TTI;
6033 /// The transition being moved downwards.
6034 Instruction *Transition;
6036 /// The sequence of instructions to be promoted.
6037 SmallVector<Instruction *, 4> InstsToBePromoted;
6039 /// Cost of combining a store and an extract.
6040 unsigned StoreExtractCombineCost;
6042 /// Instruction that will be combined with the transition.
6043 Instruction *CombineInst = nullptr;
6045 /// The instruction that represents the current end of the transition.
6046 /// Since we are faking the promotion until we reach the end of the chain
6047 /// of computation, we need a way to get the current end of the transition.
6048 Instruction *getEndOfTransition() const {
6049 if (InstsToBePromoted.empty())
6051 return InstsToBePromoted.back();
6054 /// Return the index of the original value in the transition.
6055 /// E.g., for "extractelement <2 x i32> c, i32 1" the original value,
6056 /// c, is at index 0.
6057 unsigned getTransitionOriginalValueIdx() const {
6058 assert(isa<ExtractElementInst>(Transition) &&
6059 "Other kind of transitions are not supported yet");
6063 /// Return the index of the index in the transition.
6064 /// E.g., for "extractelement <2 x i32> c, i32 0" the index
6066 unsigned getTransitionIdx() const {
6067 assert(isa<ExtractElementInst>(Transition) &&
6068 "Other kind of transitions are not supported yet");
6072 /// Get the type of the transition.
6073 /// This is the type of the original value.
6074 /// E.g., for "extractelement <2 x i32> c, i32 1" the type of the
6075 /// transition is <2 x i32>.
6076 Type *getTransitionType() const {
6077 return Transition->getOperand(getTransitionOriginalValueIdx())->getType();
6080 /// Promote \p ToBePromoted by moving \p Def downward through.
6081 /// I.e., we have the following sequence:
6082 /// Def = Transition <ty1> a to <ty2>
6083 /// b = ToBePromoted <ty2> Def, ...
6085 /// b = ToBePromoted <ty1> a, ...
6086 /// Def = Transition <ty1> ToBePromoted to <ty2>
6087 void promoteImpl(Instruction *ToBePromoted);
6089 /// Check whether or not it is profitable to promote all the
6090 /// instructions enqueued to be promoted.
6091 bool isProfitableToPromote() {
6092 Value *ValIdx = Transition->getOperand(getTransitionOriginalValueIdx());
6093 unsigned Index = isa<ConstantInt>(ValIdx)
6094 ? cast<ConstantInt>(ValIdx)->getZExtValue()
6096 Type *PromotedType = getTransitionType();
6098 StoreInst *ST = cast<StoreInst>(CombineInst);
6099 unsigned AS = ST->getPointerAddressSpace();
6100 unsigned Align = ST->getAlignment();
6101 // Check if this store is supported.
6102 if (!TLI.allowsMisalignedMemoryAccesses(
6103 TLI.getValueType(DL, ST->getValueOperand()->getType()), AS,
6105 // If this is not supported, there is no way we can combine
6106 // the extract with the store.
6110 // The scalar chain of computation has to pay for the transition
6111 // scalar to vector.
6112 // The vector chain has to account for the combining cost.
6113 uint64_t ScalarCost =
6114 TTI.getVectorInstrCost(Transition->getOpcode(), PromotedType, Index);
6115 uint64_t VectorCost = StoreExtractCombineCost;
6116 for (const auto &Inst : InstsToBePromoted) {
6117 // Compute the cost.
6118 // By construction, all instructions being promoted are arithmetic ones.
6119 // Moreover, one argument is a constant that can be viewed as a splat
6121 Value *Arg0 = Inst->getOperand(0);
6122 bool IsArg0Constant = isa<UndefValue>(Arg0) || isa<ConstantInt>(Arg0) ||
6123 isa<ConstantFP>(Arg0);
6124 TargetTransformInfo::OperandValueKind Arg0OVK =
6125 IsArg0Constant ? TargetTransformInfo::OK_UniformConstantValue
6126 : TargetTransformInfo::OK_AnyValue;
6127 TargetTransformInfo::OperandValueKind Arg1OVK =
6128 !IsArg0Constant ? TargetTransformInfo::OK_UniformConstantValue
6129 : TargetTransformInfo::OK_AnyValue;
6130 ScalarCost += TTI.getArithmeticInstrCost(
6131 Inst->getOpcode(), Inst->getType(), Arg0OVK, Arg1OVK);
6132 VectorCost += TTI.getArithmeticInstrCost(Inst->getOpcode(), PromotedType,
6136 dbgs() << "Estimated cost of computation to be promoted:\nScalar: "
6137 << ScalarCost << "\nVector: " << VectorCost << '\n');
6138 return ScalarCost > VectorCost;
6141 /// Generate a constant vector with \p Val with the same
6142 /// number of elements as the transition.
6143 /// \p UseSplat defines whether or not \p Val should be replicated
6144 /// across the whole vector.
6145 /// In other words, if UseSplat == true, we generate <Val, Val, ..., Val>,
6146 /// otherwise we generate a vector with as many undef as possible:
6147 /// <undef, ..., undef, Val, undef, ..., undef> where \p Val is only
6148 /// used at the index of the extract.
6149 Value *getConstantVector(Constant *Val, bool UseSplat) const {
6150 unsigned ExtractIdx = std::numeric_limits<unsigned>::max();
6152 // If we cannot determine where the constant must be, we have to
6153 // use a splat constant.
6154 Value *ValExtractIdx = Transition->getOperand(getTransitionIdx());
6155 if (ConstantInt *CstVal = dyn_cast<ConstantInt>(ValExtractIdx))
6156 ExtractIdx = CstVal->getSExtValue();
6161 unsigned End = getTransitionType()->getVectorNumElements();
6163 return ConstantVector::getSplat(End, Val);
6165 SmallVector<Constant *, 4> ConstVec;
6166 UndefValue *UndefVal = UndefValue::get(Val->getType());
6167 for (unsigned Idx = 0; Idx != End; ++Idx) {
6168 if (Idx == ExtractIdx)
6169 ConstVec.push_back(Val);
6171 ConstVec.push_back(UndefVal);
6173 return ConstantVector::get(ConstVec);
6176 /// Check if promoting to a vector type an operand at \p OperandIdx
6177 /// in \p Use can trigger undefined behavior.
6178 static bool canCauseUndefinedBehavior(const Instruction *Use,
6179 unsigned OperandIdx) {
6180 // This is not safe to introduce undef when the operand is on
6181 // the right hand side of a division-like instruction.
6182 if (OperandIdx != 1)
6184 switch (Use->getOpcode()) {
6187 case Instruction::SDiv:
6188 case Instruction::UDiv:
6189 case Instruction::SRem:
6190 case Instruction::URem:
6192 case Instruction::FDiv:
6193 case Instruction::FRem:
6194 return !Use->hasNoNaNs();
6196 llvm_unreachable(nullptr);
6200 VectorPromoteHelper(const DataLayout &DL, const TargetLowering &TLI,
6201 const TargetTransformInfo &TTI, Instruction *Transition,
6202 unsigned CombineCost)
6203 : DL(DL), TLI(TLI), TTI(TTI), Transition(Transition),
6204 StoreExtractCombineCost(CombineCost) {
6205 assert(Transition && "Do not know how to promote null");
6208 /// Check if we can promote \p ToBePromoted to \p Type.
6209 bool canPromote(const Instruction *ToBePromoted) const {
6210 // We could support CastInst too.
6211 return isa<BinaryOperator>(ToBePromoted);
6214 /// Check if it is profitable to promote \p ToBePromoted
6215 /// by moving downward the transition through.
6216 bool shouldPromote(const Instruction *ToBePromoted) const {
6217 // Promote only if all the operands can be statically expanded.
6218 // Indeed, we do not want to introduce any new kind of transitions.
6219 for (const Use &U : ToBePromoted->operands()) {
6220 const Value *Val = U.get();
6221 if (Val == getEndOfTransition()) {
6222 // If the use is a division and the transition is on the rhs,
6223 // we cannot promote the operation, otherwise we may create a
6224 // division by zero.
6225 if (canCauseUndefinedBehavior(ToBePromoted, U.getOperandNo()))
6229 if (!isa<ConstantInt>(Val) && !isa<UndefValue>(Val) &&
6230 !isa<ConstantFP>(Val))
6233 // Check that the resulting operation is legal.
6234 int ISDOpcode = TLI.InstructionOpcodeToISD(ToBePromoted->getOpcode());
6237 return StressStoreExtract ||
6238 TLI.isOperationLegalOrCustom(
6239 ISDOpcode, TLI.getValueType(DL, getTransitionType(), true));
6242 /// Check whether or not \p Use can be combined
6243 /// with the transition.
6244 /// I.e., is it possible to do Use(Transition) => AnotherUse?
6245 bool canCombine(const Instruction *Use) { return isa<StoreInst>(Use); }
6247 /// Record \p ToBePromoted as part of the chain to be promoted.
6248 void enqueueForPromotion(Instruction *ToBePromoted) {
6249 InstsToBePromoted.push_back(ToBePromoted);
6252 /// Set the instruction that will be combined with the transition.
6253 void recordCombineInstruction(Instruction *ToBeCombined) {
6254 assert(canCombine(ToBeCombined) && "Unsupported instruction to combine");
6255 CombineInst = ToBeCombined;
6258 /// Promote all the instructions enqueued for promotion if it is
6260 /// \return True if the promotion happened, false otherwise.
6262 // Check if there is something to promote.
6263 // Right now, if we do not have anything to combine with,
6264 // we assume the promotion is not profitable.
6265 if (InstsToBePromoted.empty() || !CombineInst)
6269 if (!StressStoreExtract && !isProfitableToPromote())
6273 for (auto &ToBePromoted : InstsToBePromoted)
6274 promoteImpl(ToBePromoted);
6275 InstsToBePromoted.clear();
6280 } // end anonymous namespace
6282 void VectorPromoteHelper::promoteImpl(Instruction *ToBePromoted) {
6283 // At this point, we know that all the operands of ToBePromoted but Def
6284 // can be statically promoted.
6285 // For Def, we need to use its parameter in ToBePromoted:
6286 // b = ToBePromoted ty1 a
6287 // Def = Transition ty1 b to ty2
6288 // Move the transition down.
6289 // 1. Replace all uses of the promoted operation by the transition.
6290 // = ... b => = ... Def.
6291 assert(ToBePromoted->getType() == Transition->getType() &&
6292 "The type of the result of the transition does not match "
6294 ToBePromoted->replaceAllUsesWith(Transition);
6295 // 2. Update the type of the uses.
6296 // b = ToBePromoted ty2 Def => b = ToBePromoted ty1 Def.
6297 Type *TransitionTy = getTransitionType();
6298 ToBePromoted->mutateType(TransitionTy);
6299 // 3. Update all the operands of the promoted operation with promoted
6301 // b = ToBePromoted ty1 Def => b = ToBePromoted ty1 a.
6302 for (Use &U : ToBePromoted->operands()) {
6303 Value *Val = U.get();
6304 Value *NewVal = nullptr;
6305 if (Val == Transition)
6306 NewVal = Transition->getOperand(getTransitionOriginalValueIdx());
6307 else if (isa<UndefValue>(Val) || isa<ConstantInt>(Val) ||
6308 isa<ConstantFP>(Val)) {
6309 // Use a splat constant if it is not safe to use undef.
6310 NewVal = getConstantVector(
6311 cast<Constant>(Val),
6312 isa<UndefValue>(Val) ||
6313 canCauseUndefinedBehavior(ToBePromoted, U.getOperandNo()));
6315 llvm_unreachable("Did you modified shouldPromote and forgot to update "
6317 ToBePromoted->setOperand(U.getOperandNo(), NewVal);
6319 Transition->moveAfter(ToBePromoted);
6320 Transition->setOperand(getTransitionOriginalValueIdx(), ToBePromoted);
6323 /// Some targets can do store(extractelement) with one instruction.
6324 /// Try to push the extractelement towards the stores when the target
6325 /// has this feature and this is profitable.
6326 bool CodeGenPrepare::optimizeExtractElementInst(Instruction *Inst) {
6327 unsigned CombineCost = std::numeric_limits<unsigned>::max();
6328 if (DisableStoreExtract || !TLI ||
6329 (!StressStoreExtract &&
6330 !TLI->canCombineStoreAndExtract(Inst->getOperand(0)->getType(),
6331 Inst->getOperand(1), CombineCost)))
6334 // At this point we know that Inst is a vector to scalar transition.
6335 // Try to move it down the def-use chain, until:
6336 // - We can combine the transition with its single use
6337 // => we got rid of the transition.
6338 // - We escape the current basic block
6339 // => we would need to check that we are moving it at a cheaper place and
6340 // we do not do that for now.
6341 BasicBlock *Parent = Inst->getParent();
6342 LLVM_DEBUG(dbgs() << "Found an interesting transition: " << *Inst << '\n');
6343 VectorPromoteHelper VPH(*DL, *TLI, *TTI, Inst, CombineCost);
6344 // If the transition has more than one use, assume this is not going to be
6346 while (Inst->hasOneUse()) {
6347 Instruction *ToBePromoted = cast<Instruction>(*Inst->user_begin());
6348 LLVM_DEBUG(dbgs() << "Use: " << *ToBePromoted << '\n');
6350 if (ToBePromoted->getParent() != Parent) {
6351 LLVM_DEBUG(dbgs() << "Instruction to promote is in a different block ("
6352 << ToBePromoted->getParent()->getName()
6353 << ") than the transition (" << Parent->getName()
6358 if (VPH.canCombine(ToBePromoted)) {
6359 LLVM_DEBUG(dbgs() << "Assume " << *Inst << '\n'
6360 << "will be combined with: " << *ToBePromoted << '\n');
6361 VPH.recordCombineInstruction(ToBePromoted);
6362 bool Changed = VPH.promote();
6363 NumStoreExtractExposed += Changed;
6367 LLVM_DEBUG(dbgs() << "Try promoting.\n");
6368 if (!VPH.canPromote(ToBePromoted) || !VPH.shouldPromote(ToBePromoted))
6371 LLVM_DEBUG(dbgs() << "Promoting is possible... Enqueue for promotion!\n");
6373 VPH.enqueueForPromotion(ToBePromoted);
6374 Inst = ToBePromoted;
6379 /// For the instruction sequence of store below, F and I values
6380 /// are bundled together as an i64 value before being stored into memory.
6381 /// Sometimes it is more efficient to generate separate stores for F and I,
6382 /// which can remove the bitwise instructions or sink them to colder places.
6384 /// (store (or (zext (bitcast F to i32) to i64),
6385 /// (shl (zext I to i64), 32)), addr) -->
6386 /// (store F, addr) and (store I, addr+4)
6388 /// Similarly, splitting for other merged store can also be beneficial, like:
6389 /// For pair of {i32, i32}, i64 store --> two i32 stores.
6390 /// For pair of {i32, i16}, i64 store --> two i32 stores.
6391 /// For pair of {i16, i16}, i32 store --> two i16 stores.
6392 /// For pair of {i16, i8}, i32 store --> two i16 stores.
6393 /// For pair of {i8, i8}, i16 store --> two i8 stores.
6395 /// We allow each target to determine specifically which kind of splitting is
6398 /// The store patterns are commonly seen from the simple code snippet below
6399 /// if only std::make_pair(...) is sroa transformed before inlined into hoo.
6400 /// void goo(const std::pair<int, float> &);
6403 /// goo(std::make_pair(tmp, ftmp));
6407 /// Although we already have similar splitting in DAG Combine, we duplicate
6408 /// it in CodeGenPrepare to catch the case in which pattern is across
6409 /// multiple BBs. The logic in DAG Combine is kept to catch case generated
6410 /// during code expansion.
6411 static bool splitMergedValStore(StoreInst &SI, const DataLayout &DL,
6412 const TargetLowering &TLI) {
6413 // Handle simple but common cases only.
6414 Type *StoreType = SI.getValueOperand()->getType();
6415 if (DL.getTypeStoreSizeInBits(StoreType) != DL.getTypeSizeInBits(StoreType) ||
6416 DL.getTypeSizeInBits(StoreType) == 0)
6419 unsigned HalfValBitSize = DL.getTypeSizeInBits(StoreType) / 2;
6420 Type *SplitStoreType = Type::getIntNTy(SI.getContext(), HalfValBitSize);
6421 if (DL.getTypeStoreSizeInBits(SplitStoreType) !=
6422 DL.getTypeSizeInBits(SplitStoreType))
6425 // Match the following patterns:
6426 // (store (or (zext LValue to i64),
6427 // (shl (zext HValue to i64), 32)), HalfValBitSize)
6429 // (store (or (shl (zext HValue to i64), 32)), HalfValBitSize)
6430 // (zext LValue to i64),
6431 // Expect both operands of OR and the first operand of SHL have only
6433 Value *LValue, *HValue;
6434 if (!match(SI.getValueOperand(),
6435 m_c_Or(m_OneUse(m_ZExt(m_Value(LValue))),
6436 m_OneUse(m_Shl(m_OneUse(m_ZExt(m_Value(HValue))),
6437 m_SpecificInt(HalfValBitSize))))))
6440 // Check LValue and HValue are int with size less or equal than 32.
6441 if (!LValue->getType()->isIntegerTy() ||
6442 DL.getTypeSizeInBits(LValue->getType()) > HalfValBitSize ||
6443 !HValue->getType()->isIntegerTy() ||
6444 DL.getTypeSizeInBits(HValue->getType()) > HalfValBitSize)
6447 // If LValue/HValue is a bitcast instruction, use the EVT before bitcast
6448 // as the input of target query.
6449 auto *LBC = dyn_cast<BitCastInst>(LValue);
6450 auto *HBC = dyn_cast<BitCastInst>(HValue);
6451 EVT LowTy = LBC ? EVT::getEVT(LBC->getOperand(0)->getType())
6452 : EVT::getEVT(LValue->getType());
6453 EVT HighTy = HBC ? EVT::getEVT(HBC->getOperand(0)->getType())
6454 : EVT::getEVT(HValue->getType());
6455 if (!ForceSplitStore && !TLI.isMultiStoresCheaperThanBitsMerge(LowTy, HighTy))
6458 // Start to split store.
6459 IRBuilder<> Builder(SI.getContext());
6460 Builder.SetInsertPoint(&SI);
6462 // If LValue/HValue is a bitcast in another BB, create a new one in current
6463 // BB so it may be merged with the splitted stores by dag combiner.
6464 if (LBC && LBC->getParent() != SI.getParent())
6465 LValue = Builder.CreateBitCast(LBC->getOperand(0), LBC->getType());
6466 if (HBC && HBC->getParent() != SI.getParent())
6467 HValue = Builder.CreateBitCast(HBC->getOperand(0), HBC->getType());
6469 bool IsLE = SI.getModule()->getDataLayout().isLittleEndian();
6470 auto CreateSplitStore = [&](Value *V, bool Upper) {
6471 V = Builder.CreateZExtOrBitCast(V, SplitStoreType);
6472 Value *Addr = Builder.CreateBitCast(
6474 SplitStoreType->getPointerTo(SI.getPointerAddressSpace()));
6475 if ((IsLE && Upper) || (!IsLE && !Upper))
6476 Addr = Builder.CreateGEP(
6477 SplitStoreType, Addr,
6478 ConstantInt::get(Type::getInt32Ty(SI.getContext()), 1));
6479 Builder.CreateAlignedStore(
6480 V, Addr, Upper ? SI.getAlignment() / 2 : SI.getAlignment());
6483 CreateSplitStore(LValue, false);
6484 CreateSplitStore(HValue, true);
6486 // Delete the old store.
6487 SI.eraseFromParent();
6491 // Return true if the GEP has two operands, the first operand is of a sequential
6492 // type, and the second operand is a constant.
6493 static bool GEPSequentialConstIndexed(GetElementPtrInst *GEP) {
6494 gep_type_iterator I = gep_type_begin(*GEP);
6495 return GEP->getNumOperands() == 2 &&
6497 isa<ConstantInt>(GEP->getOperand(1));
6500 // Try unmerging GEPs to reduce liveness interference (register pressure) across
6501 // IndirectBr edges. Since IndirectBr edges tend to touch on many blocks,
6502 // reducing liveness interference across those edges benefits global register
6503 // allocation. Currently handles only certain cases.
6505 // For example, unmerge %GEPI and %UGEPI as below.
6507 // ---------- BEFORE ----------
6512 // %GEPI = gep %GEPIOp, Idx
6514 // indirectbr ... [ label %DstB0, label %DstB1, ... label %DstBi ... ]
6515 // (* %GEPI is alive on the indirectbr edges due to other uses ahead)
6516 // (* %GEPIOp is alive on the indirectbr edges only because of it's used by
6519 // DstB0: ... (there may be a gep similar to %UGEPI to be unmerged)
6520 // DstB1: ... (there may be a gep similar to %UGEPI to be unmerged)
6525 // %UGEPI = gep %GEPIOp, UIdx
6527 // ---------------------------
6529 // ---------- AFTER ----------
6531 // ... (same as above)
6532 // (* %GEPI is still alive on the indirectbr edges)
6533 // (* %GEPIOp is no longer alive on the indirectbr edges as a result of the
6539 // %UGEPI = gep %GEPI, (UIdx-Idx)
6541 // ---------------------------
6543 // The register pressure on the IndirectBr edges is reduced because %GEPIOp is
6544 // no longer alive on them.
6546 // We try to unmerge GEPs here in CodGenPrepare, as opposed to limiting merging
6547 // of GEPs in the first place in InstCombiner::visitGetElementPtrInst() so as
6548 // not to disable further simplications and optimizations as a result of GEP
6551 // Note this unmerging may increase the length of the data flow critical path
6552 // (the path from %GEPIOp to %UGEPI would go through %GEPI), which is a tradeoff
6553 // between the register pressure and the length of data-flow critical
6554 // path. Restricting this to the uncommon IndirectBr case would minimize the
6555 // impact of potentially longer critical path, if any, and the impact on compile
6557 static bool tryUnmergingGEPsAcrossIndirectBr(GetElementPtrInst *GEPI,
6558 const TargetTransformInfo *TTI) {
6559 BasicBlock *SrcBlock = GEPI->getParent();
6560 // Check that SrcBlock ends with an IndirectBr. If not, give up. The common
6561 // (non-IndirectBr) cases exit early here.
6562 if (!isa<IndirectBrInst>(SrcBlock->getTerminator()))
6564 // Check that GEPI is a simple gep with a single constant index.
6565 if (!GEPSequentialConstIndexed(GEPI))
6567 ConstantInt *GEPIIdx = cast<ConstantInt>(GEPI->getOperand(1));
6568 // Check that GEPI is a cheap one.
6569 if (TTI->getIntImmCost(GEPIIdx->getValue(), GEPIIdx->getType())
6570 > TargetTransformInfo::TCC_Basic)
6572 Value *GEPIOp = GEPI->getOperand(0);
6573 // Check that GEPIOp is an instruction that's also defined in SrcBlock.
6574 if (!isa<Instruction>(GEPIOp))
6576 auto *GEPIOpI = cast<Instruction>(GEPIOp);
6577 if (GEPIOpI->getParent() != SrcBlock)
6579 // Check that GEP is used outside the block, meaning it's alive on the
6580 // IndirectBr edge(s).
6581 if (find_if(GEPI->users(), [&](User *Usr) {
6582 if (auto *I = dyn_cast<Instruction>(Usr)) {
6583 if (I->getParent() != SrcBlock) {
6588 }) == GEPI->users().end())
6590 // The second elements of the GEP chains to be unmerged.
6591 std::vector<GetElementPtrInst *> UGEPIs;
6592 // Check each user of GEPIOp to check if unmerging would make GEPIOp not alive
6593 // on IndirectBr edges.
6594 for (User *Usr : GEPIOp->users()) {
6595 if (Usr == GEPI) continue;
6596 // Check if Usr is an Instruction. If not, give up.
6597 if (!isa<Instruction>(Usr))
6599 auto *UI = cast<Instruction>(Usr);
6600 // Check if Usr in the same block as GEPIOp, which is fine, skip.
6601 if (UI->getParent() == SrcBlock)
6603 // Check if Usr is a GEP. If not, give up.
6604 if (!isa<GetElementPtrInst>(Usr))
6606 auto *UGEPI = cast<GetElementPtrInst>(Usr);
6607 // Check if UGEPI is a simple gep with a single constant index and GEPIOp is
6608 // the pointer operand to it. If so, record it in the vector. If not, give
6610 if (!GEPSequentialConstIndexed(UGEPI))
6612 if (UGEPI->getOperand(0) != GEPIOp)
6614 if (GEPIIdx->getType() !=
6615 cast<ConstantInt>(UGEPI->getOperand(1))->getType())
6617 ConstantInt *UGEPIIdx = cast<ConstantInt>(UGEPI->getOperand(1));
6618 if (TTI->getIntImmCost(UGEPIIdx->getValue(), UGEPIIdx->getType())
6619 > TargetTransformInfo::TCC_Basic)
6621 UGEPIs.push_back(UGEPI);
6623 if (UGEPIs.size() == 0)
6625 // Check the materializing cost of (Uidx-Idx).
6626 for (GetElementPtrInst *UGEPI : UGEPIs) {
6627 ConstantInt *UGEPIIdx = cast<ConstantInt>(UGEPI->getOperand(1));
6628 APInt NewIdx = UGEPIIdx->getValue() - GEPIIdx->getValue();
6629 unsigned ImmCost = TTI->getIntImmCost(NewIdx, GEPIIdx->getType());
6630 if (ImmCost > TargetTransformInfo::TCC_Basic)
6633 // Now unmerge between GEPI and UGEPIs.
6634 for (GetElementPtrInst *UGEPI : UGEPIs) {
6635 UGEPI->setOperand(0, GEPI);
6636 ConstantInt *UGEPIIdx = cast<ConstantInt>(UGEPI->getOperand(1));
6637 Constant *NewUGEPIIdx =
6638 ConstantInt::get(GEPIIdx->getType(),
6639 UGEPIIdx->getValue() - GEPIIdx->getValue());
6640 UGEPI->setOperand(1, NewUGEPIIdx);
6641 // If GEPI is not inbounds but UGEPI is inbounds, change UGEPI to not
6642 // inbounds to avoid UB.
6643 if (!GEPI->isInBounds()) {
6644 UGEPI->setIsInBounds(false);
6647 // After unmerging, verify that GEPIOp is actually only used in SrcBlock (not
6648 // alive on IndirectBr edges).
6649 assert(find_if(GEPIOp->users(), [&](User *Usr) {
6650 return cast<Instruction>(Usr)->getParent() != SrcBlock;
6651 }) == GEPIOp->users().end() && "GEPIOp is used outside SrcBlock");
6655 bool CodeGenPrepare::optimizeInst(Instruction *I, bool &ModifiedDT) {
6656 // Bail out if we inserted the instruction to prevent optimizations from
6657 // stepping on each other's toes.
6658 if (InsertedInsts.count(I))
6661 if (PHINode *P = dyn_cast<PHINode>(I)) {
6662 // It is possible for very late stage optimizations (such as SimplifyCFG)
6663 // to introduce PHI nodes too late to be cleaned up. If we detect such a
6664 // trivial PHI, go ahead and zap it here.
6665 if (Value *V = SimplifyInstruction(P, {*DL, TLInfo})) {
6666 P->replaceAllUsesWith(V);
6667 P->eraseFromParent();
6674 if (CastInst *CI = dyn_cast<CastInst>(I)) {
6675 // If the source of the cast is a constant, then this should have
6676 // already been constant folded. The only reason NOT to constant fold
6677 // it is if something (e.g. LSR) was careful to place the constant
6678 // evaluation in a block other than then one that uses it (e.g. to hoist
6679 // the address of globals out of a loop). If this is the case, we don't
6680 // want to forward-subst the cast.
6681 if (isa<Constant>(CI->getOperand(0)))
6684 if (TLI && OptimizeNoopCopyExpression(CI, *TLI, *DL))
6687 if (isa<ZExtInst>(I) || isa<SExtInst>(I)) {
6688 /// Sink a zext or sext into its user blocks if the target type doesn't
6689 /// fit in one register
6691 TLI->getTypeAction(CI->getContext(),
6692 TLI->getValueType(*DL, CI->getType())) ==
6693 TargetLowering::TypeExpandInteger) {
6694 return SinkCast(CI);
6696 bool MadeChange = optimizeExt(I);
6697 return MadeChange | optimizeExtUses(I);
6703 if (CmpInst *CI = dyn_cast<CmpInst>(I))
6704 if (!TLI || !TLI->hasMultipleConditionRegisters())
6705 return OptimizeCmpExpression(CI, TLI);
6707 if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
6708 LI->setMetadata(LLVMContext::MD_invariant_group, nullptr);
6710 bool Modified = optimizeLoadExt(LI);
6711 unsigned AS = LI->getPointerAddressSpace();
6712 Modified |= optimizeMemoryInst(I, I->getOperand(0), LI->getType(), AS);
6718 if (StoreInst *SI = dyn_cast<StoreInst>(I)) {
6719 if (TLI && splitMergedValStore(*SI, *DL, *TLI))
6721 SI->setMetadata(LLVMContext::MD_invariant_group, nullptr);
6723 unsigned AS = SI->getPointerAddressSpace();
6724 return optimizeMemoryInst(I, SI->getOperand(1),
6725 SI->getOperand(0)->getType(), AS);
6730 if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(I)) {
6731 unsigned AS = RMW->getPointerAddressSpace();
6732 return optimizeMemoryInst(I, RMW->getPointerOperand(),
6733 RMW->getType(), AS);
6736 if (AtomicCmpXchgInst *CmpX = dyn_cast<AtomicCmpXchgInst>(I)) {
6737 unsigned AS = CmpX->getPointerAddressSpace();
6738 return optimizeMemoryInst(I, CmpX->getPointerOperand(),
6739 CmpX->getCompareOperand()->getType(), AS);
6742 BinaryOperator *BinOp = dyn_cast<BinaryOperator>(I);
6744 if (BinOp && (BinOp->getOpcode() == Instruction::And) &&
6745 EnableAndCmpSinking && TLI)
6746 return sinkAndCmp0Expression(BinOp, *TLI, InsertedInsts);
6748 if (BinOp && (BinOp->getOpcode() == Instruction::AShr ||
6749 BinOp->getOpcode() == Instruction::LShr)) {
6750 ConstantInt *CI = dyn_cast<ConstantInt>(BinOp->getOperand(1));
6751 if (TLI && CI && TLI->hasExtractBitsInsn())
6752 return OptimizeExtractBits(BinOp, CI, *TLI, *DL);
6757 if (GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(I)) {
6758 if (GEPI->hasAllZeroIndices()) {
6759 /// The GEP operand must be a pointer, so must its result -> BitCast
6760 Instruction *NC = new BitCastInst(GEPI->getOperand(0), GEPI->getType(),
6761 GEPI->getName(), GEPI);
6762 NC->setDebugLoc(GEPI->getDebugLoc());
6763 GEPI->replaceAllUsesWith(NC);
6764 GEPI->eraseFromParent();
6766 optimizeInst(NC, ModifiedDT);
6769 if (tryUnmergingGEPsAcrossIndirectBr(GEPI, TTI)) {
6775 if (CallInst *CI = dyn_cast<CallInst>(I))
6776 return optimizeCallInst(CI, ModifiedDT);
6778 if (SelectInst *SI = dyn_cast<SelectInst>(I))
6779 return optimizeSelectInst(SI);
6781 if (ShuffleVectorInst *SVI = dyn_cast<ShuffleVectorInst>(I))
6782 return optimizeShuffleVectorInst(SVI);
6784 if (auto *Switch = dyn_cast<SwitchInst>(I))
6785 return optimizeSwitchInst(Switch);
6787 if (isa<ExtractElementInst>(I))
6788 return optimizeExtractElementInst(I);
6793 /// Given an OR instruction, check to see if this is a bitreverse
6794 /// idiom. If so, insert the new intrinsic and return true.
6795 static bool makeBitReverse(Instruction &I, const DataLayout &DL,
6796 const TargetLowering &TLI) {
6797 if (!I.getType()->isIntegerTy() ||
6798 !TLI.isOperationLegalOrCustom(ISD::BITREVERSE,
6799 TLI.getValueType(DL, I.getType(), true)))
6802 SmallVector<Instruction*, 4> Insts;
6803 if (!recognizeBSwapOrBitReverseIdiom(&I, false, true, Insts))
6805 Instruction *LastInst = Insts.back();
6806 I.replaceAllUsesWith(LastInst);
6807 RecursivelyDeleteTriviallyDeadInstructions(&I);
6811 // In this pass we look for GEP and cast instructions that are used
6812 // across basic blocks and rewrite them to improve basic-block-at-a-time
6814 bool CodeGenPrepare::optimizeBlock(BasicBlock &BB, bool &ModifiedDT) {
6816 bool MadeChange = false;
6818 CurInstIterator = BB.begin();
6819 while (CurInstIterator != BB.end()) {
6820 MadeChange |= optimizeInst(&*CurInstIterator++, ModifiedDT);
6825 bool MadeBitReverse = true;
6826 while (TLI && MadeBitReverse) {
6827 MadeBitReverse = false;
6828 for (auto &I : reverse(BB)) {
6829 if (makeBitReverse(I, *DL, *TLI)) {
6830 MadeBitReverse = MadeChange = true;
6836 MadeChange |= dupRetToEnableTailCallOpts(&BB);
6841 // llvm.dbg.value is far away from the value then iSel may not be able
6842 // handle it properly. iSel will drop llvm.dbg.value if it can not
6843 // find a node corresponding to the value.
6844 bool CodeGenPrepare::placeDbgValues(Function &F) {
6845 bool MadeChange = false;
6846 for (BasicBlock &BB : F) {
6847 Instruction *PrevNonDbgInst = nullptr;
6848 for (BasicBlock::iterator BI = BB.begin(), BE = BB.end(); BI != BE;) {
6849 Instruction *Insn = &*BI++;
6850 DbgValueInst *DVI = dyn_cast<DbgValueInst>(Insn);
6851 // Leave dbg.values that refer to an alloca alone. These
6852 // intrinsics describe the address of a variable (= the alloca)
6853 // being taken. They should not be moved next to the alloca
6854 // (and to the beginning of the scope), but rather stay close to
6855 // where said address is used.
6856 if (!DVI || (DVI->getValue() && isa<AllocaInst>(DVI->getValue()))) {
6857 PrevNonDbgInst = Insn;
6861 Instruction *VI = dyn_cast_or_null<Instruction>(DVI->getValue());
6862 if (VI && VI != PrevNonDbgInst && !VI->isTerminator()) {
6863 // If VI is a phi in a block with an EHPad terminator, we can't insert
6865 if (isa<PHINode>(VI) && VI->getParent()->getTerminator()->isEHPad())
6867 LLVM_DEBUG(dbgs() << "Moving Debug Value before :\n"
6868 << *DVI << ' ' << *VI);
6869 DVI->removeFromParent();
6870 if (isa<PHINode>(VI))
6871 DVI->insertBefore(&*VI->getParent()->getFirstInsertionPt());
6873 DVI->insertAfter(VI);
6882 /// Scale down both weights to fit into uint32_t.
6883 static void scaleWeights(uint64_t &NewTrue, uint64_t &NewFalse) {
6884 uint64_t NewMax = (NewTrue > NewFalse) ? NewTrue : NewFalse;
6885 uint32_t Scale = (NewMax / std::numeric_limits<uint32_t>::max()) + 1;
6886 NewTrue = NewTrue / Scale;
6887 NewFalse = NewFalse / Scale;
6890 /// Some targets prefer to split a conditional branch like:
6892 /// %0 = icmp ne i32 %a, 0
6893 /// %1 = icmp ne i32 %b, 0
6894 /// %or.cond = or i1 %0, %1
6895 /// br i1 %or.cond, label %TrueBB, label %FalseBB
6897 /// into multiple branch instructions like:
6900 /// %0 = icmp ne i32 %a, 0
6901 /// br i1 %0, label %TrueBB, label %bb2
6903 /// %1 = icmp ne i32 %b, 0
6904 /// br i1 %1, label %TrueBB, label %FalseBB
6906 /// This usually allows instruction selection to do even further optimizations
6907 /// and combine the compare with the branch instruction. Currently this is
6908 /// applied for targets which have "cheap" jump instructions.
6910 /// FIXME: Remove the (equivalent?) implementation in SelectionDAG.
6912 bool CodeGenPrepare::splitBranchCondition(Function &F) {
6913 if (!TM || !TM->Options.EnableFastISel || !TLI || TLI->isJumpExpensive())
6916 bool MadeChange = false;
6917 for (auto &BB : F) {
6918 // Does this BB end with the following?
6919 // %cond1 = icmp|fcmp|binary instruction ...
6920 // %cond2 = icmp|fcmp|binary instruction ...
6921 // %cond.or = or|and i1 %cond1, cond2
6922 // br i1 %cond.or label %dest1, label %dest2"
6923 BinaryOperator *LogicOp;
6924 BasicBlock *TBB, *FBB;
6925 if (!match(BB.getTerminator(), m_Br(m_OneUse(m_BinOp(LogicOp)), TBB, FBB)))
6928 auto *Br1 = cast<BranchInst>(BB.getTerminator());
6929 if (Br1->getMetadata(LLVMContext::MD_unpredictable))
6933 Value *Cond1, *Cond2;
6934 if (match(LogicOp, m_And(m_OneUse(m_Value(Cond1)),
6935 m_OneUse(m_Value(Cond2)))))
6936 Opc = Instruction::And;
6937 else if (match(LogicOp, m_Or(m_OneUse(m_Value(Cond1)),
6938 m_OneUse(m_Value(Cond2)))))
6939 Opc = Instruction::Or;
6943 if (!match(Cond1, m_CombineOr(m_Cmp(), m_BinOp())) ||
6944 !match(Cond2, m_CombineOr(m_Cmp(), m_BinOp())) )
6947 LLVM_DEBUG(dbgs() << "Before branch condition splitting\n"; BB.dump());
6951 BasicBlock::Create(BB.getContext(), BB.getName() + ".cond.split",
6952 BB.getParent(), BB.getNextNode());
6954 // Update original basic block by using the first condition directly by the
6955 // branch instruction and removing the no longer needed and/or instruction.
6956 Br1->setCondition(Cond1);
6957 LogicOp->eraseFromParent();
6959 // Depending on the condition we have to either replace the true or the
6960 // false successor of the original branch instruction.
6961 if (Opc == Instruction::And)
6962 Br1->setSuccessor(0, TmpBB);
6964 Br1->setSuccessor(1, TmpBB);
6966 // Fill in the new basic block.
6967 auto *Br2 = IRBuilder<>(TmpBB).CreateCondBr(Cond2, TBB, FBB);
6968 if (auto *I = dyn_cast<Instruction>(Cond2)) {
6969 I->removeFromParent();
6970 I->insertBefore(Br2);
6973 // Update PHI nodes in both successors. The original BB needs to be
6974 // replaced in one successor's PHI nodes, because the branch comes now from
6975 // the newly generated BB (NewBB). In the other successor we need to add one
6976 // incoming edge to the PHI nodes, because both branch instructions target
6977 // now the same successor. Depending on the original branch condition
6978 // (and/or) we have to swap the successors (TrueDest, FalseDest), so that
6979 // we perform the correct update for the PHI nodes.
6980 // This doesn't change the successor order of the just created branch
6981 // instruction (or any other instruction).
6982 if (Opc == Instruction::Or)
6983 std::swap(TBB, FBB);
6985 // Replace the old BB with the new BB.
6986 for (PHINode &PN : TBB->phis()) {
6988 while ((i = PN.getBasicBlockIndex(&BB)) >= 0)
6989 PN.setIncomingBlock(i, TmpBB);
6992 // Add another incoming edge form the new BB.
6993 for (PHINode &PN : FBB->phis()) {
6994 auto *Val = PN.getIncomingValueForBlock(&BB);
6995 PN.addIncoming(Val, TmpBB);
6998 // Update the branch weights (from SelectionDAGBuilder::
6999 // FindMergedConditions).
7000 if (Opc == Instruction::Or) {
7001 // Codegen X | Y as:
7010 // We have flexibility in setting Prob for BB1 and Prob for NewBB.
7011 // The requirement is that
7012 // TrueProb for BB1 + (FalseProb for BB1 * TrueProb for TmpBB)
7013 // = TrueProb for original BB.
7014 // Assuming the original weights are A and B, one choice is to set BB1's
7015 // weights to A and A+2B, and set TmpBB's weights to A and 2B. This choice
7017 // TrueProb for BB1 == FalseProb for BB1 * TrueProb for TmpBB.
7018 // Another choice is to assume TrueProb for BB1 equals to TrueProb for
7019 // TmpBB, but the math is more complicated.
7020 uint64_t TrueWeight, FalseWeight;
7021 if (Br1->extractProfMetadata(TrueWeight, FalseWeight)) {
7022 uint64_t NewTrueWeight = TrueWeight;
7023 uint64_t NewFalseWeight = TrueWeight + 2 * FalseWeight;
7024 scaleWeights(NewTrueWeight, NewFalseWeight);
7025 Br1->setMetadata(LLVMContext::MD_prof, MDBuilder(Br1->getContext())
7026 .createBranchWeights(TrueWeight, FalseWeight));
7028 NewTrueWeight = TrueWeight;
7029 NewFalseWeight = 2 * FalseWeight;
7030 scaleWeights(NewTrueWeight, NewFalseWeight);
7031 Br2->setMetadata(LLVMContext::MD_prof, MDBuilder(Br2->getContext())
7032 .createBranchWeights(TrueWeight, FalseWeight));
7035 // Codegen X & Y as:
7043 // This requires creation of TmpBB after CurBB.
7045 // We have flexibility in setting Prob for BB1 and Prob for TmpBB.
7046 // The requirement is that
7047 // FalseProb for BB1 + (TrueProb for BB1 * FalseProb for TmpBB)
7048 // = FalseProb for original BB.
7049 // Assuming the original weights are A and B, one choice is to set BB1's
7050 // weights to 2A+B and B, and set TmpBB's weights to 2A and B. This choice
7052 // FalseProb for BB1 == TrueProb for BB1 * FalseProb for TmpBB.
7053 uint64_t TrueWeight, FalseWeight;
7054 if (Br1->extractProfMetadata(TrueWeight, FalseWeight)) {
7055 uint64_t NewTrueWeight = 2 * TrueWeight + FalseWeight;
7056 uint64_t NewFalseWeight = FalseWeight;
7057 scaleWeights(NewTrueWeight, NewFalseWeight);
7058 Br1->setMetadata(LLVMContext::MD_prof, MDBuilder(Br1->getContext())
7059 .createBranchWeights(TrueWeight, FalseWeight));
7061 NewTrueWeight = 2 * TrueWeight;
7062 NewFalseWeight = FalseWeight;
7063 scaleWeights(NewTrueWeight, NewFalseWeight);
7064 Br2->setMetadata(LLVMContext::MD_prof, MDBuilder(Br2->getContext())
7065 .createBranchWeights(TrueWeight, FalseWeight));
7069 // Note: No point in getting fancy here, since the DT info is never
7070 // available to CodeGenPrepare.
7075 LLVM_DEBUG(dbgs() << "After branch condition splitting\n"; BB.dump();