1 //===- CodeGenPrepare.cpp - Prepare a function for code generation --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass munges the code in the input function to better prepare it for
11 // SelectionDAG-based code generation. This works around limitations in it's
12 // basic-block-at-a-time approach. It should eventually be removed.
14 //===----------------------------------------------------------------------===//
16 #include "llvm/ADT/DenseMap.h"
17 #include "llvm/ADT/SetVector.h"
18 #include "llvm/ADT/SmallSet.h"
19 #include "llvm/ADT/Statistic.h"
20 #include "llvm/Analysis/BlockFrequencyInfo.h"
21 #include "llvm/Analysis/BranchProbabilityInfo.h"
22 #include "llvm/Analysis/CFG.h"
23 #include "llvm/Analysis/InstructionSimplify.h"
24 #include "llvm/Analysis/LoopInfo.h"
25 #include "llvm/Analysis/MemoryBuiltins.h"
26 #include "llvm/Analysis/ProfileSummaryInfo.h"
27 #include "llvm/Analysis/TargetLibraryInfo.h"
28 #include "llvm/Analysis/TargetTransformInfo.h"
29 #include "llvm/Analysis/ValueTracking.h"
30 #include "llvm/CodeGen/Analysis.h"
31 #include "llvm/CodeGen/Passes.h"
32 #include "llvm/CodeGen/TargetPassConfig.h"
33 #include "llvm/IR/CallSite.h"
34 #include "llvm/IR/Constants.h"
35 #include "llvm/IR/DataLayout.h"
36 #include "llvm/IR/DerivedTypes.h"
37 #include "llvm/IR/Dominators.h"
38 #include "llvm/IR/Function.h"
39 #include "llvm/IR/GetElementPtrTypeIterator.h"
40 #include "llvm/IR/IRBuilder.h"
41 #include "llvm/IR/InlineAsm.h"
42 #include "llvm/IR/Instructions.h"
43 #include "llvm/IR/IntrinsicInst.h"
44 #include "llvm/IR/MDBuilder.h"
45 #include "llvm/IR/PatternMatch.h"
46 #include "llvm/IR/Statepoint.h"
47 #include "llvm/IR/ValueHandle.h"
48 #include "llvm/IR/ValueMap.h"
49 #include "llvm/Pass.h"
50 #include "llvm/Support/BranchProbability.h"
51 #include "llvm/Support/CommandLine.h"
52 #include "llvm/Support/Debug.h"
53 #include "llvm/Support/raw_ostream.h"
54 #include "llvm/Target/TargetLowering.h"
55 #include "llvm/Target/TargetSubtargetInfo.h"
56 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
57 #include "llvm/Transforms/Utils/BuildLibCalls.h"
58 #include "llvm/Transforms/Utils/BypassSlowDivision.h"
59 #include "llvm/Transforms/Utils/Cloning.h"
60 #include "llvm/Transforms/Utils/Local.h"
61 #include "llvm/Transforms/Utils/SimplifyLibCalls.h"
62 #include "llvm/Transforms/Utils/ValueMapper.h"
65 using namespace llvm::PatternMatch;
67 #define DEBUG_TYPE "codegenprepare"
69 STATISTIC(NumBlocksElim, "Number of blocks eliminated");
70 STATISTIC(NumPHIsElim, "Number of trivial PHIs eliminated");
71 STATISTIC(NumGEPsElim, "Number of GEPs converted to casts");
72 STATISTIC(NumCmpUses, "Number of uses of Cmp expressions replaced with uses of "
74 STATISTIC(NumCastUses, "Number of uses of Cast expressions replaced with uses "
76 STATISTIC(NumMemoryInsts, "Number of memory instructions whose address "
77 "computations were sunk");
78 STATISTIC(NumExtsMoved, "Number of [s|z]ext instructions combined with loads");
79 STATISTIC(NumExtUses, "Number of uses of [s|z]ext instructions optimized");
80 STATISTIC(NumAndsAdded,
81 "Number of and mask instructions added to form ext loads");
82 STATISTIC(NumAndUses, "Number of uses of and mask instructions optimized");
83 STATISTIC(NumRetsDup, "Number of return instructions duplicated");
84 STATISTIC(NumDbgValueMoved, "Number of debug value instructions moved");
85 STATISTIC(NumSelectsExpanded, "Number of selects turned into branches");
86 STATISTIC(NumStoreExtractExposed, "Number of store(extractelement) exposed");
88 STATISTIC(NumMemCmpCalls, "Number of memcmp calls");
89 STATISTIC(NumMemCmpNotConstant, "Number of memcmp calls without constant size");
90 STATISTIC(NumMemCmpGreaterThanMax,
91 "Number of memcmp calls with size greater than max size");
92 STATISTIC(NumMemCmpInlined, "Number of inlined memcmp calls");
94 static cl::opt<bool> DisableBranchOpts(
95 "disable-cgp-branch-opts", cl::Hidden, cl::init(false),
96 cl::desc("Disable branch optimizations in CodeGenPrepare"));
99 DisableGCOpts("disable-cgp-gc-opts", cl::Hidden, cl::init(false),
100 cl::desc("Disable GC optimizations in CodeGenPrepare"));
102 static cl::opt<bool> DisableSelectToBranch(
103 "disable-cgp-select2branch", cl::Hidden, cl::init(false),
104 cl::desc("Disable select to branch conversion."));
106 static cl::opt<bool> AddrSinkUsingGEPs(
107 "addr-sink-using-gep", cl::Hidden, cl::init(true),
108 cl::desc("Address sinking in CGP using GEPs."));
110 static cl::opt<bool> EnableAndCmpSinking(
111 "enable-andcmp-sinking", cl::Hidden, cl::init(true),
112 cl::desc("Enable sinkinig and/cmp into branches."));
114 static cl::opt<bool> DisableStoreExtract(
115 "disable-cgp-store-extract", cl::Hidden, cl::init(false),
116 cl::desc("Disable store(extract) optimizations in CodeGenPrepare"));
118 static cl::opt<bool> StressStoreExtract(
119 "stress-cgp-store-extract", cl::Hidden, cl::init(false),
120 cl::desc("Stress test store(extract) optimizations in CodeGenPrepare"));
122 static cl::opt<bool> DisableExtLdPromotion(
123 "disable-cgp-ext-ld-promotion", cl::Hidden, cl::init(false),
124 cl::desc("Disable ext(promotable(ld)) -> promoted(ext(ld)) optimization in "
127 static cl::opt<bool> StressExtLdPromotion(
128 "stress-cgp-ext-ld-promotion", cl::Hidden, cl::init(false),
129 cl::desc("Stress test ext(promotable(ld)) -> promoted(ext(ld)) "
130 "optimization in CodeGenPrepare"));
132 static cl::opt<bool> DisablePreheaderProtect(
133 "disable-preheader-prot", cl::Hidden, cl::init(false),
134 cl::desc("Disable protection against removing loop preheaders"));
136 static cl::opt<bool> ProfileGuidedSectionPrefix(
137 "profile-guided-section-prefix", cl::Hidden, cl::init(true), cl::ZeroOrMore,
138 cl::desc("Use profile info to add section prefix for hot/cold functions"));
140 static cl::opt<unsigned> FreqRatioToSkipMerge(
141 "cgp-freq-ratio-to-skip-merge", cl::Hidden, cl::init(2),
142 cl::desc("Skip merging empty blocks if (frequency of empty block) / "
143 "(frequency of destination block) is greater than this ratio"));
145 static cl::opt<bool> ForceSplitStore(
146 "force-split-store", cl::Hidden, cl::init(false),
147 cl::desc("Force store splitting no matter what the target query says."));
150 EnableTypePromotionMerge("cgp-type-promotion-merge", cl::Hidden,
151 cl::desc("Enable merging of redundant sexts when one is dominating"
152 " the other."), cl::init(true));
154 static cl::opt<unsigned> MemCmpNumLoadsPerBlock(
155 "memcmp-num-loads-per-block", cl::Hidden, cl::init(1),
156 cl::desc("The number of loads per basic block for inline expansion of "
157 "memcmp that is only being compared against zero."));
160 typedef SmallPtrSet<Instruction *, 16> SetOfInstrs;
161 typedef PointerIntPair<Type *, 1, bool> TypeIsSExt;
162 typedef DenseMap<Instruction *, TypeIsSExt> InstrToOrigTy;
163 typedef SmallVector<Instruction *, 16> SExts;
164 typedef DenseMap<Value *, SExts> ValueToSExts;
165 class TypePromotionTransaction;
167 class CodeGenPrepare : public FunctionPass {
168 const TargetMachine *TM;
169 const TargetSubtargetInfo *SubtargetInfo;
170 const TargetLowering *TLI;
171 const TargetRegisterInfo *TRI;
172 const TargetTransformInfo *TTI;
173 const TargetLibraryInfo *TLInfo;
175 std::unique_ptr<BlockFrequencyInfo> BFI;
176 std::unique_ptr<BranchProbabilityInfo> BPI;
178 /// As we scan instructions optimizing them, this is the next instruction
179 /// to optimize. Transforms that can invalidate this should update it.
180 BasicBlock::iterator CurInstIterator;
182 /// Keeps track of non-local addresses that have been sunk into a block.
183 /// This allows us to avoid inserting duplicate code for blocks with
184 /// multiple load/stores of the same address.
185 ValueMap<Value*, Value*> SunkAddrs;
187 /// Keeps track of all instructions inserted for the current function.
188 SetOfInstrs InsertedInsts;
189 /// Keeps track of the type of the related instruction before their
190 /// promotion for the current function.
191 InstrToOrigTy PromotedInsts;
193 /// Keep track of instructions removed during promotion.
194 SetOfInstrs RemovedInsts;
196 /// Keep track of sext chains based on their initial value.
197 DenseMap<Value *, Instruction *> SeenChainsForSExt;
199 /// Keep track of SExt promoted.
200 ValueToSExts ValToSExtendedUses;
202 /// True if CFG is modified in any way.
205 /// True if optimizing for size.
208 /// DataLayout for the Function being processed.
209 const DataLayout *DL;
212 static char ID; // Pass identification, replacement for typeid
214 : FunctionPass(ID), TM(nullptr), TLI(nullptr), TTI(nullptr),
216 initializeCodeGenPreparePass(*PassRegistry::getPassRegistry());
218 bool runOnFunction(Function &F) override;
220 StringRef getPassName() const override { return "CodeGen Prepare"; }
222 void getAnalysisUsage(AnalysisUsage &AU) const override {
223 // FIXME: When we can selectively preserve passes, preserve the domtree.
224 AU.addRequired<ProfileSummaryInfoWrapperPass>();
225 AU.addRequired<TargetLibraryInfoWrapperPass>();
226 AU.addRequired<TargetTransformInfoWrapperPass>();
227 AU.addRequired<LoopInfoWrapperPass>();
231 bool eliminateFallThrough(Function &F);
232 bool eliminateMostlyEmptyBlocks(Function &F);
233 BasicBlock *findDestBlockOfMergeableEmptyBlock(BasicBlock *BB);
234 bool canMergeBlocks(const BasicBlock *BB, const BasicBlock *DestBB) const;
235 void eliminateMostlyEmptyBlock(BasicBlock *BB);
236 bool isMergingEmptyBlockProfitable(BasicBlock *BB, BasicBlock *DestBB,
238 bool optimizeBlock(BasicBlock &BB, bool &ModifiedDT);
239 bool optimizeInst(Instruction *I, bool &ModifiedDT);
240 bool optimizeMemoryInst(Instruction *I, Value *Addr,
241 Type *AccessTy, unsigned AS);
242 bool optimizeInlineAsmInst(CallInst *CS);
243 bool optimizeCallInst(CallInst *CI, bool &ModifiedDT);
244 bool optimizeExt(Instruction *&I);
245 bool optimizeExtUses(Instruction *I);
246 bool optimizeLoadExt(LoadInst *I);
247 bool optimizeSelectInst(SelectInst *SI);
248 bool optimizeShuffleVectorInst(ShuffleVectorInst *SI);
249 bool optimizeSwitchInst(SwitchInst *CI);
250 bool optimizeExtractElementInst(Instruction *Inst);
251 bool dupRetToEnableTailCallOpts(BasicBlock *BB);
252 bool placeDbgValues(Function &F);
253 bool canFormExtLd(const SmallVectorImpl<Instruction *> &MovedExts,
254 LoadInst *&LI, Instruction *&Inst, bool HasPromoted);
255 bool tryToPromoteExts(TypePromotionTransaction &TPT,
256 const SmallVectorImpl<Instruction *> &Exts,
257 SmallVectorImpl<Instruction *> &ProfitablyMovedExts,
258 unsigned CreatedInstsCost = 0);
259 bool mergeSExts(Function &F);
260 bool performAddressTypePromotion(
262 bool AllowPromotionWithoutCommonHeader,
263 bool HasPromoted, TypePromotionTransaction &TPT,
264 SmallVectorImpl<Instruction *> &SpeculativelyMovedExts);
265 bool splitBranchCondition(Function &F);
266 bool simplifyOffsetableRelocate(Instruction &I);
267 bool splitIndirectCriticalEdges(Function &F);
271 char CodeGenPrepare::ID = 0;
272 INITIALIZE_PASS_BEGIN(CodeGenPrepare, DEBUG_TYPE,
273 "Optimize for code generation", false, false)
274 INITIALIZE_PASS_DEPENDENCY(ProfileSummaryInfoWrapperPass)
275 INITIALIZE_PASS_END(CodeGenPrepare, DEBUG_TYPE,
276 "Optimize for code generation", false, false)
278 FunctionPass *llvm::createCodeGenPreparePass() { return new CodeGenPrepare(); }
280 bool CodeGenPrepare::runOnFunction(Function &F) {
284 DL = &F.getParent()->getDataLayout();
286 bool EverMadeChange = false;
287 // Clear per function information.
288 InsertedInsts.clear();
289 PromotedInsts.clear();
294 if (auto *TPC = getAnalysisIfAvailable<TargetPassConfig>()) {
295 TM = &TPC->getTM<TargetMachine>();
296 SubtargetInfo = TM->getSubtargetImpl(F);
297 TLI = SubtargetInfo->getTargetLowering();
298 TRI = SubtargetInfo->getRegisterInfo();
300 TLInfo = &getAnalysis<TargetLibraryInfoWrapperPass>().getTLI();
301 TTI = &getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
302 LI = &getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
303 OptSize = F.optForSize();
305 if (ProfileGuidedSectionPrefix) {
306 ProfileSummaryInfo *PSI =
307 getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI();
308 if (PSI->isFunctionHotInCallGraph(&F))
309 F.setSectionPrefix(".hot");
310 else if (PSI->isFunctionColdInCallGraph(&F))
311 F.setSectionPrefix(".unlikely");
314 /// This optimization identifies DIV instructions that can be
315 /// profitably bypassed and carried out with a shorter, faster divide.
316 if (!OptSize && TLI && TLI->isSlowDivBypassed()) {
317 const DenseMap<unsigned int, unsigned int> &BypassWidths =
318 TLI->getBypassSlowDivWidths();
319 BasicBlock* BB = &*F.begin();
320 while (BB != nullptr) {
321 // bypassSlowDivision may create new BBs, but we don't want to reapply the
322 // optimization to those blocks.
323 BasicBlock* Next = BB->getNextNode();
324 EverMadeChange |= bypassSlowDivision(BB, BypassWidths);
329 // Eliminate blocks that contain only PHI nodes and an
330 // unconditional branch.
331 EverMadeChange |= eliminateMostlyEmptyBlocks(F);
333 // llvm.dbg.value is far away from the value then iSel may not be able
334 // handle it properly. iSel will drop llvm.dbg.value if it can not
335 // find a node corresponding to the value.
336 EverMadeChange |= placeDbgValues(F);
338 if (!DisableBranchOpts)
339 EverMadeChange |= splitBranchCondition(F);
341 // Split some critical edges where one of the sources is an indirect branch,
342 // to help generate sane code for PHIs involving such edges.
343 EverMadeChange |= splitIndirectCriticalEdges(F);
345 bool MadeChange = true;
348 SeenChainsForSExt.clear();
349 ValToSExtendedUses.clear();
350 RemovedInsts.clear();
351 for (Function::iterator I = F.begin(); I != F.end(); ) {
352 BasicBlock *BB = &*I++;
353 bool ModifiedDTOnIteration = false;
354 MadeChange |= optimizeBlock(*BB, ModifiedDTOnIteration);
356 // Restart BB iteration if the dominator tree of the Function was changed
357 if (ModifiedDTOnIteration)
360 if (EnableTypePromotionMerge && !ValToSExtendedUses.empty())
361 MadeChange |= mergeSExts(F);
363 // Really free removed instructions during promotion.
364 for (Instruction *I : RemovedInsts)
367 EverMadeChange |= MadeChange;
372 if (!DisableBranchOpts) {
374 SmallPtrSet<BasicBlock*, 8> WorkList;
375 for (BasicBlock &BB : F) {
376 SmallVector<BasicBlock *, 2> Successors(succ_begin(&BB), succ_end(&BB));
377 MadeChange |= ConstantFoldTerminator(&BB, true);
378 if (!MadeChange) continue;
380 for (SmallVectorImpl<BasicBlock*>::iterator
381 II = Successors.begin(), IE = Successors.end(); II != IE; ++II)
382 if (pred_begin(*II) == pred_end(*II))
383 WorkList.insert(*II);
386 // Delete the dead blocks and any of their dead successors.
387 MadeChange |= !WorkList.empty();
388 while (!WorkList.empty()) {
389 BasicBlock *BB = *WorkList.begin();
391 SmallVector<BasicBlock*, 2> Successors(succ_begin(BB), succ_end(BB));
395 for (SmallVectorImpl<BasicBlock*>::iterator
396 II = Successors.begin(), IE = Successors.end(); II != IE; ++II)
397 if (pred_begin(*II) == pred_end(*II))
398 WorkList.insert(*II);
401 // Merge pairs of basic blocks with unconditional branches, connected by
403 if (EverMadeChange || MadeChange)
404 MadeChange |= eliminateFallThrough(F);
406 EverMadeChange |= MadeChange;
409 if (!DisableGCOpts) {
410 SmallVector<Instruction *, 2> Statepoints;
411 for (BasicBlock &BB : F)
412 for (Instruction &I : BB)
414 Statepoints.push_back(&I);
415 for (auto &I : Statepoints)
416 EverMadeChange |= simplifyOffsetableRelocate(*I);
419 return EverMadeChange;
422 /// Merge basic blocks which are connected by a single edge, where one of the
423 /// basic blocks has a single successor pointing to the other basic block,
424 /// which has a single predecessor.
425 bool CodeGenPrepare::eliminateFallThrough(Function &F) {
426 bool Changed = false;
427 // Scan all of the blocks in the function, except for the entry block.
428 for (Function::iterator I = std::next(F.begin()), E = F.end(); I != E;) {
429 BasicBlock *BB = &*I++;
430 // If the destination block has a single pred, then this is a trivial
431 // edge, just collapse it.
432 BasicBlock *SinglePred = BB->getSinglePredecessor();
434 // Don't merge if BB's address is taken.
435 if (!SinglePred || SinglePred == BB || BB->hasAddressTaken()) continue;
437 BranchInst *Term = dyn_cast<BranchInst>(SinglePred->getTerminator());
438 if (Term && !Term->isConditional()) {
440 DEBUG(dbgs() << "To merge:\n"<< *SinglePred << "\n\n\n");
441 // Remember if SinglePred was the entry block of the function.
442 // If so, we will need to move BB back to the entry position.
443 bool isEntry = SinglePred == &SinglePred->getParent()->getEntryBlock();
444 MergeBasicBlockIntoOnlyPred(BB, nullptr);
446 if (isEntry && BB != &BB->getParent()->getEntryBlock())
447 BB->moveBefore(&BB->getParent()->getEntryBlock());
449 // We have erased a block. Update the iterator.
450 I = BB->getIterator();
456 /// Find a destination block from BB if BB is mergeable empty block.
457 BasicBlock *CodeGenPrepare::findDestBlockOfMergeableEmptyBlock(BasicBlock *BB) {
458 // If this block doesn't end with an uncond branch, ignore it.
459 BranchInst *BI = dyn_cast<BranchInst>(BB->getTerminator());
460 if (!BI || !BI->isUnconditional())
463 // If the instruction before the branch (skipping debug info) isn't a phi
464 // node, then other stuff is happening here.
465 BasicBlock::iterator BBI = BI->getIterator();
466 if (BBI != BB->begin()) {
468 while (isa<DbgInfoIntrinsic>(BBI)) {
469 if (BBI == BB->begin())
473 if (!isa<DbgInfoIntrinsic>(BBI) && !isa<PHINode>(BBI))
477 // Do not break infinite loops.
478 BasicBlock *DestBB = BI->getSuccessor(0);
482 if (!canMergeBlocks(BB, DestBB))
488 // Return the unique indirectbr predecessor of a block. This may return null
489 // even if such a predecessor exists, if it's not useful for splitting.
490 // If a predecessor is found, OtherPreds will contain all other (non-indirectbr)
491 // predecessors of BB.
493 findIBRPredecessor(BasicBlock *BB, SmallVectorImpl<BasicBlock *> &OtherPreds) {
494 // If the block doesn't have any PHIs, we don't care about it, since there's
495 // no point in splitting it.
496 PHINode *PN = dyn_cast<PHINode>(BB->begin());
500 // Verify we have exactly one IBR predecessor.
501 // Conservatively bail out if one of the other predecessors is not a "regular"
502 // terminator (that is, not a switch or a br).
503 BasicBlock *IBB = nullptr;
504 for (unsigned Pred = 0, E = PN->getNumIncomingValues(); Pred != E; ++Pred) {
505 BasicBlock *PredBB = PN->getIncomingBlock(Pred);
506 TerminatorInst *PredTerm = PredBB->getTerminator();
507 switch (PredTerm->getOpcode()) {
508 case Instruction::IndirectBr:
513 case Instruction::Br:
514 case Instruction::Switch:
515 OtherPreds.push_back(PredBB);
525 // Split critical edges where the source of the edge is an indirectbr
526 // instruction. This isn't always possible, but we can handle some easy cases.
527 // This is useful because MI is unable to split such critical edges,
528 // which means it will not be able to sink instructions along those edges.
529 // This is especially painful for indirect branches with many successors, where
530 // we end up having to prepare all outgoing values in the origin block.
532 // Our normal algorithm for splitting critical edges requires us to update
533 // the outgoing edges of the edge origin block, but for an indirectbr this
534 // is hard, since it would require finding and updating the block addresses
535 // the indirect branch uses. But if a block only has a single indirectbr
536 // predecessor, with the others being regular branches, we can do it in a
538 // Say we have A -> D, B -> D, I -> D where only I -> D is an indirectbr.
539 // We can split D into D0 and D1, where D0 contains only the PHIs from D,
540 // and D1 is the D block body. We can then duplicate D0 as D0A and D0B, and
541 // create the following structure:
542 // A -> D0A, B -> D0A, I -> D0B, D0A -> D1, D0B -> D1
543 bool CodeGenPrepare::splitIndirectCriticalEdges(Function &F) {
544 // Check whether the function has any indirectbrs, and collect which blocks
545 // they may jump to. Since most functions don't have indirect branches,
546 // this lowers the common case's overhead to O(Blocks) instead of O(Edges).
547 SmallSetVector<BasicBlock *, 16> Targets;
549 auto *IBI = dyn_cast<IndirectBrInst>(BB.getTerminator());
553 for (unsigned Succ = 0, E = IBI->getNumSuccessors(); Succ != E; ++Succ)
554 Targets.insert(IBI->getSuccessor(Succ));
560 bool Changed = false;
561 for (BasicBlock *Target : Targets) {
562 SmallVector<BasicBlock *, 16> OtherPreds;
563 BasicBlock *IBRPred = findIBRPredecessor(Target, OtherPreds);
564 // If we did not found an indirectbr, or the indirectbr is the only
565 // incoming edge, this isn't the kind of edge we're looking for.
566 if (!IBRPred || OtherPreds.empty())
569 // Don't even think about ehpads/landingpads.
570 Instruction *FirstNonPHI = Target->getFirstNonPHI();
571 if (FirstNonPHI->isEHPad() || Target->isLandingPad())
574 BasicBlock *BodyBlock = Target->splitBasicBlock(FirstNonPHI, ".split");
575 // It's possible Target was its own successor through an indirectbr.
576 // In this case, the indirectbr now comes from BodyBlock.
577 if (IBRPred == Target)
580 // At this point Target only has PHIs, and BodyBlock has the rest of the
581 // block's body. Create a copy of Target that will be used by the "direct"
583 ValueToValueMapTy VMap;
584 BasicBlock *DirectSucc = CloneBasicBlock(Target, VMap, ".clone", &F);
586 for (BasicBlock *Pred : OtherPreds) {
587 // If the target is a loop to itself, then the terminator of the split
588 // block needs to be updated.
590 BodyBlock->getTerminator()->replaceUsesOfWith(Target, DirectSucc);
592 Pred->getTerminator()->replaceUsesOfWith(Target, DirectSucc);
595 // Ok, now fix up the PHIs. We know the two blocks only have PHIs, and that
596 // they are clones, so the number of PHIs are the same.
597 // (a) Remove the edge coming from IBRPred from the "Direct" PHI
598 // (b) Leave that as the only edge in the "Indirect" PHI.
599 // (c) Merge the two in the body block.
600 BasicBlock::iterator Indirect = Target->begin(),
601 End = Target->getFirstNonPHI()->getIterator();
602 BasicBlock::iterator Direct = DirectSucc->begin();
603 BasicBlock::iterator MergeInsert = BodyBlock->getFirstInsertionPt();
605 assert(&*End == Target->getTerminator() &&
606 "Block was expected to only contain PHIs");
608 while (Indirect != End) {
609 PHINode *DirPHI = cast<PHINode>(Direct);
610 PHINode *IndPHI = cast<PHINode>(Indirect);
612 // Now, clean up - the direct block shouldn't get the indirect value,
614 DirPHI->removeIncomingValue(IBRPred);
617 // Advance the pointer here, to avoid invalidation issues when the old
621 PHINode *NewIndPHI = PHINode::Create(IndPHI->getType(), 1, "ind", IndPHI);
622 NewIndPHI->addIncoming(IndPHI->getIncomingValueForBlock(IBRPred),
625 // Create a PHI in the body block, to merge the direct and indirect
628 PHINode::Create(IndPHI->getType(), 2, "merge", &*MergeInsert);
629 MergePHI->addIncoming(NewIndPHI, Target);
630 MergePHI->addIncoming(DirPHI, DirectSucc);
632 IndPHI->replaceAllUsesWith(MergePHI);
633 IndPHI->eraseFromParent();
642 /// Eliminate blocks that contain only PHI nodes, debug info directives, and an
643 /// unconditional branch. Passes before isel (e.g. LSR/loopsimplify) often split
644 /// edges in ways that are non-optimal for isel. Start by eliminating these
645 /// blocks so we can split them the way we want them.
646 bool CodeGenPrepare::eliminateMostlyEmptyBlocks(Function &F) {
647 SmallPtrSet<BasicBlock *, 16> Preheaders;
648 SmallVector<Loop *, 16> LoopList(LI->begin(), LI->end());
649 while (!LoopList.empty()) {
650 Loop *L = LoopList.pop_back_val();
651 LoopList.insert(LoopList.end(), L->begin(), L->end());
652 if (BasicBlock *Preheader = L->getLoopPreheader())
653 Preheaders.insert(Preheader);
656 bool MadeChange = false;
657 // Note that this intentionally skips the entry block.
658 for (Function::iterator I = std::next(F.begin()), E = F.end(); I != E;) {
659 BasicBlock *BB = &*I++;
660 BasicBlock *DestBB = findDestBlockOfMergeableEmptyBlock(BB);
662 !isMergingEmptyBlockProfitable(BB, DestBB, Preheaders.count(BB)))
665 eliminateMostlyEmptyBlock(BB);
671 bool CodeGenPrepare::isMergingEmptyBlockProfitable(BasicBlock *BB,
674 // Do not delete loop preheaders if doing so would create a critical edge.
675 // Loop preheaders can be good locations to spill registers. If the
676 // preheader is deleted and we create a critical edge, registers may be
677 // spilled in the loop body instead.
678 if (!DisablePreheaderProtect && isPreheader &&
679 !(BB->getSinglePredecessor() &&
680 BB->getSinglePredecessor()->getSingleSuccessor()))
683 // Try to skip merging if the unique predecessor of BB is terminated by a
684 // switch or indirect branch instruction, and BB is used as an incoming block
685 // of PHIs in DestBB. In such case, merging BB and DestBB would cause ISel to
686 // add COPY instructions in the predecessor of BB instead of BB (if it is not
687 // merged). Note that the critical edge created by merging such blocks wont be
688 // split in MachineSink because the jump table is not analyzable. By keeping
689 // such empty block (BB), ISel will place COPY instructions in BB, not in the
690 // predecessor of BB.
691 BasicBlock *Pred = BB->getUniquePredecessor();
693 !(isa<SwitchInst>(Pred->getTerminator()) ||
694 isa<IndirectBrInst>(Pred->getTerminator())))
697 if (BB->getTerminator() != BB->getFirstNonPHI())
700 // We use a simple cost heuristic which determine skipping merging is
701 // profitable if the cost of skipping merging is less than the cost of
702 // merging : Cost(skipping merging) < Cost(merging BB), where the
703 // Cost(skipping merging) is Freq(BB) * (Cost(Copy) + Cost(Branch)), and
704 // the Cost(merging BB) is Freq(Pred) * Cost(Copy).
705 // Assuming Cost(Copy) == Cost(Branch), we could simplify it to :
706 // Freq(Pred) / Freq(BB) > 2.
707 // Note that if there are multiple empty blocks sharing the same incoming
708 // value for the PHIs in the DestBB, we consider them together. In such
709 // case, Cost(merging BB) will be the sum of their frequencies.
711 if (!isa<PHINode>(DestBB->begin()))
714 SmallPtrSet<BasicBlock *, 16> SameIncomingValueBBs;
716 // Find all other incoming blocks from which incoming values of all PHIs in
717 // DestBB are the same as the ones from BB.
718 for (pred_iterator PI = pred_begin(DestBB), E = pred_end(DestBB); PI != E;
720 BasicBlock *DestBBPred = *PI;
721 if (DestBBPred == BB)
724 bool HasAllSameValue = true;
725 BasicBlock::const_iterator DestBBI = DestBB->begin();
726 while (const PHINode *DestPN = dyn_cast<PHINode>(DestBBI++)) {
727 if (DestPN->getIncomingValueForBlock(BB) !=
728 DestPN->getIncomingValueForBlock(DestBBPred)) {
729 HasAllSameValue = false;
734 SameIncomingValueBBs.insert(DestBBPred);
737 // See if all BB's incoming values are same as the value from Pred. In this
738 // case, no reason to skip merging because COPYs are expected to be place in
740 if (SameIncomingValueBBs.count(Pred))
744 Function &F = *BB->getParent();
745 LoopInfo LI{DominatorTree(F)};
746 BPI.reset(new BranchProbabilityInfo(F, LI));
747 BFI.reset(new BlockFrequencyInfo(F, *BPI, LI));
750 BlockFrequency PredFreq = BFI->getBlockFreq(Pred);
751 BlockFrequency BBFreq = BFI->getBlockFreq(BB);
753 for (auto SameValueBB : SameIncomingValueBBs)
754 if (SameValueBB->getUniquePredecessor() == Pred &&
755 DestBB == findDestBlockOfMergeableEmptyBlock(SameValueBB))
756 BBFreq += BFI->getBlockFreq(SameValueBB);
758 return PredFreq.getFrequency() <=
759 BBFreq.getFrequency() * FreqRatioToSkipMerge;
762 /// Return true if we can merge BB into DestBB if there is a single
763 /// unconditional branch between them, and BB contains no other non-phi
765 bool CodeGenPrepare::canMergeBlocks(const BasicBlock *BB,
766 const BasicBlock *DestBB) const {
767 // We only want to eliminate blocks whose phi nodes are used by phi nodes in
768 // the successor. If there are more complex condition (e.g. preheaders),
769 // don't mess around with them.
770 BasicBlock::const_iterator BBI = BB->begin();
771 while (const PHINode *PN = dyn_cast<PHINode>(BBI++)) {
772 for (const User *U : PN->users()) {
773 const Instruction *UI = cast<Instruction>(U);
774 if (UI->getParent() != DestBB || !isa<PHINode>(UI))
776 // If User is inside DestBB block and it is a PHINode then check
777 // incoming value. If incoming value is not from BB then this is
778 // a complex condition (e.g. preheaders) we want to avoid here.
779 if (UI->getParent() == DestBB) {
780 if (const PHINode *UPN = dyn_cast<PHINode>(UI))
781 for (unsigned I = 0, E = UPN->getNumIncomingValues(); I != E; ++I) {
782 Instruction *Insn = dyn_cast<Instruction>(UPN->getIncomingValue(I));
783 if (Insn && Insn->getParent() == BB &&
784 Insn->getParent() != UPN->getIncomingBlock(I))
791 // If BB and DestBB contain any common predecessors, then the phi nodes in BB
792 // and DestBB may have conflicting incoming values for the block. If so, we
793 // can't merge the block.
794 const PHINode *DestBBPN = dyn_cast<PHINode>(DestBB->begin());
795 if (!DestBBPN) return true; // no conflict.
797 // Collect the preds of BB.
798 SmallPtrSet<const BasicBlock*, 16> BBPreds;
799 if (const PHINode *BBPN = dyn_cast<PHINode>(BB->begin())) {
800 // It is faster to get preds from a PHI than with pred_iterator.
801 for (unsigned i = 0, e = BBPN->getNumIncomingValues(); i != e; ++i)
802 BBPreds.insert(BBPN->getIncomingBlock(i));
804 BBPreds.insert(pred_begin(BB), pred_end(BB));
807 // Walk the preds of DestBB.
808 for (unsigned i = 0, e = DestBBPN->getNumIncomingValues(); i != e; ++i) {
809 BasicBlock *Pred = DestBBPN->getIncomingBlock(i);
810 if (BBPreds.count(Pred)) { // Common predecessor?
811 BBI = DestBB->begin();
812 while (const PHINode *PN = dyn_cast<PHINode>(BBI++)) {
813 const Value *V1 = PN->getIncomingValueForBlock(Pred);
814 const Value *V2 = PN->getIncomingValueForBlock(BB);
816 // If V2 is a phi node in BB, look up what the mapped value will be.
817 if (const PHINode *V2PN = dyn_cast<PHINode>(V2))
818 if (V2PN->getParent() == BB)
819 V2 = V2PN->getIncomingValueForBlock(Pred);
821 // If there is a conflict, bail out.
822 if (V1 != V2) return false;
831 /// Eliminate a basic block that has only phi's and an unconditional branch in
833 void CodeGenPrepare::eliminateMostlyEmptyBlock(BasicBlock *BB) {
834 BranchInst *BI = cast<BranchInst>(BB->getTerminator());
835 BasicBlock *DestBB = BI->getSuccessor(0);
837 DEBUG(dbgs() << "MERGING MOSTLY EMPTY BLOCKS - BEFORE:\n" << *BB << *DestBB);
839 // If the destination block has a single pred, then this is a trivial edge,
841 if (BasicBlock *SinglePred = DestBB->getSinglePredecessor()) {
842 if (SinglePred != DestBB) {
843 // Remember if SinglePred was the entry block of the function. If so, we
844 // will need to move BB back to the entry position.
845 bool isEntry = SinglePred == &SinglePred->getParent()->getEntryBlock();
846 MergeBasicBlockIntoOnlyPred(DestBB, nullptr);
848 if (isEntry && BB != &BB->getParent()->getEntryBlock())
849 BB->moveBefore(&BB->getParent()->getEntryBlock());
851 DEBUG(dbgs() << "AFTER:\n" << *DestBB << "\n\n\n");
856 // Otherwise, we have multiple predecessors of BB. Update the PHIs in DestBB
857 // to handle the new incoming edges it is about to have.
859 for (BasicBlock::iterator BBI = DestBB->begin();
860 (PN = dyn_cast<PHINode>(BBI)); ++BBI) {
861 // Remove the incoming value for BB, and remember it.
862 Value *InVal = PN->removeIncomingValue(BB, false);
864 // Two options: either the InVal is a phi node defined in BB or it is some
865 // value that dominates BB.
866 PHINode *InValPhi = dyn_cast<PHINode>(InVal);
867 if (InValPhi && InValPhi->getParent() == BB) {
868 // Add all of the input values of the input PHI as inputs of this phi.
869 for (unsigned i = 0, e = InValPhi->getNumIncomingValues(); i != e; ++i)
870 PN->addIncoming(InValPhi->getIncomingValue(i),
871 InValPhi->getIncomingBlock(i));
873 // Otherwise, add one instance of the dominating value for each edge that
874 // we will be adding.
875 if (PHINode *BBPN = dyn_cast<PHINode>(BB->begin())) {
876 for (unsigned i = 0, e = BBPN->getNumIncomingValues(); i != e; ++i)
877 PN->addIncoming(InVal, BBPN->getIncomingBlock(i));
879 for (pred_iterator PI = pred_begin(BB), E = pred_end(BB); PI != E; ++PI)
880 PN->addIncoming(InVal, *PI);
885 // The PHIs are now updated, change everything that refers to BB to use
886 // DestBB and remove BB.
887 BB->replaceAllUsesWith(DestBB);
888 BB->eraseFromParent();
891 DEBUG(dbgs() << "AFTER:\n" << *DestBB << "\n\n\n");
894 // Computes a map of base pointer relocation instructions to corresponding
895 // derived pointer relocation instructions given a vector of all relocate calls
896 static void computeBaseDerivedRelocateMap(
897 const SmallVectorImpl<GCRelocateInst *> &AllRelocateCalls,
898 DenseMap<GCRelocateInst *, SmallVector<GCRelocateInst *, 2>>
900 // Collect information in two maps: one primarily for locating the base object
901 // while filling the second map; the second map is the final structure holding
902 // a mapping between Base and corresponding Derived relocate calls
903 DenseMap<std::pair<unsigned, unsigned>, GCRelocateInst *> RelocateIdxMap;
904 for (auto *ThisRelocate : AllRelocateCalls) {
905 auto K = std::make_pair(ThisRelocate->getBasePtrIndex(),
906 ThisRelocate->getDerivedPtrIndex());
907 RelocateIdxMap.insert(std::make_pair(K, ThisRelocate));
909 for (auto &Item : RelocateIdxMap) {
910 std::pair<unsigned, unsigned> Key = Item.first;
911 if (Key.first == Key.second)
912 // Base relocation: nothing to insert
915 GCRelocateInst *I = Item.second;
916 auto BaseKey = std::make_pair(Key.first, Key.first);
918 // We're iterating over RelocateIdxMap so we cannot modify it.
919 auto MaybeBase = RelocateIdxMap.find(BaseKey);
920 if (MaybeBase == RelocateIdxMap.end())
921 // TODO: We might want to insert a new base object relocate and gep off
922 // that, if there are enough derived object relocates.
925 RelocateInstMap[MaybeBase->second].push_back(I);
929 // Accepts a GEP and extracts the operands into a vector provided they're all
930 // small integer constants
931 static bool getGEPSmallConstantIntOffsetV(GetElementPtrInst *GEP,
932 SmallVectorImpl<Value *> &OffsetV) {
933 for (unsigned i = 1; i < GEP->getNumOperands(); i++) {
934 // Only accept small constant integer operands
935 auto Op = dyn_cast<ConstantInt>(GEP->getOperand(i));
936 if (!Op || Op->getZExtValue() > 20)
940 for (unsigned i = 1; i < GEP->getNumOperands(); i++)
941 OffsetV.push_back(GEP->getOperand(i));
945 // Takes a RelocatedBase (base pointer relocation instruction) and Targets to
946 // replace, computes a replacement, and affects it.
948 simplifyRelocatesOffABase(GCRelocateInst *RelocatedBase,
949 const SmallVectorImpl<GCRelocateInst *> &Targets) {
950 bool MadeChange = false;
951 for (GCRelocateInst *ToReplace : Targets) {
952 assert(ToReplace->getBasePtrIndex() == RelocatedBase->getBasePtrIndex() &&
953 "Not relocating a derived object of the original base object");
954 if (ToReplace->getBasePtrIndex() == ToReplace->getDerivedPtrIndex()) {
955 // A duplicate relocate call. TODO: coalesce duplicates.
959 if (RelocatedBase->getParent() != ToReplace->getParent()) {
960 // Base and derived relocates are in different basic blocks.
961 // In this case transform is only valid when base dominates derived
962 // relocate. However it would be too expensive to check dominance
963 // for each such relocate, so we skip the whole transformation.
967 Value *Base = ToReplace->getBasePtr();
968 auto Derived = dyn_cast<GetElementPtrInst>(ToReplace->getDerivedPtr());
969 if (!Derived || Derived->getPointerOperand() != Base)
972 SmallVector<Value *, 2> OffsetV;
973 if (!getGEPSmallConstantIntOffsetV(Derived, OffsetV))
976 // Create a Builder and replace the target callsite with a gep
977 assert(RelocatedBase->getNextNode() &&
978 "Should always have one since it's not a terminator");
980 // Insert after RelocatedBase
981 IRBuilder<> Builder(RelocatedBase->getNextNode());
982 Builder.SetCurrentDebugLocation(ToReplace->getDebugLoc());
984 // If gc_relocate does not match the actual type, cast it to the right type.
985 // In theory, there must be a bitcast after gc_relocate if the type does not
986 // match, and we should reuse it to get the derived pointer. But it could be
990 // %g1 = call coldcc i8 addrspace(1)* @llvm.experimental.gc.relocate.p1i8(...)
995 // %g2 = call coldcc i8 addrspace(1)* @llvm.experimental.gc.relocate.p1i8(...)
999 // %p1 = phi i8 addrspace(1)* [ %g1, %bb1 ], [ %g2, %bb2 ]
1000 // %cast = bitcast i8 addrspace(1)* %p1 in to i32 addrspace(1)*
1002 // In this case, we can not find the bitcast any more. So we insert a new bitcast
1003 // no matter there is already one or not. In this way, we can handle all cases, and
1004 // the extra bitcast should be optimized away in later passes.
1005 Value *ActualRelocatedBase = RelocatedBase;
1006 if (RelocatedBase->getType() != Base->getType()) {
1007 ActualRelocatedBase =
1008 Builder.CreateBitCast(RelocatedBase, Base->getType());
1010 Value *Replacement = Builder.CreateGEP(
1011 Derived->getSourceElementType(), ActualRelocatedBase, makeArrayRef(OffsetV));
1012 Replacement->takeName(ToReplace);
1013 // If the newly generated derived pointer's type does not match the original derived
1014 // pointer's type, cast the new derived pointer to match it. Same reasoning as above.
1015 Value *ActualReplacement = Replacement;
1016 if (Replacement->getType() != ToReplace->getType()) {
1018 Builder.CreateBitCast(Replacement, ToReplace->getType());
1020 ToReplace->replaceAllUsesWith(ActualReplacement);
1021 ToReplace->eraseFromParent();
1031 // %ptr = gep %base + 15
1032 // %tok = statepoint (%fun, i32 0, i32 0, i32 0, %base, %ptr)
1033 // %base' = relocate(%tok, i32 4, i32 4)
1034 // %ptr' = relocate(%tok, i32 4, i32 5)
1035 // %val = load %ptr'
1040 // %ptr = gep %base + 15
1041 // %tok = statepoint (%fun, i32 0, i32 0, i32 0, %base, %ptr)
1042 // %base' = gc.relocate(%tok, i32 4, i32 4)
1043 // %ptr' = gep %base' + 15
1044 // %val = load %ptr'
1045 bool CodeGenPrepare::simplifyOffsetableRelocate(Instruction &I) {
1046 bool MadeChange = false;
1047 SmallVector<GCRelocateInst *, 2> AllRelocateCalls;
1049 for (auto *U : I.users())
1050 if (GCRelocateInst *Relocate = dyn_cast<GCRelocateInst>(U))
1051 // Collect all the relocate calls associated with a statepoint
1052 AllRelocateCalls.push_back(Relocate);
1054 // We need atleast one base pointer relocation + one derived pointer
1055 // relocation to mangle
1056 if (AllRelocateCalls.size() < 2)
1059 // RelocateInstMap is a mapping from the base relocate instruction to the
1060 // corresponding derived relocate instructions
1061 DenseMap<GCRelocateInst *, SmallVector<GCRelocateInst *, 2>> RelocateInstMap;
1062 computeBaseDerivedRelocateMap(AllRelocateCalls, RelocateInstMap);
1063 if (RelocateInstMap.empty())
1066 for (auto &Item : RelocateInstMap)
1067 // Item.first is the RelocatedBase to offset against
1068 // Item.second is the vector of Targets to replace
1069 MadeChange = simplifyRelocatesOffABase(Item.first, Item.second);
1073 /// SinkCast - Sink the specified cast instruction into its user blocks
1074 static bool SinkCast(CastInst *CI) {
1075 BasicBlock *DefBB = CI->getParent();
1077 /// InsertedCasts - Only insert a cast in each block once.
1078 DenseMap<BasicBlock*, CastInst*> InsertedCasts;
1080 bool MadeChange = false;
1081 for (Value::user_iterator UI = CI->user_begin(), E = CI->user_end();
1083 Use &TheUse = UI.getUse();
1084 Instruction *User = cast<Instruction>(*UI);
1086 // Figure out which BB this cast is used in. For PHI's this is the
1087 // appropriate predecessor block.
1088 BasicBlock *UserBB = User->getParent();
1089 if (PHINode *PN = dyn_cast<PHINode>(User)) {
1090 UserBB = PN->getIncomingBlock(TheUse);
1093 // Preincrement use iterator so we don't invalidate it.
1096 // The first insertion point of a block containing an EH pad is after the
1097 // pad. If the pad is the user, we cannot sink the cast past the pad.
1098 if (User->isEHPad())
1101 // If the block selected to receive the cast is an EH pad that does not
1102 // allow non-PHI instructions before the terminator, we can't sink the
1104 if (UserBB->getTerminator()->isEHPad())
1107 // If this user is in the same block as the cast, don't change the cast.
1108 if (UserBB == DefBB) continue;
1110 // If we have already inserted a cast into this block, use it.
1111 CastInst *&InsertedCast = InsertedCasts[UserBB];
1113 if (!InsertedCast) {
1114 BasicBlock::iterator InsertPt = UserBB->getFirstInsertionPt();
1115 assert(InsertPt != UserBB->end());
1116 InsertedCast = CastInst::Create(CI->getOpcode(), CI->getOperand(0),
1117 CI->getType(), "", &*InsertPt);
1120 // Replace a use of the cast with a use of the new cast.
1121 TheUse = InsertedCast;
1126 // If we removed all uses, nuke the cast.
1127 if (CI->use_empty()) {
1128 CI->eraseFromParent();
1135 /// If the specified cast instruction is a noop copy (e.g. it's casting from
1136 /// one pointer type to another, i32->i8 on PPC), sink it into user blocks to
1137 /// reduce the number of virtual registers that must be created and coalesced.
1139 /// Return true if any changes are made.
1141 static bool OptimizeNoopCopyExpression(CastInst *CI, const TargetLowering &TLI,
1142 const DataLayout &DL) {
1143 // Sink only "cheap" (or nop) address-space casts. This is a weaker condition
1144 // than sinking only nop casts, but is helpful on some platforms.
1145 if (auto *ASC = dyn_cast<AddrSpaceCastInst>(CI)) {
1146 if (!TLI.isCheapAddrSpaceCast(ASC->getSrcAddressSpace(),
1147 ASC->getDestAddressSpace()))
1151 // If this is a noop copy,
1152 EVT SrcVT = TLI.getValueType(DL, CI->getOperand(0)->getType());
1153 EVT DstVT = TLI.getValueType(DL, CI->getType());
1155 // This is an fp<->int conversion?
1156 if (SrcVT.isInteger() != DstVT.isInteger())
1159 // If this is an extension, it will be a zero or sign extension, which
1161 if (SrcVT.bitsLT(DstVT)) return false;
1163 // If these values will be promoted, find out what they will be promoted
1164 // to. This helps us consider truncates on PPC as noop copies when they
1166 if (TLI.getTypeAction(CI->getContext(), SrcVT) ==
1167 TargetLowering::TypePromoteInteger)
1168 SrcVT = TLI.getTypeToTransformTo(CI->getContext(), SrcVT);
1169 if (TLI.getTypeAction(CI->getContext(), DstVT) ==
1170 TargetLowering::TypePromoteInteger)
1171 DstVT = TLI.getTypeToTransformTo(CI->getContext(), DstVT);
1173 // If, after promotion, these are the same types, this is a noop copy.
1177 return SinkCast(CI);
1180 /// Try to combine CI into a call to the llvm.uadd.with.overflow intrinsic if
1183 /// Return true if any changes were made.
1184 static bool CombineUAddWithOverflow(CmpInst *CI) {
1188 m_UAddWithOverflow(m_Value(A), m_Value(B), m_Instruction(AddI))))
1191 Type *Ty = AddI->getType();
1192 if (!isa<IntegerType>(Ty))
1195 // We don't want to move around uses of condition values this late, so we we
1196 // check if it is legal to create the call to the intrinsic in the basic
1197 // block containing the icmp:
1199 if (AddI->getParent() != CI->getParent() && !AddI->hasOneUse())
1203 // Someday m_UAddWithOverflow may get smarter, but this is a safe assumption
1205 if (AddI->hasOneUse())
1206 assert(*AddI->user_begin() == CI && "expected!");
1209 Module *M = CI->getModule();
1210 Value *F = Intrinsic::getDeclaration(M, Intrinsic::uadd_with_overflow, Ty);
1212 auto *InsertPt = AddI->hasOneUse() ? CI : AddI;
1214 auto *UAddWithOverflow =
1215 CallInst::Create(F, {A, B}, "uadd.overflow", InsertPt);
1216 auto *UAdd = ExtractValueInst::Create(UAddWithOverflow, 0, "uadd", InsertPt);
1218 ExtractValueInst::Create(UAddWithOverflow, 1, "overflow", InsertPt);
1220 CI->replaceAllUsesWith(Overflow);
1221 AddI->replaceAllUsesWith(UAdd);
1222 CI->eraseFromParent();
1223 AddI->eraseFromParent();
1227 /// Sink the given CmpInst into user blocks to reduce the number of virtual
1228 /// registers that must be created and coalesced. This is a clear win except on
1229 /// targets with multiple condition code registers (PowerPC), where it might
1230 /// lose; some adjustment may be wanted there.
1232 /// Return true if any changes are made.
1233 static bool SinkCmpExpression(CmpInst *CI, const TargetLowering *TLI) {
1234 BasicBlock *DefBB = CI->getParent();
1236 // Avoid sinking soft-FP comparisons, since this can move them into a loop.
1237 if (TLI && TLI->useSoftFloat() && isa<FCmpInst>(CI))
1240 // Only insert a cmp in each block once.
1241 DenseMap<BasicBlock*, CmpInst*> InsertedCmps;
1243 bool MadeChange = false;
1244 for (Value::user_iterator UI = CI->user_begin(), E = CI->user_end();
1246 Use &TheUse = UI.getUse();
1247 Instruction *User = cast<Instruction>(*UI);
1249 // Preincrement use iterator so we don't invalidate it.
1252 // Don't bother for PHI nodes.
1253 if (isa<PHINode>(User))
1256 // Figure out which BB this cmp is used in.
1257 BasicBlock *UserBB = User->getParent();
1259 // If this user is in the same block as the cmp, don't change the cmp.
1260 if (UserBB == DefBB) continue;
1262 // If we have already inserted a cmp into this block, use it.
1263 CmpInst *&InsertedCmp = InsertedCmps[UserBB];
1266 BasicBlock::iterator InsertPt = UserBB->getFirstInsertionPt();
1267 assert(InsertPt != UserBB->end());
1269 CmpInst::Create(CI->getOpcode(), CI->getPredicate(),
1270 CI->getOperand(0), CI->getOperand(1), "", &*InsertPt);
1271 // Propagate the debug info.
1272 InsertedCmp->setDebugLoc(CI->getDebugLoc());
1275 // Replace a use of the cmp with a use of the new cmp.
1276 TheUse = InsertedCmp;
1281 // If we removed all uses, nuke the cmp.
1282 if (CI->use_empty()) {
1283 CI->eraseFromParent();
1290 static bool OptimizeCmpExpression(CmpInst *CI, const TargetLowering *TLI) {
1291 if (SinkCmpExpression(CI, TLI))
1294 if (CombineUAddWithOverflow(CI))
1300 /// Duplicate and sink the given 'and' instruction into user blocks where it is
1301 /// used in a compare to allow isel to generate better code for targets where
1302 /// this operation can be combined.
1304 /// Return true if any changes are made.
1305 static bool sinkAndCmp0Expression(Instruction *AndI,
1306 const TargetLowering &TLI,
1307 SetOfInstrs &InsertedInsts) {
1308 // Double-check that we're not trying to optimize an instruction that was
1309 // already optimized by some other part of this pass.
1310 assert(!InsertedInsts.count(AndI) &&
1311 "Attempting to optimize already optimized and instruction");
1312 (void) InsertedInsts;
1314 // Nothing to do for single use in same basic block.
1315 if (AndI->hasOneUse() &&
1316 AndI->getParent() == cast<Instruction>(*AndI->user_begin())->getParent())
1319 // Try to avoid cases where sinking/duplicating is likely to increase register
1321 if (!isa<ConstantInt>(AndI->getOperand(0)) &&
1322 !isa<ConstantInt>(AndI->getOperand(1)) &&
1323 AndI->getOperand(0)->hasOneUse() && AndI->getOperand(1)->hasOneUse())
1326 for (auto *U : AndI->users()) {
1327 Instruction *User = cast<Instruction>(U);
1329 // Only sink for and mask feeding icmp with 0.
1330 if (!isa<ICmpInst>(User))
1333 auto *CmpC = dyn_cast<ConstantInt>(User->getOperand(1));
1334 if (!CmpC || !CmpC->isZero())
1338 if (!TLI.isMaskAndCmp0FoldingBeneficial(*AndI))
1341 DEBUG(dbgs() << "found 'and' feeding only icmp 0;\n");
1342 DEBUG(AndI->getParent()->dump());
1344 // Push the 'and' into the same block as the icmp 0. There should only be
1345 // one (icmp (and, 0)) in each block, since CSE/GVN should have removed any
1346 // others, so we don't need to keep track of which BBs we insert into.
1347 for (Value::user_iterator UI = AndI->user_begin(), E = AndI->user_end();
1349 Use &TheUse = UI.getUse();
1350 Instruction *User = cast<Instruction>(*UI);
1352 // Preincrement use iterator so we don't invalidate it.
1355 DEBUG(dbgs() << "sinking 'and' use: " << *User << "\n");
1357 // Keep the 'and' in the same place if the use is already in the same block.
1358 Instruction *InsertPt =
1359 User->getParent() == AndI->getParent() ? AndI : User;
1360 Instruction *InsertedAnd =
1361 BinaryOperator::Create(Instruction::And, AndI->getOperand(0),
1362 AndI->getOperand(1), "", InsertPt);
1363 // Propagate the debug info.
1364 InsertedAnd->setDebugLoc(AndI->getDebugLoc());
1366 // Replace a use of the 'and' with a use of the new 'and'.
1367 TheUse = InsertedAnd;
1369 DEBUG(User->getParent()->dump());
1372 // We removed all uses, nuke the and.
1373 AndI->eraseFromParent();
1377 /// Check if the candidates could be combined with a shift instruction, which
1379 /// 1. Truncate instruction
1380 /// 2. And instruction and the imm is a mask of the low bits:
1381 /// imm & (imm+1) == 0
1382 static bool isExtractBitsCandidateUse(Instruction *User) {
1383 if (!isa<TruncInst>(User)) {
1384 if (User->getOpcode() != Instruction::And ||
1385 !isa<ConstantInt>(User->getOperand(1)))
1388 const APInt &Cimm = cast<ConstantInt>(User->getOperand(1))->getValue();
1390 if ((Cimm & (Cimm + 1)).getBoolValue())
1396 /// Sink both shift and truncate instruction to the use of truncate's BB.
1398 SinkShiftAndTruncate(BinaryOperator *ShiftI, Instruction *User, ConstantInt *CI,
1399 DenseMap<BasicBlock *, BinaryOperator *> &InsertedShifts,
1400 const TargetLowering &TLI, const DataLayout &DL) {
1401 BasicBlock *UserBB = User->getParent();
1402 DenseMap<BasicBlock *, CastInst *> InsertedTruncs;
1403 TruncInst *TruncI = dyn_cast<TruncInst>(User);
1404 bool MadeChange = false;
1406 for (Value::user_iterator TruncUI = TruncI->user_begin(),
1407 TruncE = TruncI->user_end();
1408 TruncUI != TruncE;) {
1410 Use &TruncTheUse = TruncUI.getUse();
1411 Instruction *TruncUser = cast<Instruction>(*TruncUI);
1412 // Preincrement use iterator so we don't invalidate it.
1416 int ISDOpcode = TLI.InstructionOpcodeToISD(TruncUser->getOpcode());
1420 // If the use is actually a legal node, there will not be an
1421 // implicit truncate.
1422 // FIXME: always querying the result type is just an
1423 // approximation; some nodes' legality is determined by the
1424 // operand or other means. There's no good way to find out though.
1425 if (TLI.isOperationLegalOrCustom(
1426 ISDOpcode, TLI.getValueType(DL, TruncUser->getType(), true)))
1429 // Don't bother for PHI nodes.
1430 if (isa<PHINode>(TruncUser))
1433 BasicBlock *TruncUserBB = TruncUser->getParent();
1435 if (UserBB == TruncUserBB)
1438 BinaryOperator *&InsertedShift = InsertedShifts[TruncUserBB];
1439 CastInst *&InsertedTrunc = InsertedTruncs[TruncUserBB];
1441 if (!InsertedShift && !InsertedTrunc) {
1442 BasicBlock::iterator InsertPt = TruncUserBB->getFirstInsertionPt();
1443 assert(InsertPt != TruncUserBB->end());
1445 if (ShiftI->getOpcode() == Instruction::AShr)
1446 InsertedShift = BinaryOperator::CreateAShr(ShiftI->getOperand(0), CI,
1449 InsertedShift = BinaryOperator::CreateLShr(ShiftI->getOperand(0), CI,
1453 BasicBlock::iterator TruncInsertPt = TruncUserBB->getFirstInsertionPt();
1455 assert(TruncInsertPt != TruncUserBB->end());
1457 InsertedTrunc = CastInst::Create(TruncI->getOpcode(), InsertedShift,
1458 TruncI->getType(), "", &*TruncInsertPt);
1462 TruncTheUse = InsertedTrunc;
1468 /// Sink the shift *right* instruction into user blocks if the uses could
1469 /// potentially be combined with this shift instruction and generate BitExtract
1470 /// instruction. It will only be applied if the architecture supports BitExtract
1471 /// instruction. Here is an example:
1473 /// %x.extract.shift = lshr i64 %arg1, 32
1475 /// %x.extract.trunc = trunc i64 %x.extract.shift to i16
1479 /// %x.extract.shift.1 = lshr i64 %arg1, 32
1480 /// %x.extract.trunc = trunc i64 %x.extract.shift.1 to i16
1482 /// CodeGen will recoginze the pattern in BB2 and generate BitExtract
1484 /// Return true if any changes are made.
1485 static bool OptimizeExtractBits(BinaryOperator *ShiftI, ConstantInt *CI,
1486 const TargetLowering &TLI,
1487 const DataLayout &DL) {
1488 BasicBlock *DefBB = ShiftI->getParent();
1490 /// Only insert instructions in each block once.
1491 DenseMap<BasicBlock *, BinaryOperator *> InsertedShifts;
1493 bool shiftIsLegal = TLI.isTypeLegal(TLI.getValueType(DL, ShiftI->getType()));
1495 bool MadeChange = false;
1496 for (Value::user_iterator UI = ShiftI->user_begin(), E = ShiftI->user_end();
1498 Use &TheUse = UI.getUse();
1499 Instruction *User = cast<Instruction>(*UI);
1500 // Preincrement use iterator so we don't invalidate it.
1503 // Don't bother for PHI nodes.
1504 if (isa<PHINode>(User))
1507 if (!isExtractBitsCandidateUse(User))
1510 BasicBlock *UserBB = User->getParent();
1512 if (UserBB == DefBB) {
1513 // If the shift and truncate instruction are in the same BB. The use of
1514 // the truncate(TruncUse) may still introduce another truncate if not
1515 // legal. In this case, we would like to sink both shift and truncate
1516 // instruction to the BB of TruncUse.
1519 // i64 shift.result = lshr i64 opnd, imm
1520 // trunc.result = trunc shift.result to i16
1523 // ----> We will have an implicit truncate here if the architecture does
1524 // not have i16 compare.
1525 // cmp i16 trunc.result, opnd2
1527 if (isa<TruncInst>(User) && shiftIsLegal
1528 // If the type of the truncate is legal, no trucate will be
1529 // introduced in other basic blocks.
1531 (!TLI.isTypeLegal(TLI.getValueType(DL, User->getType()))))
1533 SinkShiftAndTruncate(ShiftI, User, CI, InsertedShifts, TLI, DL);
1537 // If we have already inserted a shift into this block, use it.
1538 BinaryOperator *&InsertedShift = InsertedShifts[UserBB];
1540 if (!InsertedShift) {
1541 BasicBlock::iterator InsertPt = UserBB->getFirstInsertionPt();
1542 assert(InsertPt != UserBB->end());
1544 if (ShiftI->getOpcode() == Instruction::AShr)
1545 InsertedShift = BinaryOperator::CreateAShr(ShiftI->getOperand(0), CI,
1548 InsertedShift = BinaryOperator::CreateLShr(ShiftI->getOperand(0), CI,
1554 // Replace a use of the shift with a use of the new shift.
1555 TheUse = InsertedShift;
1558 // If we removed all uses, nuke the shift.
1559 if (ShiftI->use_empty())
1560 ShiftI->eraseFromParent();
1565 /// If counting leading or trailing zeros is an expensive operation and a zero
1566 /// input is defined, add a check for zero to avoid calling the intrinsic.
1568 /// We want to transform:
1569 /// %z = call i64 @llvm.cttz.i64(i64 %A, i1 false)
1573 /// %cmpz = icmp eq i64 %A, 0
1574 /// br i1 %cmpz, label %cond.end, label %cond.false
1576 /// %z = call i64 @llvm.cttz.i64(i64 %A, i1 true)
1577 /// br label %cond.end
1579 /// %ctz = phi i64 [ 64, %entry ], [ %z, %cond.false ]
1581 /// If the transform is performed, return true and set ModifiedDT to true.
1582 static bool despeculateCountZeros(IntrinsicInst *CountZeros,
1583 const TargetLowering *TLI,
1584 const DataLayout *DL,
1589 // If a zero input is undefined, it doesn't make sense to despeculate that.
1590 if (match(CountZeros->getOperand(1), m_One()))
1593 // If it's cheap to speculate, there's nothing to do.
1594 auto IntrinsicID = CountZeros->getIntrinsicID();
1595 if ((IntrinsicID == Intrinsic::cttz && TLI->isCheapToSpeculateCttz()) ||
1596 (IntrinsicID == Intrinsic::ctlz && TLI->isCheapToSpeculateCtlz()))
1599 // Only handle legal scalar cases. Anything else requires too much work.
1600 Type *Ty = CountZeros->getType();
1601 unsigned SizeInBits = Ty->getPrimitiveSizeInBits();
1602 if (Ty->isVectorTy() || SizeInBits > DL->getLargestLegalIntTypeSizeInBits())
1605 // The intrinsic will be sunk behind a compare against zero and branch.
1606 BasicBlock *StartBlock = CountZeros->getParent();
1607 BasicBlock *CallBlock = StartBlock->splitBasicBlock(CountZeros, "cond.false");
1609 // Create another block after the count zero intrinsic. A PHI will be added
1610 // in this block to select the result of the intrinsic or the bit-width
1611 // constant if the input to the intrinsic is zero.
1612 BasicBlock::iterator SplitPt = ++(BasicBlock::iterator(CountZeros));
1613 BasicBlock *EndBlock = CallBlock->splitBasicBlock(SplitPt, "cond.end");
1615 // Set up a builder to create a compare, conditional branch, and PHI.
1616 IRBuilder<> Builder(CountZeros->getContext());
1617 Builder.SetInsertPoint(StartBlock->getTerminator());
1618 Builder.SetCurrentDebugLocation(CountZeros->getDebugLoc());
1620 // Replace the unconditional branch that was created by the first split with
1621 // a compare against zero and a conditional branch.
1622 Value *Zero = Constant::getNullValue(Ty);
1623 Value *Cmp = Builder.CreateICmpEQ(CountZeros->getOperand(0), Zero, "cmpz");
1624 Builder.CreateCondBr(Cmp, EndBlock, CallBlock);
1625 StartBlock->getTerminator()->eraseFromParent();
1627 // Create a PHI in the end block to select either the output of the intrinsic
1628 // or the bit width of the operand.
1629 Builder.SetInsertPoint(&EndBlock->front());
1630 PHINode *PN = Builder.CreatePHI(Ty, 2, "ctz");
1631 CountZeros->replaceAllUsesWith(PN);
1632 Value *BitWidth = Builder.getInt(APInt(SizeInBits, SizeInBits));
1633 PN->addIncoming(BitWidth, StartBlock);
1634 PN->addIncoming(CountZeros, CallBlock);
1636 // We are explicitly handling the zero case, so we can set the intrinsic's
1637 // undefined zero argument to 'true'. This will also prevent reprocessing the
1638 // intrinsic; we only despeculate when a zero input is defined.
1639 CountZeros->setArgOperand(1, Builder.getTrue());
1644 // This class provides helper functions to expand a memcmp library call into an
1645 // inline expansion.
1646 class MemCmpExpansion {
1647 struct ResultBlock {
1655 ResultBlock ResBlock;
1656 unsigned MaxLoadSize;
1658 unsigned NumBlocksNonOneByte;
1659 unsigned NumLoadsPerBlock;
1660 std::vector<BasicBlock *> LoadCmpBlocks;
1661 BasicBlock *EndBlock;
1663 bool IsUsedForZeroCmp;
1664 const DataLayout &DL;
1666 unsigned calculateNumBlocks(unsigned Size);
1667 void createLoadCmpBlocks();
1668 void createResultBlock();
1669 void setupResultBlockPHINodes();
1670 void setupEndBlockPHINodes();
1671 void emitLoadCompareBlock(unsigned Index, unsigned LoadSize,
1673 Value *getCompareLoadPairs(unsigned Index, unsigned Size,
1674 unsigned &NumBytesProcessed, IRBuilder<> &Builder);
1675 void emitLoadCompareBlockMultipleLoads(unsigned Index, unsigned Size,
1676 unsigned &NumBytesProcessed);
1677 void emitLoadCompareByteBlock(unsigned Index, unsigned GEPIndex);
1678 void emitMemCmpResultBlock();
1679 Value *getMemCmpExpansionZeroCase(unsigned Size);
1680 Value *getMemCmpEqZeroOneBlock(unsigned Size);
1681 unsigned getLoadSize(unsigned Size);
1682 unsigned getNumLoads(unsigned Size);
1685 MemCmpExpansion(CallInst *CI, uint64_t Size, unsigned MaxLoadSize,
1686 unsigned NumLoadsPerBlock, const DataLayout &DL);
1687 Value *getMemCmpExpansion(uint64_t Size);
1690 MemCmpExpansion::ResultBlock::ResultBlock()
1691 : BB(nullptr), PhiSrc1(nullptr), PhiSrc2(nullptr) {}
1693 // Initialize the basic block structure required for expansion of memcmp call
1694 // with given maximum load size and memcmp size parameter.
1695 // This structure includes:
1696 // 1. A list of load compare blocks - LoadCmpBlocks.
1697 // 2. An EndBlock, split from original instruction point, which is the block to
1699 // 3. ResultBlock, block to branch to for early exit when a
1700 // LoadCmpBlock finds a difference.
1701 MemCmpExpansion::MemCmpExpansion(CallInst *CI, uint64_t Size,
1702 unsigned MaxLoadSize, unsigned LoadsPerBlock,
1703 const DataLayout &TheDataLayout)
1704 : CI(CI), MaxLoadSize(MaxLoadSize), NumLoadsPerBlock(LoadsPerBlock),
1707 // A memcmp with zero-comparison with only one block of load and compare does
1708 // not need to set up any extra blocks. This case could be handled in the DAG,
1709 // but since we have all of the machinery to flexibly expand any memcpy here,
1710 // we choose to handle this case too to avoid fragmented lowering.
1711 IsUsedForZeroCmp = isOnlyUsedInZeroEqualityComparison(CI);
1712 NumBlocks = calculateNumBlocks(Size);
1713 if (!IsUsedForZeroCmp || NumBlocks != 1) {
1714 BasicBlock *StartBlock = CI->getParent();
1715 EndBlock = StartBlock->splitBasicBlock(CI, "endblock");
1716 setupEndBlockPHINodes();
1717 createResultBlock();
1719 // If return value of memcmp is not used in a zero equality, we need to
1720 // calculate which source was larger. The calculation requires the
1721 // two loaded source values of each load compare block.
1722 // These will be saved in the phi nodes created by setupResultBlockPHINodes.
1723 if (!IsUsedForZeroCmp)
1724 setupResultBlockPHINodes();
1726 // Create the number of required load compare basic blocks.
1727 createLoadCmpBlocks();
1729 // Update the terminator added by splitBasicBlock to branch to the first
1731 StartBlock->getTerminator()->setSuccessor(0, LoadCmpBlocks[0]);
1734 IRBuilder<> Builder(CI->getContext());
1735 Builder.SetCurrentDebugLocation(CI->getDebugLoc());
1738 void MemCmpExpansion::createLoadCmpBlocks() {
1739 for (unsigned i = 0; i < NumBlocks; i++) {
1740 BasicBlock *BB = BasicBlock::Create(CI->getContext(), "loadbb",
1741 EndBlock->getParent(), EndBlock);
1742 LoadCmpBlocks.push_back(BB);
1746 void MemCmpExpansion::createResultBlock() {
1747 ResBlock.BB = BasicBlock::Create(CI->getContext(), "res_block",
1748 EndBlock->getParent(), EndBlock);
1751 // This function creates the IR instructions for loading and comparing 1 byte.
1752 // It loads 1 byte from each source of the memcmp parameters with the given
1753 // GEPIndex. It then subtracts the two loaded values and adds this result to the
1754 // final phi node for selecting the memcmp result.
1755 void MemCmpExpansion::emitLoadCompareByteBlock(unsigned Index,
1756 unsigned GEPIndex) {
1757 IRBuilder<> Builder(CI->getContext());
1759 Value *Source1 = CI->getArgOperand(0);
1760 Value *Source2 = CI->getArgOperand(1);
1762 Builder.SetInsertPoint(LoadCmpBlocks[Index]);
1763 Type *LoadSizeType = Type::getInt8Ty(CI->getContext());
1764 // Cast source to LoadSizeType*.
1765 if (Source1->getType() != LoadSizeType)
1766 Source1 = Builder.CreateBitCast(Source1, LoadSizeType->getPointerTo());
1767 if (Source2->getType() != LoadSizeType)
1768 Source2 = Builder.CreateBitCast(Source2, LoadSizeType->getPointerTo());
1770 // Get the base address using the GEPIndex.
1771 if (GEPIndex != 0) {
1772 Source1 = Builder.CreateGEP(LoadSizeType, Source1,
1773 ConstantInt::get(LoadSizeType, GEPIndex));
1774 Source2 = Builder.CreateGEP(LoadSizeType, Source2,
1775 ConstantInt::get(LoadSizeType, GEPIndex));
1778 Value *LoadSrc1 = Builder.CreateLoad(LoadSizeType, Source1);
1779 Value *LoadSrc2 = Builder.CreateLoad(LoadSizeType, Source2);
1781 LoadSrc1 = Builder.CreateZExt(LoadSrc1, Type::getInt32Ty(CI->getContext()));
1782 LoadSrc2 = Builder.CreateZExt(LoadSrc2, Type::getInt32Ty(CI->getContext()));
1783 Value *Diff = Builder.CreateSub(LoadSrc1, LoadSrc2);
1785 PhiRes->addIncoming(Diff, LoadCmpBlocks[Index]);
1787 if (Index < (LoadCmpBlocks.size() - 1)) {
1788 // Early exit branch if difference found to EndBlock. Otherwise, continue to
1789 // next LoadCmpBlock,
1790 Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_NE, Diff,
1791 ConstantInt::get(Diff->getType(), 0));
1793 BranchInst::Create(EndBlock, LoadCmpBlocks[Index + 1], Cmp);
1794 Builder.Insert(CmpBr);
1796 // The last block has an unconditional branch to EndBlock.
1797 BranchInst *CmpBr = BranchInst::Create(EndBlock);
1798 Builder.Insert(CmpBr);
1802 unsigned MemCmpExpansion::getNumLoads(unsigned Size) {
1803 return (Size / MaxLoadSize) + countPopulation(Size % MaxLoadSize);
1806 unsigned MemCmpExpansion::getLoadSize(unsigned Size) {
1807 return MinAlign(PowerOf2Floor(Size), MaxLoadSize);
1810 /// Generate an equality comparison for one or more pairs of loaded values.
1811 /// This is used in the case where the memcmp() call is compared equal or not
1813 Value *MemCmpExpansion::getCompareLoadPairs(unsigned Index, unsigned Size,
1814 unsigned &NumBytesProcessed,
1815 IRBuilder<> &Builder) {
1816 std::vector<Value *> XorList, OrList;
1819 unsigned RemainingBytes = Size - NumBytesProcessed;
1820 unsigned NumLoadsRemaining = getNumLoads(RemainingBytes);
1821 unsigned NumLoads = std::min(NumLoadsRemaining, NumLoadsPerBlock);
1823 // For a single-block expansion, start inserting before the memcmp call.
1824 if (LoadCmpBlocks.empty())
1825 Builder.SetInsertPoint(CI);
1827 Builder.SetInsertPoint(LoadCmpBlocks[Index]);
1829 Value *Cmp = nullptr;
1830 for (unsigned i = 0; i < NumLoads; ++i) {
1831 unsigned LoadSize = getLoadSize(RemainingBytes);
1832 unsigned GEPIndex = NumBytesProcessed / LoadSize;
1833 NumBytesProcessed += LoadSize;
1834 RemainingBytes -= LoadSize;
1836 Type *LoadSizeType = IntegerType::get(CI->getContext(), LoadSize * 8);
1837 Type *MaxLoadType = IntegerType::get(CI->getContext(), MaxLoadSize * 8);
1838 assert(LoadSize <= MaxLoadSize && "Unexpected load type");
1840 Value *Source1 = CI->getArgOperand(0);
1841 Value *Source2 = CI->getArgOperand(1);
1843 // Cast source to LoadSizeType*.
1844 if (Source1->getType() != LoadSizeType)
1845 Source1 = Builder.CreateBitCast(Source1, LoadSizeType->getPointerTo());
1846 if (Source2->getType() != LoadSizeType)
1847 Source2 = Builder.CreateBitCast(Source2, LoadSizeType->getPointerTo());
1849 // Get the base address using the GEPIndex.
1850 if (GEPIndex != 0) {
1851 Source1 = Builder.CreateGEP(LoadSizeType, Source1,
1852 ConstantInt::get(LoadSizeType, GEPIndex));
1853 Source2 = Builder.CreateGEP(LoadSizeType, Source2,
1854 ConstantInt::get(LoadSizeType, GEPIndex));
1857 // Get a constant or load a value for each source address.
1858 Value *LoadSrc1 = nullptr;
1859 if (auto *Source1C = dyn_cast<Constant>(Source1))
1860 LoadSrc1 = ConstantFoldLoadFromConstPtr(Source1C, LoadSizeType, DL);
1862 LoadSrc1 = Builder.CreateLoad(LoadSizeType, Source1);
1864 Value *LoadSrc2 = nullptr;
1865 if (auto *Source2C = dyn_cast<Constant>(Source2))
1866 LoadSrc2 = ConstantFoldLoadFromConstPtr(Source2C, LoadSizeType, DL);
1868 LoadSrc2 = Builder.CreateLoad(LoadSizeType, Source2);
1870 if (NumLoads != 1) {
1871 if (LoadSizeType != MaxLoadType) {
1872 LoadSrc1 = Builder.CreateZExt(LoadSrc1, MaxLoadType);
1873 LoadSrc2 = Builder.CreateZExt(LoadSrc2, MaxLoadType);
1875 // If we have multiple loads per block, we need to generate a composite
1876 // comparison using xor+or.
1877 Diff = Builder.CreateXor(LoadSrc1, LoadSrc2);
1878 Diff = Builder.CreateZExt(Diff, MaxLoadType);
1879 XorList.push_back(Diff);
1881 // If there's only one load per block, we just compare the loaded values.
1882 Cmp = Builder.CreateICmpNE(LoadSrc1, LoadSrc2);
1886 auto pairWiseOr = [&](std::vector<Value *> &InList) -> std::vector<Value *> {
1887 std::vector<Value *> OutList;
1888 for (unsigned i = 0; i < InList.size() - 1; i = i + 2) {
1889 Value *Or = Builder.CreateOr(InList[i], InList[i + 1]);
1890 OutList.push_back(Or);
1892 if (InList.size() % 2 != 0)
1893 OutList.push_back(InList.back());
1898 // Pairwise OR the XOR results.
1899 OrList = pairWiseOr(XorList);
1901 // Pairwise OR the OR results until one result left.
1902 while (OrList.size() != 1) {
1903 OrList = pairWiseOr(OrList);
1905 Cmp = Builder.CreateICmpNE(OrList[0], ConstantInt::get(Diff->getType(), 0));
1911 void MemCmpExpansion::emitLoadCompareBlockMultipleLoads(
1912 unsigned Index, unsigned Size, unsigned &NumBytesProcessed) {
1913 IRBuilder<> Builder(CI->getContext());
1914 Value *Cmp = getCompareLoadPairs(Index, Size, NumBytesProcessed, Builder);
1916 BasicBlock *NextBB = (Index == (LoadCmpBlocks.size() - 1))
1918 : LoadCmpBlocks[Index + 1];
1919 // Early exit branch if difference found to ResultBlock. Otherwise,
1920 // continue to next LoadCmpBlock or EndBlock.
1921 BranchInst *CmpBr = BranchInst::Create(ResBlock.BB, NextBB, Cmp);
1922 Builder.Insert(CmpBr);
1924 // Add a phi edge for the last LoadCmpBlock to Endblock with a value of 0
1925 // since early exit to ResultBlock was not taken (no difference was found in
1926 // any of the bytes).
1927 if (Index == LoadCmpBlocks.size() - 1) {
1928 Value *Zero = ConstantInt::get(Type::getInt32Ty(CI->getContext()), 0);
1929 PhiRes->addIncoming(Zero, LoadCmpBlocks[Index]);
1933 // This function creates the IR intructions for loading and comparing using the
1934 // given LoadSize. It loads the number of bytes specified by LoadSize from each
1935 // source of the memcmp parameters. It then does a subtract to see if there was
1936 // a difference in the loaded values. If a difference is found, it branches
1937 // with an early exit to the ResultBlock for calculating which source was
1938 // larger. Otherwise, it falls through to the either the next LoadCmpBlock or
1939 // the EndBlock if this is the last LoadCmpBlock. Loading 1 byte is handled with
1940 // a special case through emitLoadCompareByteBlock. The special handling can
1941 // simply subtract the loaded values and add it to the result phi node.
1942 void MemCmpExpansion::emitLoadCompareBlock(unsigned Index, unsigned LoadSize,
1943 unsigned GEPIndex) {
1944 if (LoadSize == 1) {
1945 MemCmpExpansion::emitLoadCompareByteBlock(Index, GEPIndex);
1949 IRBuilder<> Builder(CI->getContext());
1951 Type *LoadSizeType = IntegerType::get(CI->getContext(), LoadSize * 8);
1952 Type *MaxLoadType = IntegerType::get(CI->getContext(), MaxLoadSize * 8);
1953 assert(LoadSize <= MaxLoadSize && "Unexpected load type");
1955 Value *Source1 = CI->getArgOperand(0);
1956 Value *Source2 = CI->getArgOperand(1);
1958 Builder.SetInsertPoint(LoadCmpBlocks[Index]);
1959 // Cast source to LoadSizeType*.
1960 if (Source1->getType() != LoadSizeType)
1961 Source1 = Builder.CreateBitCast(Source1, LoadSizeType->getPointerTo());
1962 if (Source2->getType() != LoadSizeType)
1963 Source2 = Builder.CreateBitCast(Source2, LoadSizeType->getPointerTo());
1965 // Get the base address using the GEPIndex.
1966 if (GEPIndex != 0) {
1967 Source1 = Builder.CreateGEP(LoadSizeType, Source1,
1968 ConstantInt::get(LoadSizeType, GEPIndex));
1969 Source2 = Builder.CreateGEP(LoadSizeType, Source2,
1970 ConstantInt::get(LoadSizeType, GEPIndex));
1973 // Load LoadSizeType from the base address.
1974 Value *LoadSrc1 = Builder.CreateLoad(LoadSizeType, Source1);
1975 Value *LoadSrc2 = Builder.CreateLoad(LoadSizeType, Source2);
1977 if (DL.isLittleEndian()) {
1978 Function *F = LoadCmpBlocks[Index]->getParent();
1980 Function *Bswap = Intrinsic::getDeclaration(F->getParent(),
1981 Intrinsic::bswap, LoadSizeType);
1982 LoadSrc1 = Builder.CreateCall(Bswap, LoadSrc1);
1983 LoadSrc2 = Builder.CreateCall(Bswap, LoadSrc2);
1986 if (LoadSizeType != MaxLoadType) {
1987 LoadSrc1 = Builder.CreateZExt(LoadSrc1, MaxLoadType);
1988 LoadSrc2 = Builder.CreateZExt(LoadSrc2, MaxLoadType);
1991 // Add the loaded values to the phi nodes for calculating memcmp result only
1992 // if result is not used in a zero equality.
1993 if (!IsUsedForZeroCmp) {
1994 ResBlock.PhiSrc1->addIncoming(LoadSrc1, LoadCmpBlocks[Index]);
1995 ResBlock.PhiSrc2->addIncoming(LoadSrc2, LoadCmpBlocks[Index]);
1998 Value *Diff = Builder.CreateSub(LoadSrc1, LoadSrc2);
2000 Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_NE, Diff,
2001 ConstantInt::get(Diff->getType(), 0));
2002 BasicBlock *NextBB = (Index == (LoadCmpBlocks.size() - 1))
2004 : LoadCmpBlocks[Index + 1];
2005 // Early exit branch if difference found to ResultBlock. Otherwise, continue
2006 // to next LoadCmpBlock or EndBlock.
2007 BranchInst *CmpBr = BranchInst::Create(ResBlock.BB, NextBB, Cmp);
2008 Builder.Insert(CmpBr);
2010 // Add a phi edge for the last LoadCmpBlock to Endblock with a value of 0
2011 // since early exit to ResultBlock was not taken (no difference was found in
2012 // any of the bytes).
2013 if (Index == LoadCmpBlocks.size() - 1) {
2014 Value *Zero = ConstantInt::get(Type::getInt32Ty(CI->getContext()), 0);
2015 PhiRes->addIncoming(Zero, LoadCmpBlocks[Index]);
2019 // This function populates the ResultBlock with a sequence to calculate the
2020 // memcmp result. It compares the two loaded source values and returns -1 if
2021 // src1 < src2 and 1 if src1 > src2.
2022 void MemCmpExpansion::emitMemCmpResultBlock() {
2023 IRBuilder<> Builder(CI->getContext());
2025 // Special case: if memcmp result is used in a zero equality, result does not
2026 // need to be calculated and can simply return 1.
2027 if (IsUsedForZeroCmp) {
2028 BasicBlock::iterator InsertPt = ResBlock.BB->getFirstInsertionPt();
2029 Builder.SetInsertPoint(ResBlock.BB, InsertPt);
2030 Value *Res = ConstantInt::get(Type::getInt32Ty(CI->getContext()), 1);
2031 PhiRes->addIncoming(Res, ResBlock.BB);
2032 BranchInst *NewBr = BranchInst::Create(EndBlock);
2033 Builder.Insert(NewBr);
2036 BasicBlock::iterator InsertPt = ResBlock.BB->getFirstInsertionPt();
2037 Builder.SetInsertPoint(ResBlock.BB, InsertPt);
2039 Value *Cmp = Builder.CreateICmp(ICmpInst::ICMP_ULT, ResBlock.PhiSrc1,
2043 Builder.CreateSelect(Cmp, ConstantInt::get(Builder.getInt32Ty(), -1),
2044 ConstantInt::get(Builder.getInt32Ty(), 1));
2046 BranchInst *NewBr = BranchInst::Create(EndBlock);
2047 Builder.Insert(NewBr);
2048 PhiRes->addIncoming(Res, ResBlock.BB);
2051 unsigned MemCmpExpansion::calculateNumBlocks(unsigned Size) {
2052 unsigned NumBlocks = 0;
2053 bool HaveOneByteLoad = false;
2054 unsigned RemainingSize = Size;
2055 unsigned LoadSize = MaxLoadSize;
2056 while (RemainingSize) {
2058 HaveOneByteLoad = true;
2059 NumBlocks += RemainingSize / LoadSize;
2060 RemainingSize = RemainingSize % LoadSize;
2061 LoadSize = LoadSize / 2;
2063 NumBlocksNonOneByte = HaveOneByteLoad ? (NumBlocks - 1) : NumBlocks;
2065 if (IsUsedForZeroCmp)
2066 NumBlocks = NumBlocks / NumLoadsPerBlock +
2067 (NumBlocks % NumLoadsPerBlock != 0 ? 1 : 0);
2072 void MemCmpExpansion::setupResultBlockPHINodes() {
2073 IRBuilder<> Builder(CI->getContext());
2074 Type *MaxLoadType = IntegerType::get(CI->getContext(), MaxLoadSize * 8);
2075 Builder.SetInsertPoint(ResBlock.BB);
2077 Builder.CreatePHI(MaxLoadType, NumBlocksNonOneByte, "phi.src1");
2079 Builder.CreatePHI(MaxLoadType, NumBlocksNonOneByte, "phi.src2");
2082 void MemCmpExpansion::setupEndBlockPHINodes() {
2083 IRBuilder<> Builder(CI->getContext());
2085 Builder.SetInsertPoint(&EndBlock->front());
2086 PhiRes = Builder.CreatePHI(Type::getInt32Ty(CI->getContext()), 2, "phi.res");
2089 Value *MemCmpExpansion::getMemCmpExpansionZeroCase(unsigned Size) {
2090 unsigned NumBytesProcessed = 0;
2091 // This loop populates each of the LoadCmpBlocks with the IR sequence to
2092 // handle multiple loads per block.
2093 for (unsigned i = 0; i < NumBlocks; ++i)
2094 emitLoadCompareBlockMultipleLoads(i, Size, NumBytesProcessed);
2096 emitMemCmpResultBlock();
2100 /// A memcmp expansion that compares equality with 0 and only has one block of
2101 /// load and compare can bypass the compare, branch, and phi IR that is required
2102 /// in the general case.
2103 Value *MemCmpExpansion::getMemCmpEqZeroOneBlock(unsigned Size) {
2104 unsigned NumBytesProcessed = 0;
2105 IRBuilder<> Builder(CI->getContext());
2106 Value *Cmp = getCompareLoadPairs(0, Size, NumBytesProcessed, Builder);
2107 return Builder.CreateZExt(Cmp, Type::getInt32Ty(CI->getContext()));
2110 // This function expands the memcmp call into an inline expansion and returns
2111 // the memcmp result.
2112 Value *MemCmpExpansion::getMemCmpExpansion(uint64_t Size) {
2113 if (IsUsedForZeroCmp)
2114 return NumBlocks == 1 ? getMemCmpEqZeroOneBlock(Size) :
2115 getMemCmpExpansionZeroCase(Size);
2117 // This loop calls emitLoadCompareBlock for comparing Size bytes of the two
2118 // memcmp sources. It starts with loading using the maximum load size set by
2119 // the target. It processes any remaining bytes using a load size which is the
2120 // next smallest power of 2.
2121 unsigned LoadSize = MaxLoadSize;
2122 unsigned NumBytesToBeProcessed = Size;
2124 while (NumBytesToBeProcessed) {
2125 // Calculate how many blocks we can create with the current load size.
2126 unsigned NumBlocks = NumBytesToBeProcessed / LoadSize;
2127 unsigned GEPIndex = (Size - NumBytesToBeProcessed) / LoadSize;
2128 NumBytesToBeProcessed = NumBytesToBeProcessed % LoadSize;
2130 // For each NumBlocks, populate the instruction sequence for loading and
2131 // comparing LoadSize bytes.
2132 while (NumBlocks--) {
2133 emitLoadCompareBlock(Index, LoadSize, GEPIndex);
2137 // Get the next LoadSize to use.
2138 LoadSize = LoadSize / 2;
2141 emitMemCmpResultBlock();
2145 // This function checks to see if an expansion of memcmp can be generated.
2146 // It checks for constant compare size that is less than the max inline size.
2147 // If an expansion cannot occur, returns false to leave as a library call.
2148 // Otherwise, the library call is replaced with a new IR instruction sequence.
2149 /// We want to transform:
2150 /// %call = call signext i32 @memcmp(i8* %0, i8* %1, i64 15)
2153 /// %0 = bitcast i32* %buffer2 to i8*
2154 /// %1 = bitcast i32* %buffer1 to i8*
2155 /// %2 = bitcast i8* %1 to i64*
2156 /// %3 = bitcast i8* %0 to i64*
2157 /// %4 = load i64, i64* %2
2158 /// %5 = load i64, i64* %3
2159 /// %6 = call i64 @llvm.bswap.i64(i64 %4)
2160 /// %7 = call i64 @llvm.bswap.i64(i64 %5)
2161 /// %8 = sub i64 %6, %7
2162 /// %9 = icmp ne i64 %8, 0
2163 /// br i1 %9, label %res_block, label %loadbb1
2164 /// res_block: ; preds = %loadbb2,
2165 /// %loadbb1, %loadbb
2166 /// %phi.src1 = phi i64 [ %6, %loadbb ], [ %22, %loadbb1 ], [ %36, %loadbb2 ]
2167 /// %phi.src2 = phi i64 [ %7, %loadbb ], [ %23, %loadbb1 ], [ %37, %loadbb2 ]
2168 /// %10 = icmp ult i64 %phi.src1, %phi.src2
2169 /// %11 = select i1 %10, i32 -1, i32 1
2170 /// br label %endblock
2171 /// loadbb1: ; preds = %loadbb
2172 /// %12 = bitcast i32* %buffer2 to i8*
2173 /// %13 = bitcast i32* %buffer1 to i8*
2174 /// %14 = bitcast i8* %13 to i32*
2175 /// %15 = bitcast i8* %12 to i32*
2176 /// %16 = getelementptr i32, i32* %14, i32 2
2177 /// %17 = getelementptr i32, i32* %15, i32 2
2178 /// %18 = load i32, i32* %16
2179 /// %19 = load i32, i32* %17
2180 /// %20 = call i32 @llvm.bswap.i32(i32 %18)
2181 /// %21 = call i32 @llvm.bswap.i32(i32 %19)
2182 /// %22 = zext i32 %20 to i64
2183 /// %23 = zext i32 %21 to i64
2184 /// %24 = sub i64 %22, %23
2185 /// %25 = icmp ne i64 %24, 0
2186 /// br i1 %25, label %res_block, label %loadbb2
2187 /// loadbb2: ; preds = %loadbb1
2188 /// %26 = bitcast i32* %buffer2 to i8*
2189 /// %27 = bitcast i32* %buffer1 to i8*
2190 /// %28 = bitcast i8* %27 to i16*
2191 /// %29 = bitcast i8* %26 to i16*
2192 /// %30 = getelementptr i16, i16* %28, i16 6
2193 /// %31 = getelementptr i16, i16* %29, i16 6
2194 /// %32 = load i16, i16* %30
2195 /// %33 = load i16, i16* %31
2196 /// %34 = call i16 @llvm.bswap.i16(i16 %32)
2197 /// %35 = call i16 @llvm.bswap.i16(i16 %33)
2198 /// %36 = zext i16 %34 to i64
2199 /// %37 = zext i16 %35 to i64
2200 /// %38 = sub i64 %36, %37
2201 /// %39 = icmp ne i64 %38, 0
2202 /// br i1 %39, label %res_block, label %loadbb3
2203 /// loadbb3: ; preds = %loadbb2
2204 /// %40 = bitcast i32* %buffer2 to i8*
2205 /// %41 = bitcast i32* %buffer1 to i8*
2206 /// %42 = getelementptr i8, i8* %41, i8 14
2207 /// %43 = getelementptr i8, i8* %40, i8 14
2208 /// %44 = load i8, i8* %42
2209 /// %45 = load i8, i8* %43
2210 /// %46 = zext i8 %44 to i32
2211 /// %47 = zext i8 %45 to i32
2212 /// %48 = sub i32 %46, %47
2213 /// br label %endblock
2214 /// endblock: ; preds = %res_block,
2216 /// %phi.res = phi i32 [ %48, %loadbb3 ], [ %11, %res_block ]
2217 /// ret i32 %phi.res
2218 static bool expandMemCmp(CallInst *CI, const TargetTransformInfo *TTI,
2219 const TargetLowering *TLI, const DataLayout *DL) {
2221 IRBuilder<> Builder(CI->getContext());
2223 // TTI call to check if target would like to expand memcmp. Also, get the
2225 unsigned MaxLoadSize;
2226 if (!TTI->expandMemCmp(CI, MaxLoadSize))
2229 // Early exit from expansion if -Oz.
2230 if (CI->getFunction()->optForMinSize())
2233 // Early exit from expansion if size is not a constant.
2234 ConstantInt *SizeCast = dyn_cast<ConstantInt>(CI->getArgOperand(2));
2236 NumMemCmpNotConstant++;
2240 // Early exit from expansion if size greater than max bytes to load.
2241 uint64_t SizeVal = SizeCast->getZExtValue();
2242 unsigned NumLoads = 0;
2243 unsigned RemainingSize = SizeVal;
2244 unsigned LoadSize = MaxLoadSize;
2245 while (RemainingSize) {
2246 NumLoads += RemainingSize / LoadSize;
2247 RemainingSize = RemainingSize % LoadSize;
2248 LoadSize = LoadSize / 2;
2251 if (NumLoads > TLI->getMaxExpandSizeMemcmp(CI->getFunction()->optForSize())) {
2252 NumMemCmpGreaterThanMax++;
2258 // MemCmpHelper object creates and sets up basic blocks required for
2259 // expanding memcmp with size SizeVal.
2260 unsigned NumLoadsPerBlock = MemCmpNumLoadsPerBlock;
2261 MemCmpExpansion MemCmpHelper(CI, SizeVal, MaxLoadSize, NumLoadsPerBlock, *DL);
2263 Value *Res = MemCmpHelper.getMemCmpExpansion(SizeVal);
2265 // Replace call with result of expansion and erase call.
2266 CI->replaceAllUsesWith(Res);
2267 CI->eraseFromParent();
2272 bool CodeGenPrepare::optimizeCallInst(CallInst *CI, bool &ModifiedDT) {
2273 BasicBlock *BB = CI->getParent();
2275 // Lower inline assembly if we can.
2276 // If we found an inline asm expession, and if the target knows how to
2277 // lower it to normal LLVM code, do so now.
2278 if (TLI && isa<InlineAsm>(CI->getCalledValue())) {
2279 if (TLI->ExpandInlineAsm(CI)) {
2280 // Avoid invalidating the iterator.
2281 CurInstIterator = BB->begin();
2282 // Avoid processing instructions out of order, which could cause
2283 // reuse before a value is defined.
2287 // Sink address computing for memory operands into the block.
2288 if (optimizeInlineAsmInst(CI))
2292 // Align the pointer arguments to this call if the target thinks it's a good
2294 unsigned MinSize, PrefAlign;
2295 if (TLI && TLI->shouldAlignPointerArgs(CI, MinSize, PrefAlign)) {
2296 for (auto &Arg : CI->arg_operands()) {
2297 // We want to align both objects whose address is used directly and
2298 // objects whose address is used in casts and GEPs, though it only makes
2299 // sense for GEPs if the offset is a multiple of the desired alignment and
2300 // if size - offset meets the size threshold.
2301 if (!Arg->getType()->isPointerTy())
2303 APInt Offset(DL->getPointerSizeInBits(
2304 cast<PointerType>(Arg->getType())->getAddressSpace()),
2306 Value *Val = Arg->stripAndAccumulateInBoundsConstantOffsets(*DL, Offset);
2307 uint64_t Offset2 = Offset.getLimitedValue();
2308 if ((Offset2 & (PrefAlign-1)) != 0)
2311 if ((AI = dyn_cast<AllocaInst>(Val)) && AI->getAlignment() < PrefAlign &&
2312 DL->getTypeAllocSize(AI->getAllocatedType()) >= MinSize + Offset2)
2313 AI->setAlignment(PrefAlign);
2314 // Global variables can only be aligned if they are defined in this
2315 // object (i.e. they are uniquely initialized in this object), and
2316 // over-aligning global variables that have an explicit section is
2319 if ((GV = dyn_cast<GlobalVariable>(Val)) && GV->canIncreaseAlignment() &&
2320 GV->getPointerAlignment(*DL) < PrefAlign &&
2321 DL->getTypeAllocSize(GV->getValueType()) >=
2323 GV->setAlignment(PrefAlign);
2325 // If this is a memcpy (or similar) then we may be able to improve the
2327 if (MemIntrinsic *MI = dyn_cast<MemIntrinsic>(CI)) {
2328 unsigned Align = getKnownAlignment(MI->getDest(), *DL);
2329 if (MemTransferInst *MTI = dyn_cast<MemTransferInst>(MI))
2330 Align = std::min(Align, getKnownAlignment(MTI->getSource(), *DL));
2331 if (Align > MI->getAlignment())
2332 MI->setAlignment(ConstantInt::get(MI->getAlignmentType(), Align));
2336 // If we have a cold call site, try to sink addressing computation into the
2337 // cold block. This interacts with our handling for loads and stores to
2338 // ensure that we can fold all uses of a potential addressing computation
2339 // into their uses. TODO: generalize this to work over profiling data
2340 if (!OptSize && CI->hasFnAttr(Attribute::Cold))
2341 for (auto &Arg : CI->arg_operands()) {
2342 if (!Arg->getType()->isPointerTy())
2344 unsigned AS = Arg->getType()->getPointerAddressSpace();
2345 return optimizeMemoryInst(CI, Arg, Arg->getType(), AS);
2348 IntrinsicInst *II = dyn_cast<IntrinsicInst>(CI);
2350 switch (II->getIntrinsicID()) {
2352 case Intrinsic::objectsize: {
2353 // Lower all uses of llvm.objectsize.*
2354 ConstantInt *RetVal =
2355 lowerObjectSizeCall(II, *DL, TLInfo, /*MustSucceed=*/true);
2356 // Substituting this can cause recursive simplifications, which can
2357 // invalidate our iterator. Use a WeakTrackingVH to hold onto it in case
2360 Value *CurValue = &*CurInstIterator;
2361 WeakTrackingVH IterHandle(CurValue);
2363 replaceAndRecursivelySimplify(CI, RetVal, TLInfo, nullptr);
2365 // If the iterator instruction was recursively deleted, start over at the
2366 // start of the block.
2367 if (IterHandle != CurValue) {
2368 CurInstIterator = BB->begin();
2373 case Intrinsic::aarch64_stlxr:
2374 case Intrinsic::aarch64_stxr: {
2375 ZExtInst *ExtVal = dyn_cast<ZExtInst>(CI->getArgOperand(0));
2376 if (!ExtVal || !ExtVal->hasOneUse() ||
2377 ExtVal->getParent() == CI->getParent())
2379 // Sink a zext feeding stlxr/stxr before it, so it can be folded into it.
2380 ExtVal->moveBefore(CI);
2381 // Mark this instruction as "inserted by CGP", so that other
2382 // optimizations don't touch it.
2383 InsertedInsts.insert(ExtVal);
2386 case Intrinsic::invariant_group_barrier:
2387 II->replaceAllUsesWith(II->getArgOperand(0));
2388 II->eraseFromParent();
2391 case Intrinsic::cttz:
2392 case Intrinsic::ctlz:
2393 // If counting zeros is expensive, try to avoid it.
2394 return despeculateCountZeros(II, TLI, DL, ModifiedDT);
2398 SmallVector<Value*, 2> PtrOps;
2400 if (TLI->getAddrModeArguments(II, PtrOps, AccessTy))
2401 while (!PtrOps.empty()) {
2402 Value *PtrVal = PtrOps.pop_back_val();
2403 unsigned AS = PtrVal->getType()->getPointerAddressSpace();
2404 if (optimizeMemoryInst(II, PtrVal, AccessTy, AS))
2410 // From here on out we're working with named functions.
2411 if (!CI->getCalledFunction()) return false;
2413 // Lower all default uses of _chk calls. This is very similar
2414 // to what InstCombineCalls does, but here we are only lowering calls
2415 // to fortified library functions (e.g. __memcpy_chk) that have the default
2416 // "don't know" as the objectsize. Anything else should be left alone.
2417 FortifiedLibCallSimplifier Simplifier(TLInfo, true);
2418 if (Value *V = Simplifier.optimizeCall(CI)) {
2419 CI->replaceAllUsesWith(V);
2420 CI->eraseFromParent();
2425 if (TLInfo->getLibFunc(ImmutableCallSite(CI), Func) &&
2426 Func == LibFunc_memcmp && expandMemCmp(CI, TTI, TLI, DL)) {
2433 /// Look for opportunities to duplicate return instructions to the predecessor
2434 /// to enable tail call optimizations. The case it is currently looking for is:
2437 /// %tmp0 = tail call i32 @f0()
2438 /// br label %return
2440 /// %tmp1 = tail call i32 @f1()
2441 /// br label %return
2443 /// %tmp2 = tail call i32 @f2()
2444 /// br label %return
2446 /// %retval = phi i32 [ %tmp0, %bb0 ], [ %tmp1, %bb1 ], [ %tmp2, %bb2 ]
2454 /// %tmp0 = tail call i32 @f0()
2457 /// %tmp1 = tail call i32 @f1()
2460 /// %tmp2 = tail call i32 @f2()
2463 bool CodeGenPrepare::dupRetToEnableTailCallOpts(BasicBlock *BB) {
2467 ReturnInst *RetI = dyn_cast<ReturnInst>(BB->getTerminator());
2471 PHINode *PN = nullptr;
2472 BitCastInst *BCI = nullptr;
2473 Value *V = RetI->getReturnValue();
2475 BCI = dyn_cast<BitCastInst>(V);
2477 V = BCI->getOperand(0);
2479 PN = dyn_cast<PHINode>(V);
2484 if (PN && PN->getParent() != BB)
2487 // Make sure there are no instructions between the PHI and return, or that the
2488 // return is the first instruction in the block.
2490 BasicBlock::iterator BI = BB->begin();
2491 do { ++BI; } while (isa<DbgInfoIntrinsic>(BI));
2493 // Also skip over the bitcast.
2498 BasicBlock::iterator BI = BB->begin();
2499 while (isa<DbgInfoIntrinsic>(BI)) ++BI;
2504 /// Only dup the ReturnInst if the CallInst is likely to be emitted as a tail
2506 const Function *F = BB->getParent();
2507 SmallVector<CallInst*, 4> TailCalls;
2509 for (unsigned I = 0, E = PN->getNumIncomingValues(); I != E; ++I) {
2510 CallInst *CI = dyn_cast<CallInst>(PN->getIncomingValue(I));
2511 // Make sure the phi value is indeed produced by the tail call.
2512 if (CI && CI->hasOneUse() && CI->getParent() == PN->getIncomingBlock(I) &&
2513 TLI->mayBeEmittedAsTailCall(CI) &&
2514 attributesPermitTailCall(F, CI, RetI, *TLI))
2515 TailCalls.push_back(CI);
2518 SmallPtrSet<BasicBlock*, 4> VisitedBBs;
2519 for (pred_iterator PI = pred_begin(BB), PE = pred_end(BB); PI != PE; ++PI) {
2520 if (!VisitedBBs.insert(*PI).second)
2523 BasicBlock::InstListType &InstList = (*PI)->getInstList();
2524 BasicBlock::InstListType::reverse_iterator RI = InstList.rbegin();
2525 BasicBlock::InstListType::reverse_iterator RE = InstList.rend();
2526 do { ++RI; } while (RI != RE && isa<DbgInfoIntrinsic>(&*RI));
2530 CallInst *CI = dyn_cast<CallInst>(&*RI);
2531 if (CI && CI->use_empty() && TLI->mayBeEmittedAsTailCall(CI) &&
2532 attributesPermitTailCall(F, CI, RetI, *TLI))
2533 TailCalls.push_back(CI);
2537 bool Changed = false;
2538 for (unsigned i = 0, e = TailCalls.size(); i != e; ++i) {
2539 CallInst *CI = TailCalls[i];
2542 // Conservatively require the attributes of the call to match those of the
2543 // return. Ignore noalias because it doesn't affect the call sequence.
2544 AttributeList CalleeAttrs = CS.getAttributes();
2545 if (AttrBuilder(CalleeAttrs, AttributeList::ReturnIndex)
2546 .removeAttribute(Attribute::NoAlias) !=
2547 AttrBuilder(CalleeAttrs, AttributeList::ReturnIndex)
2548 .removeAttribute(Attribute::NoAlias))
2551 // Make sure the call instruction is followed by an unconditional branch to
2552 // the return block.
2553 BasicBlock *CallBB = CI->getParent();
2554 BranchInst *BI = dyn_cast<BranchInst>(CallBB->getTerminator());
2555 if (!BI || !BI->isUnconditional() || BI->getSuccessor(0) != BB)
2558 // Duplicate the return into CallBB.
2559 (void)FoldReturnIntoUncondBranch(RetI, BB, CallBB);
2560 ModifiedDT = Changed = true;
2564 // If we eliminated all predecessors of the block, delete the block now.
2565 if (Changed && !BB->hasAddressTaken() && pred_begin(BB) == pred_end(BB))
2566 BB->eraseFromParent();
2571 //===----------------------------------------------------------------------===//
2572 // Memory Optimization
2573 //===----------------------------------------------------------------------===//
2577 /// This is an extended version of TargetLowering::AddrMode
2578 /// which holds actual Value*'s for register values.
2579 struct ExtAddrMode : public TargetLowering::AddrMode {
2582 ExtAddrMode() : BaseReg(nullptr), ScaledReg(nullptr) {}
2583 void print(raw_ostream &OS) const;
2586 bool operator==(const ExtAddrMode& O) const {
2587 return (BaseReg == O.BaseReg) && (ScaledReg == O.ScaledReg) &&
2588 (BaseGV == O.BaseGV) && (BaseOffs == O.BaseOffs) &&
2589 (HasBaseReg == O.HasBaseReg) && (Scale == O.Scale);
2594 static inline raw_ostream &operator<<(raw_ostream &OS, const ExtAddrMode &AM) {
2600 void ExtAddrMode::print(raw_ostream &OS) const {
2601 bool NeedPlus = false;
2604 OS << (NeedPlus ? " + " : "")
2606 BaseGV->printAsOperand(OS, /*PrintType=*/false);
2611 OS << (NeedPlus ? " + " : "")
2617 OS << (NeedPlus ? " + " : "")
2619 BaseReg->printAsOperand(OS, /*PrintType=*/false);
2623 OS << (NeedPlus ? " + " : "")
2625 ScaledReg->printAsOperand(OS, /*PrintType=*/false);
2631 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
2632 LLVM_DUMP_METHOD void ExtAddrMode::dump() const {
2638 /// \brief This class provides transaction based operation on the IR.
2639 /// Every change made through this class is recorded in the internal state and
2640 /// can be undone (rollback) until commit is called.
2641 class TypePromotionTransaction {
2643 /// \brief This represents the common interface of the individual transaction.
2644 /// Each class implements the logic for doing one specific modification on
2645 /// the IR via the TypePromotionTransaction.
2646 class TypePromotionAction {
2648 /// The Instruction modified.
2652 /// \brief Constructor of the action.
2653 /// The constructor performs the related action on the IR.
2654 TypePromotionAction(Instruction *Inst) : Inst(Inst) {}
2656 virtual ~TypePromotionAction() {}
2658 /// \brief Undo the modification done by this action.
2659 /// When this method is called, the IR must be in the same state as it was
2660 /// before this action was applied.
2661 /// \pre Undoing the action works if and only if the IR is in the exact same
2662 /// state as it was directly after this action was applied.
2663 virtual void undo() = 0;
2665 /// \brief Advocate every change made by this action.
2666 /// When the results on the IR of the action are to be kept, it is important
2667 /// to call this function, otherwise hidden information may be kept forever.
2668 virtual void commit() {
2669 // Nothing to be done, this action is not doing anything.
2673 /// \brief Utility to remember the position of an instruction.
2674 class InsertionHandler {
2675 /// Position of an instruction.
2676 /// Either an instruction:
2677 /// - Is the first in a basic block: BB is used.
2678 /// - Has a previous instructon: PrevInst is used.
2680 Instruction *PrevInst;
2683 /// Remember whether or not the instruction had a previous instruction.
2684 bool HasPrevInstruction;
2687 /// \brief Record the position of \p Inst.
2688 InsertionHandler(Instruction *Inst) {
2689 BasicBlock::iterator It = Inst->getIterator();
2690 HasPrevInstruction = (It != (Inst->getParent()->begin()));
2691 if (HasPrevInstruction)
2692 Point.PrevInst = &*--It;
2694 Point.BB = Inst->getParent();
2697 /// \brief Insert \p Inst at the recorded position.
2698 void insert(Instruction *Inst) {
2699 if (HasPrevInstruction) {
2700 if (Inst->getParent())
2701 Inst->removeFromParent();
2702 Inst->insertAfter(Point.PrevInst);
2704 Instruction *Position = &*Point.BB->getFirstInsertionPt();
2705 if (Inst->getParent())
2706 Inst->moveBefore(Position);
2708 Inst->insertBefore(Position);
2713 /// \brief Move an instruction before another.
2714 class InstructionMoveBefore : public TypePromotionAction {
2715 /// Original position of the instruction.
2716 InsertionHandler Position;
2719 /// \brief Move \p Inst before \p Before.
2720 InstructionMoveBefore(Instruction *Inst, Instruction *Before)
2721 : TypePromotionAction(Inst), Position(Inst) {
2722 DEBUG(dbgs() << "Do: move: " << *Inst << "\nbefore: " << *Before << "\n");
2723 Inst->moveBefore(Before);
2726 /// \brief Move the instruction back to its original position.
2727 void undo() override {
2728 DEBUG(dbgs() << "Undo: moveBefore: " << *Inst << "\n");
2729 Position.insert(Inst);
2733 /// \brief Set the operand of an instruction with a new value.
2734 class OperandSetter : public TypePromotionAction {
2735 /// Original operand of the instruction.
2737 /// Index of the modified instruction.
2741 /// \brief Set \p Idx operand of \p Inst with \p NewVal.
2742 OperandSetter(Instruction *Inst, unsigned Idx, Value *NewVal)
2743 : TypePromotionAction(Inst), Idx(Idx) {
2744 DEBUG(dbgs() << "Do: setOperand: " << Idx << "\n"
2745 << "for:" << *Inst << "\n"
2746 << "with:" << *NewVal << "\n");
2747 Origin = Inst->getOperand(Idx);
2748 Inst->setOperand(Idx, NewVal);
2751 /// \brief Restore the original value of the instruction.
2752 void undo() override {
2753 DEBUG(dbgs() << "Undo: setOperand:" << Idx << "\n"
2754 << "for: " << *Inst << "\n"
2755 << "with: " << *Origin << "\n");
2756 Inst->setOperand(Idx, Origin);
2760 /// \brief Hide the operands of an instruction.
2761 /// Do as if this instruction was not using any of its operands.
2762 class OperandsHider : public TypePromotionAction {
2763 /// The list of original operands.
2764 SmallVector<Value *, 4> OriginalValues;
2767 /// \brief Remove \p Inst from the uses of the operands of \p Inst.
2768 OperandsHider(Instruction *Inst) : TypePromotionAction(Inst) {
2769 DEBUG(dbgs() << "Do: OperandsHider: " << *Inst << "\n");
2770 unsigned NumOpnds = Inst->getNumOperands();
2771 OriginalValues.reserve(NumOpnds);
2772 for (unsigned It = 0; It < NumOpnds; ++It) {
2773 // Save the current operand.
2774 Value *Val = Inst->getOperand(It);
2775 OriginalValues.push_back(Val);
2777 // We could use OperandSetter here, but that would imply an overhead
2778 // that we are not willing to pay.
2779 Inst->setOperand(It, UndefValue::get(Val->getType()));
2783 /// \brief Restore the original list of uses.
2784 void undo() override {
2785 DEBUG(dbgs() << "Undo: OperandsHider: " << *Inst << "\n");
2786 for (unsigned It = 0, EndIt = OriginalValues.size(); It != EndIt; ++It)
2787 Inst->setOperand(It, OriginalValues[It]);
2791 /// \brief Build a truncate instruction.
2792 class TruncBuilder : public TypePromotionAction {
2795 /// \brief Build a truncate instruction of \p Opnd producing a \p Ty
2797 /// trunc Opnd to Ty.
2798 TruncBuilder(Instruction *Opnd, Type *Ty) : TypePromotionAction(Opnd) {
2799 IRBuilder<> Builder(Opnd);
2800 Val = Builder.CreateTrunc(Opnd, Ty, "promoted");
2801 DEBUG(dbgs() << "Do: TruncBuilder: " << *Val << "\n");
2804 /// \brief Get the built value.
2805 Value *getBuiltValue() { return Val; }
2807 /// \brief Remove the built instruction.
2808 void undo() override {
2809 DEBUG(dbgs() << "Undo: TruncBuilder: " << *Val << "\n");
2810 if (Instruction *IVal = dyn_cast<Instruction>(Val))
2811 IVal->eraseFromParent();
2815 /// \brief Build a sign extension instruction.
2816 class SExtBuilder : public TypePromotionAction {
2819 /// \brief Build a sign extension instruction of \p Opnd producing a \p Ty
2821 /// sext Opnd to Ty.
2822 SExtBuilder(Instruction *InsertPt, Value *Opnd, Type *Ty)
2823 : TypePromotionAction(InsertPt) {
2824 IRBuilder<> Builder(InsertPt);
2825 Val = Builder.CreateSExt(Opnd, Ty, "promoted");
2826 DEBUG(dbgs() << "Do: SExtBuilder: " << *Val << "\n");
2829 /// \brief Get the built value.
2830 Value *getBuiltValue() { return Val; }
2832 /// \brief Remove the built instruction.
2833 void undo() override {
2834 DEBUG(dbgs() << "Undo: SExtBuilder: " << *Val << "\n");
2835 if (Instruction *IVal = dyn_cast<Instruction>(Val))
2836 IVal->eraseFromParent();
2840 /// \brief Build a zero extension instruction.
2841 class ZExtBuilder : public TypePromotionAction {
2844 /// \brief Build a zero extension instruction of \p Opnd producing a \p Ty
2846 /// zext Opnd to Ty.
2847 ZExtBuilder(Instruction *InsertPt, Value *Opnd, Type *Ty)
2848 : TypePromotionAction(InsertPt) {
2849 IRBuilder<> Builder(InsertPt);
2850 Val = Builder.CreateZExt(Opnd, Ty, "promoted");
2851 DEBUG(dbgs() << "Do: ZExtBuilder: " << *Val << "\n");
2854 /// \brief Get the built value.
2855 Value *getBuiltValue() { return Val; }
2857 /// \brief Remove the built instruction.
2858 void undo() override {
2859 DEBUG(dbgs() << "Undo: ZExtBuilder: " << *Val << "\n");
2860 if (Instruction *IVal = dyn_cast<Instruction>(Val))
2861 IVal->eraseFromParent();
2865 /// \brief Mutate an instruction to another type.
2866 class TypeMutator : public TypePromotionAction {
2867 /// Record the original type.
2871 /// \brief Mutate the type of \p Inst into \p NewTy.
2872 TypeMutator(Instruction *Inst, Type *NewTy)
2873 : TypePromotionAction(Inst), OrigTy(Inst->getType()) {
2874 DEBUG(dbgs() << "Do: MutateType: " << *Inst << " with " << *NewTy
2876 Inst->mutateType(NewTy);
2879 /// \brief Mutate the instruction back to its original type.
2880 void undo() override {
2881 DEBUG(dbgs() << "Undo: MutateType: " << *Inst << " with " << *OrigTy
2883 Inst->mutateType(OrigTy);
2887 /// \brief Replace the uses of an instruction by another instruction.
2888 class UsesReplacer : public TypePromotionAction {
2889 /// Helper structure to keep track of the replaced uses.
2890 struct InstructionAndIdx {
2891 /// The instruction using the instruction.
2893 /// The index where this instruction is used for Inst.
2895 InstructionAndIdx(Instruction *Inst, unsigned Idx)
2896 : Inst(Inst), Idx(Idx) {}
2899 /// Keep track of the original uses (pair Instruction, Index).
2900 SmallVector<InstructionAndIdx, 4> OriginalUses;
2901 typedef SmallVectorImpl<InstructionAndIdx>::iterator use_iterator;
2904 /// \brief Replace all the use of \p Inst by \p New.
2905 UsesReplacer(Instruction *Inst, Value *New) : TypePromotionAction(Inst) {
2906 DEBUG(dbgs() << "Do: UsersReplacer: " << *Inst << " with " << *New
2908 // Record the original uses.
2909 for (Use &U : Inst->uses()) {
2910 Instruction *UserI = cast<Instruction>(U.getUser());
2911 OriginalUses.push_back(InstructionAndIdx(UserI, U.getOperandNo()));
2913 // Now, we can replace the uses.
2914 Inst->replaceAllUsesWith(New);
2917 /// \brief Reassign the original uses of Inst to Inst.
2918 void undo() override {
2919 DEBUG(dbgs() << "Undo: UsersReplacer: " << *Inst << "\n");
2920 for (use_iterator UseIt = OriginalUses.begin(),
2921 EndIt = OriginalUses.end();
2922 UseIt != EndIt; ++UseIt) {
2923 UseIt->Inst->setOperand(UseIt->Idx, Inst);
2928 /// \brief Remove an instruction from the IR.
2929 class InstructionRemover : public TypePromotionAction {
2930 /// Original position of the instruction.
2931 InsertionHandler Inserter;
2932 /// Helper structure to hide all the link to the instruction. In other
2933 /// words, this helps to do as if the instruction was removed.
2934 OperandsHider Hider;
2935 /// Keep track of the uses replaced, if any.
2936 UsesReplacer *Replacer;
2937 /// Keep track of instructions removed.
2938 SetOfInstrs &RemovedInsts;
2941 /// \brief Remove all reference of \p Inst and optinally replace all its
2943 /// \p RemovedInsts Keep track of the instructions removed by this Action.
2944 /// \pre If !Inst->use_empty(), then New != nullptr
2945 InstructionRemover(Instruction *Inst, SetOfInstrs &RemovedInsts,
2946 Value *New = nullptr)
2947 : TypePromotionAction(Inst), Inserter(Inst), Hider(Inst),
2948 Replacer(nullptr), RemovedInsts(RemovedInsts) {
2950 Replacer = new UsesReplacer(Inst, New);
2951 DEBUG(dbgs() << "Do: InstructionRemover: " << *Inst << "\n");
2952 RemovedInsts.insert(Inst);
2953 /// The instructions removed here will be freed after completing
2954 /// optimizeBlock() for all blocks as we need to keep track of the
2955 /// removed instructions during promotion.
2956 Inst->removeFromParent();
2959 ~InstructionRemover() override { delete Replacer; }
2961 /// \brief Resurrect the instruction and reassign it to the proper uses if
2962 /// new value was provided when build this action.
2963 void undo() override {
2964 DEBUG(dbgs() << "Undo: InstructionRemover: " << *Inst << "\n");
2965 Inserter.insert(Inst);
2969 RemovedInsts.erase(Inst);
2974 /// Restoration point.
2975 /// The restoration point is a pointer to an action instead of an iterator
2976 /// because the iterator may be invalidated but not the pointer.
2977 typedef const TypePromotionAction *ConstRestorationPt;
2979 TypePromotionTransaction(SetOfInstrs &RemovedInsts)
2980 : RemovedInsts(RemovedInsts) {}
2982 /// Advocate every changes made in that transaction.
2984 /// Undo all the changes made after the given point.
2985 void rollback(ConstRestorationPt Point);
2986 /// Get the current restoration point.
2987 ConstRestorationPt getRestorationPoint() const;
2989 /// \name API for IR modification with state keeping to support rollback.
2991 /// Same as Instruction::setOperand.
2992 void setOperand(Instruction *Inst, unsigned Idx, Value *NewVal);
2993 /// Same as Instruction::eraseFromParent.
2994 void eraseInstruction(Instruction *Inst, Value *NewVal = nullptr);
2995 /// Same as Value::replaceAllUsesWith.
2996 void replaceAllUsesWith(Instruction *Inst, Value *New);
2997 /// Same as Value::mutateType.
2998 void mutateType(Instruction *Inst, Type *NewTy);
2999 /// Same as IRBuilder::createTrunc.
3000 Value *createTrunc(Instruction *Opnd, Type *Ty);
3001 /// Same as IRBuilder::createSExt.
3002 Value *createSExt(Instruction *Inst, Value *Opnd, Type *Ty);
3003 /// Same as IRBuilder::createZExt.
3004 Value *createZExt(Instruction *Inst, Value *Opnd, Type *Ty);
3005 /// Same as Instruction::moveBefore.
3006 void moveBefore(Instruction *Inst, Instruction *Before);
3010 /// The ordered list of actions made so far.
3011 SmallVector<std::unique_ptr<TypePromotionAction>, 16> Actions;
3012 typedef SmallVectorImpl<std::unique_ptr<TypePromotionAction>>::iterator CommitPt;
3013 SetOfInstrs &RemovedInsts;
3016 void TypePromotionTransaction::setOperand(Instruction *Inst, unsigned Idx,
3019 make_unique<TypePromotionTransaction::OperandSetter>(Inst, Idx, NewVal));
3022 void TypePromotionTransaction::eraseInstruction(Instruction *Inst,
3025 make_unique<TypePromotionTransaction::InstructionRemover>(Inst,
3026 RemovedInsts, NewVal));
3029 void TypePromotionTransaction::replaceAllUsesWith(Instruction *Inst,
3031 Actions.push_back(make_unique<TypePromotionTransaction::UsesReplacer>(Inst, New));
3034 void TypePromotionTransaction::mutateType(Instruction *Inst, Type *NewTy) {
3035 Actions.push_back(make_unique<TypePromotionTransaction::TypeMutator>(Inst, NewTy));
3038 Value *TypePromotionTransaction::createTrunc(Instruction *Opnd,
3040 std::unique_ptr<TruncBuilder> Ptr(new TruncBuilder(Opnd, Ty));
3041 Value *Val = Ptr->getBuiltValue();
3042 Actions.push_back(std::move(Ptr));
3046 Value *TypePromotionTransaction::createSExt(Instruction *Inst,
3047 Value *Opnd, Type *Ty) {
3048 std::unique_ptr<SExtBuilder> Ptr(new SExtBuilder(Inst, Opnd, Ty));
3049 Value *Val = Ptr->getBuiltValue();
3050 Actions.push_back(std::move(Ptr));
3054 Value *TypePromotionTransaction::createZExt(Instruction *Inst,
3055 Value *Opnd, Type *Ty) {
3056 std::unique_ptr<ZExtBuilder> Ptr(new ZExtBuilder(Inst, Opnd, Ty));
3057 Value *Val = Ptr->getBuiltValue();
3058 Actions.push_back(std::move(Ptr));
3062 void TypePromotionTransaction::moveBefore(Instruction *Inst,
3063 Instruction *Before) {
3065 make_unique<TypePromotionTransaction::InstructionMoveBefore>(Inst, Before));
3068 TypePromotionTransaction::ConstRestorationPt
3069 TypePromotionTransaction::getRestorationPoint() const {
3070 return !Actions.empty() ? Actions.back().get() : nullptr;
3073 void TypePromotionTransaction::commit() {
3074 for (CommitPt It = Actions.begin(), EndIt = Actions.end(); It != EndIt;
3080 void TypePromotionTransaction::rollback(
3081 TypePromotionTransaction::ConstRestorationPt Point) {
3082 while (!Actions.empty() && Point != Actions.back().get()) {
3083 std::unique_ptr<TypePromotionAction> Curr = Actions.pop_back_val();
3088 /// \brief A helper class for matching addressing modes.
3090 /// This encapsulates the logic for matching the target-legal addressing modes.
3091 class AddressingModeMatcher {
3092 SmallVectorImpl<Instruction*> &AddrModeInsts;
3093 const TargetLowering &TLI;
3094 const TargetRegisterInfo &TRI;
3095 const DataLayout &DL;
3097 /// AccessTy/MemoryInst - This is the type for the access (e.g. double) and
3098 /// the memory instruction that we're computing this address for.
3101 Instruction *MemoryInst;
3103 /// This is the addressing mode that we're building up. This is
3104 /// part of the return value of this addressing mode matching stuff.
3105 ExtAddrMode &AddrMode;
3107 /// The instructions inserted by other CodeGenPrepare optimizations.
3108 const SetOfInstrs &InsertedInsts;
3109 /// A map from the instructions to their type before promotion.
3110 InstrToOrigTy &PromotedInsts;
3111 /// The ongoing transaction where every action should be registered.
3112 TypePromotionTransaction &TPT;
3114 /// This is set to true when we should not do profitability checks.
3115 /// When true, IsProfitableToFoldIntoAddressingMode always returns true.
3116 bool IgnoreProfitability;
3118 AddressingModeMatcher(SmallVectorImpl<Instruction *> &AMI,
3119 const TargetLowering &TLI,
3120 const TargetRegisterInfo &TRI,
3121 Type *AT, unsigned AS,
3122 Instruction *MI, ExtAddrMode &AM,
3123 const SetOfInstrs &InsertedInsts,
3124 InstrToOrigTy &PromotedInsts,
3125 TypePromotionTransaction &TPT)
3126 : AddrModeInsts(AMI), TLI(TLI), TRI(TRI),
3127 DL(MI->getModule()->getDataLayout()), AccessTy(AT), AddrSpace(AS),
3128 MemoryInst(MI), AddrMode(AM), InsertedInsts(InsertedInsts),
3129 PromotedInsts(PromotedInsts), TPT(TPT) {
3130 IgnoreProfitability = false;
3134 /// Find the maximal addressing mode that a load/store of V can fold,
3135 /// give an access type of AccessTy. This returns a list of involved
3136 /// instructions in AddrModeInsts.
3137 /// \p InsertedInsts The instructions inserted by other CodeGenPrepare
3139 /// \p PromotedInsts maps the instructions to their type before promotion.
3140 /// \p The ongoing transaction where every action should be registered.
3141 static ExtAddrMode Match(Value *V, Type *AccessTy, unsigned AS,
3142 Instruction *MemoryInst,
3143 SmallVectorImpl<Instruction*> &AddrModeInsts,
3144 const TargetLowering &TLI,
3145 const TargetRegisterInfo &TRI,
3146 const SetOfInstrs &InsertedInsts,
3147 InstrToOrigTy &PromotedInsts,
3148 TypePromotionTransaction &TPT) {
3151 bool Success = AddressingModeMatcher(AddrModeInsts, TLI, TRI,
3153 MemoryInst, Result, InsertedInsts,
3154 PromotedInsts, TPT).matchAddr(V, 0);
3155 (void)Success; assert(Success && "Couldn't select *anything*?");
3159 bool matchScaledValue(Value *ScaleReg, int64_t Scale, unsigned Depth);
3160 bool matchAddr(Value *V, unsigned Depth);
3161 bool matchOperationAddr(User *Operation, unsigned Opcode, unsigned Depth,
3162 bool *MovedAway = nullptr);
3163 bool isProfitableToFoldIntoAddressingMode(Instruction *I,
3164 ExtAddrMode &AMBefore,
3165 ExtAddrMode &AMAfter);
3166 bool valueAlreadyLiveAtInst(Value *Val, Value *KnownLive1, Value *KnownLive2);
3167 bool isPromotionProfitable(unsigned NewCost, unsigned OldCost,
3168 Value *PromotedOperand) const;
3171 /// Try adding ScaleReg*Scale to the current addressing mode.
3172 /// Return true and update AddrMode if this addr mode is legal for the target,
3174 bool AddressingModeMatcher::matchScaledValue(Value *ScaleReg, int64_t Scale,
3176 // If Scale is 1, then this is the same as adding ScaleReg to the addressing
3177 // mode. Just process that directly.
3179 return matchAddr(ScaleReg, Depth);
3181 // If the scale is 0, it takes nothing to add this.
3185 // If we already have a scale of this value, we can add to it, otherwise, we
3186 // need an available scale field.
3187 if (AddrMode.Scale != 0 && AddrMode.ScaledReg != ScaleReg)
3190 ExtAddrMode TestAddrMode = AddrMode;
3192 // Add scale to turn X*4+X*3 -> X*7. This could also do things like
3193 // [A+B + A*7] -> [B+A*8].
3194 TestAddrMode.Scale += Scale;
3195 TestAddrMode.ScaledReg = ScaleReg;
3197 // If the new address isn't legal, bail out.
3198 if (!TLI.isLegalAddressingMode(DL, TestAddrMode, AccessTy, AddrSpace))
3201 // It was legal, so commit it.
3202 AddrMode = TestAddrMode;
3204 // Okay, we decided that we can add ScaleReg+Scale to AddrMode. Check now
3205 // to see if ScaleReg is actually X+C. If so, we can turn this into adding
3206 // X*Scale + C*Scale to addr mode.
3207 ConstantInt *CI = nullptr; Value *AddLHS = nullptr;
3208 if (isa<Instruction>(ScaleReg) && // not a constant expr.
3209 match(ScaleReg, m_Add(m_Value(AddLHS), m_ConstantInt(CI)))) {
3210 TestAddrMode.ScaledReg = AddLHS;
3211 TestAddrMode.BaseOffs += CI->getSExtValue()*TestAddrMode.Scale;
3213 // If this addressing mode is legal, commit it and remember that we folded
3214 // this instruction.
3215 if (TLI.isLegalAddressingMode(DL, TestAddrMode, AccessTy, AddrSpace)) {
3216 AddrModeInsts.push_back(cast<Instruction>(ScaleReg));
3217 AddrMode = TestAddrMode;
3222 // Otherwise, not (x+c)*scale, just return what we have.
3226 /// This is a little filter, which returns true if an addressing computation
3227 /// involving I might be folded into a load/store accessing it.
3228 /// This doesn't need to be perfect, but needs to accept at least
3229 /// the set of instructions that MatchOperationAddr can.
3230 static bool MightBeFoldableInst(Instruction *I) {
3231 switch (I->getOpcode()) {
3232 case Instruction::BitCast:
3233 case Instruction::AddrSpaceCast:
3234 // Don't touch identity bitcasts.
3235 if (I->getType() == I->getOperand(0)->getType())
3237 return I->getType()->isPointerTy() || I->getType()->isIntegerTy();
3238 case Instruction::PtrToInt:
3239 // PtrToInt is always a noop, as we know that the int type is pointer sized.
3241 case Instruction::IntToPtr:
3242 // We know the input is intptr_t, so this is foldable.
3244 case Instruction::Add:
3246 case Instruction::Mul:
3247 case Instruction::Shl:
3248 // Can only handle X*C and X << C.
3249 return isa<ConstantInt>(I->getOperand(1));
3250 case Instruction::GetElementPtr:
3257 /// \brief Check whether or not \p Val is a legal instruction for \p TLI.
3258 /// \note \p Val is assumed to be the product of some type promotion.
3259 /// Therefore if \p Val has an undefined state in \p TLI, this is assumed
3260 /// to be legal, as the non-promoted value would have had the same state.
3261 static bool isPromotedInstructionLegal(const TargetLowering &TLI,
3262 const DataLayout &DL, Value *Val) {
3263 Instruction *PromotedInst = dyn_cast<Instruction>(Val);
3266 int ISDOpcode = TLI.InstructionOpcodeToISD(PromotedInst->getOpcode());
3267 // If the ISDOpcode is undefined, it was undefined before the promotion.
3270 // Otherwise, check if the promoted instruction is legal or not.
3271 return TLI.isOperationLegalOrCustom(
3272 ISDOpcode, TLI.getValueType(DL, PromotedInst->getType()));
3275 /// \brief Hepler class to perform type promotion.
3276 class TypePromotionHelper {
3277 /// \brief Utility function to check whether or not a sign or zero extension
3278 /// of \p Inst with \p ConsideredExtType can be moved through \p Inst by
3279 /// either using the operands of \p Inst or promoting \p Inst.
3280 /// The type of the extension is defined by \p IsSExt.
3281 /// In other words, check if:
3282 /// ext (Ty Inst opnd1 opnd2 ... opndN) to ConsideredExtType.
3283 /// #1 Promotion applies:
3284 /// ConsideredExtType Inst (ext opnd1 to ConsideredExtType, ...).
3285 /// #2 Operand reuses:
3286 /// ext opnd1 to ConsideredExtType.
3287 /// \p PromotedInsts maps the instructions to their type before promotion.
3288 static bool canGetThrough(const Instruction *Inst, Type *ConsideredExtType,
3289 const InstrToOrigTy &PromotedInsts, bool IsSExt);
3291 /// \brief Utility function to determine if \p OpIdx should be promoted when
3292 /// promoting \p Inst.
3293 static bool shouldExtOperand(const Instruction *Inst, int OpIdx) {
3294 return !(isa<SelectInst>(Inst) && OpIdx == 0);
3297 /// \brief Utility function to promote the operand of \p Ext when this
3298 /// operand is a promotable trunc or sext or zext.
3299 /// \p PromotedInsts maps the instructions to their type before promotion.
3300 /// \p CreatedInstsCost[out] contains the cost of all instructions
3301 /// created to promote the operand of Ext.
3302 /// Newly added extensions are inserted in \p Exts.
3303 /// Newly added truncates are inserted in \p Truncs.
3304 /// Should never be called directly.
3305 /// \return The promoted value which is used instead of Ext.
3306 static Value *promoteOperandForTruncAndAnyExt(
3307 Instruction *Ext, TypePromotionTransaction &TPT,
3308 InstrToOrigTy &PromotedInsts, unsigned &CreatedInstsCost,
3309 SmallVectorImpl<Instruction *> *Exts,
3310 SmallVectorImpl<Instruction *> *Truncs, const TargetLowering &TLI);
3312 /// \brief Utility function to promote the operand of \p Ext when this
3313 /// operand is promotable and is not a supported trunc or sext.
3314 /// \p PromotedInsts maps the instructions to their type before promotion.
3315 /// \p CreatedInstsCost[out] contains the cost of all the instructions
3316 /// created to promote the operand of Ext.
3317 /// Newly added extensions are inserted in \p Exts.
3318 /// Newly added truncates are inserted in \p Truncs.
3319 /// Should never be called directly.
3320 /// \return The promoted value which is used instead of Ext.
3321 static Value *promoteOperandForOther(Instruction *Ext,
3322 TypePromotionTransaction &TPT,
3323 InstrToOrigTy &PromotedInsts,
3324 unsigned &CreatedInstsCost,
3325 SmallVectorImpl<Instruction *> *Exts,
3326 SmallVectorImpl<Instruction *> *Truncs,
3327 const TargetLowering &TLI, bool IsSExt);
3329 /// \see promoteOperandForOther.
3330 static Value *signExtendOperandForOther(
3331 Instruction *Ext, TypePromotionTransaction &TPT,
3332 InstrToOrigTy &PromotedInsts, unsigned &CreatedInstsCost,
3333 SmallVectorImpl<Instruction *> *Exts,
3334 SmallVectorImpl<Instruction *> *Truncs, const TargetLowering &TLI) {
3335 return promoteOperandForOther(Ext, TPT, PromotedInsts, CreatedInstsCost,
3336 Exts, Truncs, TLI, true);
3339 /// \see promoteOperandForOther.
3340 static Value *zeroExtendOperandForOther(
3341 Instruction *Ext, TypePromotionTransaction &TPT,
3342 InstrToOrigTy &PromotedInsts, unsigned &CreatedInstsCost,
3343 SmallVectorImpl<Instruction *> *Exts,
3344 SmallVectorImpl<Instruction *> *Truncs, const TargetLowering &TLI) {
3345 return promoteOperandForOther(Ext, TPT, PromotedInsts, CreatedInstsCost,
3346 Exts, Truncs, TLI, false);
3350 /// Type for the utility function that promotes the operand of Ext.
3351 typedef Value *(*Action)(Instruction *Ext, TypePromotionTransaction &TPT,
3352 InstrToOrigTy &PromotedInsts,
3353 unsigned &CreatedInstsCost,
3354 SmallVectorImpl<Instruction *> *Exts,
3355 SmallVectorImpl<Instruction *> *Truncs,
3356 const TargetLowering &TLI);
3357 /// \brief Given a sign/zero extend instruction \p Ext, return the approriate
3358 /// action to promote the operand of \p Ext instead of using Ext.
3359 /// \return NULL if no promotable action is possible with the current
3361 /// \p InsertedInsts keeps track of all the instructions inserted by the
3362 /// other CodeGenPrepare optimizations. This information is important
3363 /// because we do not want to promote these instructions as CodeGenPrepare
3364 /// will reinsert them later. Thus creating an infinite loop: create/remove.
3365 /// \p PromotedInsts maps the instructions to their type before promotion.
3366 static Action getAction(Instruction *Ext, const SetOfInstrs &InsertedInsts,
3367 const TargetLowering &TLI,
3368 const InstrToOrigTy &PromotedInsts);
3371 bool TypePromotionHelper::canGetThrough(const Instruction *Inst,
3372 Type *ConsideredExtType,
3373 const InstrToOrigTy &PromotedInsts,
3375 // The promotion helper does not know how to deal with vector types yet.
3376 // To be able to fix that, we would need to fix the places where we
3377 // statically extend, e.g., constants and such.
3378 if (Inst->getType()->isVectorTy())
3381 // We can always get through zext.
3382 if (isa<ZExtInst>(Inst))
3385 // sext(sext) is ok too.
3386 if (IsSExt && isa<SExtInst>(Inst))
3389 // We can get through binary operator, if it is legal. In other words, the
3390 // binary operator must have a nuw or nsw flag.
3391 const BinaryOperator *BinOp = dyn_cast<BinaryOperator>(Inst);
3392 if (BinOp && isa<OverflowingBinaryOperator>(BinOp) &&
3393 ((!IsSExt && BinOp->hasNoUnsignedWrap()) ||
3394 (IsSExt && BinOp->hasNoSignedWrap())))
3397 // Check if we can do the following simplification.
3398 // ext(trunc(opnd)) --> ext(opnd)
3399 if (!isa<TruncInst>(Inst))
3402 Value *OpndVal = Inst->getOperand(0);
3403 // Check if we can use this operand in the extension.
3404 // If the type is larger than the result type of the extension, we cannot.
3405 if (!OpndVal->getType()->isIntegerTy() ||
3406 OpndVal->getType()->getIntegerBitWidth() >
3407 ConsideredExtType->getIntegerBitWidth())
3410 // If the operand of the truncate is not an instruction, we will not have
3411 // any information on the dropped bits.
3412 // (Actually we could for constant but it is not worth the extra logic).
3413 Instruction *Opnd = dyn_cast<Instruction>(OpndVal);
3417 // Check if the source of the type is narrow enough.
3418 // I.e., check that trunc just drops extended bits of the same kind of
3420 // #1 get the type of the operand and check the kind of the extended bits.
3421 const Type *OpndType;
3422 InstrToOrigTy::const_iterator It = PromotedInsts.find(Opnd);
3423 if (It != PromotedInsts.end() && It->second.getInt() == IsSExt)
3424 OpndType = It->second.getPointer();
3425 else if ((IsSExt && isa<SExtInst>(Opnd)) || (!IsSExt && isa<ZExtInst>(Opnd)))
3426 OpndType = Opnd->getOperand(0)->getType();
3430 // #2 check that the truncate just drops extended bits.
3431 return Inst->getType()->getIntegerBitWidth() >=
3432 OpndType->getIntegerBitWidth();
3435 TypePromotionHelper::Action TypePromotionHelper::getAction(
3436 Instruction *Ext, const SetOfInstrs &InsertedInsts,
3437 const TargetLowering &TLI, const InstrToOrigTy &PromotedInsts) {
3438 assert((isa<SExtInst>(Ext) || isa<ZExtInst>(Ext)) &&
3439 "Unexpected instruction type");
3440 Instruction *ExtOpnd = dyn_cast<Instruction>(Ext->getOperand(0));
3441 Type *ExtTy = Ext->getType();
3442 bool IsSExt = isa<SExtInst>(Ext);
3443 // If the operand of the extension is not an instruction, we cannot
3445 // If it, check we can get through.
3446 if (!ExtOpnd || !canGetThrough(ExtOpnd, ExtTy, PromotedInsts, IsSExt))
3449 // Do not promote if the operand has been added by codegenprepare.
3450 // Otherwise, it means we are undoing an optimization that is likely to be
3451 // redone, thus causing potential infinite loop.
3452 if (isa<TruncInst>(ExtOpnd) && InsertedInsts.count(ExtOpnd))
3455 // SExt or Trunc instructions.
3456 // Return the related handler.
3457 if (isa<SExtInst>(ExtOpnd) || isa<TruncInst>(ExtOpnd) ||
3458 isa<ZExtInst>(ExtOpnd))
3459 return promoteOperandForTruncAndAnyExt;
3461 // Regular instruction.
3462 // Abort early if we will have to insert non-free instructions.
3463 if (!ExtOpnd->hasOneUse() && !TLI.isTruncateFree(ExtTy, ExtOpnd->getType()))
3465 return IsSExt ? signExtendOperandForOther : zeroExtendOperandForOther;
3468 Value *TypePromotionHelper::promoteOperandForTruncAndAnyExt(
3469 llvm::Instruction *SExt, TypePromotionTransaction &TPT,
3470 InstrToOrigTy &PromotedInsts, unsigned &CreatedInstsCost,
3471 SmallVectorImpl<Instruction *> *Exts,
3472 SmallVectorImpl<Instruction *> *Truncs, const TargetLowering &TLI) {
3473 // By construction, the operand of SExt is an instruction. Otherwise we cannot
3474 // get through it and this method should not be called.
3475 Instruction *SExtOpnd = cast<Instruction>(SExt->getOperand(0));
3476 Value *ExtVal = SExt;
3477 bool HasMergedNonFreeExt = false;
3478 if (isa<ZExtInst>(SExtOpnd)) {
3479 // Replace s|zext(zext(opnd))
3481 HasMergedNonFreeExt = !TLI.isExtFree(SExtOpnd);
3483 TPT.createZExt(SExt, SExtOpnd->getOperand(0), SExt->getType());
3484 TPT.replaceAllUsesWith(SExt, ZExt);
3485 TPT.eraseInstruction(SExt);
3488 // Replace z|sext(trunc(opnd)) or sext(sext(opnd))
3490 TPT.setOperand(SExt, 0, SExtOpnd->getOperand(0));
3492 CreatedInstsCost = 0;
3494 // Remove dead code.
3495 if (SExtOpnd->use_empty())
3496 TPT.eraseInstruction(SExtOpnd);
3498 // Check if the extension is still needed.
3499 Instruction *ExtInst = dyn_cast<Instruction>(ExtVal);
3500 if (!ExtInst || ExtInst->getType() != ExtInst->getOperand(0)->getType()) {
3503 Exts->push_back(ExtInst);
3504 CreatedInstsCost = !TLI.isExtFree(ExtInst) && !HasMergedNonFreeExt;
3509 // At this point we have: ext ty opnd to ty.
3510 // Reassign the uses of ExtInst to the opnd and remove ExtInst.
3511 Value *NextVal = ExtInst->getOperand(0);
3512 TPT.eraseInstruction(ExtInst, NextVal);
3516 Value *TypePromotionHelper::promoteOperandForOther(
3517 Instruction *Ext, TypePromotionTransaction &TPT,
3518 InstrToOrigTy &PromotedInsts, unsigned &CreatedInstsCost,
3519 SmallVectorImpl<Instruction *> *Exts,
3520 SmallVectorImpl<Instruction *> *Truncs, const TargetLowering &TLI,
3522 // By construction, the operand of Ext is an instruction. Otherwise we cannot
3523 // get through it and this method should not be called.
3524 Instruction *ExtOpnd = cast<Instruction>(Ext->getOperand(0));
3525 CreatedInstsCost = 0;
3526 if (!ExtOpnd->hasOneUse()) {
3527 // ExtOpnd will be promoted.
3528 // All its uses, but Ext, will need to use a truncated value of the
3529 // promoted version.
3530 // Create the truncate now.
3531 Value *Trunc = TPT.createTrunc(Ext, ExtOpnd->getType());
3532 if (Instruction *ITrunc = dyn_cast<Instruction>(Trunc)) {
3533 ITrunc->removeFromParent();
3534 // Insert it just after the definition.
3535 ITrunc->insertAfter(ExtOpnd);
3537 Truncs->push_back(ITrunc);
3540 TPT.replaceAllUsesWith(ExtOpnd, Trunc);
3541 // Restore the operand of Ext (which has been replaced by the previous call
3542 // to replaceAllUsesWith) to avoid creating a cycle trunc <-> sext.
3543 TPT.setOperand(Ext, 0, ExtOpnd);
3546 // Get through the Instruction:
3547 // 1. Update its type.
3548 // 2. Replace the uses of Ext by Inst.
3549 // 3. Extend each operand that needs to be extended.
3551 // Remember the original type of the instruction before promotion.
3552 // This is useful to know that the high bits are sign extended bits.
3553 PromotedInsts.insert(std::pair<Instruction *, TypeIsSExt>(
3554 ExtOpnd, TypeIsSExt(ExtOpnd->getType(), IsSExt)));
3556 TPT.mutateType(ExtOpnd, Ext->getType());
3558 TPT.replaceAllUsesWith(Ext, ExtOpnd);
3560 Instruction *ExtForOpnd = Ext;
3562 DEBUG(dbgs() << "Propagate Ext to operands\n");
3563 for (int OpIdx = 0, EndOpIdx = ExtOpnd->getNumOperands(); OpIdx != EndOpIdx;
3565 DEBUG(dbgs() << "Operand:\n" << *(ExtOpnd->getOperand(OpIdx)) << '\n');
3566 if (ExtOpnd->getOperand(OpIdx)->getType() == Ext->getType() ||
3567 !shouldExtOperand(ExtOpnd, OpIdx)) {
3568 DEBUG(dbgs() << "No need to propagate\n");
3571 // Check if we can statically extend the operand.
3572 Value *Opnd = ExtOpnd->getOperand(OpIdx);
3573 if (const ConstantInt *Cst = dyn_cast<ConstantInt>(Opnd)) {
3574 DEBUG(dbgs() << "Statically extend\n");
3575 unsigned BitWidth = Ext->getType()->getIntegerBitWidth();
3576 APInt CstVal = IsSExt ? Cst->getValue().sext(BitWidth)
3577 : Cst->getValue().zext(BitWidth);
3578 TPT.setOperand(ExtOpnd, OpIdx, ConstantInt::get(Ext->getType(), CstVal));
3581 // UndefValue are typed, so we have to statically sign extend them.
3582 if (isa<UndefValue>(Opnd)) {
3583 DEBUG(dbgs() << "Statically extend\n");
3584 TPT.setOperand(ExtOpnd, OpIdx, UndefValue::get(Ext->getType()));
3588 // Otherwise we have to explicity sign extend the operand.
3589 // Check if Ext was reused to extend an operand.
3591 // If yes, create a new one.
3592 DEBUG(dbgs() << "More operands to ext\n");
3593 Value *ValForExtOpnd = IsSExt ? TPT.createSExt(Ext, Opnd, Ext->getType())
3594 : TPT.createZExt(Ext, Opnd, Ext->getType());
3595 if (!isa<Instruction>(ValForExtOpnd)) {
3596 TPT.setOperand(ExtOpnd, OpIdx, ValForExtOpnd);
3599 ExtForOpnd = cast<Instruction>(ValForExtOpnd);
3602 Exts->push_back(ExtForOpnd);
3603 TPT.setOperand(ExtForOpnd, 0, Opnd);
3605 // Move the sign extension before the insertion point.
3606 TPT.moveBefore(ExtForOpnd, ExtOpnd);
3607 TPT.setOperand(ExtOpnd, OpIdx, ExtForOpnd);
3608 CreatedInstsCost += !TLI.isExtFree(ExtForOpnd);
3609 // If more sext are required, new instructions will have to be created.
3610 ExtForOpnd = nullptr;
3612 if (ExtForOpnd == Ext) {
3613 DEBUG(dbgs() << "Extension is useless now\n");
3614 TPT.eraseInstruction(Ext);
3619 /// Check whether or not promoting an instruction to a wider type is profitable.
3620 /// \p NewCost gives the cost of extension instructions created by the
3622 /// \p OldCost gives the cost of extension instructions before the promotion
3623 /// plus the number of instructions that have been
3624 /// matched in the addressing mode the promotion.
3625 /// \p PromotedOperand is the value that has been promoted.
3626 /// \return True if the promotion is profitable, false otherwise.
3627 bool AddressingModeMatcher::isPromotionProfitable(
3628 unsigned NewCost, unsigned OldCost, Value *PromotedOperand) const {
3629 DEBUG(dbgs() << "OldCost: " << OldCost << "\tNewCost: " << NewCost << '\n');
3630 // The cost of the new extensions is greater than the cost of the
3631 // old extension plus what we folded.
3632 // This is not profitable.
3633 if (NewCost > OldCost)
3635 if (NewCost < OldCost)
3637 // The promotion is neutral but it may help folding the sign extension in
3638 // loads for instance.
3639 // Check that we did not create an illegal instruction.
3640 return isPromotedInstructionLegal(TLI, DL, PromotedOperand);
3643 /// Given an instruction or constant expr, see if we can fold the operation
3644 /// into the addressing mode. If so, update the addressing mode and return
3645 /// true, otherwise return false without modifying AddrMode.
3646 /// If \p MovedAway is not NULL, it contains the information of whether or
3647 /// not AddrInst has to be folded into the addressing mode on success.
3648 /// If \p MovedAway == true, \p AddrInst will not be part of the addressing
3649 /// because it has been moved away.
3650 /// Thus AddrInst must not be added in the matched instructions.
3651 /// This state can happen when AddrInst is a sext, since it may be moved away.
3652 /// Therefore, AddrInst may not be valid when MovedAway is true and it must
3653 /// not be referenced anymore.
3654 bool AddressingModeMatcher::matchOperationAddr(User *AddrInst, unsigned Opcode,
3657 // Avoid exponential behavior on extremely deep expression trees.
3658 if (Depth >= 5) return false;
3660 // By default, all matched instructions stay in place.
3665 case Instruction::PtrToInt:
3666 // PtrToInt is always a noop, as we know that the int type is pointer sized.
3667 return matchAddr(AddrInst->getOperand(0), Depth);
3668 case Instruction::IntToPtr: {
3669 auto AS = AddrInst->getType()->getPointerAddressSpace();
3670 auto PtrTy = MVT::getIntegerVT(DL.getPointerSizeInBits(AS));
3671 // This inttoptr is a no-op if the integer type is pointer sized.
3672 if (TLI.getValueType(DL, AddrInst->getOperand(0)->getType()) == PtrTy)
3673 return matchAddr(AddrInst->getOperand(0), Depth);
3676 case Instruction::BitCast:
3677 // BitCast is always a noop, and we can handle it as long as it is
3678 // int->int or pointer->pointer (we don't want int<->fp or something).
3679 if ((AddrInst->getOperand(0)->getType()->isPointerTy() ||
3680 AddrInst->getOperand(0)->getType()->isIntegerTy()) &&
3681 // Don't touch identity bitcasts. These were probably put here by LSR,
3682 // and we don't want to mess around with them. Assume it knows what it
3684 AddrInst->getOperand(0)->getType() != AddrInst->getType())
3685 return matchAddr(AddrInst->getOperand(0), Depth);
3687 case Instruction::AddrSpaceCast: {
3689 = AddrInst->getOperand(0)->getType()->getPointerAddressSpace();
3690 unsigned DestAS = AddrInst->getType()->getPointerAddressSpace();
3691 if (TLI.isNoopAddrSpaceCast(SrcAS, DestAS))
3692 return matchAddr(AddrInst->getOperand(0), Depth);
3695 case Instruction::Add: {
3696 // Check to see if we can merge in the RHS then the LHS. If so, we win.
3697 ExtAddrMode BackupAddrMode = AddrMode;
3698 unsigned OldSize = AddrModeInsts.size();
3699 // Start a transaction at this point.
3700 // The LHS may match but not the RHS.
3701 // Therefore, we need a higher level restoration point to undo partially
3702 // matched operation.
3703 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
3704 TPT.getRestorationPoint();
3706 if (matchAddr(AddrInst->getOperand(1), Depth+1) &&
3707 matchAddr(AddrInst->getOperand(0), Depth+1))
3710 // Restore the old addr mode info.
3711 AddrMode = BackupAddrMode;
3712 AddrModeInsts.resize(OldSize);
3713 TPT.rollback(LastKnownGood);
3715 // Otherwise this was over-aggressive. Try merging in the LHS then the RHS.
3716 if (matchAddr(AddrInst->getOperand(0), Depth+1) &&
3717 matchAddr(AddrInst->getOperand(1), Depth+1))
3720 // Otherwise we definitely can't merge the ADD in.
3721 AddrMode = BackupAddrMode;
3722 AddrModeInsts.resize(OldSize);
3723 TPT.rollback(LastKnownGood);
3726 //case Instruction::Or:
3727 // TODO: We can handle "Or Val, Imm" iff this OR is equivalent to an ADD.
3729 case Instruction::Mul:
3730 case Instruction::Shl: {
3731 // Can only handle X*C and X << C.
3732 ConstantInt *RHS = dyn_cast<ConstantInt>(AddrInst->getOperand(1));
3735 int64_t Scale = RHS->getSExtValue();
3736 if (Opcode == Instruction::Shl)
3737 Scale = 1LL << Scale;
3739 return matchScaledValue(AddrInst->getOperand(0), Scale, Depth);
3741 case Instruction::GetElementPtr: {
3742 // Scan the GEP. We check it if it contains constant offsets and at most
3743 // one variable offset.
3744 int VariableOperand = -1;
3745 unsigned VariableScale = 0;
3747 int64_t ConstantOffset = 0;
3748 gep_type_iterator GTI = gep_type_begin(AddrInst);
3749 for (unsigned i = 1, e = AddrInst->getNumOperands(); i != e; ++i, ++GTI) {
3750 if (StructType *STy = GTI.getStructTypeOrNull()) {
3751 const StructLayout *SL = DL.getStructLayout(STy);
3753 cast<ConstantInt>(AddrInst->getOperand(i))->getZExtValue();
3754 ConstantOffset += SL->getElementOffset(Idx);
3756 uint64_t TypeSize = DL.getTypeAllocSize(GTI.getIndexedType());
3757 if (ConstantInt *CI = dyn_cast<ConstantInt>(AddrInst->getOperand(i))) {
3758 ConstantOffset += CI->getSExtValue()*TypeSize;
3759 } else if (TypeSize) { // Scales of zero don't do anything.
3760 // We only allow one variable index at the moment.
3761 if (VariableOperand != -1)
3764 // Remember the variable index.
3765 VariableOperand = i;
3766 VariableScale = TypeSize;
3771 // A common case is for the GEP to only do a constant offset. In this case,
3772 // just add it to the disp field and check validity.
3773 if (VariableOperand == -1) {
3774 AddrMode.BaseOffs += ConstantOffset;
3775 if (ConstantOffset == 0 ||
3776 TLI.isLegalAddressingMode(DL, AddrMode, AccessTy, AddrSpace)) {
3777 // Check to see if we can fold the base pointer in too.
3778 if (matchAddr(AddrInst->getOperand(0), Depth+1))
3781 AddrMode.BaseOffs -= ConstantOffset;
3785 // Save the valid addressing mode in case we can't match.
3786 ExtAddrMode BackupAddrMode = AddrMode;
3787 unsigned OldSize = AddrModeInsts.size();
3789 // See if the scale and offset amount is valid for this target.
3790 AddrMode.BaseOffs += ConstantOffset;
3792 // Match the base operand of the GEP.
3793 if (!matchAddr(AddrInst->getOperand(0), Depth+1)) {
3794 // If it couldn't be matched, just stuff the value in a register.
3795 if (AddrMode.HasBaseReg) {
3796 AddrMode = BackupAddrMode;
3797 AddrModeInsts.resize(OldSize);
3800 AddrMode.HasBaseReg = true;
3801 AddrMode.BaseReg = AddrInst->getOperand(0);
3804 // Match the remaining variable portion of the GEP.
3805 if (!matchScaledValue(AddrInst->getOperand(VariableOperand), VariableScale,
3807 // If it couldn't be matched, try stuffing the base into a register
3808 // instead of matching it, and retrying the match of the scale.
3809 AddrMode = BackupAddrMode;
3810 AddrModeInsts.resize(OldSize);
3811 if (AddrMode.HasBaseReg)
3813 AddrMode.HasBaseReg = true;
3814 AddrMode.BaseReg = AddrInst->getOperand(0);
3815 AddrMode.BaseOffs += ConstantOffset;
3816 if (!matchScaledValue(AddrInst->getOperand(VariableOperand),
3817 VariableScale, Depth)) {
3818 // If even that didn't work, bail.
3819 AddrMode = BackupAddrMode;
3820 AddrModeInsts.resize(OldSize);
3827 case Instruction::SExt:
3828 case Instruction::ZExt: {
3829 Instruction *Ext = dyn_cast<Instruction>(AddrInst);
3833 // Try to move this ext out of the way of the addressing mode.
3834 // Ask for a method for doing so.
3835 TypePromotionHelper::Action TPH =
3836 TypePromotionHelper::getAction(Ext, InsertedInsts, TLI, PromotedInsts);
3840 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
3841 TPT.getRestorationPoint();
3842 unsigned CreatedInstsCost = 0;
3843 unsigned ExtCost = !TLI.isExtFree(Ext);
3844 Value *PromotedOperand =
3845 TPH(Ext, TPT, PromotedInsts, CreatedInstsCost, nullptr, nullptr, TLI);
3846 // SExt has been moved away.
3847 // Thus either it will be rematched later in the recursive calls or it is
3848 // gone. Anyway, we must not fold it into the addressing mode at this point.
3852 // addr = gep base, idx
3854 // promotedOpnd = ext opnd <- no match here
3855 // op = promoted_add promotedOpnd, 1 <- match (later in recursive calls)
3856 // addr = gep base, op <- match
3860 assert(PromotedOperand &&
3861 "TypePromotionHelper should have filtered out those cases");
3863 ExtAddrMode BackupAddrMode = AddrMode;
3864 unsigned OldSize = AddrModeInsts.size();
3866 if (!matchAddr(PromotedOperand, Depth) ||
3867 // The total of the new cost is equal to the cost of the created
3869 // The total of the old cost is equal to the cost of the extension plus
3870 // what we have saved in the addressing mode.
3871 !isPromotionProfitable(CreatedInstsCost,
3872 ExtCost + (AddrModeInsts.size() - OldSize),
3874 AddrMode = BackupAddrMode;
3875 AddrModeInsts.resize(OldSize);
3876 DEBUG(dbgs() << "Sign extension does not pay off: rollback\n");
3877 TPT.rollback(LastKnownGood);
3886 /// If we can, try to add the value of 'Addr' into the current addressing mode.
3887 /// If Addr can't be added to AddrMode this returns false and leaves AddrMode
3888 /// unmodified. This assumes that Addr is either a pointer type or intptr_t
3891 bool AddressingModeMatcher::matchAddr(Value *Addr, unsigned Depth) {
3892 // Start a transaction at this point that we will rollback if the matching
3894 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
3895 TPT.getRestorationPoint();
3896 if (ConstantInt *CI = dyn_cast<ConstantInt>(Addr)) {
3897 // Fold in immediates if legal for the target.
3898 AddrMode.BaseOffs += CI->getSExtValue();
3899 if (TLI.isLegalAddressingMode(DL, AddrMode, AccessTy, AddrSpace))
3901 AddrMode.BaseOffs -= CI->getSExtValue();
3902 } else if (GlobalValue *GV = dyn_cast<GlobalValue>(Addr)) {
3903 // If this is a global variable, try to fold it into the addressing mode.
3904 if (!AddrMode.BaseGV) {
3905 AddrMode.BaseGV = GV;
3906 if (TLI.isLegalAddressingMode(DL, AddrMode, AccessTy, AddrSpace))
3908 AddrMode.BaseGV = nullptr;
3910 } else if (Instruction *I = dyn_cast<Instruction>(Addr)) {
3911 ExtAddrMode BackupAddrMode = AddrMode;
3912 unsigned OldSize = AddrModeInsts.size();
3914 // Check to see if it is possible to fold this operation.
3915 bool MovedAway = false;
3916 if (matchOperationAddr(I, I->getOpcode(), Depth, &MovedAway)) {
3917 // This instruction may have been moved away. If so, there is nothing
3921 // Okay, it's possible to fold this. Check to see if it is actually
3922 // *profitable* to do so. We use a simple cost model to avoid increasing
3923 // register pressure too much.
3924 if (I->hasOneUse() ||
3925 isProfitableToFoldIntoAddressingMode(I, BackupAddrMode, AddrMode)) {
3926 AddrModeInsts.push_back(I);
3930 // It isn't profitable to do this, roll back.
3931 //cerr << "NOT FOLDING: " << *I;
3932 AddrMode = BackupAddrMode;
3933 AddrModeInsts.resize(OldSize);
3934 TPT.rollback(LastKnownGood);
3936 } else if (ConstantExpr *CE = dyn_cast<ConstantExpr>(Addr)) {
3937 if (matchOperationAddr(CE, CE->getOpcode(), Depth))
3939 TPT.rollback(LastKnownGood);
3940 } else if (isa<ConstantPointerNull>(Addr)) {
3941 // Null pointer gets folded without affecting the addressing mode.
3945 // Worse case, the target should support [reg] addressing modes. :)
3946 if (!AddrMode.HasBaseReg) {
3947 AddrMode.HasBaseReg = true;
3948 AddrMode.BaseReg = Addr;
3949 // Still check for legality in case the target supports [imm] but not [i+r].
3950 if (TLI.isLegalAddressingMode(DL, AddrMode, AccessTy, AddrSpace))
3952 AddrMode.HasBaseReg = false;
3953 AddrMode.BaseReg = nullptr;
3956 // If the base register is already taken, see if we can do [r+r].
3957 if (AddrMode.Scale == 0) {
3959 AddrMode.ScaledReg = Addr;
3960 if (TLI.isLegalAddressingMode(DL, AddrMode, AccessTy, AddrSpace))
3963 AddrMode.ScaledReg = nullptr;
3966 TPT.rollback(LastKnownGood);
3970 /// Check to see if all uses of OpVal by the specified inline asm call are due
3971 /// to memory operands. If so, return true, otherwise return false.
3972 static bool IsOperandAMemoryOperand(CallInst *CI, InlineAsm *IA, Value *OpVal,
3973 const TargetLowering &TLI,
3974 const TargetRegisterInfo &TRI) {
3975 const Function *F = CI->getFunction();
3976 TargetLowering::AsmOperandInfoVector TargetConstraints =
3977 TLI.ParseConstraints(F->getParent()->getDataLayout(), &TRI,
3978 ImmutableCallSite(CI));
3980 for (unsigned i = 0, e = TargetConstraints.size(); i != e; ++i) {
3981 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i];
3983 // Compute the constraint code and ConstraintType to use.
3984 TLI.ComputeConstraintToUse(OpInfo, SDValue());
3986 // If this asm operand is our Value*, and if it isn't an indirect memory
3987 // operand, we can't fold it!
3988 if (OpInfo.CallOperandVal == OpVal &&
3989 (OpInfo.ConstraintType != TargetLowering::C_Memory ||
3990 !OpInfo.isIndirect))
3997 /// Recursively walk all the uses of I until we find a memory use.
3998 /// If we find an obviously non-foldable instruction, return true.
3999 /// Add the ultimately found memory instructions to MemoryUses.
4000 static bool FindAllMemoryUses(
4002 SmallVectorImpl<std::pair<Instruction *, unsigned>> &MemoryUses,
4003 SmallPtrSetImpl<Instruction *> &ConsideredInsts,
4004 const TargetLowering &TLI, const TargetRegisterInfo &TRI) {
4005 // If we already considered this instruction, we're done.
4006 if (!ConsideredInsts.insert(I).second)
4009 // If this is an obviously unfoldable instruction, bail out.
4010 if (!MightBeFoldableInst(I))
4013 const bool OptSize = I->getFunction()->optForSize();
4015 // Loop over all the uses, recursively processing them.
4016 for (Use &U : I->uses()) {
4017 Instruction *UserI = cast<Instruction>(U.getUser());
4019 if (LoadInst *LI = dyn_cast<LoadInst>(UserI)) {
4020 MemoryUses.push_back(std::make_pair(LI, U.getOperandNo()));
4024 if (StoreInst *SI = dyn_cast<StoreInst>(UserI)) {
4025 unsigned opNo = U.getOperandNo();
4026 if (opNo != StoreInst::getPointerOperandIndex())
4027 return true; // Storing addr, not into addr.
4028 MemoryUses.push_back(std::make_pair(SI, opNo));
4032 if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(UserI)) {
4033 unsigned opNo = U.getOperandNo();
4034 if (opNo != AtomicRMWInst::getPointerOperandIndex())
4035 return true; // Storing addr, not into addr.
4036 MemoryUses.push_back(std::make_pair(RMW, opNo));
4040 if (AtomicCmpXchgInst *CmpX = dyn_cast<AtomicCmpXchgInst>(UserI)) {
4041 unsigned opNo = U.getOperandNo();
4042 if (opNo != AtomicCmpXchgInst::getPointerOperandIndex())
4043 return true; // Storing addr, not into addr.
4044 MemoryUses.push_back(std::make_pair(CmpX, opNo));
4048 if (CallInst *CI = dyn_cast<CallInst>(UserI)) {
4049 // If this is a cold call, we can sink the addressing calculation into
4050 // the cold path. See optimizeCallInst
4051 if (!OptSize && CI->hasFnAttr(Attribute::Cold))
4054 InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue());
4055 if (!IA) return true;
4057 // If this is a memory operand, we're cool, otherwise bail out.
4058 if (!IsOperandAMemoryOperand(CI, IA, I, TLI, TRI))
4063 if (FindAllMemoryUses(UserI, MemoryUses, ConsideredInsts, TLI, TRI))
4070 /// Return true if Val is already known to be live at the use site that we're
4071 /// folding it into. If so, there is no cost to include it in the addressing
4072 /// mode. KnownLive1 and KnownLive2 are two values that we know are live at the
4073 /// instruction already.
4074 bool AddressingModeMatcher::valueAlreadyLiveAtInst(Value *Val,Value *KnownLive1,
4075 Value *KnownLive2) {
4076 // If Val is either of the known-live values, we know it is live!
4077 if (Val == nullptr || Val == KnownLive1 || Val == KnownLive2)
4080 // All values other than instructions and arguments (e.g. constants) are live.
4081 if (!isa<Instruction>(Val) && !isa<Argument>(Val)) return true;
4083 // If Val is a constant sized alloca in the entry block, it is live, this is
4084 // true because it is just a reference to the stack/frame pointer, which is
4085 // live for the whole function.
4086 if (AllocaInst *AI = dyn_cast<AllocaInst>(Val))
4087 if (AI->isStaticAlloca())
4090 // Check to see if this value is already used in the memory instruction's
4091 // block. If so, it's already live into the block at the very least, so we
4092 // can reasonably fold it.
4093 return Val->isUsedInBasicBlock(MemoryInst->getParent());
4096 /// It is possible for the addressing mode of the machine to fold the specified
4097 /// instruction into a load or store that ultimately uses it.
4098 /// However, the specified instruction has multiple uses.
4099 /// Given this, it may actually increase register pressure to fold it
4100 /// into the load. For example, consider this code:
4104 /// use(Y) -> nonload/store
4108 /// In this case, Y has multiple uses, and can be folded into the load of Z
4109 /// (yielding load [X+2]). However, doing this will cause both "X" and "X+1" to
4110 /// be live at the use(Y) line. If we don't fold Y into load Z, we use one
4111 /// fewer register. Since Y can't be folded into "use(Y)" we don't increase the
4112 /// number of computations either.
4114 /// Note that this (like most of CodeGenPrepare) is just a rough heuristic. If
4115 /// X was live across 'load Z' for other reasons, we actually *would* want to
4116 /// fold the addressing mode in the Z case. This would make Y die earlier.
4117 bool AddressingModeMatcher::
4118 isProfitableToFoldIntoAddressingMode(Instruction *I, ExtAddrMode &AMBefore,
4119 ExtAddrMode &AMAfter) {
4120 if (IgnoreProfitability) return true;
4122 // AMBefore is the addressing mode before this instruction was folded into it,
4123 // and AMAfter is the addressing mode after the instruction was folded. Get
4124 // the set of registers referenced by AMAfter and subtract out those
4125 // referenced by AMBefore: this is the set of values which folding in this
4126 // address extends the lifetime of.
4128 // Note that there are only two potential values being referenced here,
4129 // BaseReg and ScaleReg (global addresses are always available, as are any
4130 // folded immediates).
4131 Value *BaseReg = AMAfter.BaseReg, *ScaledReg = AMAfter.ScaledReg;
4133 // If the BaseReg or ScaledReg was referenced by the previous addrmode, their
4134 // lifetime wasn't extended by adding this instruction.
4135 if (valueAlreadyLiveAtInst(BaseReg, AMBefore.BaseReg, AMBefore.ScaledReg))
4137 if (valueAlreadyLiveAtInst(ScaledReg, AMBefore.BaseReg, AMBefore.ScaledReg))
4138 ScaledReg = nullptr;
4140 // If folding this instruction (and it's subexprs) didn't extend any live
4141 // ranges, we're ok with it.
4142 if (!BaseReg && !ScaledReg)
4145 // If all uses of this instruction can have the address mode sunk into them,
4146 // we can remove the addressing mode and effectively trade one live register
4147 // for another (at worst.) In this context, folding an addressing mode into
4148 // the use is just a particularly nice way of sinking it.
4149 SmallVector<std::pair<Instruction*,unsigned>, 16> MemoryUses;
4150 SmallPtrSet<Instruction*, 16> ConsideredInsts;
4151 if (FindAllMemoryUses(I, MemoryUses, ConsideredInsts, TLI, TRI))
4152 return false; // Has a non-memory, non-foldable use!
4154 // Now that we know that all uses of this instruction are part of a chain of
4155 // computation involving only operations that could theoretically be folded
4156 // into a memory use, loop over each of these memory operation uses and see
4157 // if they could *actually* fold the instruction. The assumption is that
4158 // addressing modes are cheap and that duplicating the computation involved
4159 // many times is worthwhile, even on a fastpath. For sinking candidates
4160 // (i.e. cold call sites), this serves as a way to prevent excessive code
4161 // growth since most architectures have some reasonable small and fast way to
4162 // compute an effective address. (i.e LEA on x86)
4163 SmallVector<Instruction*, 32> MatchedAddrModeInsts;
4164 for (unsigned i = 0, e = MemoryUses.size(); i != e; ++i) {
4165 Instruction *User = MemoryUses[i].first;
4166 unsigned OpNo = MemoryUses[i].second;
4168 // Get the access type of this use. If the use isn't a pointer, we don't
4169 // know what it accesses.
4170 Value *Address = User->getOperand(OpNo);
4171 PointerType *AddrTy = dyn_cast<PointerType>(Address->getType());
4174 Type *AddressAccessTy = AddrTy->getElementType();
4175 unsigned AS = AddrTy->getAddressSpace();
4177 // Do a match against the root of this address, ignoring profitability. This
4178 // will tell us if the addressing mode for the memory operation will
4179 // *actually* cover the shared instruction.
4181 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
4182 TPT.getRestorationPoint();
4183 AddressingModeMatcher Matcher(MatchedAddrModeInsts, TLI, TRI,
4184 AddressAccessTy, AS,
4185 MemoryInst, Result, InsertedInsts,
4186 PromotedInsts, TPT);
4187 Matcher.IgnoreProfitability = true;
4188 bool Success = Matcher.matchAddr(Address, 0);
4189 (void)Success; assert(Success && "Couldn't select *anything*?");
4191 // The match was to check the profitability, the changes made are not
4192 // part of the original matcher. Therefore, they should be dropped
4193 // otherwise the original matcher will not present the right state.
4194 TPT.rollback(LastKnownGood);
4196 // If the match didn't cover I, then it won't be shared by it.
4197 if (!is_contained(MatchedAddrModeInsts, I))
4200 MatchedAddrModeInsts.clear();
4206 } // end anonymous namespace
4208 /// Return true if the specified values are defined in a
4209 /// different basic block than BB.
4210 static bool IsNonLocalValue(Value *V, BasicBlock *BB) {
4211 if (Instruction *I = dyn_cast<Instruction>(V))
4212 return I->getParent() != BB;
4216 /// Sink addressing mode computation immediate before MemoryInst if doing so
4217 /// can be done without increasing register pressure. The need for the
4218 /// register pressure constraint means this can end up being an all or nothing
4219 /// decision for all uses of the same addressing computation.
4221 /// Load and Store Instructions often have addressing modes that can do
4222 /// significant amounts of computation. As such, instruction selection will try
4223 /// to get the load or store to do as much computation as possible for the
4224 /// program. The problem is that isel can only see within a single block. As
4225 /// such, we sink as much legal addressing mode work into the block as possible.
4227 /// This method is used to optimize both load/store and inline asms with memory
4228 /// operands. It's also used to sink addressing computations feeding into cold
4229 /// call sites into their (cold) basic block.
4231 /// The motivation for handling sinking into cold blocks is that doing so can
4232 /// both enable other address mode sinking (by satisfying the register pressure
4233 /// constraint above), and reduce register pressure globally (by removing the
4234 /// addressing mode computation from the fast path entirely.).
4235 bool CodeGenPrepare::optimizeMemoryInst(Instruction *MemoryInst, Value *Addr,
4236 Type *AccessTy, unsigned AddrSpace) {
4239 // Try to collapse single-value PHI nodes. This is necessary to undo
4240 // unprofitable PRE transformations.
4241 SmallVector<Value*, 8> worklist;
4242 SmallPtrSet<Value*, 16> Visited;
4243 worklist.push_back(Addr);
4245 // Use a worklist to iteratively look through PHI nodes, and ensure that
4246 // the addressing mode obtained from the non-PHI roots of the graph
4248 Value *Consensus = nullptr;
4249 unsigned NumUsesConsensus = 0;
4250 bool IsNumUsesConsensusValid = false;
4251 SmallVector<Instruction*, 16> AddrModeInsts;
4252 ExtAddrMode AddrMode;
4253 TypePromotionTransaction TPT(RemovedInsts);
4254 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
4255 TPT.getRestorationPoint();
4256 while (!worklist.empty()) {
4257 Value *V = worklist.back();
4258 worklist.pop_back();
4260 // Break use-def graph loops.
4261 if (!Visited.insert(V).second) {
4262 Consensus = nullptr;
4266 // For a PHI node, push all of its incoming values.
4267 if (PHINode *P = dyn_cast<PHINode>(V)) {
4268 for (Value *IncValue : P->incoming_values())
4269 worklist.push_back(IncValue);
4273 // For non-PHIs, determine the addressing mode being computed. Note that
4274 // the result may differ depending on what other uses our candidate
4275 // addressing instructions might have.
4276 SmallVector<Instruction*, 16> NewAddrModeInsts;
4277 ExtAddrMode NewAddrMode = AddressingModeMatcher::Match(
4278 V, AccessTy, AddrSpace, MemoryInst, NewAddrModeInsts, *TLI, *TRI,
4279 InsertedInsts, PromotedInsts, TPT);
4281 // This check is broken into two cases with very similar code to avoid using
4282 // getNumUses() as much as possible. Some values have a lot of uses, so
4283 // calling getNumUses() unconditionally caused a significant compile-time
4287 AddrMode = NewAddrMode;
4288 AddrModeInsts = NewAddrModeInsts;
4290 } else if (NewAddrMode == AddrMode) {
4291 if (!IsNumUsesConsensusValid) {
4292 NumUsesConsensus = Consensus->getNumUses();
4293 IsNumUsesConsensusValid = true;
4296 // Ensure that the obtained addressing mode is equivalent to that obtained
4297 // for all other roots of the PHI traversal. Also, when choosing one
4298 // such root as representative, select the one with the most uses in order
4299 // to keep the cost modeling heuristics in AddressingModeMatcher
4301 unsigned NumUses = V->getNumUses();
4302 if (NumUses > NumUsesConsensus) {
4304 NumUsesConsensus = NumUses;
4305 AddrModeInsts = NewAddrModeInsts;
4310 Consensus = nullptr;
4314 // If the addressing mode couldn't be determined, or if multiple different
4315 // ones were determined, bail out now.
4317 TPT.rollback(LastKnownGood);
4322 // If all the instructions matched are already in this BB, don't do anything.
4323 if (none_of(AddrModeInsts, [&](Value *V) {
4324 return IsNonLocalValue(V, MemoryInst->getParent());
4326 DEBUG(dbgs() << "CGP: Found local addrmode: " << AddrMode << "\n");
4330 // Insert this computation right after this user. Since our caller is
4331 // scanning from the top of the BB to the bottom, reuse of the expr are
4332 // guaranteed to happen later.
4333 IRBuilder<> Builder(MemoryInst);
4335 // Now that we determined the addressing expression we want to use and know
4336 // that we have to sink it into this block. Check to see if we have already
4337 // done this for some other load/store instr in this block. If so, reuse the
4339 Value *&SunkAddr = SunkAddrs[Addr];
4341 DEBUG(dbgs() << "CGP: Reusing nonlocal addrmode: " << AddrMode << " for "
4342 << *MemoryInst << "\n");
4343 if (SunkAddr->getType() != Addr->getType())
4344 SunkAddr = Builder.CreatePointerCast(SunkAddr, Addr->getType());
4345 } else if (AddrSinkUsingGEPs ||
4346 (!AddrSinkUsingGEPs.getNumOccurrences() && TM &&
4347 SubtargetInfo->useAA())) {
4348 // By default, we use the GEP-based method when AA is used later. This
4349 // prevents new inttoptr/ptrtoint pairs from degrading AA capabilities.
4350 DEBUG(dbgs() << "CGP: SINKING nonlocal addrmode: " << AddrMode << " for "
4351 << *MemoryInst << "\n");
4352 Type *IntPtrTy = DL->getIntPtrType(Addr->getType());
4353 Value *ResultPtr = nullptr, *ResultIndex = nullptr;
4355 // First, find the pointer.
4356 if (AddrMode.BaseReg && AddrMode.BaseReg->getType()->isPointerTy()) {
4357 ResultPtr = AddrMode.BaseReg;
4358 AddrMode.BaseReg = nullptr;
4361 if (AddrMode.Scale && AddrMode.ScaledReg->getType()->isPointerTy()) {
4362 // We can't add more than one pointer together, nor can we scale a
4363 // pointer (both of which seem meaningless).
4364 if (ResultPtr || AddrMode.Scale != 1)
4367 ResultPtr = AddrMode.ScaledReg;
4371 if (AddrMode.BaseGV) {
4375 ResultPtr = AddrMode.BaseGV;
4378 // If the real base value actually came from an inttoptr, then the matcher
4379 // will look through it and provide only the integer value. In that case,
4381 if (!ResultPtr && AddrMode.BaseReg) {
4383 Builder.CreateIntToPtr(AddrMode.BaseReg, Addr->getType(), "sunkaddr");
4384 AddrMode.BaseReg = nullptr;
4385 } else if (!ResultPtr && AddrMode.Scale == 1) {
4387 Builder.CreateIntToPtr(AddrMode.ScaledReg, Addr->getType(), "sunkaddr");
4392 !AddrMode.BaseReg && !AddrMode.Scale && !AddrMode.BaseOffs) {
4393 SunkAddr = Constant::getNullValue(Addr->getType());
4394 } else if (!ResultPtr) {
4398 Builder.getInt8PtrTy(Addr->getType()->getPointerAddressSpace());
4399 Type *I8Ty = Builder.getInt8Ty();
4401 // Start with the base register. Do this first so that subsequent address
4402 // matching finds it last, which will prevent it from trying to match it
4403 // as the scaled value in case it happens to be a mul. That would be
4404 // problematic if we've sunk a different mul for the scale, because then
4405 // we'd end up sinking both muls.
4406 if (AddrMode.BaseReg) {
4407 Value *V = AddrMode.BaseReg;
4408 if (V->getType() != IntPtrTy)
4409 V = Builder.CreateIntCast(V, IntPtrTy, /*isSigned=*/true, "sunkaddr");
4414 // Add the scale value.
4415 if (AddrMode.Scale) {
4416 Value *V = AddrMode.ScaledReg;
4417 if (V->getType() == IntPtrTy) {
4419 } else if (cast<IntegerType>(IntPtrTy)->getBitWidth() <
4420 cast<IntegerType>(V->getType())->getBitWidth()) {
4421 V = Builder.CreateTrunc(V, IntPtrTy, "sunkaddr");
4423 // It is only safe to sign extend the BaseReg if we know that the math
4424 // required to create it did not overflow before we extend it. Since
4425 // the original IR value was tossed in favor of a constant back when
4426 // the AddrMode was created we need to bail out gracefully if widths
4427 // do not match instead of extending it.
4428 Instruction *I = dyn_cast_or_null<Instruction>(ResultIndex);
4429 if (I && (ResultIndex != AddrMode.BaseReg))
4430 I->eraseFromParent();
4434 if (AddrMode.Scale != 1)
4435 V = Builder.CreateMul(V, ConstantInt::get(IntPtrTy, AddrMode.Scale),
4438 ResultIndex = Builder.CreateAdd(ResultIndex, V, "sunkaddr");
4443 // Add in the Base Offset if present.
4444 if (AddrMode.BaseOffs) {
4445 Value *V = ConstantInt::get(IntPtrTy, AddrMode.BaseOffs);
4447 // We need to add this separately from the scale above to help with
4448 // SDAG consecutive load/store merging.
4449 if (ResultPtr->getType() != I8PtrTy)
4450 ResultPtr = Builder.CreatePointerCast(ResultPtr, I8PtrTy);
4451 ResultPtr = Builder.CreateGEP(I8Ty, ResultPtr, ResultIndex, "sunkaddr");
4458 SunkAddr = ResultPtr;
4460 if (ResultPtr->getType() != I8PtrTy)
4461 ResultPtr = Builder.CreatePointerCast(ResultPtr, I8PtrTy);
4462 SunkAddr = Builder.CreateGEP(I8Ty, ResultPtr, ResultIndex, "sunkaddr");
4465 if (SunkAddr->getType() != Addr->getType())
4466 SunkAddr = Builder.CreatePointerCast(SunkAddr, Addr->getType());
4469 DEBUG(dbgs() << "CGP: SINKING nonlocal addrmode: " << AddrMode << " for "
4470 << *MemoryInst << "\n");
4471 Type *IntPtrTy = DL->getIntPtrType(Addr->getType());
4472 Value *Result = nullptr;
4474 // Start with the base register. Do this first so that subsequent address
4475 // matching finds it last, which will prevent it from trying to match it
4476 // as the scaled value in case it happens to be a mul. That would be
4477 // problematic if we've sunk a different mul for the scale, because then
4478 // we'd end up sinking both muls.
4479 if (AddrMode.BaseReg) {
4480 Value *V = AddrMode.BaseReg;
4481 if (V->getType()->isPointerTy())
4482 V = Builder.CreatePtrToInt(V, IntPtrTy, "sunkaddr");
4483 if (V->getType() != IntPtrTy)
4484 V = Builder.CreateIntCast(V, IntPtrTy, /*isSigned=*/true, "sunkaddr");
4488 // Add the scale value.
4489 if (AddrMode.Scale) {
4490 Value *V = AddrMode.ScaledReg;
4491 if (V->getType() == IntPtrTy) {
4493 } else if (V->getType()->isPointerTy()) {
4494 V = Builder.CreatePtrToInt(V, IntPtrTy, "sunkaddr");
4495 } else if (cast<IntegerType>(IntPtrTy)->getBitWidth() <
4496 cast<IntegerType>(V->getType())->getBitWidth()) {
4497 V = Builder.CreateTrunc(V, IntPtrTy, "sunkaddr");
4499 // It is only safe to sign extend the BaseReg if we know that the math
4500 // required to create it did not overflow before we extend it. Since
4501 // the original IR value was tossed in favor of a constant back when
4502 // the AddrMode was created we need to bail out gracefully if widths
4503 // do not match instead of extending it.
4504 Instruction *I = dyn_cast_or_null<Instruction>(Result);
4505 if (I && (Result != AddrMode.BaseReg))
4506 I->eraseFromParent();
4509 if (AddrMode.Scale != 1)
4510 V = Builder.CreateMul(V, ConstantInt::get(IntPtrTy, AddrMode.Scale),
4513 Result = Builder.CreateAdd(Result, V, "sunkaddr");
4518 // Add in the BaseGV if present.
4519 if (AddrMode.BaseGV) {
4520 Value *V = Builder.CreatePtrToInt(AddrMode.BaseGV, IntPtrTy, "sunkaddr");
4522 Result = Builder.CreateAdd(Result, V, "sunkaddr");
4527 // Add in the Base Offset if present.
4528 if (AddrMode.BaseOffs) {
4529 Value *V = ConstantInt::get(IntPtrTy, AddrMode.BaseOffs);
4531 Result = Builder.CreateAdd(Result, V, "sunkaddr");
4537 SunkAddr = Constant::getNullValue(Addr->getType());
4539 SunkAddr = Builder.CreateIntToPtr(Result, Addr->getType(), "sunkaddr");
4542 MemoryInst->replaceUsesOfWith(Repl, SunkAddr);
4544 // If we have no uses, recursively delete the value and all dead instructions
4546 if (Repl->use_empty()) {
4547 // This can cause recursive deletion, which can invalidate our iterator.
4548 // Use a WeakTrackingVH to hold onto it in case this happens.
4549 Value *CurValue = &*CurInstIterator;
4550 WeakTrackingVH IterHandle(CurValue);
4551 BasicBlock *BB = CurInstIterator->getParent();
4553 RecursivelyDeleteTriviallyDeadInstructions(Repl, TLInfo);
4555 if (IterHandle != CurValue) {
4556 // If the iterator instruction was recursively deleted, start over at the
4557 // start of the block.
4558 CurInstIterator = BB->begin();
4566 /// If there are any memory operands, use OptimizeMemoryInst to sink their
4567 /// address computing into the block when possible / profitable.
4568 bool CodeGenPrepare::optimizeInlineAsmInst(CallInst *CS) {
4569 bool MadeChange = false;
4571 const TargetRegisterInfo *TRI =
4572 TM->getSubtargetImpl(*CS->getFunction())->getRegisterInfo();
4573 TargetLowering::AsmOperandInfoVector TargetConstraints =
4574 TLI->ParseConstraints(*DL, TRI, CS);
4576 for (unsigned i = 0, e = TargetConstraints.size(); i != e; ++i) {
4577 TargetLowering::AsmOperandInfo &OpInfo = TargetConstraints[i];
4579 // Compute the constraint code and ConstraintType to use.
4580 TLI->ComputeConstraintToUse(OpInfo, SDValue());
4582 if (OpInfo.ConstraintType == TargetLowering::C_Memory &&
4583 OpInfo.isIndirect) {
4584 Value *OpVal = CS->getArgOperand(ArgNo++);
4585 MadeChange |= optimizeMemoryInst(CS, OpVal, OpVal->getType(), ~0u);
4586 } else if (OpInfo.Type == InlineAsm::isInput)
4593 /// \brief Check if all the uses of \p Val are equivalent (or free) zero or
4594 /// sign extensions.
4595 static bool hasSameExtUse(Value *Val, const TargetLowering &TLI) {
4596 assert(!Val->use_empty() && "Input must have at least one use");
4597 const Instruction *FirstUser = cast<Instruction>(*Val->user_begin());
4598 bool IsSExt = isa<SExtInst>(FirstUser);
4599 Type *ExtTy = FirstUser->getType();
4600 for (const User *U : Val->users()) {
4601 const Instruction *UI = cast<Instruction>(U);
4602 if ((IsSExt && !isa<SExtInst>(UI)) || (!IsSExt && !isa<ZExtInst>(UI)))
4604 Type *CurTy = UI->getType();
4605 // Same input and output types: Same instruction after CSE.
4609 // If IsSExt is true, we are in this situation:
4611 // b = sext ty1 a to ty2
4612 // c = sext ty1 a to ty3
4613 // Assuming ty2 is shorter than ty3, this could be turned into:
4615 // b = sext ty1 a to ty2
4616 // c = sext ty2 b to ty3
4617 // However, the last sext is not free.
4621 // This is a ZExt, maybe this is free to extend from one type to another.
4622 // In that case, we would not account for a different use.
4625 if (ExtTy->getScalarType()->getIntegerBitWidth() >
4626 CurTy->getScalarType()->getIntegerBitWidth()) {
4634 if (!TLI.isZExtFree(NarrowTy, LargeTy))
4637 // All uses are the same or can be derived from one another for free.
4641 /// \brief Try to speculatively promote extensions in \p Exts and continue
4642 /// promoting through newly promoted operands recursively as far as doing so is
4643 /// profitable. Save extensions profitably moved up, in \p ProfitablyMovedExts.
4644 /// When some promotion happened, \p TPT contains the proper state to revert
4647 /// \return true if some promotion happened, false otherwise.
4648 bool CodeGenPrepare::tryToPromoteExts(
4649 TypePromotionTransaction &TPT, const SmallVectorImpl<Instruction *> &Exts,
4650 SmallVectorImpl<Instruction *> &ProfitablyMovedExts,
4651 unsigned CreatedInstsCost) {
4652 bool Promoted = false;
4654 // Iterate over all the extensions to try to promote them.
4655 for (auto I : Exts) {
4656 // Early check if we directly have ext(load).
4657 if (isa<LoadInst>(I->getOperand(0))) {
4658 ProfitablyMovedExts.push_back(I);
4662 // Check whether or not we want to do any promotion. The reason we have
4663 // this check inside the for loop is to catch the case where an extension
4664 // is directly fed by a load because in such case the extension can be moved
4665 // up without any promotion on its operands.
4666 if (!TLI || !TLI->enableExtLdPromotion() || DisableExtLdPromotion)
4669 // Get the action to perform the promotion.
4670 TypePromotionHelper::Action TPH =
4671 TypePromotionHelper::getAction(I, InsertedInsts, *TLI, PromotedInsts);
4672 // Check if we can promote.
4674 // Save the current extension as we cannot move up through its operand.
4675 ProfitablyMovedExts.push_back(I);
4679 // Save the current state.
4680 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
4681 TPT.getRestorationPoint();
4682 SmallVector<Instruction *, 4> NewExts;
4683 unsigned NewCreatedInstsCost = 0;
4684 unsigned ExtCost = !TLI->isExtFree(I);
4686 Value *PromotedVal = TPH(I, TPT, PromotedInsts, NewCreatedInstsCost,
4687 &NewExts, nullptr, *TLI);
4688 assert(PromotedVal &&
4689 "TypePromotionHelper should have filtered out those cases");
4691 // We would be able to merge only one extension in a load.
4692 // Therefore, if we have more than 1 new extension we heuristically
4693 // cut this search path, because it means we degrade the code quality.
4694 // With exactly 2, the transformation is neutral, because we will merge
4695 // one extension but leave one. However, we optimistically keep going,
4696 // because the new extension may be removed too.
4697 long long TotalCreatedInstsCost = CreatedInstsCost + NewCreatedInstsCost;
4698 // FIXME: It would be possible to propagate a negative value instead of
4699 // conservatively ceiling it to 0.
4700 TotalCreatedInstsCost =
4701 std::max((long long)0, (TotalCreatedInstsCost - ExtCost));
4702 if (!StressExtLdPromotion &&
4703 (TotalCreatedInstsCost > 1 ||
4704 !isPromotedInstructionLegal(*TLI, *DL, PromotedVal))) {
4705 // This promotion is not profitable, rollback to the previous state, and
4706 // save the current extension in ProfitablyMovedExts as the latest
4707 // speculative promotion turned out to be unprofitable.
4708 TPT.rollback(LastKnownGood);
4709 ProfitablyMovedExts.push_back(I);
4712 // Continue promoting NewExts as far as doing so is profitable.
4713 SmallVector<Instruction *, 2> NewlyMovedExts;
4714 (void)tryToPromoteExts(TPT, NewExts, NewlyMovedExts, TotalCreatedInstsCost);
4715 bool NewPromoted = false;
4716 for (auto ExtInst : NewlyMovedExts) {
4717 Instruction *MovedExt = cast<Instruction>(ExtInst);
4718 Value *ExtOperand = MovedExt->getOperand(0);
4719 // If we have reached to a load, we need this extra profitability check
4720 // as it could potentially be merged into an ext(load).
4721 if (isa<LoadInst>(ExtOperand) &&
4722 !(StressExtLdPromotion || NewCreatedInstsCost <= ExtCost ||
4723 (ExtOperand->hasOneUse() || hasSameExtUse(ExtOperand, *TLI))))
4726 ProfitablyMovedExts.push_back(MovedExt);
4730 // If none of speculative promotions for NewExts is profitable, rollback
4731 // and save the current extension (I) as the last profitable extension.
4733 TPT.rollback(LastKnownGood);
4734 ProfitablyMovedExts.push_back(I);
4737 // The promotion is profitable.
4743 /// Merging redundant sexts when one is dominating the other.
4744 bool CodeGenPrepare::mergeSExts(Function &F) {
4745 DominatorTree DT(F);
4746 bool Changed = false;
4747 for (auto &Entry : ValToSExtendedUses) {
4748 SExts &Insts = Entry.second;
4750 for (Instruction *Inst : Insts) {
4751 if (RemovedInsts.count(Inst) || !isa<SExtInst>(Inst) ||
4752 Inst->getOperand(0) != Entry.first)
4754 bool inserted = false;
4755 for (auto &Pt : CurPts) {
4756 if (DT.dominates(Inst, Pt)) {
4757 Pt->replaceAllUsesWith(Inst);
4758 RemovedInsts.insert(Pt);
4759 Pt->removeFromParent();
4765 if (!DT.dominates(Pt, Inst))
4766 // Give up if we need to merge in a common dominator as the
4767 // expermients show it is not profitable.
4769 Inst->replaceAllUsesWith(Pt);
4770 RemovedInsts.insert(Inst);
4771 Inst->removeFromParent();
4777 CurPts.push_back(Inst);
4783 /// Return true, if an ext(load) can be formed from an extension in
4785 bool CodeGenPrepare::canFormExtLd(
4786 const SmallVectorImpl<Instruction *> &MovedExts, LoadInst *&LI,
4787 Instruction *&Inst, bool HasPromoted) {
4788 for (auto *MovedExtInst : MovedExts) {
4789 if (isa<LoadInst>(MovedExtInst->getOperand(0))) {
4790 LI = cast<LoadInst>(MovedExtInst->getOperand(0));
4791 Inst = MovedExtInst;
4798 // If they're already in the same block, there's nothing to do.
4799 // Make the cheap checks first if we did not promote.
4800 // If we promoted, we need to check if it is indeed profitable.
4801 if (!HasPromoted && LI->getParent() == Inst->getParent())
4804 EVT VT = TLI->getValueType(*DL, Inst->getType());
4805 EVT LoadVT = TLI->getValueType(*DL, LI->getType());
4807 // If the load has other users and the truncate is not free, this probably
4808 // isn't worthwhile.
4809 if (!LI->hasOneUse() && (TLI->isTypeLegal(LoadVT) || !TLI->isTypeLegal(VT)) &&
4810 !TLI->isTruncateFree(Inst->getType(), LI->getType()))
4813 // Check whether the target supports casts folded into loads.
4815 if (isa<ZExtInst>(Inst))
4816 LType = ISD::ZEXTLOAD;
4818 assert(isa<SExtInst>(Inst) && "Unexpected ext type!");
4819 LType = ISD::SEXTLOAD;
4822 return TLI->isLoadExtLegal(LType, VT, LoadVT);
4825 /// Move a zext or sext fed by a load into the same basic block as the load,
4826 /// unless conditions are unfavorable. This allows SelectionDAG to fold the
4827 /// extend into the load.
4831 /// %ld = load i32* %addr
4832 /// %add = add nuw i32 %ld, 4
4833 /// %zext = zext i32 %add to i64
4837 /// %ld = load i32* %addr
4838 /// %zext = zext i32 %ld to i64
4839 /// %add = add nuw i64 %zext, 4
4841 /// Note that the promotion in %add to i64 is done in tryToPromoteExts(), which
4842 /// allow us to match zext(load i32*) to i64.
4844 /// Also, try to promote the computations used to obtain a sign extended
4845 /// value used into memory accesses.
4848 /// a = add nsw i32 b, 3
4849 /// d = sext i32 a to i64
4850 /// e = getelementptr ..., i64 d
4854 /// f = sext i32 b to i64
4855 /// a = add nsw i64 f, 3
4856 /// e = getelementptr ..., i64 a
4859 /// \p Inst[in/out] the extension may be modified during the process if some
4860 /// promotions apply.
4861 bool CodeGenPrepare::optimizeExt(Instruction *&Inst) {
4862 // ExtLoad formation and address type promotion infrastructure requires TLI to
4867 bool AllowPromotionWithoutCommonHeader = false;
4868 /// See if it is an interesting sext operations for the address type
4869 /// promotion before trying to promote it, e.g., the ones with the right
4870 /// type and used in memory accesses.
4871 bool ATPConsiderable = TTI->shouldConsiderAddressTypePromotion(
4872 *Inst, AllowPromotionWithoutCommonHeader);
4873 TypePromotionTransaction TPT(RemovedInsts);
4874 TypePromotionTransaction::ConstRestorationPt LastKnownGood =
4875 TPT.getRestorationPoint();
4876 SmallVector<Instruction *, 1> Exts;
4877 SmallVector<Instruction *, 2> SpeculativelyMovedExts;
4878 Exts.push_back(Inst);
4880 bool HasPromoted = tryToPromoteExts(TPT, Exts, SpeculativelyMovedExts);
4882 // Look for a load being extended.
4883 LoadInst *LI = nullptr;
4884 Instruction *ExtFedByLoad;
4886 // Try to promote a chain of computation if it allows to form an extended
4888 if (canFormExtLd(SpeculativelyMovedExts, LI, ExtFedByLoad, HasPromoted)) {
4889 assert(LI && ExtFedByLoad && "Expect a valid load and extension");
4891 // Move the extend into the same block as the load
4892 ExtFedByLoad->removeFromParent();
4893 ExtFedByLoad->insertAfter(LI);
4894 // CGP does not check if the zext would be speculatively executed when moved
4895 // to the same basic block as the load. Preserving its original location
4896 // would pessimize the debugging experience, as well as negatively impact
4897 // the quality of sample pgo. We don't want to use "line 0" as that has a
4898 // size cost in the line-table section and logically the zext can be seen as
4899 // part of the load. Therefore we conservatively reuse the same debug
4900 // location for the load and the zext.
4901 ExtFedByLoad->setDebugLoc(LI->getDebugLoc());
4903 Inst = ExtFedByLoad;
4907 // Continue promoting SExts if known as considerable depending on targets.
4908 if (ATPConsiderable &&
4909 performAddressTypePromotion(Inst, AllowPromotionWithoutCommonHeader,
4910 HasPromoted, TPT, SpeculativelyMovedExts))
4913 TPT.rollback(LastKnownGood);
4917 // Perform address type promotion if doing so is profitable.
4918 // If AllowPromotionWithoutCommonHeader == false, we should find other sext
4919 // instructions that sign extended the same initial value. However, if
4920 // AllowPromotionWithoutCommonHeader == true, we expect promoting the
4921 // extension is just profitable.
4922 bool CodeGenPrepare::performAddressTypePromotion(
4923 Instruction *&Inst, bool AllowPromotionWithoutCommonHeader,
4924 bool HasPromoted, TypePromotionTransaction &TPT,
4925 SmallVectorImpl<Instruction *> &SpeculativelyMovedExts) {
4926 bool Promoted = false;
4927 SmallPtrSet<Instruction *, 1> UnhandledExts;
4928 bool AllSeenFirst = true;
4929 for (auto I : SpeculativelyMovedExts) {
4930 Value *HeadOfChain = I->getOperand(0);
4931 DenseMap<Value *, Instruction *>::iterator AlreadySeen =
4932 SeenChainsForSExt.find(HeadOfChain);
4933 // If there is an unhandled SExt which has the same header, try to promote
4935 if (AlreadySeen != SeenChainsForSExt.end()) {
4936 if (AlreadySeen->second != nullptr)
4937 UnhandledExts.insert(AlreadySeen->second);
4938 AllSeenFirst = false;
4942 if (!AllSeenFirst || (AllowPromotionWithoutCommonHeader &&
4943 SpeculativelyMovedExts.size() == 1)) {
4947 for (auto I : SpeculativelyMovedExts) {
4948 Value *HeadOfChain = I->getOperand(0);
4949 SeenChainsForSExt[HeadOfChain] = nullptr;
4950 ValToSExtendedUses[HeadOfChain].push_back(I);
4952 // Update Inst as promotion happen.
4953 Inst = SpeculativelyMovedExts.pop_back_val();
4955 // This is the first chain visited from the header, keep the current chain
4956 // as unhandled. Defer to promote this until we encounter another SExt
4957 // chain derived from the same header.
4958 for (auto I : SpeculativelyMovedExts) {
4959 Value *HeadOfChain = I->getOperand(0);
4960 SeenChainsForSExt[HeadOfChain] = Inst;
4965 if (!AllSeenFirst && !UnhandledExts.empty())
4966 for (auto VisitedSExt : UnhandledExts) {
4967 if (RemovedInsts.count(VisitedSExt))
4969 TypePromotionTransaction TPT(RemovedInsts);
4970 SmallVector<Instruction *, 1> Exts;
4971 SmallVector<Instruction *, 2> Chains;
4972 Exts.push_back(VisitedSExt);
4973 bool HasPromoted = tryToPromoteExts(TPT, Exts, Chains);
4977 for (auto I : Chains) {
4978 Value *HeadOfChain = I->getOperand(0);
4979 // Mark this as handled.
4980 SeenChainsForSExt[HeadOfChain] = nullptr;
4981 ValToSExtendedUses[HeadOfChain].push_back(I);
4987 bool CodeGenPrepare::optimizeExtUses(Instruction *I) {
4988 BasicBlock *DefBB = I->getParent();
4990 // If the result of a {s|z}ext and its source are both live out, rewrite all
4991 // other uses of the source with result of extension.
4992 Value *Src = I->getOperand(0);
4993 if (Src->hasOneUse())
4996 // Only do this xform if truncating is free.
4997 if (TLI && !TLI->isTruncateFree(I->getType(), Src->getType()))
5000 // Only safe to perform the optimization if the source is also defined in
5002 if (!isa<Instruction>(Src) || DefBB != cast<Instruction>(Src)->getParent())
5005 bool DefIsLiveOut = false;
5006 for (User *U : I->users()) {
5007 Instruction *UI = cast<Instruction>(U);
5009 // Figure out which BB this ext is used in.
5010 BasicBlock *UserBB = UI->getParent();
5011 if (UserBB == DefBB) continue;
5012 DefIsLiveOut = true;
5018 // Make sure none of the uses are PHI nodes.
5019 for (User *U : Src->users()) {
5020 Instruction *UI = cast<Instruction>(U);
5021 BasicBlock *UserBB = UI->getParent();
5022 if (UserBB == DefBB) continue;
5023 // Be conservative. We don't want this xform to end up introducing
5024 // reloads just before load / store instructions.
5025 if (isa<PHINode>(UI) || isa<LoadInst>(UI) || isa<StoreInst>(UI))
5029 // InsertedTruncs - Only insert one trunc in each block once.
5030 DenseMap<BasicBlock*, Instruction*> InsertedTruncs;
5032 bool MadeChange = false;
5033 for (Use &U : Src->uses()) {
5034 Instruction *User = cast<Instruction>(U.getUser());
5036 // Figure out which BB this ext is used in.
5037 BasicBlock *UserBB = User->getParent();
5038 if (UserBB == DefBB) continue;
5040 // Both src and def are live in this block. Rewrite the use.
5041 Instruction *&InsertedTrunc = InsertedTruncs[UserBB];
5043 if (!InsertedTrunc) {
5044 BasicBlock::iterator InsertPt = UserBB->getFirstInsertionPt();
5045 assert(InsertPt != UserBB->end());
5046 InsertedTrunc = new TruncInst(I, Src->getType(), "", &*InsertPt);
5047 InsertedInsts.insert(InsertedTrunc);
5050 // Replace a use of the {s|z}ext source with a use of the result.
5059 // Find loads whose uses only use some of the loaded value's bits. Add an "and"
5060 // just after the load if the target can fold this into one extload instruction,
5061 // with the hope of eliminating some of the other later "and" instructions using
5062 // the loaded value. "and"s that are made trivially redundant by the insertion
5063 // of the new "and" are removed by this function, while others (e.g. those whose
5064 // path from the load goes through a phi) are left for isel to potentially
5097 // becomes (after a call to optimizeLoadExt for each load):
5101 // x1' = and x1, 0xff
5105 // x2' = and x2, 0xff
5112 bool CodeGenPrepare::optimizeLoadExt(LoadInst *Load) {
5114 if (!Load->isSimple() ||
5115 !(Load->getType()->isIntegerTy() || Load->getType()->isPointerTy()))
5118 // Skip loads we've already transformed.
5119 if (Load->hasOneUse() &&
5120 InsertedInsts.count(cast<Instruction>(*Load->user_begin())))
5123 // Look at all uses of Load, looking through phis, to determine how many bits
5124 // of the loaded value are needed.
5125 SmallVector<Instruction *, 8> WorkList;
5126 SmallPtrSet<Instruction *, 16> Visited;
5127 SmallVector<Instruction *, 8> AndsToMaybeRemove;
5128 for (auto *U : Load->users())
5129 WorkList.push_back(cast<Instruction>(U));
5131 EVT LoadResultVT = TLI->getValueType(*DL, Load->getType());
5132 unsigned BitWidth = LoadResultVT.getSizeInBits();
5133 APInt DemandBits(BitWidth, 0);
5134 APInt WidestAndBits(BitWidth, 0);
5136 while (!WorkList.empty()) {
5137 Instruction *I = WorkList.back();
5138 WorkList.pop_back();
5140 // Break use-def graph loops.
5141 if (!Visited.insert(I).second)
5144 // For a PHI node, push all of its users.
5145 if (auto *Phi = dyn_cast<PHINode>(I)) {
5146 for (auto *U : Phi->users())
5147 WorkList.push_back(cast<Instruction>(U));
5151 switch (I->getOpcode()) {
5152 case llvm::Instruction::And: {
5153 auto *AndC = dyn_cast<ConstantInt>(I->getOperand(1));
5156 APInt AndBits = AndC->getValue();
5157 DemandBits |= AndBits;
5158 // Keep track of the widest and mask we see.
5159 if (AndBits.ugt(WidestAndBits))
5160 WidestAndBits = AndBits;
5161 if (AndBits == WidestAndBits && I->getOperand(0) == Load)
5162 AndsToMaybeRemove.push_back(I);
5166 case llvm::Instruction::Shl: {
5167 auto *ShlC = dyn_cast<ConstantInt>(I->getOperand(1));
5170 uint64_t ShiftAmt = ShlC->getLimitedValue(BitWidth - 1);
5171 DemandBits.setLowBits(BitWidth - ShiftAmt);
5175 case llvm::Instruction::Trunc: {
5176 EVT TruncVT = TLI->getValueType(*DL, I->getType());
5177 unsigned TruncBitWidth = TruncVT.getSizeInBits();
5178 DemandBits.setLowBits(TruncBitWidth);
5187 uint32_t ActiveBits = DemandBits.getActiveBits();
5188 // Avoid hoisting (and (load x) 1) since it is unlikely to be folded by the
5189 // target even if isLoadExtLegal says an i1 EXTLOAD is valid. For example,
5190 // for the AArch64 target isLoadExtLegal(ZEXTLOAD, i32, i1) returns true, but
5191 // (and (load x) 1) is not matched as a single instruction, rather as a LDR
5192 // followed by an AND.
5193 // TODO: Look into removing this restriction by fixing backends to either
5194 // return false for isLoadExtLegal for i1 or have them select this pattern to
5195 // a single instruction.
5197 // Also avoid hoisting if we didn't see any ands with the exact DemandBits
5198 // mask, since these are the only ands that will be removed by isel.
5199 if (ActiveBits <= 1 || !DemandBits.isMask(ActiveBits) ||
5200 WidestAndBits != DemandBits)
5203 LLVMContext &Ctx = Load->getType()->getContext();
5204 Type *TruncTy = Type::getIntNTy(Ctx, ActiveBits);
5205 EVT TruncVT = TLI->getValueType(*DL, TruncTy);
5207 // Reject cases that won't be matched as extloads.
5208 if (!LoadResultVT.bitsGT(TruncVT) || !TruncVT.isRound() ||
5209 !TLI->isLoadExtLegal(ISD::ZEXTLOAD, LoadResultVT, TruncVT))
5212 IRBuilder<> Builder(Load->getNextNode());
5213 auto *NewAnd = dyn_cast<Instruction>(
5214 Builder.CreateAnd(Load, ConstantInt::get(Ctx, DemandBits)));
5215 // Mark this instruction as "inserted by CGP", so that other
5216 // optimizations don't touch it.
5217 InsertedInsts.insert(NewAnd);
5219 // Replace all uses of load with new and (except for the use of load in the
5221 Load->replaceAllUsesWith(NewAnd);
5222 NewAnd->setOperand(0, Load);
5224 // Remove any and instructions that are now redundant.
5225 for (auto *And : AndsToMaybeRemove)
5226 // Check that the and mask is the same as the one we decided to put on the
5228 if (cast<ConstantInt>(And->getOperand(1))->getValue() == DemandBits) {
5229 And->replaceAllUsesWith(NewAnd);
5230 if (&*CurInstIterator == And)
5231 CurInstIterator = std::next(And->getIterator());
5232 And->eraseFromParent();
5240 /// Check if V (an operand of a select instruction) is an expensive instruction
5241 /// that is only used once.
5242 static bool sinkSelectOperand(const TargetTransformInfo *TTI, Value *V) {
5243 auto *I = dyn_cast<Instruction>(V);
5244 // If it's safe to speculatively execute, then it should not have side
5245 // effects; therefore, it's safe to sink and possibly *not* execute.
5246 return I && I->hasOneUse() && isSafeToSpeculativelyExecute(I) &&
5247 TTI->getUserCost(I) >= TargetTransformInfo::TCC_Expensive;
5250 /// Returns true if a SelectInst should be turned into an explicit branch.
5251 static bool isFormingBranchFromSelectProfitable(const TargetTransformInfo *TTI,
5252 const TargetLowering *TLI,
5254 // If even a predictable select is cheap, then a branch can't be cheaper.
5255 if (!TLI->isPredictableSelectExpensive())
5258 // FIXME: This should use the same heuristics as IfConversion to determine
5259 // whether a select is better represented as a branch.
5261 // If metadata tells us that the select condition is obviously predictable,
5262 // then we want to replace the select with a branch.
5263 uint64_t TrueWeight, FalseWeight;
5264 if (SI->extractProfMetadata(TrueWeight, FalseWeight)) {
5265 uint64_t Max = std::max(TrueWeight, FalseWeight);
5266 uint64_t Sum = TrueWeight + FalseWeight;
5268 auto Probability = BranchProbability::getBranchProbability(Max, Sum);
5269 if (Probability > TLI->getPredictableBranchThreshold())
5274 CmpInst *Cmp = dyn_cast<CmpInst>(SI->getCondition());
5276 // If a branch is predictable, an out-of-order CPU can avoid blocking on its
5277 // comparison condition. If the compare has more than one use, there's
5278 // probably another cmov or setcc around, so it's not worth emitting a branch.
5279 if (!Cmp || !Cmp->hasOneUse())
5282 // If either operand of the select is expensive and only needed on one side
5283 // of the select, we should form a branch.
5284 if (sinkSelectOperand(TTI, SI->getTrueValue()) ||
5285 sinkSelectOperand(TTI, SI->getFalseValue()))
5291 /// If \p isTrue is true, return the true value of \p SI, otherwise return
5292 /// false value of \p SI. If the true/false value of \p SI is defined by any
5293 /// select instructions in \p Selects, look through the defining select
5294 /// instruction until the true/false value is not defined in \p Selects.
5295 static Value *getTrueOrFalseValue(
5296 SelectInst *SI, bool isTrue,
5297 const SmallPtrSet<const Instruction *, 2> &Selects) {
5300 for (SelectInst *DefSI = SI; DefSI != nullptr && Selects.count(DefSI);
5301 DefSI = dyn_cast<SelectInst>(V)) {
5302 assert(DefSI->getCondition() == SI->getCondition() &&
5303 "The condition of DefSI does not match with SI");
5304 V = (isTrue ? DefSI->getTrueValue() : DefSI->getFalseValue());
5309 /// If we have a SelectInst that will likely profit from branch prediction,
5310 /// turn it into a branch.
5311 bool CodeGenPrepare::optimizeSelectInst(SelectInst *SI) {
5312 // Find all consecutive select instructions that share the same condition.
5313 SmallVector<SelectInst *, 2> ASI;
5315 for (BasicBlock::iterator It = ++BasicBlock::iterator(SI);
5316 It != SI->getParent()->end(); ++It) {
5317 SelectInst *I = dyn_cast<SelectInst>(&*It);
5318 if (I && SI->getCondition() == I->getCondition()) {
5325 SelectInst *LastSI = ASI.back();
5326 // Increment the current iterator to skip all the rest of select instructions
5327 // because they will be either "not lowered" or "all lowered" to branch.
5328 CurInstIterator = std::next(LastSI->getIterator());
5330 bool VectorCond = !SI->getCondition()->getType()->isIntegerTy(1);
5332 // Can we convert the 'select' to CF ?
5333 if (DisableSelectToBranch || OptSize || !TLI || VectorCond ||
5334 SI->getMetadata(LLVMContext::MD_unpredictable))
5337 TargetLowering::SelectSupportKind SelectKind;
5339 SelectKind = TargetLowering::VectorMaskSelect;
5340 else if (SI->getType()->isVectorTy())
5341 SelectKind = TargetLowering::ScalarCondVectorVal;
5343 SelectKind = TargetLowering::ScalarValSelect;
5345 if (TLI->isSelectSupported(SelectKind) &&
5346 !isFormingBranchFromSelectProfitable(TTI, TLI, SI))
5351 // Transform a sequence like this:
5353 // %cmp = cmp uge i32 %a, %b
5354 // %sel = select i1 %cmp, i32 %c, i32 %d
5358 // %cmp = cmp uge i32 %a, %b
5359 // br i1 %cmp, label %select.true, label %select.false
5361 // br label %select.end
5363 // br label %select.end
5365 // %sel = phi i32 [ %c, %select.true ], [ %d, %select.false ]
5367 // In addition, we may sink instructions that produce %c or %d from
5368 // the entry block into the destination(s) of the new branch.
5369 // If the true or false blocks do not contain a sunken instruction, that
5370 // block and its branch may be optimized away. In that case, one side of the
5371 // first branch will point directly to select.end, and the corresponding PHI
5372 // predecessor block will be the start block.
5374 // First, we split the block containing the select into 2 blocks.
5375 BasicBlock *StartBlock = SI->getParent();
5376 BasicBlock::iterator SplitPt = ++(BasicBlock::iterator(LastSI));
5377 BasicBlock *EndBlock = StartBlock->splitBasicBlock(SplitPt, "select.end");
5379 // Delete the unconditional branch that was just created by the split.
5380 StartBlock->getTerminator()->eraseFromParent();
5382 // These are the new basic blocks for the conditional branch.
5383 // At least one will become an actual new basic block.
5384 BasicBlock *TrueBlock = nullptr;
5385 BasicBlock *FalseBlock = nullptr;
5386 BranchInst *TrueBranch = nullptr;
5387 BranchInst *FalseBranch = nullptr;
5389 // Sink expensive instructions into the conditional blocks to avoid executing
5390 // them speculatively.
5391 for (SelectInst *SI : ASI) {
5392 if (sinkSelectOperand(TTI, SI->getTrueValue())) {
5393 if (TrueBlock == nullptr) {
5394 TrueBlock = BasicBlock::Create(SI->getContext(), "select.true.sink",
5395 EndBlock->getParent(), EndBlock);
5396 TrueBranch = BranchInst::Create(EndBlock, TrueBlock);
5398 auto *TrueInst = cast<Instruction>(SI->getTrueValue());
5399 TrueInst->moveBefore(TrueBranch);
5401 if (sinkSelectOperand(TTI, SI->getFalseValue())) {
5402 if (FalseBlock == nullptr) {
5403 FalseBlock = BasicBlock::Create(SI->getContext(), "select.false.sink",
5404 EndBlock->getParent(), EndBlock);
5405 FalseBranch = BranchInst::Create(EndBlock, FalseBlock);
5407 auto *FalseInst = cast<Instruction>(SI->getFalseValue());
5408 FalseInst->moveBefore(FalseBranch);
5412 // If there was nothing to sink, then arbitrarily choose the 'false' side
5413 // for a new input value to the PHI.
5414 if (TrueBlock == FalseBlock) {
5415 assert(TrueBlock == nullptr &&
5416 "Unexpected basic block transform while optimizing select");
5418 FalseBlock = BasicBlock::Create(SI->getContext(), "select.false",
5419 EndBlock->getParent(), EndBlock);
5420 BranchInst::Create(EndBlock, FalseBlock);
5423 // Insert the real conditional branch based on the original condition.
5424 // If we did not create a new block for one of the 'true' or 'false' paths
5425 // of the condition, it means that side of the branch goes to the end block
5426 // directly and the path originates from the start block from the point of
5427 // view of the new PHI.
5428 BasicBlock *TT, *FT;
5429 if (TrueBlock == nullptr) {
5432 TrueBlock = StartBlock;
5433 } else if (FalseBlock == nullptr) {
5436 FalseBlock = StartBlock;
5441 IRBuilder<>(SI).CreateCondBr(SI->getCondition(), TT, FT, SI);
5443 SmallPtrSet<const Instruction *, 2> INS;
5444 INS.insert(ASI.begin(), ASI.end());
5445 // Use reverse iterator because later select may use the value of the
5446 // earlier select, and we need to propagate value through earlier select
5447 // to get the PHI operand.
5448 for (auto It = ASI.rbegin(); It != ASI.rend(); ++It) {
5449 SelectInst *SI = *It;
5450 // The select itself is replaced with a PHI Node.
5451 PHINode *PN = PHINode::Create(SI->getType(), 2, "", &EndBlock->front());
5453 PN->addIncoming(getTrueOrFalseValue(SI, true, INS), TrueBlock);
5454 PN->addIncoming(getTrueOrFalseValue(SI, false, INS), FalseBlock);
5456 SI->replaceAllUsesWith(PN);
5457 SI->eraseFromParent();
5459 ++NumSelectsExpanded;
5462 // Instruct OptimizeBlock to skip to the next block.
5463 CurInstIterator = StartBlock->end();
5467 static bool isBroadcastShuffle(ShuffleVectorInst *SVI) {
5468 SmallVector<int, 16> Mask(SVI->getShuffleMask());
5470 for (unsigned i = 0; i < Mask.size(); ++i) {
5471 if (SplatElem != -1 && Mask[i] != -1 && Mask[i] != SplatElem)
5473 SplatElem = Mask[i];
5479 /// Some targets have expensive vector shifts if the lanes aren't all the same
5480 /// (e.g. x86 only introduced "vpsllvd" and friends with AVX2). In these cases
5481 /// it's often worth sinking a shufflevector splat down to its use so that
5482 /// codegen can spot all lanes are identical.
5483 bool CodeGenPrepare::optimizeShuffleVectorInst(ShuffleVectorInst *SVI) {
5484 BasicBlock *DefBB = SVI->getParent();
5486 // Only do this xform if variable vector shifts are particularly expensive.
5487 if (!TLI || !TLI->isVectorShiftByScalarCheap(SVI->getType()))
5490 // We only expect better codegen by sinking a shuffle if we can recognise a
5492 if (!isBroadcastShuffle(SVI))
5495 // InsertedShuffles - Only insert a shuffle in each block once.
5496 DenseMap<BasicBlock*, Instruction*> InsertedShuffles;
5498 bool MadeChange = false;
5499 for (User *U : SVI->users()) {
5500 Instruction *UI = cast<Instruction>(U);
5502 // Figure out which BB this ext is used in.
5503 BasicBlock *UserBB = UI->getParent();
5504 if (UserBB == DefBB) continue;
5506 // For now only apply this when the splat is used by a shift instruction.
5507 if (!UI->isShift()) continue;
5509 // Everything checks out, sink the shuffle if the user's block doesn't
5510 // already have a copy.
5511 Instruction *&InsertedShuffle = InsertedShuffles[UserBB];
5513 if (!InsertedShuffle) {
5514 BasicBlock::iterator InsertPt = UserBB->getFirstInsertionPt();
5515 assert(InsertPt != UserBB->end());
5517 new ShuffleVectorInst(SVI->getOperand(0), SVI->getOperand(1),
5518 SVI->getOperand(2), "", &*InsertPt);
5521 UI->replaceUsesOfWith(SVI, InsertedShuffle);
5525 // If we removed all uses, nuke the shuffle.
5526 if (SVI->use_empty()) {
5527 SVI->eraseFromParent();
5534 bool CodeGenPrepare::optimizeSwitchInst(SwitchInst *SI) {
5538 Value *Cond = SI->getCondition();
5539 Type *OldType = Cond->getType();
5540 LLVMContext &Context = Cond->getContext();
5541 MVT RegType = TLI->getRegisterType(Context, TLI->getValueType(*DL, OldType));
5542 unsigned RegWidth = RegType.getSizeInBits();
5544 if (RegWidth <= cast<IntegerType>(OldType)->getBitWidth())
5547 // If the register width is greater than the type width, expand the condition
5548 // of the switch instruction and each case constant to the width of the
5549 // register. By widening the type of the switch condition, subsequent
5550 // comparisons (for case comparisons) will not need to be extended to the
5551 // preferred register width, so we will potentially eliminate N-1 extends,
5552 // where N is the number of cases in the switch.
5553 auto *NewType = Type::getIntNTy(Context, RegWidth);
5555 // Zero-extend the switch condition and case constants unless the switch
5556 // condition is a function argument that is already being sign-extended.
5557 // In that case, we can avoid an unnecessary mask/extension by sign-extending
5558 // everything instead.
5559 Instruction::CastOps ExtType = Instruction::ZExt;
5560 if (auto *Arg = dyn_cast<Argument>(Cond))
5561 if (Arg->hasSExtAttr())
5562 ExtType = Instruction::SExt;
5564 auto *ExtInst = CastInst::Create(ExtType, Cond, NewType);
5565 ExtInst->insertBefore(SI);
5566 SI->setCondition(ExtInst);
5567 for (auto Case : SI->cases()) {
5568 APInt NarrowConst = Case.getCaseValue()->getValue();
5569 APInt WideConst = (ExtType == Instruction::ZExt) ?
5570 NarrowConst.zext(RegWidth) : NarrowConst.sext(RegWidth);
5571 Case.setValue(ConstantInt::get(Context, WideConst));
5579 /// \brief Helper class to promote a scalar operation to a vector one.
5580 /// This class is used to move downward extractelement transition.
5582 /// a = vector_op <2 x i32>
5583 /// b = extractelement <2 x i32> a, i32 0
5588 /// a = vector_op <2 x i32>
5589 /// c = vector_op a (equivalent to scalar_op on the related lane)
5590 /// * d = extractelement <2 x i32> c, i32 0
5592 /// Assuming both extractelement and store can be combine, we get rid of the
5594 class VectorPromoteHelper {
5595 /// DataLayout associated with the current module.
5596 const DataLayout &DL;
5598 /// Used to perform some checks on the legality of vector operations.
5599 const TargetLowering &TLI;
5601 /// Used to estimated the cost of the promoted chain.
5602 const TargetTransformInfo &TTI;
5604 /// The transition being moved downwards.
5605 Instruction *Transition;
5606 /// The sequence of instructions to be promoted.
5607 SmallVector<Instruction *, 4> InstsToBePromoted;
5608 /// Cost of combining a store and an extract.
5609 unsigned StoreExtractCombineCost;
5610 /// Instruction that will be combined with the transition.
5611 Instruction *CombineInst;
5613 /// \brief The instruction that represents the current end of the transition.
5614 /// Since we are faking the promotion until we reach the end of the chain
5615 /// of computation, we need a way to get the current end of the transition.
5616 Instruction *getEndOfTransition() const {
5617 if (InstsToBePromoted.empty())
5619 return InstsToBePromoted.back();
5622 /// \brief Return the index of the original value in the transition.
5623 /// E.g., for "extractelement <2 x i32> c, i32 1" the original value,
5624 /// c, is at index 0.
5625 unsigned getTransitionOriginalValueIdx() const {
5626 assert(isa<ExtractElementInst>(Transition) &&
5627 "Other kind of transitions are not supported yet");
5631 /// \brief Return the index of the index in the transition.
5632 /// E.g., for "extractelement <2 x i32> c, i32 0" the index
5634 unsigned getTransitionIdx() const {
5635 assert(isa<ExtractElementInst>(Transition) &&
5636 "Other kind of transitions are not supported yet");
5640 /// \brief Get the type of the transition.
5641 /// This is the type of the original value.
5642 /// E.g., for "extractelement <2 x i32> c, i32 1" the type of the
5643 /// transition is <2 x i32>.
5644 Type *getTransitionType() const {
5645 return Transition->getOperand(getTransitionOriginalValueIdx())->getType();
5648 /// \brief Promote \p ToBePromoted by moving \p Def downward through.
5649 /// I.e., we have the following sequence:
5650 /// Def = Transition <ty1> a to <ty2>
5651 /// b = ToBePromoted <ty2> Def, ...
5653 /// b = ToBePromoted <ty1> a, ...
5654 /// Def = Transition <ty1> ToBePromoted to <ty2>
5655 void promoteImpl(Instruction *ToBePromoted);
5657 /// \brief Check whether or not it is profitable to promote all the
5658 /// instructions enqueued to be promoted.
5659 bool isProfitableToPromote() {
5660 Value *ValIdx = Transition->getOperand(getTransitionOriginalValueIdx());
5661 unsigned Index = isa<ConstantInt>(ValIdx)
5662 ? cast<ConstantInt>(ValIdx)->getZExtValue()
5664 Type *PromotedType = getTransitionType();
5666 StoreInst *ST = cast<StoreInst>(CombineInst);
5667 unsigned AS = ST->getPointerAddressSpace();
5668 unsigned Align = ST->getAlignment();
5669 // Check if this store is supported.
5670 if (!TLI.allowsMisalignedMemoryAccesses(
5671 TLI.getValueType(DL, ST->getValueOperand()->getType()), AS,
5673 // If this is not supported, there is no way we can combine
5674 // the extract with the store.
5678 // The scalar chain of computation has to pay for the transition
5679 // scalar to vector.
5680 // The vector chain has to account for the combining cost.
5681 uint64_t ScalarCost =
5682 TTI.getVectorInstrCost(Transition->getOpcode(), PromotedType, Index);
5683 uint64_t VectorCost = StoreExtractCombineCost;
5684 for (const auto &Inst : InstsToBePromoted) {
5685 // Compute the cost.
5686 // By construction, all instructions being promoted are arithmetic ones.
5687 // Moreover, one argument is a constant that can be viewed as a splat
5689 Value *Arg0 = Inst->getOperand(0);
5690 bool IsArg0Constant = isa<UndefValue>(Arg0) || isa<ConstantInt>(Arg0) ||
5691 isa<ConstantFP>(Arg0);
5692 TargetTransformInfo::OperandValueKind Arg0OVK =
5693 IsArg0Constant ? TargetTransformInfo::OK_UniformConstantValue
5694 : TargetTransformInfo::OK_AnyValue;
5695 TargetTransformInfo::OperandValueKind Arg1OVK =
5696 !IsArg0Constant ? TargetTransformInfo::OK_UniformConstantValue
5697 : TargetTransformInfo::OK_AnyValue;
5698 ScalarCost += TTI.getArithmeticInstrCost(
5699 Inst->getOpcode(), Inst->getType(), Arg0OVK, Arg1OVK);
5700 VectorCost += TTI.getArithmeticInstrCost(Inst->getOpcode(), PromotedType,
5703 DEBUG(dbgs() << "Estimated cost of computation to be promoted:\nScalar: "
5704 << ScalarCost << "\nVector: " << VectorCost << '\n');
5705 return ScalarCost > VectorCost;
5708 /// \brief Generate a constant vector with \p Val with the same
5709 /// number of elements as the transition.
5710 /// \p UseSplat defines whether or not \p Val should be replicated
5711 /// across the whole vector.
5712 /// In other words, if UseSplat == true, we generate <Val, Val, ..., Val>,
5713 /// otherwise we generate a vector with as many undef as possible:
5714 /// <undef, ..., undef, Val, undef, ..., undef> where \p Val is only
5715 /// used at the index of the extract.
5716 Value *getConstantVector(Constant *Val, bool UseSplat) const {
5717 unsigned ExtractIdx = UINT_MAX;
5719 // If we cannot determine where the constant must be, we have to
5720 // use a splat constant.
5721 Value *ValExtractIdx = Transition->getOperand(getTransitionIdx());
5722 if (ConstantInt *CstVal = dyn_cast<ConstantInt>(ValExtractIdx))
5723 ExtractIdx = CstVal->getSExtValue();
5728 unsigned End = getTransitionType()->getVectorNumElements();
5730 return ConstantVector::getSplat(End, Val);
5732 SmallVector<Constant *, 4> ConstVec;
5733 UndefValue *UndefVal = UndefValue::get(Val->getType());
5734 for (unsigned Idx = 0; Idx != End; ++Idx) {
5735 if (Idx == ExtractIdx)
5736 ConstVec.push_back(Val);
5738 ConstVec.push_back(UndefVal);
5740 return ConstantVector::get(ConstVec);
5743 /// \brief Check if promoting to a vector type an operand at \p OperandIdx
5744 /// in \p Use can trigger undefined behavior.
5745 static bool canCauseUndefinedBehavior(const Instruction *Use,
5746 unsigned OperandIdx) {
5747 // This is not safe to introduce undef when the operand is on
5748 // the right hand side of a division-like instruction.
5749 if (OperandIdx != 1)
5751 switch (Use->getOpcode()) {
5754 case Instruction::SDiv:
5755 case Instruction::UDiv:
5756 case Instruction::SRem:
5757 case Instruction::URem:
5759 case Instruction::FDiv:
5760 case Instruction::FRem:
5761 return !Use->hasNoNaNs();
5763 llvm_unreachable(nullptr);
5767 VectorPromoteHelper(const DataLayout &DL, const TargetLowering &TLI,
5768 const TargetTransformInfo &TTI, Instruction *Transition,
5769 unsigned CombineCost)
5770 : DL(DL), TLI(TLI), TTI(TTI), Transition(Transition),
5771 StoreExtractCombineCost(CombineCost), CombineInst(nullptr) {
5772 assert(Transition && "Do not know how to promote null");
5775 /// \brief Check if we can promote \p ToBePromoted to \p Type.
5776 bool canPromote(const Instruction *ToBePromoted) const {
5777 // We could support CastInst too.
5778 return isa<BinaryOperator>(ToBePromoted);
5781 /// \brief Check if it is profitable to promote \p ToBePromoted
5782 /// by moving downward the transition through.
5783 bool shouldPromote(const Instruction *ToBePromoted) const {
5784 // Promote only if all the operands can be statically expanded.
5785 // Indeed, we do not want to introduce any new kind of transitions.
5786 for (const Use &U : ToBePromoted->operands()) {
5787 const Value *Val = U.get();
5788 if (Val == getEndOfTransition()) {
5789 // If the use is a division and the transition is on the rhs,
5790 // we cannot promote the operation, otherwise we may create a
5791 // division by zero.
5792 if (canCauseUndefinedBehavior(ToBePromoted, U.getOperandNo()))
5796 if (!isa<ConstantInt>(Val) && !isa<UndefValue>(Val) &&
5797 !isa<ConstantFP>(Val))
5800 // Check that the resulting operation is legal.
5801 int ISDOpcode = TLI.InstructionOpcodeToISD(ToBePromoted->getOpcode());
5804 return StressStoreExtract ||
5805 TLI.isOperationLegalOrCustom(
5806 ISDOpcode, TLI.getValueType(DL, getTransitionType(), true));
5809 /// \brief Check whether or not \p Use can be combined
5810 /// with the transition.
5811 /// I.e., is it possible to do Use(Transition) => AnotherUse?
5812 bool canCombine(const Instruction *Use) { return isa<StoreInst>(Use); }
5814 /// \brief Record \p ToBePromoted as part of the chain to be promoted.
5815 void enqueueForPromotion(Instruction *ToBePromoted) {
5816 InstsToBePromoted.push_back(ToBePromoted);
5819 /// \brief Set the instruction that will be combined with the transition.
5820 void recordCombineInstruction(Instruction *ToBeCombined) {
5821 assert(canCombine(ToBeCombined) && "Unsupported instruction to combine");
5822 CombineInst = ToBeCombined;
5825 /// \brief Promote all the instructions enqueued for promotion if it is
5827 /// \return True if the promotion happened, false otherwise.
5829 // Check if there is something to promote.
5830 // Right now, if we do not have anything to combine with,
5831 // we assume the promotion is not profitable.
5832 if (InstsToBePromoted.empty() || !CombineInst)
5836 if (!StressStoreExtract && !isProfitableToPromote())
5840 for (auto &ToBePromoted : InstsToBePromoted)
5841 promoteImpl(ToBePromoted);
5842 InstsToBePromoted.clear();
5846 } // End of anonymous namespace.
5848 void VectorPromoteHelper::promoteImpl(Instruction *ToBePromoted) {
5849 // At this point, we know that all the operands of ToBePromoted but Def
5850 // can be statically promoted.
5851 // For Def, we need to use its parameter in ToBePromoted:
5852 // b = ToBePromoted ty1 a
5853 // Def = Transition ty1 b to ty2
5854 // Move the transition down.
5855 // 1. Replace all uses of the promoted operation by the transition.
5856 // = ... b => = ... Def.
5857 assert(ToBePromoted->getType() == Transition->getType() &&
5858 "The type of the result of the transition does not match "
5860 ToBePromoted->replaceAllUsesWith(Transition);
5861 // 2. Update the type of the uses.
5862 // b = ToBePromoted ty2 Def => b = ToBePromoted ty1 Def.
5863 Type *TransitionTy = getTransitionType();
5864 ToBePromoted->mutateType(TransitionTy);
5865 // 3. Update all the operands of the promoted operation with promoted
5867 // b = ToBePromoted ty1 Def => b = ToBePromoted ty1 a.
5868 for (Use &U : ToBePromoted->operands()) {
5869 Value *Val = U.get();
5870 Value *NewVal = nullptr;
5871 if (Val == Transition)
5872 NewVal = Transition->getOperand(getTransitionOriginalValueIdx());
5873 else if (isa<UndefValue>(Val) || isa<ConstantInt>(Val) ||
5874 isa<ConstantFP>(Val)) {
5875 // Use a splat constant if it is not safe to use undef.
5876 NewVal = getConstantVector(
5877 cast<Constant>(Val),
5878 isa<UndefValue>(Val) ||
5879 canCauseUndefinedBehavior(ToBePromoted, U.getOperandNo()));
5881 llvm_unreachable("Did you modified shouldPromote and forgot to update "
5883 ToBePromoted->setOperand(U.getOperandNo(), NewVal);
5885 Transition->removeFromParent();
5886 Transition->insertAfter(ToBePromoted);
5887 Transition->setOperand(getTransitionOriginalValueIdx(), ToBePromoted);
5890 /// Some targets can do store(extractelement) with one instruction.
5891 /// Try to push the extractelement towards the stores when the target
5892 /// has this feature and this is profitable.
5893 bool CodeGenPrepare::optimizeExtractElementInst(Instruction *Inst) {
5894 unsigned CombineCost = UINT_MAX;
5895 if (DisableStoreExtract || !TLI ||
5896 (!StressStoreExtract &&
5897 !TLI->canCombineStoreAndExtract(Inst->getOperand(0)->getType(),
5898 Inst->getOperand(1), CombineCost)))
5901 // At this point we know that Inst is a vector to scalar transition.
5902 // Try to move it down the def-use chain, until:
5903 // - We can combine the transition with its single use
5904 // => we got rid of the transition.
5905 // - We escape the current basic block
5906 // => we would need to check that we are moving it at a cheaper place and
5907 // we do not do that for now.
5908 BasicBlock *Parent = Inst->getParent();
5909 DEBUG(dbgs() << "Found an interesting transition: " << *Inst << '\n');
5910 VectorPromoteHelper VPH(*DL, *TLI, *TTI, Inst, CombineCost);
5911 // If the transition has more than one use, assume this is not going to be
5913 while (Inst->hasOneUse()) {
5914 Instruction *ToBePromoted = cast<Instruction>(*Inst->user_begin());
5915 DEBUG(dbgs() << "Use: " << *ToBePromoted << '\n');
5917 if (ToBePromoted->getParent() != Parent) {
5918 DEBUG(dbgs() << "Instruction to promote is in a different block ("
5919 << ToBePromoted->getParent()->getName()
5920 << ") than the transition (" << Parent->getName() << ").\n");
5924 if (VPH.canCombine(ToBePromoted)) {
5925 DEBUG(dbgs() << "Assume " << *Inst << '\n'
5926 << "will be combined with: " << *ToBePromoted << '\n');
5927 VPH.recordCombineInstruction(ToBePromoted);
5928 bool Changed = VPH.promote();
5929 NumStoreExtractExposed += Changed;
5933 DEBUG(dbgs() << "Try promoting.\n");
5934 if (!VPH.canPromote(ToBePromoted) || !VPH.shouldPromote(ToBePromoted))
5937 DEBUG(dbgs() << "Promoting is possible... Enqueue for promotion!\n");
5939 VPH.enqueueForPromotion(ToBePromoted);
5940 Inst = ToBePromoted;
5945 /// For the instruction sequence of store below, F and I values
5946 /// are bundled together as an i64 value before being stored into memory.
5947 /// Sometimes it is more efficent to generate separate stores for F and I,
5948 /// which can remove the bitwise instructions or sink them to colder places.
5950 /// (store (or (zext (bitcast F to i32) to i64),
5951 /// (shl (zext I to i64), 32)), addr) -->
5952 /// (store F, addr) and (store I, addr+4)
5954 /// Similarly, splitting for other merged store can also be beneficial, like:
5955 /// For pair of {i32, i32}, i64 store --> two i32 stores.
5956 /// For pair of {i32, i16}, i64 store --> two i32 stores.
5957 /// For pair of {i16, i16}, i32 store --> two i16 stores.
5958 /// For pair of {i16, i8}, i32 store --> two i16 stores.
5959 /// For pair of {i8, i8}, i16 store --> two i8 stores.
5961 /// We allow each target to determine specifically which kind of splitting is
5964 /// The store patterns are commonly seen from the simple code snippet below
5965 /// if only std::make_pair(...) is sroa transformed before inlined into hoo.
5966 /// void goo(const std::pair<int, float> &);
5969 /// goo(std::make_pair(tmp, ftmp));
5973 /// Although we already have similar splitting in DAG Combine, we duplicate
5974 /// it in CodeGenPrepare to catch the case in which pattern is across
5975 /// multiple BBs. The logic in DAG Combine is kept to catch case generated
5976 /// during code expansion.
5977 static bool splitMergedValStore(StoreInst &SI, const DataLayout &DL,
5978 const TargetLowering &TLI) {
5979 // Handle simple but common cases only.
5980 Type *StoreType = SI.getValueOperand()->getType();
5981 if (DL.getTypeStoreSizeInBits(StoreType) != DL.getTypeSizeInBits(StoreType) ||
5982 DL.getTypeSizeInBits(StoreType) == 0)
5985 unsigned HalfValBitSize = DL.getTypeSizeInBits(StoreType) / 2;
5986 Type *SplitStoreType = Type::getIntNTy(SI.getContext(), HalfValBitSize);
5987 if (DL.getTypeStoreSizeInBits(SplitStoreType) !=
5988 DL.getTypeSizeInBits(SplitStoreType))
5991 // Match the following patterns:
5992 // (store (or (zext LValue to i64),
5993 // (shl (zext HValue to i64), 32)), HalfValBitSize)
5995 // (store (or (shl (zext HValue to i64), 32)), HalfValBitSize)
5996 // (zext LValue to i64),
5997 // Expect both operands of OR and the first operand of SHL have only
5999 Value *LValue, *HValue;
6000 if (!match(SI.getValueOperand(),
6001 m_c_Or(m_OneUse(m_ZExt(m_Value(LValue))),
6002 m_OneUse(m_Shl(m_OneUse(m_ZExt(m_Value(HValue))),
6003 m_SpecificInt(HalfValBitSize))))))
6006 // Check LValue and HValue are int with size less or equal than 32.
6007 if (!LValue->getType()->isIntegerTy() ||
6008 DL.getTypeSizeInBits(LValue->getType()) > HalfValBitSize ||
6009 !HValue->getType()->isIntegerTy() ||
6010 DL.getTypeSizeInBits(HValue->getType()) > HalfValBitSize)
6013 // If LValue/HValue is a bitcast instruction, use the EVT before bitcast
6014 // as the input of target query.
6015 auto *LBC = dyn_cast<BitCastInst>(LValue);
6016 auto *HBC = dyn_cast<BitCastInst>(HValue);
6017 EVT LowTy = LBC ? EVT::getEVT(LBC->getOperand(0)->getType())
6018 : EVT::getEVT(LValue->getType());
6019 EVT HighTy = HBC ? EVT::getEVT(HBC->getOperand(0)->getType())
6020 : EVT::getEVT(HValue->getType());
6021 if (!ForceSplitStore && !TLI.isMultiStoresCheaperThanBitsMerge(LowTy, HighTy))
6024 // Start to split store.
6025 IRBuilder<> Builder(SI.getContext());
6026 Builder.SetInsertPoint(&SI);
6028 // If LValue/HValue is a bitcast in another BB, create a new one in current
6029 // BB so it may be merged with the splitted stores by dag combiner.
6030 if (LBC && LBC->getParent() != SI.getParent())
6031 LValue = Builder.CreateBitCast(LBC->getOperand(0), LBC->getType());
6032 if (HBC && HBC->getParent() != SI.getParent())
6033 HValue = Builder.CreateBitCast(HBC->getOperand(0), HBC->getType());
6035 auto CreateSplitStore = [&](Value *V, bool Upper) {
6036 V = Builder.CreateZExtOrBitCast(V, SplitStoreType);
6037 Value *Addr = Builder.CreateBitCast(
6039 SplitStoreType->getPointerTo(SI.getPointerAddressSpace()));
6041 Addr = Builder.CreateGEP(
6042 SplitStoreType, Addr,
6043 ConstantInt::get(Type::getInt32Ty(SI.getContext()), 1));
6044 Builder.CreateAlignedStore(
6045 V, Addr, Upper ? SI.getAlignment() / 2 : SI.getAlignment());
6048 CreateSplitStore(LValue, false);
6049 CreateSplitStore(HValue, true);
6051 // Delete the old store.
6052 SI.eraseFromParent();
6056 bool CodeGenPrepare::optimizeInst(Instruction *I, bool &ModifiedDT) {
6057 // Bail out if we inserted the instruction to prevent optimizations from
6058 // stepping on each other's toes.
6059 if (InsertedInsts.count(I))
6062 if (PHINode *P = dyn_cast<PHINode>(I)) {
6063 // It is possible for very late stage optimizations (such as SimplifyCFG)
6064 // to introduce PHI nodes too late to be cleaned up. If we detect such a
6065 // trivial PHI, go ahead and zap it here.
6066 if (Value *V = SimplifyInstruction(P, {*DL, TLInfo})) {
6067 P->replaceAllUsesWith(V);
6068 P->eraseFromParent();
6075 if (CastInst *CI = dyn_cast<CastInst>(I)) {
6076 // If the source of the cast is a constant, then this should have
6077 // already been constant folded. The only reason NOT to constant fold
6078 // it is if something (e.g. LSR) was careful to place the constant
6079 // evaluation in a block other than then one that uses it (e.g. to hoist
6080 // the address of globals out of a loop). If this is the case, we don't
6081 // want to forward-subst the cast.
6082 if (isa<Constant>(CI->getOperand(0)))
6085 if (TLI && OptimizeNoopCopyExpression(CI, *TLI, *DL))
6088 if (isa<ZExtInst>(I) || isa<SExtInst>(I)) {
6089 /// Sink a zext or sext into its user blocks if the target type doesn't
6090 /// fit in one register
6092 TLI->getTypeAction(CI->getContext(),
6093 TLI->getValueType(*DL, CI->getType())) ==
6094 TargetLowering::TypeExpandInteger) {
6095 return SinkCast(CI);
6097 bool MadeChange = optimizeExt(I);
6098 return MadeChange | optimizeExtUses(I);
6104 if (CmpInst *CI = dyn_cast<CmpInst>(I))
6105 if (!TLI || !TLI->hasMultipleConditionRegisters())
6106 return OptimizeCmpExpression(CI, TLI);
6108 if (LoadInst *LI = dyn_cast<LoadInst>(I)) {
6109 LI->setMetadata(LLVMContext::MD_invariant_group, nullptr);
6111 bool Modified = optimizeLoadExt(LI);
6112 unsigned AS = LI->getPointerAddressSpace();
6113 Modified |= optimizeMemoryInst(I, I->getOperand(0), LI->getType(), AS);
6119 if (StoreInst *SI = dyn_cast<StoreInst>(I)) {
6120 if (TLI && splitMergedValStore(*SI, *DL, *TLI))
6122 SI->setMetadata(LLVMContext::MD_invariant_group, nullptr);
6124 unsigned AS = SI->getPointerAddressSpace();
6125 return optimizeMemoryInst(I, SI->getOperand(1),
6126 SI->getOperand(0)->getType(), AS);
6131 if (AtomicRMWInst *RMW = dyn_cast<AtomicRMWInst>(I)) {
6132 unsigned AS = RMW->getPointerAddressSpace();
6133 return optimizeMemoryInst(I, RMW->getPointerOperand(),
6134 RMW->getType(), AS);
6137 if (AtomicCmpXchgInst *CmpX = dyn_cast<AtomicCmpXchgInst>(I)) {
6138 unsigned AS = CmpX->getPointerAddressSpace();
6139 return optimizeMemoryInst(I, CmpX->getPointerOperand(),
6140 CmpX->getCompareOperand()->getType(), AS);
6143 BinaryOperator *BinOp = dyn_cast<BinaryOperator>(I);
6145 if (BinOp && (BinOp->getOpcode() == Instruction::And) &&
6146 EnableAndCmpSinking && TLI)
6147 return sinkAndCmp0Expression(BinOp, *TLI, InsertedInsts);
6149 if (BinOp && (BinOp->getOpcode() == Instruction::AShr ||
6150 BinOp->getOpcode() == Instruction::LShr)) {
6151 ConstantInt *CI = dyn_cast<ConstantInt>(BinOp->getOperand(1));
6152 if (TLI && CI && TLI->hasExtractBitsInsn())
6153 return OptimizeExtractBits(BinOp, CI, *TLI, *DL);
6158 if (GetElementPtrInst *GEPI = dyn_cast<GetElementPtrInst>(I)) {
6159 if (GEPI->hasAllZeroIndices()) {
6160 /// The GEP operand must be a pointer, so must its result -> BitCast
6161 Instruction *NC = new BitCastInst(GEPI->getOperand(0), GEPI->getType(),
6162 GEPI->getName(), GEPI);
6163 GEPI->replaceAllUsesWith(NC);
6164 GEPI->eraseFromParent();
6166 optimizeInst(NC, ModifiedDT);
6172 if (CallInst *CI = dyn_cast<CallInst>(I))
6173 return optimizeCallInst(CI, ModifiedDT);
6175 if (SelectInst *SI = dyn_cast<SelectInst>(I))
6176 return optimizeSelectInst(SI);
6178 if (ShuffleVectorInst *SVI = dyn_cast<ShuffleVectorInst>(I))
6179 return optimizeShuffleVectorInst(SVI);
6181 if (auto *Switch = dyn_cast<SwitchInst>(I))
6182 return optimizeSwitchInst(Switch);
6184 if (isa<ExtractElementInst>(I))
6185 return optimizeExtractElementInst(I);
6190 /// Given an OR instruction, check to see if this is a bitreverse
6191 /// idiom. If so, insert the new intrinsic and return true.
6192 static bool makeBitReverse(Instruction &I, const DataLayout &DL,
6193 const TargetLowering &TLI) {
6194 if (!I.getType()->isIntegerTy() ||
6195 !TLI.isOperationLegalOrCustom(ISD::BITREVERSE,
6196 TLI.getValueType(DL, I.getType(), true)))
6199 SmallVector<Instruction*, 4> Insts;
6200 if (!recognizeBSwapOrBitReverseIdiom(&I, false, true, Insts))
6202 Instruction *LastInst = Insts.back();
6203 I.replaceAllUsesWith(LastInst);
6204 RecursivelyDeleteTriviallyDeadInstructions(&I);
6208 // In this pass we look for GEP and cast instructions that are used
6209 // across basic blocks and rewrite them to improve basic-block-at-a-time
6211 bool CodeGenPrepare::optimizeBlock(BasicBlock &BB, bool &ModifiedDT) {
6213 bool MadeChange = false;
6215 CurInstIterator = BB.begin();
6216 while (CurInstIterator != BB.end()) {
6217 MadeChange |= optimizeInst(&*CurInstIterator++, ModifiedDT);
6222 bool MadeBitReverse = true;
6223 while (TLI && MadeBitReverse) {
6224 MadeBitReverse = false;
6225 for (auto &I : reverse(BB)) {
6226 if (makeBitReverse(I, *DL, *TLI)) {
6227 MadeBitReverse = MadeChange = true;
6233 MadeChange |= dupRetToEnableTailCallOpts(&BB);
6238 // llvm.dbg.value is far away from the value then iSel may not be able
6239 // handle it properly. iSel will drop llvm.dbg.value if it can not
6240 // find a node corresponding to the value.
6241 bool CodeGenPrepare::placeDbgValues(Function &F) {
6242 bool MadeChange = false;
6243 for (BasicBlock &BB : F) {
6244 Instruction *PrevNonDbgInst = nullptr;
6245 for (BasicBlock::iterator BI = BB.begin(), BE = BB.end(); BI != BE;) {
6246 Instruction *Insn = &*BI++;
6247 DbgValueInst *DVI = dyn_cast<DbgValueInst>(Insn);
6248 // Leave dbg.values that refer to an alloca alone. These
6249 // instrinsics describe the address of a variable (= the alloca)
6250 // being taken. They should not be moved next to the alloca
6251 // (and to the beginning of the scope), but rather stay close to
6252 // where said address is used.
6253 if (!DVI || (DVI->getValue() && isa<AllocaInst>(DVI->getValue()))) {
6254 PrevNonDbgInst = Insn;
6258 Instruction *VI = dyn_cast_or_null<Instruction>(DVI->getValue());
6259 if (VI && VI != PrevNonDbgInst && !VI->isTerminator()) {
6260 // If VI is a phi in a block with an EHPad terminator, we can't insert
6262 if (isa<PHINode>(VI) && VI->getParent()->getTerminator()->isEHPad())
6264 DEBUG(dbgs() << "Moving Debug Value before :\n" << *DVI << ' ' << *VI);
6265 DVI->removeFromParent();
6266 if (isa<PHINode>(VI))
6267 DVI->insertBefore(&*VI->getParent()->getFirstInsertionPt());
6269 DVI->insertAfter(VI);
6278 /// \brief Scale down both weights to fit into uint32_t.
6279 static void scaleWeights(uint64_t &NewTrue, uint64_t &NewFalse) {
6280 uint64_t NewMax = (NewTrue > NewFalse) ? NewTrue : NewFalse;
6281 uint32_t Scale = (NewMax / UINT32_MAX) + 1;
6282 NewTrue = NewTrue / Scale;
6283 NewFalse = NewFalse / Scale;
6286 /// \brief Some targets prefer to split a conditional branch like:
6288 /// %0 = icmp ne i32 %a, 0
6289 /// %1 = icmp ne i32 %b, 0
6290 /// %or.cond = or i1 %0, %1
6291 /// br i1 %or.cond, label %TrueBB, label %FalseBB
6293 /// into multiple branch instructions like:
6296 /// %0 = icmp ne i32 %a, 0
6297 /// br i1 %0, label %TrueBB, label %bb2
6299 /// %1 = icmp ne i32 %b, 0
6300 /// br i1 %1, label %TrueBB, label %FalseBB
6302 /// This usually allows instruction selection to do even further optimizations
6303 /// and combine the compare with the branch instruction. Currently this is
6304 /// applied for targets which have "cheap" jump instructions.
6306 /// FIXME: Remove the (equivalent?) implementation in SelectionDAG.
6308 bool CodeGenPrepare::splitBranchCondition(Function &F) {
6309 if (!TM || !TM->Options.EnableFastISel || !TLI || TLI->isJumpExpensive())
6312 bool MadeChange = false;
6313 for (auto &BB : F) {
6314 // Does this BB end with the following?
6315 // %cond1 = icmp|fcmp|binary instruction ...
6316 // %cond2 = icmp|fcmp|binary instruction ...
6317 // %cond.or = or|and i1 %cond1, cond2
6318 // br i1 %cond.or label %dest1, label %dest2"
6319 BinaryOperator *LogicOp;
6320 BasicBlock *TBB, *FBB;
6321 if (!match(BB.getTerminator(), m_Br(m_OneUse(m_BinOp(LogicOp)), TBB, FBB)))
6324 auto *Br1 = cast<BranchInst>(BB.getTerminator());
6325 if (Br1->getMetadata(LLVMContext::MD_unpredictable))
6329 Value *Cond1, *Cond2;
6330 if (match(LogicOp, m_And(m_OneUse(m_Value(Cond1)),
6331 m_OneUse(m_Value(Cond2)))))
6332 Opc = Instruction::And;
6333 else if (match(LogicOp, m_Or(m_OneUse(m_Value(Cond1)),
6334 m_OneUse(m_Value(Cond2)))))
6335 Opc = Instruction::Or;
6339 if (!match(Cond1, m_CombineOr(m_Cmp(), m_BinOp())) ||
6340 !match(Cond2, m_CombineOr(m_Cmp(), m_BinOp())) )
6343 DEBUG(dbgs() << "Before branch condition splitting\n"; BB.dump());
6347 BasicBlock::Create(BB.getContext(), BB.getName() + ".cond.split",
6348 BB.getParent(), BB.getNextNode());
6350 // Update original basic block by using the first condition directly by the
6351 // branch instruction and removing the no longer needed and/or instruction.
6352 Br1->setCondition(Cond1);
6353 LogicOp->eraseFromParent();
6355 // Depending on the conditon we have to either replace the true or the false
6356 // successor of the original branch instruction.
6357 if (Opc == Instruction::And)
6358 Br1->setSuccessor(0, TmpBB);
6360 Br1->setSuccessor(1, TmpBB);
6362 // Fill in the new basic block.
6363 auto *Br2 = IRBuilder<>(TmpBB).CreateCondBr(Cond2, TBB, FBB);
6364 if (auto *I = dyn_cast<Instruction>(Cond2)) {
6365 I->removeFromParent();
6366 I->insertBefore(Br2);
6369 // Update PHI nodes in both successors. The original BB needs to be
6370 // replaced in one succesor's PHI nodes, because the branch comes now from
6371 // the newly generated BB (NewBB). In the other successor we need to add one
6372 // incoming edge to the PHI nodes, because both branch instructions target
6373 // now the same successor. Depending on the original branch condition
6374 // (and/or) we have to swap the successors (TrueDest, FalseDest), so that
6375 // we perform the correct update for the PHI nodes.
6376 // This doesn't change the successor order of the just created branch
6377 // instruction (or any other instruction).
6378 if (Opc == Instruction::Or)
6379 std::swap(TBB, FBB);
6381 // Replace the old BB with the new BB.
6382 for (auto &I : *TBB) {
6383 PHINode *PN = dyn_cast<PHINode>(&I);
6387 while ((i = PN->getBasicBlockIndex(&BB)) >= 0)
6388 PN->setIncomingBlock(i, TmpBB);
6391 // Add another incoming edge form the new BB.
6392 for (auto &I : *FBB) {
6393 PHINode *PN = dyn_cast<PHINode>(&I);
6396 auto *Val = PN->getIncomingValueForBlock(&BB);
6397 PN->addIncoming(Val, TmpBB);
6400 // Update the branch weights (from SelectionDAGBuilder::
6401 // FindMergedConditions).
6402 if (Opc == Instruction::Or) {
6403 // Codegen X | Y as:
6412 // We have flexibility in setting Prob for BB1 and Prob for NewBB.
6413 // The requirement is that
6414 // TrueProb for BB1 + (FalseProb for BB1 * TrueProb for TmpBB)
6415 // = TrueProb for orignal BB.
6416 // Assuming the orignal weights are A and B, one choice is to set BB1's
6417 // weights to A and A+2B, and set TmpBB's weights to A and 2B. This choice
6419 // TrueProb for BB1 == FalseProb for BB1 * TrueProb for TmpBB.
6420 // Another choice is to assume TrueProb for BB1 equals to TrueProb for
6421 // TmpBB, but the math is more complicated.
6422 uint64_t TrueWeight, FalseWeight;
6423 if (Br1->extractProfMetadata(TrueWeight, FalseWeight)) {
6424 uint64_t NewTrueWeight = TrueWeight;
6425 uint64_t NewFalseWeight = TrueWeight + 2 * FalseWeight;
6426 scaleWeights(NewTrueWeight, NewFalseWeight);
6427 Br1->setMetadata(LLVMContext::MD_prof, MDBuilder(Br1->getContext())
6428 .createBranchWeights(TrueWeight, FalseWeight));
6430 NewTrueWeight = TrueWeight;
6431 NewFalseWeight = 2 * FalseWeight;
6432 scaleWeights(NewTrueWeight, NewFalseWeight);
6433 Br2->setMetadata(LLVMContext::MD_prof, MDBuilder(Br2->getContext())
6434 .createBranchWeights(TrueWeight, FalseWeight));
6437 // Codegen X & Y as:
6445 // This requires creation of TmpBB after CurBB.
6447 // We have flexibility in setting Prob for BB1 and Prob for TmpBB.
6448 // The requirement is that
6449 // FalseProb for BB1 + (TrueProb for BB1 * FalseProb for TmpBB)
6450 // = FalseProb for orignal BB.
6451 // Assuming the orignal weights are A and B, one choice is to set BB1's
6452 // weights to 2A+B and B, and set TmpBB's weights to 2A and B. This choice
6454 // FalseProb for BB1 == TrueProb for BB1 * FalseProb for TmpBB.
6455 uint64_t TrueWeight, FalseWeight;
6456 if (Br1->extractProfMetadata(TrueWeight, FalseWeight)) {
6457 uint64_t NewTrueWeight = 2 * TrueWeight + FalseWeight;
6458 uint64_t NewFalseWeight = FalseWeight;
6459 scaleWeights(NewTrueWeight, NewFalseWeight);
6460 Br1->setMetadata(LLVMContext::MD_prof, MDBuilder(Br1->getContext())
6461 .createBranchWeights(TrueWeight, FalseWeight));
6463 NewTrueWeight = 2 * TrueWeight;
6464 NewFalseWeight = FalseWeight;
6465 scaleWeights(NewTrueWeight, NewFalseWeight);
6466 Br2->setMetadata(LLVMContext::MD_prof, MDBuilder(Br2->getContext())
6467 .createBranchWeights(TrueWeight, FalseWeight));
6471 // Note: No point in getting fancy here, since the DT info is never
6472 // available to CodeGenPrepare.
6477 DEBUG(dbgs() << "After branch condition splitting\n"; BB.dump();