1 //===-- ExpandPostRAPseudos.cpp - Pseudo instruction expansion pass -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines a pass that expands COPY and SUBREG_TO_REG pseudo
11 // instructions after register allocation.
13 //===----------------------------------------------------------------------===//
15 #include "llvm/CodeGen/MachineFunctionPass.h"
16 #include "llvm/CodeGen/MachineInstr.h"
17 #include "llvm/CodeGen/MachineInstrBuilder.h"
18 #include "llvm/CodeGen/MachineRegisterInfo.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/Support/Debug.h"
21 #include "llvm/Support/raw_ostream.h"
22 #include "llvm/Target/TargetInstrInfo.h"
23 #include "llvm/Target/TargetRegisterInfo.h"
24 #include "llvm/Target/TargetSubtargetInfo.h"
28 #define DEBUG_TYPE "postrapseudos"
31 struct ExpandPostRA : public MachineFunctionPass {
33 const TargetRegisterInfo *TRI;
34 const TargetInstrInfo *TII;
37 static char ID; // Pass identification, replacement for typeid
38 ExpandPostRA() : MachineFunctionPass(ID) {}
40 void getAnalysisUsage(AnalysisUsage &AU) const override {
42 AU.addPreservedID(MachineLoopInfoID);
43 AU.addPreservedID(MachineDominatorsID);
44 MachineFunctionPass::getAnalysisUsage(AU);
47 /// runOnMachineFunction - pass entry point
48 bool runOnMachineFunction(MachineFunction&) override;
51 bool LowerSubregToReg(MachineInstr *MI);
52 bool LowerCopy(MachineInstr *MI);
54 void TransferImplicitOperands(MachineInstr *MI);
56 } // end anonymous namespace
58 char ExpandPostRA::ID = 0;
59 char &llvm::ExpandPostRAPseudosID = ExpandPostRA::ID;
61 INITIALIZE_PASS(ExpandPostRA, DEBUG_TYPE,
62 "Post-RA pseudo instruction expansion pass", false, false)
64 /// TransferImplicitOperands - MI is a pseudo-instruction, and the lowered
65 /// replacement instructions immediately precede it. Copy any implicit
66 /// operands from MI to the replacement instruction.
67 void ExpandPostRA::TransferImplicitOperands(MachineInstr *MI) {
68 MachineBasicBlock::iterator CopyMI = MI;
71 for (const MachineOperand &MO : MI->implicit_operands())
73 CopyMI->addOperand(MO);
76 bool ExpandPostRA::LowerSubregToReg(MachineInstr *MI) {
77 MachineBasicBlock *MBB = MI->getParent();
78 assert((MI->getOperand(0).isReg() && MI->getOperand(0).isDef()) &&
79 MI->getOperand(1).isImm() &&
80 (MI->getOperand(2).isReg() && MI->getOperand(2).isUse()) &&
81 MI->getOperand(3).isImm() && "Invalid subreg_to_reg");
83 unsigned DstReg = MI->getOperand(0).getReg();
84 unsigned InsReg = MI->getOperand(2).getReg();
85 assert(!MI->getOperand(2).getSubReg() && "SubIdx on physreg?");
86 unsigned SubIdx = MI->getOperand(3).getImm();
88 assert(SubIdx != 0 && "Invalid index for insert_subreg");
89 unsigned DstSubReg = TRI->getSubReg(DstReg, SubIdx);
91 assert(TargetRegisterInfo::isPhysicalRegister(DstReg) &&
92 "Insert destination must be in a physical register");
93 assert(TargetRegisterInfo::isPhysicalRegister(InsReg) &&
94 "Inserted value must be in a physical register");
96 DEBUG(dbgs() << "subreg: CONVERTING: " << *MI);
98 if (MI->allDefsAreDead()) {
99 MI->setDesc(TII->get(TargetOpcode::KILL));
100 DEBUG(dbgs() << "subreg: replaced by: " << *MI);
104 if (DstSubReg == InsReg) {
105 // No need to insert an identity copy instruction.
106 // Watch out for case like this:
107 // %RAX<def> = SUBREG_TO_REG 0, %EAX<kill>, 3
108 // We must leave %RAX live.
109 if (DstReg != InsReg) {
110 MI->setDesc(TII->get(TargetOpcode::KILL));
111 MI->RemoveOperand(3); // SubIdx
112 MI->RemoveOperand(1); // Imm
113 DEBUG(dbgs() << "subreg: replace by: " << *MI);
116 DEBUG(dbgs() << "subreg: eliminated!");
118 TII->copyPhysReg(*MBB, MI, MI->getDebugLoc(), DstSubReg, InsReg,
119 MI->getOperand(2).isKill());
121 // Implicitly define DstReg for subsequent uses.
122 MachineBasicBlock::iterator CopyMI = MI;
124 CopyMI->addRegisterDefined(DstReg);
125 DEBUG(dbgs() << "subreg: " << *CopyMI);
128 DEBUG(dbgs() << '\n');
133 bool ExpandPostRA::LowerCopy(MachineInstr *MI) {
135 if (MI->allDefsAreDead()) {
136 DEBUG(dbgs() << "dead copy: " << *MI);
137 MI->setDesc(TII->get(TargetOpcode::KILL));
138 DEBUG(dbgs() << "replaced by: " << *MI);
142 MachineOperand &DstMO = MI->getOperand(0);
143 MachineOperand &SrcMO = MI->getOperand(1);
145 bool IdentityCopy = (SrcMO.getReg() == DstMO.getReg());
146 if (IdentityCopy || SrcMO.isUndef()) {
147 DEBUG(dbgs() << (IdentityCopy ? "identity copy: " : "undef copy: ") << *MI);
148 // No need to insert an identity copy instruction, but replace with a KILL
149 // if liveness is changed.
150 if (SrcMO.isUndef() || MI->getNumOperands() > 2) {
151 // We must make sure the super-register gets killed. Replace the
152 // instruction with KILL.
153 MI->setDesc(TII->get(TargetOpcode::KILL));
154 DEBUG(dbgs() << "replaced by: " << *MI);
157 // Vanilla identity copy.
158 MI->eraseFromParent();
162 DEBUG(dbgs() << "real copy: " << *MI);
163 TII->copyPhysReg(*MI->getParent(), MI, MI->getDebugLoc(),
164 DstMO.getReg(), SrcMO.getReg(), SrcMO.isKill());
166 if (MI->getNumOperands() > 2)
167 TransferImplicitOperands(MI);
169 MachineBasicBlock::iterator dMI = MI;
170 dbgs() << "replaced by: " << *(--dMI);
172 MI->eraseFromParent();
176 /// runOnMachineFunction - Reduce subregister inserts and extracts to register
179 bool ExpandPostRA::runOnMachineFunction(MachineFunction &MF) {
180 DEBUG(dbgs() << "Machine Function\n"
181 << "********** EXPANDING POST-RA PSEUDO INSTRS **********\n"
182 << "********** Function: " << MF.getName() << '\n');
183 TRI = MF.getSubtarget().getRegisterInfo();
184 TII = MF.getSubtarget().getInstrInfo();
186 bool MadeChange = false;
188 for (MachineFunction::iterator mbbi = MF.begin(), mbbe = MF.end();
189 mbbi != mbbe; ++mbbi) {
190 for (MachineBasicBlock::iterator mi = mbbi->begin(), me = mbbi->end();
192 MachineInstr &MI = *mi;
193 // Advance iterator here because MI may be erased.
196 // Only expand pseudos.
200 // Give targets a chance to expand even standard pseudos.
201 if (TII->expandPostRAPseudo(MI)) {
206 // Expand standard pseudos.
207 switch (MI.getOpcode()) {
208 case TargetOpcode::SUBREG_TO_REG:
209 MadeChange |= LowerSubregToReg(&MI);
211 case TargetOpcode::COPY:
212 MadeChange |= LowerCopy(&MI);
214 case TargetOpcode::DBG_VALUE:
216 case TargetOpcode::INSERT_SUBREG:
217 case TargetOpcode::EXTRACT_SUBREG:
218 llvm_unreachable("Sub-register pseudos should have been eliminated.");