1 //===-- lib/CodeGen/GlobalISel/CallLowering.cpp - Call lowering -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 /// This file implements some simple delegations needed for call lowering.
13 //===----------------------------------------------------------------------===//
15 #include "llvm/CodeGen/GlobalISel/CallLowering.h"
16 #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
17 #include "llvm/CodeGen/MachineOperand.h"
18 #include "llvm/CodeGen/MachineRegisterInfo.h"
19 #include "llvm/CodeGen/TargetLowering.h"
20 #include "llvm/IR/DataLayout.h"
21 #include "llvm/IR/Instructions.h"
22 #include "llvm/IR/Module.h"
26 bool CallLowering::lowerCall(
27 MachineIRBuilder &MIRBuilder, ImmutableCallSite CS, unsigned ResReg,
28 ArrayRef<unsigned> ArgRegs, std::function<unsigned()> GetCalleeReg) const {
29 auto &DL = CS.getParent()->getParent()->getParent()->getDataLayout();
31 // First step is to marshall all the function's parameters into the correct
32 // physregs and memory locations. Gather the sequence of argument types that
33 // we'll pass to the assigner function.
34 SmallVector<ArgInfo, 8> OrigArgs;
36 unsigned NumFixedArgs = CS.getFunctionType()->getNumParams();
37 for (auto &Arg : CS.args()) {
38 ArgInfo OrigArg{ArgRegs[i], Arg->getType(), ISD::ArgFlagsTy{},
40 setArgFlags(OrigArg, i + AttributeList::FirstArgIndex, DL, CS);
41 OrigArgs.push_back(OrigArg);
45 MachineOperand Callee = MachineOperand::CreateImm(0);
46 if (const Function *F = CS.getCalledFunction())
47 Callee = MachineOperand::CreateGA(F, 0);
49 Callee = MachineOperand::CreateReg(GetCalleeReg(), false);
51 ArgInfo OrigRet{ResReg, CS.getType(), ISD::ArgFlagsTy{}};
52 if (!OrigRet.Ty->isVoidTy())
53 setArgFlags(OrigRet, AttributeList::ReturnIndex, DL, CS);
55 return lowerCall(MIRBuilder, CS.getCallingConv(), Callee, OrigRet, OrigArgs);
58 template <typename FuncInfoTy>
59 void CallLowering::setArgFlags(CallLowering::ArgInfo &Arg, unsigned OpIdx,
61 const FuncInfoTy &FuncInfo) const {
62 const AttributeList &Attrs = FuncInfo.getAttributes();
63 if (Attrs.hasAttribute(OpIdx, Attribute::ZExt))
65 if (Attrs.hasAttribute(OpIdx, Attribute::SExt))
67 if (Attrs.hasAttribute(OpIdx, Attribute::InReg))
69 if (Attrs.hasAttribute(OpIdx, Attribute::StructRet))
71 if (Attrs.hasAttribute(OpIdx, Attribute::SwiftSelf))
72 Arg.Flags.setSwiftSelf();
73 if (Attrs.hasAttribute(OpIdx, Attribute::SwiftError))
74 Arg.Flags.setSwiftError();
75 if (Attrs.hasAttribute(OpIdx, Attribute::ByVal))
77 if (Attrs.hasAttribute(OpIdx, Attribute::InAlloca))
78 Arg.Flags.setInAlloca();
80 if (Arg.Flags.isByVal() || Arg.Flags.isInAlloca()) {
81 Type *ElementTy = cast<PointerType>(Arg.Ty)->getElementType();
82 Arg.Flags.setByValSize(DL.getTypeAllocSize(ElementTy));
83 // For ByVal, alignment should be passed from FE. BE will guess if
84 // this info is not there but there are cases it cannot get right.
86 if (FuncInfo.getParamAlignment(OpIdx - 2))
87 FrameAlign = FuncInfo.getParamAlignment(OpIdx - 2);
89 FrameAlign = getTLI()->getByValTypeAlignment(ElementTy, DL);
90 Arg.Flags.setByValAlign(FrameAlign);
92 if (Attrs.hasAttribute(OpIdx, Attribute::Nest))
94 Arg.Flags.setOrigAlign(DL.getABITypeAlignment(Arg.Ty));
98 CallLowering::setArgFlags<Function>(CallLowering::ArgInfo &Arg, unsigned OpIdx,
100 const Function &FuncInfo) const;
103 CallLowering::setArgFlags<CallInst>(CallLowering::ArgInfo &Arg, unsigned OpIdx,
104 const DataLayout &DL,
105 const CallInst &FuncInfo) const;
107 bool CallLowering::handleAssignments(MachineIRBuilder &MIRBuilder,
108 ArrayRef<ArgInfo> Args,
109 ValueHandler &Handler) const {
110 MachineFunction &MF = MIRBuilder.getMF();
111 const Function &F = MF.getFunction();
112 const DataLayout &DL = F.getParent()->getDataLayout();
114 SmallVector<CCValAssign, 16> ArgLocs;
115 CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext());
117 unsigned NumArgs = Args.size();
118 for (unsigned i = 0; i != NumArgs; ++i) {
119 MVT CurVT = MVT::getVT(Args[i].Ty);
120 if (Handler.assignArg(i, CurVT, CurVT, CCValAssign::Full, Args[i], CCInfo))
124 for (unsigned i = 0, e = Args.size(), j = 0; i != e; ++i, ++j) {
125 assert(j < ArgLocs.size() && "Skipped too many arg locs");
127 CCValAssign &VA = ArgLocs[j];
128 assert(VA.getValNo() == i && "Location doesn't correspond to current arg");
130 if (VA.needsCustom()) {
131 j += Handler.assignCustomValue(Args[i], makeArrayRef(ArgLocs).slice(j));
136 Handler.assignValueToReg(Args[i].Reg, VA.getLocReg(), VA);
137 else if (VA.isMemLoc()) {
138 unsigned Size = VA.getValVT() == MVT::iPTR
139 ? DL.getPointerSize()
140 : alignTo(VA.getValVT().getSizeInBits(), 8) / 8;
141 unsigned Offset = VA.getLocMemOffset();
142 MachinePointerInfo MPO;
143 unsigned StackAddr = Handler.getStackAddress(Size, Offset, MPO);
144 Handler.assignValueToAddress(Args[i].Reg, StackAddr, Size, MPO, VA);
146 // FIXME: Support byvals and other weirdness
153 unsigned CallLowering::ValueHandler::extendRegister(unsigned ValReg,
155 LLT LocTy{VA.getLocVT()};
156 switch (VA.getLocInfo()) {
158 case CCValAssign::Full:
159 case CCValAssign::BCvt:
160 // FIXME: bitconverting between vector types may or may not be a
161 // nop in big-endian situations.
163 case CCValAssign::AExt: {
164 assert(!VA.getLocVT().isVector() && "unexpected vector extend");
165 auto MIB = MIRBuilder.buildAnyExt(LocTy, ValReg);
166 return MIB->getOperand(0).getReg();
168 case CCValAssign::SExt: {
169 unsigned NewReg = MRI.createGenericVirtualRegister(LocTy);
170 MIRBuilder.buildSExt(NewReg, ValReg);
173 case CCValAssign::ZExt: {
174 unsigned NewReg = MRI.createGenericVirtualRegister(LocTy);
175 MIRBuilder.buildZExt(NewReg, ValReg);
179 llvm_unreachable("unable to extend register");