1 //===--- LivePhysRegs.cpp - Live Physical Register Set --------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the LivePhysRegs utility for tracking liveness of
11 // physical registers across machine instructions in forward or backward order.
12 // A more detailed description can be found in the corresponding header file.
14 //===----------------------------------------------------------------------===//
16 #include "llvm/CodeGen/LivePhysRegs.h"
17 #include "llvm/CodeGen/MachineFrameInfo.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/MachineInstrBundle.h"
20 #include "llvm/CodeGen/MachineRegisterInfo.h"
21 #include "llvm/Support/Debug.h"
22 #include "llvm/Support/raw_ostream.h"
26 /// \brief Remove all registers from the set that get clobbered by the register
28 /// The clobbers set will be the list of live registers clobbered
30 void LivePhysRegs::removeRegsInMask(const MachineOperand &MO,
31 SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> *Clobbers) {
32 SparseSet<unsigned>::iterator LRI = LiveRegs.begin();
33 while (LRI != LiveRegs.end()) {
34 if (MO.clobbersPhysReg(*LRI)) {
36 Clobbers->push_back(std::make_pair(*LRI, &MO));
37 LRI = LiveRegs.erase(LRI);
43 /// Simulates liveness when stepping backwards over an instruction(bundle):
44 /// Remove Defs, add uses. This is the recommended way of calculating liveness.
45 void LivePhysRegs::stepBackward(const MachineInstr &MI) {
46 // Remove defined registers and regmask kills from the set.
47 for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
51 unsigned Reg = O->getReg();
52 if (!TargetRegisterInfo::isPhysicalRegister(Reg))
55 } else if (O->isRegMask())
59 // Add uses to the set.
60 for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
61 if (!O->isReg() || !O->readsReg())
63 unsigned Reg = O->getReg();
64 if (!TargetRegisterInfo::isPhysicalRegister(Reg))
70 /// Simulates liveness when stepping forward over an instruction(bundle): Remove
71 /// killed-uses, add defs. This is the not recommended way, because it depends
72 /// on accurate kill flags. If possible use stepBackward() instead of this
74 void LivePhysRegs::stepForward(const MachineInstr &MI,
75 SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> &Clobbers) {
76 // Remove killed registers from the set.
77 for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
79 unsigned Reg = O->getReg();
80 if (!TargetRegisterInfo::isPhysicalRegister(Reg))
83 // Note, dead defs are still recorded. The caller should decide how to
85 Clobbers.push_back(std::make_pair(Reg, &*O));
92 } else if (O->isRegMask())
93 removeRegsInMask(*O, &Clobbers);
96 // Add defs to the set.
97 for (auto Reg : Clobbers) {
98 // Skip dead defs. They shouldn't be added to the set.
99 if (Reg.second->isReg() && Reg.second->isDead())
105 /// Prin the currently live registers to OS.
106 void LivePhysRegs::print(raw_ostream &OS) const {
107 OS << "Live Registers:";
109 OS << " (uninitialized)\n";
118 for (const_iterator I = begin(), E = end(); I != E; ++I)
119 OS << " " << PrintReg(*I, TRI);
123 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
124 LLVM_DUMP_METHOD void LivePhysRegs::dump() const {
125 dbgs() << " " << *this;
129 bool LivePhysRegs::available(const MachineRegisterInfo &MRI,
130 unsigned Reg) const {
131 if (LiveRegs.count(Reg))
133 if (MRI.isReserved(Reg))
135 for (MCRegAliasIterator R(Reg, TRI, false); R.isValid(); ++R) {
136 if (LiveRegs.count(*R))
142 /// Add live-in registers of basic block \p MBB to \p LiveRegs.
143 void LivePhysRegs::addBlockLiveIns(const MachineBasicBlock &MBB) {
144 for (const auto &LI : MBB.liveins()) {
145 unsigned Reg = LI.PhysReg;
146 LaneBitmask Mask = LI.LaneMask;
147 MCSubRegIndexIterator S(Reg, TRI);
148 assert(Mask.any() && "Invalid livein mask");
149 if (Mask.all() || !S.isValid()) {
153 for (; S.isValid(); ++S) {
154 unsigned SI = S.getSubRegIndex();
155 if ((Mask & TRI->getSubRegIndexLaneMask(SI)).any())
156 addReg(S.getSubReg());
161 /// Adds all callee saved registers to \p LiveRegs.
162 static void addCalleeSavedRegs(LivePhysRegs &LiveRegs,
163 const MachineFunction &MF) {
164 const MachineRegisterInfo &MRI = MF.getRegInfo();
165 for (const MCPhysReg *CSR = MRI.getCalleeSavedRegs(); CSR && *CSR; ++CSR)
166 LiveRegs.addReg(*CSR);
169 /// Adds pristine registers to the given \p LiveRegs. Pristine registers are
170 /// callee saved registers that are unused in the function.
171 static void addPristines(LivePhysRegs &LiveRegs, const MachineFunction &MF) {
172 const MachineFrameInfo &MFI = MF.getFrameInfo();
173 if (!MFI.isCalleeSavedInfoValid())
175 /// Add all callee saved regs, then remove the ones that are saved+restored.
176 addCalleeSavedRegs(LiveRegs, MF);
177 /// Remove the ones that are not saved/restored; they are pristine.
178 for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
179 LiveRegs.removeReg(Info.getReg());
182 void LivePhysRegs::addLiveOutsNoPristines(const MachineBasicBlock &MBB) {
183 if (!MBB.succ_empty()) {
184 // To get the live-outs we simply merge the live-ins of all successors.
185 for (const MachineBasicBlock *Succ : MBB.successors())
186 addBlockLiveIns(*Succ);
187 } else if (MBB.isReturnBlock()) {
188 // For the return block: Add all callee saved registers that are saved and
189 // restored (somewhere); This does not include callee saved registers that
190 // are unused and hence not saved and restored; they are called pristine.
191 const MachineFunction &MF = *MBB.getParent();
192 const MachineFrameInfo &MFI = MF.getFrameInfo();
193 if (MFI.isCalleeSavedInfoValid()) {
194 for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
195 addReg(Info.getReg());
200 void LivePhysRegs::addLiveOuts(const MachineBasicBlock &MBB) {
201 const MachineFunction &MF = *MBB.getParent();
202 if (!MBB.succ_empty()) {
203 addPristines(*this, MF);
204 addLiveOutsNoPristines(MBB);
205 } else if (MBB.isReturnBlock()) {
206 // For the return block: Add all callee saved registers.
207 const MachineFrameInfo &MFI = MF.getFrameInfo();
208 if (MFI.isCalleeSavedInfoValid())
209 addCalleeSavedRegs(*this, MF);
213 void LivePhysRegs::addLiveIns(const MachineBasicBlock &MBB) {
214 const MachineFunction &MF = *MBB.getParent();
215 addPristines(*this, MF);
216 addBlockLiveIns(MBB);
219 void llvm::computeLiveIns(LivePhysRegs &LiveRegs,
220 const MachineRegisterInfo &MRI,
221 MachineBasicBlock &MBB) {
222 const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
223 assert(MBB.livein_empty());
225 LiveRegs.addLiveOutsNoPristines(MBB);
226 for (MachineInstr &MI : make_range(MBB.rbegin(), MBB.rend()))
227 LiveRegs.stepBackward(MI);
229 for (unsigned Reg : LiveRegs) {
230 if (MRI.isReserved(Reg))
232 // Skip the register if we are about to add one of its super registers.
233 bool ContainsSuperReg = false;
234 for (MCSuperRegIterator SReg(Reg, &TRI); SReg.isValid(); ++SReg) {
235 if (LiveRegs.contains(*SReg) && !MRI.isReserved(*SReg)) {
236 ContainsSuperReg = true;
240 if (ContainsSuperReg)