1 //===---- LiveRangeCalc.cpp - Calculate live ranges -----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Implementation of the LiveRangeCalc class.
12 //===----------------------------------------------------------------------===//
14 #include "LiveRangeCalc.h"
15 #include "llvm/ADT/SetVector.h"
16 #include "llvm/CodeGen/MachineDominators.h"
17 #include "llvm/CodeGen/MachineRegisterInfo.h"
21 #define DEBUG_TYPE "regalloc"
23 void LiveRangeCalc::resetLiveOutMap() {
24 unsigned NumBlocks = MF->getNumBlockIDs();
26 Seen.resize(NumBlocks);
28 Map.resize(NumBlocks);
31 void LiveRangeCalc::reset(const MachineFunction *mf,
33 MachineDominatorTree *MDT,
34 VNInfo::Allocator *VNIA) {
36 MRI = &MF->getRegInfo();
45 static void createDeadDef(SlotIndexes &Indexes, VNInfo::Allocator &Alloc,
46 LiveRange &LR, const MachineOperand &MO) {
47 const MachineInstr &MI = *MO.getParent();
49 Indexes.getInstructionIndex(MI).getRegSlot(MO.isEarlyClobber());
51 // Create the def in LR. This may find an existing def.
52 LR.createDeadDef(DefIdx, Alloc);
55 void LiveRangeCalc::calculate(LiveInterval &LI, bool TrackSubRegs) {
56 assert(MRI && Indexes && "call reset() first");
58 // Step 1: Create minimal live segments for every definition of Reg.
59 // Visit all def operands. If the same instruction has multiple defs of Reg,
60 // createDeadDef() will deduplicate.
61 const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();
62 unsigned Reg = LI.reg;
63 for (const MachineOperand &MO : MRI->reg_nodbg_operands(Reg)) {
64 if (!MO.isDef() && !MO.readsReg())
67 unsigned SubReg = MO.getSubReg();
68 if (LI.hasSubRanges() || (SubReg != 0 && TrackSubRegs)) {
69 LaneBitmask SubMask = SubReg != 0 ? TRI.getSubRegIndexLaneMask(SubReg)
70 : MRI->getMaxLaneMaskForVReg(Reg);
71 // If this is the first time we see a subregister def, initialize
72 // subranges by creating a copy of the main range.
73 if (!LI.hasSubRanges() && !LI.empty()) {
74 LaneBitmask ClassMask = MRI->getMaxLaneMaskForVReg(Reg);
75 LI.createSubRangeFrom(*Alloc, ClassMask, LI);
78 LaneBitmask Mask = SubMask;
79 for (LiveInterval::SubRange &S : LI.subranges()) {
80 // A Mask for subregs common to the existing subrange and current def.
81 LaneBitmask Common = S.LaneMask & Mask;
84 LiveInterval::SubRange *CommonRange;
85 // A Mask for subregs covered by the subrange but not the current def.
86 LaneBitmask RM = S.LaneMask & ~Mask;
88 // Split the subrange S into two parts: one covered by the current
89 // def (CommonRange), and the one not affected by it (updated S).
91 CommonRange = LI.createSubRangeFrom(*Alloc, Common, S);
93 assert(Common == S.LaneMask);
97 createDeadDef(*Indexes, *Alloc, *CommonRange, MO);
100 // Create a new SubRange for subregs we did not cover yet.
102 LiveInterval::SubRange *NewRange = LI.createSubRange(*Alloc, Mask);
104 createDeadDef(*Indexes, *Alloc, *NewRange, MO);
108 // Create the def in the main liverange. We do not have to do this if
109 // subranges are tracked as we recreate the main range later in this case.
110 if (MO.isDef() && !LI.hasSubRanges())
111 createDeadDef(*Indexes, *Alloc, LI, MO);
114 // We may have created empty live ranges for partially undefined uses, we
115 // can't keep them because we won't find defs in them later.
116 LI.removeEmptySubRanges();
118 // Step 2: Extend live segments to all uses, constructing SSA form as
120 if (LI.hasSubRanges()) {
121 for (LiveInterval::SubRange &S : LI.subranges()) {
122 LiveRangeCalc SubLRC;
123 SubLRC.reset(MF, Indexes, DomTree, Alloc);
124 SubLRC.extendToUses(S, Reg, S.LaneMask, &LI);
127 constructMainRangeFromSubranges(LI);
130 extendToUses(LI, Reg, LaneBitmask::getAll());
134 void LiveRangeCalc::constructMainRangeFromSubranges(LiveInterval &LI) {
135 // First create dead defs at all defs found in subranges.
136 LiveRange &MainRange = LI;
137 assert(MainRange.segments.empty() && MainRange.valnos.empty() &&
138 "Expect empty main liverange");
140 for (const LiveInterval::SubRange &SR : LI.subranges()) {
141 for (const VNInfo *VNI : SR.valnos) {
142 if (!VNI->isUnused() && !VNI->isPHIDef())
143 MainRange.createDeadDef(VNI->def, *Alloc);
147 extendToUses(MainRange, LI.reg, LaneBitmask::getAll(), &LI);
150 void LiveRangeCalc::createDeadDefs(LiveRange &LR, unsigned Reg) {
151 assert(MRI && Indexes && "call reset() first");
153 // Visit all def operands. If the same instruction has multiple defs of Reg,
154 // LR.createDeadDef() will deduplicate.
155 for (MachineOperand &MO : MRI->def_operands(Reg))
156 createDeadDef(*Indexes, *Alloc, LR, MO);
160 void LiveRangeCalc::extendToUses(LiveRange &LR, unsigned Reg, LaneBitmask Mask,
162 SmallVector<SlotIndex, 4> Undefs;
164 LI->computeSubRangeUndefs(Undefs, Mask, *MRI, *Indexes);
166 // Visit all operands that read Reg. This may include partial defs.
167 bool IsSubRange = !Mask.all();
168 const TargetRegisterInfo &TRI = *MRI->getTargetRegisterInfo();
169 for (MachineOperand &MO : MRI->reg_nodbg_operands(Reg)) {
170 // Clear all kill flags. They will be reinserted after register allocation
171 // by LiveIntervalAnalysis::addKillFlags().
174 // MO::readsReg returns "true" for subregister defs. This is for keeping
175 // liveness of the entire register (i.e. for the main range of the live
176 // interval). For subranges, definitions of non-overlapping subregisters
177 // do not count as uses.
178 if (!MO.readsReg() || (IsSubRange && MO.isDef()))
181 unsigned SubReg = MO.getSubReg();
183 LaneBitmask SLM = TRI.getSubRegIndexLaneMask(SubReg);
186 // Ignore uses not reading the current (sub)range.
187 if ((SLM & Mask).none())
191 // Determine the actual place of the use.
192 const MachineInstr *MI = MO.getParent();
193 unsigned OpNo = (&MO - &MI->getOperand(0));
196 assert(!MO.isDef() && "Cannot handle PHI def of partial register.");
197 // The actual place where a phi operand is used is the end of the pred
198 // MBB. PHI operands are paired: (Reg, PredMBB).
199 UseIdx = Indexes->getMBBEndIdx(MI->getOperand(OpNo+1).getMBB());
201 // Check for early-clobber redefs.
202 bool isEarlyClobber = false;
205 isEarlyClobber = MO.isEarlyClobber();
206 else if (MI->isRegTiedToDefOperand(OpNo, &DefIdx)) {
207 // FIXME: This would be a lot easier if tied early-clobber uses also
208 // had an early-clobber flag.
209 isEarlyClobber = MI->getOperand(DefIdx).isEarlyClobber();
211 UseIdx = Indexes->getInstructionIndex(*MI).getRegSlot(isEarlyClobber);
214 // MI is reading Reg. We may have visited MI before if it happens to be
215 // reading Reg multiple times. That is OK, extend() is idempotent.
216 extend(LR, UseIdx, Reg, Undefs);
221 void LiveRangeCalc::updateFromLiveIns() {
222 LiveRangeUpdater Updater;
223 for (const LiveInBlock &I : LiveIn) {
226 MachineBasicBlock *MBB = I.DomNode->getBlock();
227 assert(I.Value && "No live-in value found");
228 SlotIndex Start, End;
229 std::tie(Start, End) = Indexes->getMBBRange(MBB);
231 if (I.Kill.isValid())
232 // Value is killed inside this block.
235 // The value is live-through, update LiveOut as well.
236 // Defer the Domtree lookup until it is needed.
237 assert(Seen.test(MBB->getNumber()));
238 Map[MBB] = LiveOutPair(I.Value, nullptr);
240 Updater.setDest(&I.LR);
241 Updater.add(Start, End, I.Value);
246 void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Use, unsigned PhysReg,
247 ArrayRef<SlotIndex> Undefs) {
248 assert(Use.isValid() && "Invalid SlotIndex");
249 assert(Indexes && "Missing SlotIndexes");
250 assert(DomTree && "Missing dominator tree");
252 MachineBasicBlock *UseMBB = Indexes->getMBBFromIndex(Use.getPrevSlot());
253 assert(UseMBB && "No MBB at Use");
255 // Is there a def in the same MBB we can extend?
256 auto EP = LR.extendInBlock(Undefs, Indexes->getMBBStartIdx(UseMBB), Use);
257 if (EP.first != nullptr || EP.second)
260 // Find the single reaching def, or determine if Use is jointly dominated by
261 // multiple values, and we may need to create even more phi-defs to preserve
262 // VNInfo SSA form. Perform a search for all predecessor blocks where we
263 // know the dominating VNInfo.
264 if (findReachingDefs(LR, *UseMBB, Use, PhysReg, Undefs))
267 // When there were multiple different values, we may need new PHIs.
272 // This function is called by a client after using the low-level API to add
273 // live-out and live-in blocks. The unique value optimization is not
274 // available, SplitEditor::transferValues handles that case directly anyway.
275 void LiveRangeCalc::calculateValues() {
276 assert(Indexes && "Missing SlotIndexes");
277 assert(DomTree && "Missing dominator tree");
283 bool LiveRangeCalc::isDefOnEntry(LiveRange &LR, ArrayRef<SlotIndex> Undefs,
284 MachineBasicBlock &MBB, BitVector &DefOnEntry,
285 BitVector &UndefOnEntry) {
286 unsigned BN = MBB.getNumber();
289 if (UndefOnEntry[BN])
293 [this,BN,&DefOnEntry,&UndefOnEntry] (MachineBasicBlock &B) -> bool {
294 for (MachineBasicBlock *S : B.successors())
295 DefOnEntry[S->getNumber()] = true;
296 DefOnEntry[BN] = true;
300 SetVector<unsigned> WorkList;
301 // Checking if the entry of MBB is reached by some def: add all predecessors
302 // that are potentially defined-on-exit to the work list.
303 for (MachineBasicBlock *P : MBB.predecessors())
304 WorkList.insert(P->getNumber());
306 for (unsigned i = 0; i != WorkList.size(); ++i) {
307 // Determine if the exit from the block is reached by some def.
308 unsigned N = WorkList[i];
309 MachineBasicBlock &B = *MF->getBlockNumbered(N);
310 if (Seen[N] && Map[&B].first != nullptr)
311 return MarkDefined(B);
312 SlotIndex Begin, End;
313 std::tie(Begin, End) = Indexes->getMBBRange(&B);
314 LiveRange::iterator UB = std::upper_bound(LR.begin(), LR.end(), End);
315 if (UB != LR.begin()) {
316 LiveRange::Segment &Seg = *std::prev(UB);
317 if (Seg.end > Begin) {
318 // There is a segment that overlaps B. If the range is not explicitly
319 // undefined between the end of the segment and the end of the block,
320 // treat the block as defined on exit. If it is, go to the next block
322 if (LR.isUndefIn(Undefs, Seg.end, End))
324 return MarkDefined(B);
328 // No segment overlaps with this block. If this block is not defined on
329 // entry, or it undefines the range, do not process its predecessors.
330 if (UndefOnEntry[N] || LR.isUndefIn(Undefs, Begin, End)) {
331 UndefOnEntry[N] = true;
335 return MarkDefined(B);
337 // Still don't know: add all predecessors to the work list.
338 for (MachineBasicBlock *P : B.predecessors())
339 WorkList.insert(P->getNumber());
342 UndefOnEntry[BN] = true;
346 bool LiveRangeCalc::findReachingDefs(LiveRange &LR, MachineBasicBlock &UseMBB,
347 SlotIndex Use, unsigned PhysReg,
348 ArrayRef<SlotIndex> Undefs) {
349 unsigned UseMBBNum = UseMBB.getNumber();
351 // Block numbers where LR should be live-in.
352 SmallVector<unsigned, 16> WorkList(1, UseMBBNum);
354 // Remember if we have seen more than one value.
355 bool UniqueVNI = true;
356 VNInfo *TheVNI = nullptr;
358 bool FoundUndef = false;
360 // Using Seen as a visited set, perform a BFS for all reaching defs.
361 for (unsigned i = 0; i != WorkList.size(); ++i) {
362 MachineBasicBlock *MBB = MF->getBlockNumbered(WorkList[i]);
365 if (MBB->pred_empty()) {
366 MBB->getParent()->verify();
367 errs() << "Use of " << PrintReg(PhysReg)
368 << " does not have a corresponding definition on every path:\n";
369 const MachineInstr *MI = Indexes->getInstructionFromIndex(Use);
371 errs() << Use << " " << *MI;
372 report_fatal_error("Use not jointly dominated by defs.");
375 if (TargetRegisterInfo::isPhysicalRegister(PhysReg) &&
376 !MBB->isLiveIn(PhysReg)) {
377 MBB->getParent()->verify();
378 const TargetRegisterInfo *TRI = MRI->getTargetRegisterInfo();
379 errs() << "The register " << PrintReg(PhysReg, TRI)
380 << " needs to be live in to BB#" << MBB->getNumber()
381 << ", but is missing from the live-in list.\n";
382 report_fatal_error("Invalid global physical register");
385 FoundUndef |= MBB->pred_empty();
387 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
388 PE = MBB->pred_end(); PI != PE; ++PI) {
389 MachineBasicBlock *Pred = *PI;
391 // Is this a known live-out block?
392 if (Seen.test(Pred->getNumber())) {
393 if (VNInfo *VNI = Map[Pred].first) {
394 if (TheVNI && TheVNI != VNI)
401 SlotIndex Start, End;
402 std::tie(Start, End) = Indexes->getMBBRange(Pred);
404 // First time we see Pred. Try to determine the live-out value, but set
405 // it as null if Pred is live-through with an unknown value.
406 auto EP = LR.extendInBlock(Undefs, Start, End);
407 VNInfo *VNI = EP.first;
408 FoundUndef |= EP.second;
409 setLiveOutValue(Pred, VNI);
411 if (TheVNI && TheVNI != VNI)
415 if (VNI || EP.second)
418 // No, we need a live-in value for Pred as well
420 WorkList.push_back(Pred->getNumber());
422 // Loopback to UseMBB, so value is really live through.
428 FoundUndef |= (TheVNI == nullptr);
429 if (Undefs.size() > 0 && FoundUndef)
432 // Both updateSSA() and LiveRangeUpdater benefit from ordered blocks, but
433 // neither require it. Skip the sorting overhead for small updates.
434 if (WorkList.size() > 4)
435 array_pod_sort(WorkList.begin(), WorkList.end());
437 // If a unique reaching def was found, blit in the live ranges immediately.
439 assert(TheVNI != nullptr);
440 LiveRangeUpdater Updater(&LR);
441 for (unsigned BN : WorkList) {
442 SlotIndex Start, End;
443 std::tie(Start, End) = Indexes->getMBBRange(BN);
444 // Trim the live range in UseMBB.
445 if (BN == UseMBBNum && Use.isValid())
448 Map[MF->getBlockNumbered(BN)] = LiveOutPair(TheVNI, nullptr);
449 Updater.add(Start, End, TheVNI);
454 // Prepare the defined/undefined bit vectors.
455 auto EF = EntryInfoMap.find(&LR);
456 if (EF == EntryInfoMap.end()) {
457 unsigned N = MF->getNumBlockIDs();
458 EF = EntryInfoMap.insert({&LR, {BitVector(), BitVector()}}).first;
459 EF->second.first.resize(N);
460 EF->second.second.resize(N);
462 BitVector &DefOnEntry = EF->second.first;
463 BitVector &UndefOnEntry = EF->second.second;
465 // Multiple values were found, so transfer the work list to the LiveIn array
466 // where UpdateSSA will use it as a work list.
467 LiveIn.reserve(WorkList.size());
468 for (unsigned BN : WorkList) {
469 MachineBasicBlock *MBB = MF->getBlockNumbered(BN);
470 if (Undefs.size() > 0 && !isDefOnEntry(LR, Undefs, *MBB, DefOnEntry, UndefOnEntry))
472 addLiveInBlock(LR, DomTree->getNode(MBB));
474 LiveIn.back().Kill = Use;
481 // This is essentially the same iterative algorithm that SSAUpdater uses,
482 // except we already have a dominator tree, so we don't have to recompute it.
483 void LiveRangeCalc::updateSSA() {
484 assert(Indexes && "Missing SlotIndexes");
485 assert(DomTree && "Missing dominator tree");
487 // Interate until convergence.
491 // Propagate live-out values down the dominator tree, inserting phi-defs
493 for (LiveInBlock &I : LiveIn) {
494 MachineDomTreeNode *Node = I.DomNode;
495 // Skip block if the live-in value has already been determined.
498 MachineBasicBlock *MBB = Node->getBlock();
499 MachineDomTreeNode *IDom = Node->getIDom();
500 LiveOutPair IDomValue;
502 // We need a live-in value to a block with no immediate dominator?
503 // This is probably an unreachable block that has survived somehow.
504 bool needPHI = !IDom || !Seen.test(IDom->getBlock()->getNumber());
506 // IDom dominates all of our predecessors, but it may not be their
507 // immediate dominator. Check if any of them have live-out values that are
508 // properly dominated by IDom. If so, we need a phi-def here.
510 IDomValue = Map[IDom->getBlock()];
512 // Cache the DomTree node that defined the value.
513 if (IDomValue.first && !IDomValue.second)
514 Map[IDom->getBlock()].second = IDomValue.second =
515 DomTree->getNode(Indexes->getMBBFromIndex(IDomValue.first->def));
517 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
518 PE = MBB->pred_end(); PI != PE; ++PI) {
519 LiveOutPair &Value = Map[*PI];
520 if (!Value.first || Value.first == IDomValue.first)
523 // Cache the DomTree node that defined the value.
526 DomTree->getNode(Indexes->getMBBFromIndex(Value.first->def));
528 // This predecessor is carrying something other than IDomValue.
529 // It could be because IDomValue hasn't propagated yet, or it could be
530 // because MBB is in the dominance frontier of that value.
531 if (DomTree->dominates(IDom, Value.second)) {
538 // The value may be live-through even if Kill is set, as can happen when
539 // we are called from extendRange. In that case LiveOutSeen is true, and
540 // LiveOut indicates a foreign or missing value.
541 LiveOutPair &LOP = Map[MBB];
543 // Create a phi-def if required.
546 assert(Alloc && "Need VNInfo allocator to create PHI-defs");
547 SlotIndex Start, End;
548 std::tie(Start, End) = Indexes->getMBBRange(MBB);
549 LiveRange &LR = I.LR;
550 VNInfo *VNI = LR.getNextValue(Start, *Alloc);
552 // This block is done, we know the final value.
555 // Add liveness since updateFromLiveIns now skips this node.
556 if (I.Kill.isValid()) {
558 LR.addSegment(LiveInterval::Segment(Start, I.Kill, VNI));
561 LR.addSegment(LiveInterval::Segment(Start, End, VNI));
562 LOP = LiveOutPair(VNI, Node);
564 } else if (IDomValue.first) {
565 // No phi-def here. Remember incoming value.
566 I.Value = IDomValue.first;
568 // If the IDomValue is killed in the block, don't propagate through.
569 if (I.Kill.isValid())
572 // Propagate IDomValue if it isn't killed:
573 // MBB is live-out and doesn't define its own value.
574 if (LOP.first == IDomValue.first)