1 //===-- llvm/CodeGen/MachineBasicBlock.cpp ----------------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Collect the sequence of machine instructions for a basic block.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/MachineBasicBlock.h"
15 #include "llvm/ADT/SmallPtrSet.h"
16 #include "llvm/CodeGen/LiveIntervalAnalysis.h"
17 #include "llvm/CodeGen/LiveVariables.h"
18 #include "llvm/CodeGen/MachineDominators.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/MachineInstrBuilder.h"
21 #include "llvm/CodeGen/MachineLoopInfo.h"
22 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 #include "llvm/CodeGen/SlotIndexes.h"
24 #include "llvm/IR/BasicBlock.h"
25 #include "llvm/IR/DataLayout.h"
26 #include "llvm/IR/ModuleSlotTracker.h"
27 #include "llvm/MC/MCAsmInfo.h"
28 #include "llvm/MC/MCContext.h"
29 #include "llvm/Support/DataTypes.h"
30 #include "llvm/Support/Debug.h"
31 #include "llvm/Support/raw_ostream.h"
32 #include "llvm/Target/TargetInstrInfo.h"
33 #include "llvm/Target/TargetMachine.h"
34 #include "llvm/Target/TargetRegisterInfo.h"
35 #include "llvm/Target/TargetSubtargetInfo.h"
39 #define DEBUG_TYPE "codegen"
41 MachineBasicBlock::MachineBasicBlock(MachineFunction &MF, const BasicBlock *B)
42 : BB(B), Number(-1), xParent(&MF) {
46 MachineBasicBlock::~MachineBasicBlock() {
49 /// Return the MCSymbol for this basic block.
50 MCSymbol *MachineBasicBlock::getSymbol() const {
51 if (!CachedMCSymbol) {
52 const MachineFunction *MF = getParent();
53 MCContext &Ctx = MF->getContext();
54 auto Prefix = Ctx.getAsmInfo()->getPrivateLabelPrefix();
55 assert(getNumber() >= 0 && "cannot get label for unreachable MBB");
56 CachedMCSymbol = Ctx.getOrCreateSymbol(Twine(Prefix) + "BB" +
57 Twine(MF->getFunctionNumber()) +
58 "_" + Twine(getNumber()));
61 return CachedMCSymbol;
65 raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineBasicBlock &MBB) {
70 /// When an MBB is added to an MF, we need to update the parent pointer of the
71 /// MBB, the MBB numbering, and any instructions in the MBB to be on the right
72 /// operand list for registers.
74 /// MBBs start out as #-1. When a MBB is added to a MachineFunction, it
75 /// gets the next available unique MBB number. If it is removed from a
76 /// MachineFunction, it goes back to being #-1.
77 void ilist_callback_traits<MachineBasicBlock>::addNodeToList(
78 MachineBasicBlock *N) {
79 MachineFunction &MF = *N->getParent();
80 N->Number = MF.addToMBBNumbering(N);
82 // Make sure the instructions have their operands in the reginfo lists.
83 MachineRegisterInfo &RegInfo = MF.getRegInfo();
84 for (MachineBasicBlock::instr_iterator
85 I = N->instr_begin(), E = N->instr_end(); I != E; ++I)
86 I->AddRegOperandsToUseLists(RegInfo);
89 void ilist_callback_traits<MachineBasicBlock>::removeNodeFromList(
90 MachineBasicBlock *N) {
91 N->getParent()->removeFromMBBNumbering(N->Number);
95 /// When we add an instruction to a basic block list, we update its parent
96 /// pointer and add its operands from reg use/def lists if appropriate.
97 void ilist_traits<MachineInstr>::addNodeToList(MachineInstr *N) {
98 assert(!N->getParent() && "machine instruction already in a basic block");
101 // Add the instruction's register operands to their corresponding
103 MachineFunction *MF = Parent->getParent();
104 N->AddRegOperandsToUseLists(MF->getRegInfo());
107 /// When we remove an instruction from a basic block list, we update its parent
108 /// pointer and remove its operands from reg use/def lists if appropriate.
109 void ilist_traits<MachineInstr>::removeNodeFromList(MachineInstr *N) {
110 assert(N->getParent() && "machine instruction not in a basic block");
112 // Remove from the use/def lists.
113 if (MachineFunction *MF = N->getParent()->getParent())
114 N->RemoveRegOperandsFromUseLists(MF->getRegInfo());
116 N->setParent(nullptr);
119 /// When moving a range of instructions from one MBB list to another, we need to
120 /// update the parent pointers and the use/def lists.
121 void ilist_traits<MachineInstr>::transferNodesFromList(ilist_traits &FromList,
122 instr_iterator First,
123 instr_iterator Last) {
124 assert(Parent->getParent() == FromList.Parent->getParent() &&
125 "MachineInstr parent mismatch!");
126 assert(this != &FromList && "Called without a real transfer...");
127 assert(Parent != FromList.Parent && "Two lists have the same parent?");
129 // If splicing between two blocks within the same function, just update the
131 for (; First != Last; ++First)
132 First->setParent(Parent);
135 void ilist_traits<MachineInstr>::deleteNode(MachineInstr *MI) {
136 assert(!MI->getParent() && "MI is still in a block!");
137 Parent->getParent()->DeleteMachineInstr(MI);
140 MachineBasicBlock::iterator MachineBasicBlock::getFirstNonPHI() {
141 instr_iterator I = instr_begin(), E = instr_end();
142 while (I != E && I->isPHI())
144 assert((I == E || !I->isInsideBundle()) &&
145 "First non-phi MI cannot be inside a bundle!");
149 MachineBasicBlock::iterator
150 MachineBasicBlock::SkipPHIsAndLabels(MachineBasicBlock::iterator I) {
152 while (I != E && (I->isPHI() || I->isPosition()))
154 // FIXME: This needs to change if we wish to bundle labels
155 // inside the bundle.
156 assert((I == E || !I->isInsideBundle()) &&
157 "First non-phi / non-label instruction is inside a bundle!");
161 MachineBasicBlock::iterator
162 MachineBasicBlock::SkipPHIsLabelsAndDebug(MachineBasicBlock::iterator I) {
164 while (I != E && (I->isPHI() || I->isPosition() || I->isDebugValue()))
166 // FIXME: This needs to change if we wish to bundle labels / dbg_values
167 // inside the bundle.
168 assert((I == E || !I->isInsideBundle()) &&
169 "First non-phi / non-label / non-debug "
170 "instruction is inside a bundle!");
174 MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminator() {
175 iterator B = begin(), E = end(), I = E;
176 while (I != B && ((--I)->isTerminator() || I->isDebugValue()))
178 while (I != E && !I->isTerminator())
183 MachineBasicBlock::instr_iterator MachineBasicBlock::getFirstInstrTerminator() {
184 instr_iterator B = instr_begin(), E = instr_end(), I = E;
185 while (I != B && ((--I)->isTerminator() || I->isDebugValue()))
187 while (I != E && !I->isTerminator())
192 MachineBasicBlock::iterator MachineBasicBlock::getFirstNonDebugInstr() {
193 // Skip over begin-of-block dbg_value instructions.
194 return skipDebugInstructionsForward(begin(), end());
197 MachineBasicBlock::iterator MachineBasicBlock::getLastNonDebugInstr() {
198 // Skip over end-of-block dbg_value instructions.
199 instr_iterator B = instr_begin(), I = instr_end();
202 // Return instruction that starts a bundle.
203 if (I->isDebugValue() || I->isInsideBundle())
207 // The block is all debug values.
211 bool MachineBasicBlock::hasEHPadSuccessor() const {
212 for (const_succ_iterator I = succ_begin(), E = succ_end(); I != E; ++I)
218 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
219 LLVM_DUMP_METHOD void MachineBasicBlock::dump() const {
224 StringRef MachineBasicBlock::getName() const {
225 if (const BasicBlock *LBB = getBasicBlock())
226 return LBB->getName();
231 /// Return a hopefully unique identifier for this block.
232 std::string MachineBasicBlock::getFullName() const {
235 Name = (getParent()->getName() + ":").str();
237 Name += getBasicBlock()->getName();
239 Name += ("BB" + Twine(getNumber())).str();
243 void MachineBasicBlock::print(raw_ostream &OS, const SlotIndexes *Indexes)
245 const MachineFunction *MF = getParent();
247 OS << "Can't print out MachineBasicBlock because parent MachineFunction"
251 const Function *F = MF->getFunction();
252 const Module *M = F ? F->getParent() : nullptr;
253 ModuleSlotTracker MST(M);
254 print(OS, MST, Indexes);
257 void MachineBasicBlock::print(raw_ostream &OS, ModuleSlotTracker &MST,
258 const SlotIndexes *Indexes) const {
259 const MachineFunction *MF = getParent();
261 OS << "Can't print out MachineBasicBlock because parent MachineFunction"
267 OS << Indexes->getMBBStartIdx(this) << '\t';
269 OS << "BB#" << getNumber() << ": ";
271 const char *Comma = "";
272 if (const BasicBlock *LBB = getBasicBlock()) {
273 OS << Comma << "derived from LLVM BB ";
274 LBB->printAsOperand(OS, /*PrintType=*/false, MST);
277 if (isEHPad()) { OS << Comma << "EH LANDING PAD"; Comma = ", "; }
278 if (hasAddressTaken()) { OS << Comma << "ADDRESS TAKEN"; Comma = ", "; }
280 OS << Comma << "Align " << Alignment << " (" << (1u << Alignment)
285 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
286 if (!livein_empty()) {
287 if (Indexes) OS << '\t';
289 for (const auto &LI : LiveIns) {
290 OS << ' ' << PrintReg(LI.PhysReg, TRI);
291 if (!LI.LaneMask.all())
292 OS << ':' << PrintLaneMask(LI.LaneMask);
296 // Print the preds of this block according to the CFG.
298 if (Indexes) OS << '\t';
299 OS << " Predecessors according to CFG:";
300 for (const_pred_iterator PI = pred_begin(), E = pred_end(); PI != E; ++PI)
301 OS << " BB#" << (*PI)->getNumber();
305 for (auto &I : instrs()) {
307 if (Indexes->hasIndex(I))
308 OS << Indexes->getInstructionIndex(I);
312 if (I.isInsideBundle())
317 // Print the successors of this block according to the CFG.
319 if (Indexes) OS << '\t';
320 OS << " Successors according to CFG:";
321 for (const_succ_iterator SI = succ_begin(), E = succ_end(); SI != E; ++SI) {
322 OS << " BB#" << (*SI)->getNumber();
324 OS << '(' << *getProbabilityIterator(SI) << ')';
330 void MachineBasicBlock::printAsOperand(raw_ostream &OS,
331 bool /*PrintType*/) const {
332 OS << "BB#" << getNumber();
335 void MachineBasicBlock::removeLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) {
336 LiveInVector::iterator I = find_if(
337 LiveIns, [Reg](const RegisterMaskPair &LI) { return LI.PhysReg == Reg; });
338 if (I == LiveIns.end())
341 I->LaneMask &= ~LaneMask;
342 if (I->LaneMask.none())
346 bool MachineBasicBlock::isLiveIn(MCPhysReg Reg, LaneBitmask LaneMask) const {
347 livein_iterator I = find_if(
348 LiveIns, [Reg](const RegisterMaskPair &LI) { return LI.PhysReg == Reg; });
349 return I != livein_end() && (I->LaneMask & LaneMask).any();
352 void MachineBasicBlock::sortUniqueLiveIns() {
353 std::sort(LiveIns.begin(), LiveIns.end(),
354 [](const RegisterMaskPair &LI0, const RegisterMaskPair &LI1) {
355 return LI0.PhysReg < LI1.PhysReg;
357 // Liveins are sorted by physreg now we can merge their lanemasks.
358 LiveInVector::const_iterator I = LiveIns.begin();
359 LiveInVector::const_iterator J;
360 LiveInVector::iterator Out = LiveIns.begin();
361 for (; I != LiveIns.end(); ++Out, I = J) {
362 unsigned PhysReg = I->PhysReg;
363 LaneBitmask LaneMask = I->LaneMask;
364 for (J = std::next(I); J != LiveIns.end() && J->PhysReg == PhysReg; ++J)
365 LaneMask |= J->LaneMask;
366 Out->PhysReg = PhysReg;
367 Out->LaneMask = LaneMask;
369 LiveIns.erase(Out, LiveIns.end());
373 MachineBasicBlock::addLiveIn(MCPhysReg PhysReg, const TargetRegisterClass *RC) {
374 assert(getParent() && "MBB must be inserted in function");
375 assert(TargetRegisterInfo::isPhysicalRegister(PhysReg) && "Expected physreg");
376 assert(RC && "Register class is required");
377 assert((isEHPad() || this == &getParent()->front()) &&
378 "Only the entry block and landing pads can have physreg live ins");
380 bool LiveIn = isLiveIn(PhysReg);
381 iterator I = SkipPHIsAndLabels(begin()), E = end();
382 MachineRegisterInfo &MRI = getParent()->getRegInfo();
383 const TargetInstrInfo &TII = *getParent()->getSubtarget().getInstrInfo();
385 // Look for an existing copy.
387 for (;I != E && I->isCopy(); ++I)
388 if (I->getOperand(1).getReg() == PhysReg) {
389 unsigned VirtReg = I->getOperand(0).getReg();
390 if (!MRI.constrainRegClass(VirtReg, RC))
391 llvm_unreachable("Incompatible live-in register class.");
395 // No luck, create a virtual register.
396 unsigned VirtReg = MRI.createVirtualRegister(RC);
397 BuildMI(*this, I, DebugLoc(), TII.get(TargetOpcode::COPY), VirtReg)
398 .addReg(PhysReg, RegState::Kill);
404 void MachineBasicBlock::moveBefore(MachineBasicBlock *NewAfter) {
405 getParent()->splice(NewAfter->getIterator(), getIterator());
408 void MachineBasicBlock::moveAfter(MachineBasicBlock *NewBefore) {
409 getParent()->splice(++NewBefore->getIterator(), getIterator());
412 void MachineBasicBlock::updateTerminator() {
413 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
414 // A block with no successors has no concerns with fall-through edges.
415 if (this->succ_empty())
418 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
419 SmallVector<MachineOperand, 4> Cond;
420 DebugLoc DL; // FIXME: this is nowhere
421 bool B = TII->analyzeBranch(*this, TBB, FBB, Cond);
423 assert(!B && "UpdateTerminators requires analyzable predecessors!");
426 // The block has an unconditional branch. If its successor is now its
427 // layout successor, delete the branch.
428 if (isLayoutSuccessor(TBB))
429 TII->removeBranch(*this);
431 // The block has an unconditional fallthrough. If its successor is not its
432 // layout successor, insert a branch. First we have to locate the only
433 // non-landing-pad successor, as that is the fallthrough block.
434 for (succ_iterator SI = succ_begin(), SE = succ_end(); SI != SE; ++SI) {
435 if ((*SI)->isEHPad())
437 assert(!TBB && "Found more than one non-landing-pad successor!");
441 // If there is no non-landing-pad successor, the block has no fall-through
442 // edges to be concerned with.
446 // Finally update the unconditional successor to be reached via a branch
447 // if it would not be reached by fallthrough.
448 if (!isLayoutSuccessor(TBB))
449 TII->insertBranch(*this, TBB, nullptr, Cond, DL);
455 // The block has a non-fallthrough conditional branch. If one of its
456 // successors is its layout successor, rewrite it to a fallthrough
457 // conditional branch.
458 if (isLayoutSuccessor(TBB)) {
459 if (TII->reverseBranchCondition(Cond))
461 TII->removeBranch(*this);
462 TII->insertBranch(*this, FBB, nullptr, Cond, DL);
463 } else if (isLayoutSuccessor(FBB)) {
464 TII->removeBranch(*this);
465 TII->insertBranch(*this, TBB, nullptr, Cond, DL);
470 // Walk through the successors and find the successor which is not a landing
471 // pad and is not the conditional branch destination (in TBB) as the
472 // fallthrough successor.
473 MachineBasicBlock *FallthroughBB = nullptr;
474 for (succ_iterator SI = succ_begin(), SE = succ_end(); SI != SE; ++SI) {
475 if ((*SI)->isEHPad() || *SI == TBB)
477 assert(!FallthroughBB && "Found more than one fallthrough successor.");
481 if (!FallthroughBB) {
482 if (canFallThrough()) {
483 // We fallthrough to the same basic block as the conditional jump targets.
484 // Remove the conditional jump, leaving unconditional fallthrough.
485 // FIXME: This does not seem like a reasonable pattern to support, but it
486 // has been seen in the wild coming out of degenerate ARM test cases.
487 TII->removeBranch(*this);
489 // Finally update the unconditional successor to be reached via a branch if
490 // it would not be reached by fallthrough.
491 if (!isLayoutSuccessor(TBB))
492 TII->insertBranch(*this, TBB, nullptr, Cond, DL);
496 // We enter here iff exactly one successor is TBB which cannot fallthrough
497 // and the rest successors if any are EHPads. In this case, we need to
498 // change the conditional branch into unconditional branch.
499 TII->removeBranch(*this);
501 TII->insertBranch(*this, TBB, nullptr, Cond, DL);
505 // The block has a fallthrough conditional branch.
506 if (isLayoutSuccessor(TBB)) {
507 if (TII->reverseBranchCondition(Cond)) {
508 // We can't reverse the condition, add an unconditional branch.
510 TII->insertBranch(*this, FallthroughBB, nullptr, Cond, DL);
513 TII->removeBranch(*this);
514 TII->insertBranch(*this, FallthroughBB, nullptr, Cond, DL);
515 } else if (!isLayoutSuccessor(FallthroughBB)) {
516 TII->removeBranch(*this);
517 TII->insertBranch(*this, TBB, FallthroughBB, Cond, DL);
521 void MachineBasicBlock::validateSuccProbs() const {
524 for (auto Prob : Probs)
525 Sum += Prob.getNumerator();
526 // Due to precision issue, we assume that the sum of probabilities is one if
527 // the difference between the sum of their numerators and the denominator is
528 // no greater than the number of successors.
529 assert((uint64_t)std::abs(Sum - BranchProbability::getDenominator()) <=
531 "The sum of successors's probabilities exceeds one.");
535 void MachineBasicBlock::addSuccessor(MachineBasicBlock *Succ,
536 BranchProbability Prob) {
537 // Probability list is either empty (if successor list isn't empty, this means
538 // disabled optimization) or has the same size as successor list.
539 if (!(Probs.empty() && !Successors.empty()))
540 Probs.push_back(Prob);
541 Successors.push_back(Succ);
542 Succ->addPredecessor(this);
545 void MachineBasicBlock::addSuccessorWithoutProb(MachineBasicBlock *Succ) {
546 // We need to make sure probability list is either empty or has the same size
547 // of successor list. When this function is called, we can safely delete all
548 // probability in the list.
550 Successors.push_back(Succ);
551 Succ->addPredecessor(this);
554 void MachineBasicBlock::removeSuccessor(MachineBasicBlock *Succ,
555 bool NormalizeSuccProbs) {
556 succ_iterator I = find(Successors, Succ);
557 removeSuccessor(I, NormalizeSuccProbs);
560 MachineBasicBlock::succ_iterator
561 MachineBasicBlock::removeSuccessor(succ_iterator I, bool NormalizeSuccProbs) {
562 assert(I != Successors.end() && "Not a current successor!");
564 // If probability list is empty it means we don't use it (disabled
566 if (!Probs.empty()) {
567 probability_iterator WI = getProbabilityIterator(I);
569 if (NormalizeSuccProbs)
570 normalizeSuccProbs();
573 (*I)->removePredecessor(this);
574 return Successors.erase(I);
577 void MachineBasicBlock::replaceSuccessor(MachineBasicBlock *Old,
578 MachineBasicBlock *New) {
582 succ_iterator E = succ_end();
583 succ_iterator NewI = E;
584 succ_iterator OldI = E;
585 for (succ_iterator I = succ_begin(); I != E; ++I) {
597 assert(OldI != E && "Old is not a successor of this block");
599 // If New isn't already a successor, let it take Old's place.
601 Old->removePredecessor(this);
602 New->addPredecessor(this);
607 // New is already a successor.
608 // Update its probability instead of adding a duplicate edge.
609 if (!Probs.empty()) {
610 auto ProbIter = getProbabilityIterator(NewI);
611 if (!ProbIter->isUnknown())
612 *ProbIter += *getProbabilityIterator(OldI);
614 removeSuccessor(OldI);
617 void MachineBasicBlock::addPredecessor(MachineBasicBlock *Pred) {
618 Predecessors.push_back(Pred);
621 void MachineBasicBlock::removePredecessor(MachineBasicBlock *Pred) {
622 pred_iterator I = find(Predecessors, Pred);
623 assert(I != Predecessors.end() && "Pred is not a predecessor of this block!");
624 Predecessors.erase(I);
627 void MachineBasicBlock::transferSuccessors(MachineBasicBlock *FromMBB) {
631 while (!FromMBB->succ_empty()) {
632 MachineBasicBlock *Succ = *FromMBB->succ_begin();
634 // If probability list is empty it means we don't use it (disabled optimization).
635 if (!FromMBB->Probs.empty()) {
636 auto Prob = *FromMBB->Probs.begin();
637 addSuccessor(Succ, Prob);
639 addSuccessorWithoutProb(Succ);
641 FromMBB->removeSuccessor(Succ);
646 MachineBasicBlock::transferSuccessorsAndUpdatePHIs(MachineBasicBlock *FromMBB) {
650 while (!FromMBB->succ_empty()) {
651 MachineBasicBlock *Succ = *FromMBB->succ_begin();
652 if (!FromMBB->Probs.empty()) {
653 auto Prob = *FromMBB->Probs.begin();
654 addSuccessor(Succ, Prob);
656 addSuccessorWithoutProb(Succ);
657 FromMBB->removeSuccessor(Succ);
659 // Fix up any PHI nodes in the successor.
660 for (MachineBasicBlock::instr_iterator MI = Succ->instr_begin(),
661 ME = Succ->instr_end(); MI != ME && MI->isPHI(); ++MI)
662 for (unsigned i = 2, e = MI->getNumOperands()+1; i != e; i += 2) {
663 MachineOperand &MO = MI->getOperand(i);
664 if (MO.getMBB() == FromMBB)
668 normalizeSuccProbs();
671 bool MachineBasicBlock::isPredecessor(const MachineBasicBlock *MBB) const {
672 return is_contained(predecessors(), MBB);
675 bool MachineBasicBlock::isSuccessor(const MachineBasicBlock *MBB) const {
676 return is_contained(successors(), MBB);
679 bool MachineBasicBlock::isLayoutSuccessor(const MachineBasicBlock *MBB) const {
680 MachineFunction::const_iterator I(this);
681 return std::next(I) == MachineFunction::const_iterator(MBB);
684 bool MachineBasicBlock::canFallThrough() {
685 MachineFunction::iterator Fallthrough = getIterator();
687 // If FallthroughBlock is off the end of the function, it can't fall through.
688 if (Fallthrough == getParent()->end())
691 // If FallthroughBlock isn't a successor, no fallthrough is possible.
692 if (!isSuccessor(&*Fallthrough))
695 // Analyze the branches, if any, at the end of the block.
696 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
697 SmallVector<MachineOperand, 4> Cond;
698 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
699 if (TII->analyzeBranch(*this, TBB, FBB, Cond)) {
700 // If we couldn't analyze the branch, examine the last instruction.
701 // If the block doesn't end in a known control barrier, assume fallthrough
702 // is possible. The isPredicated check is needed because this code can be
703 // called during IfConversion, where an instruction which is normally a
704 // Barrier is predicated and thus no longer an actual control barrier.
705 return empty() || !back().isBarrier() || TII->isPredicated(back());
708 // If there is no branch, control always falls through.
709 if (!TBB) return true;
711 // If there is some explicit branch to the fallthrough block, it can obviously
712 // reach, even though the branch should get folded to fall through implicitly.
713 if (MachineFunction::iterator(TBB) == Fallthrough ||
714 MachineFunction::iterator(FBB) == Fallthrough)
717 // If it's an unconditional branch to some block not the fall through, it
718 // doesn't fall through.
719 if (Cond.empty()) return false;
721 // Otherwise, if it is conditional and has no explicit false block, it falls
723 return FBB == nullptr;
726 MachineBasicBlock *MachineBasicBlock::SplitCriticalEdge(MachineBasicBlock *Succ,
728 if (!canSplitCriticalEdge(Succ))
731 MachineFunction *MF = getParent();
732 DebugLoc DL; // FIXME: this is nowhere
734 MachineBasicBlock *NMBB = MF->CreateMachineBasicBlock();
735 MF->insert(std::next(MachineFunction::iterator(this)), NMBB);
736 DEBUG(dbgs() << "Splitting critical edge:"
737 " BB#" << getNumber()
738 << " -- BB#" << NMBB->getNumber()
739 << " -- BB#" << Succ->getNumber() << '\n');
741 LiveIntervals *LIS = P.getAnalysisIfAvailable<LiveIntervals>();
742 SlotIndexes *Indexes = P.getAnalysisIfAvailable<SlotIndexes>();
744 LIS->insertMBBInMaps(NMBB);
746 Indexes->insertMBBInMaps(NMBB);
748 // On some targets like Mips, branches may kill virtual registers. Make sure
749 // that LiveVariables is properly updated after updateTerminator replaces the
751 LiveVariables *LV = P.getAnalysisIfAvailable<LiveVariables>();
753 // Collect a list of virtual registers killed by the terminators.
754 SmallVector<unsigned, 4> KilledRegs;
756 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end();
758 MachineInstr *MI = &*I;
759 for (MachineInstr::mop_iterator OI = MI->operands_begin(),
760 OE = MI->operands_end(); OI != OE; ++OI) {
761 if (!OI->isReg() || OI->getReg() == 0 ||
762 !OI->isUse() || !OI->isKill() || OI->isUndef())
764 unsigned Reg = OI->getReg();
765 if (TargetRegisterInfo::isPhysicalRegister(Reg) ||
766 LV->getVarInfo(Reg).removeKill(*MI)) {
767 KilledRegs.push_back(Reg);
768 DEBUG(dbgs() << "Removing terminator kill: " << *MI);
769 OI->setIsKill(false);
774 SmallVector<unsigned, 4> UsedRegs;
776 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end();
778 MachineInstr *MI = &*I;
780 for (MachineInstr::mop_iterator OI = MI->operands_begin(),
781 OE = MI->operands_end(); OI != OE; ++OI) {
782 if (!OI->isReg() || OI->getReg() == 0)
785 unsigned Reg = OI->getReg();
786 if (!is_contained(UsedRegs, Reg))
787 UsedRegs.push_back(Reg);
792 ReplaceUsesOfBlockWith(Succ, NMBB);
794 // If updateTerminator() removes instructions, we need to remove them from
796 SmallVector<MachineInstr*, 4> Terminators;
798 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end();
800 Terminators.push_back(&*I);
806 SmallVector<MachineInstr*, 4> NewTerminators;
807 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end();
809 NewTerminators.push_back(&*I);
811 for (SmallVectorImpl<MachineInstr*>::iterator I = Terminators.begin(),
812 E = Terminators.end(); I != E; ++I) {
813 if (!is_contained(NewTerminators, *I))
814 Indexes->removeMachineInstrFromMaps(**I);
818 // Insert unconditional "jump Succ" instruction in NMBB if necessary.
819 NMBB->addSuccessor(Succ);
820 if (!NMBB->isLayoutSuccessor(Succ)) {
821 SmallVector<MachineOperand, 4> Cond;
822 const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
823 TII->insertBranch(*NMBB, Succ, nullptr, Cond, DL);
826 for (MachineInstr &MI : NMBB->instrs()) {
827 // Some instructions may have been moved to NMBB by updateTerminator(),
828 // so we first remove any instruction that already has an index.
829 if (Indexes->hasIndex(MI))
830 Indexes->removeMachineInstrFromMaps(MI);
831 Indexes->insertMachineInstrInMaps(MI);
836 // Fix PHI nodes in Succ so they refer to NMBB instead of this
837 for (MachineBasicBlock::instr_iterator
838 i = Succ->instr_begin(),e = Succ->instr_end();
839 i != e && i->isPHI(); ++i)
840 for (unsigned ni = 1, ne = i->getNumOperands(); ni != ne; ni += 2)
841 if (i->getOperand(ni+1).getMBB() == this)
842 i->getOperand(ni+1).setMBB(NMBB);
844 // Inherit live-ins from the successor
845 for (const auto &LI : Succ->liveins())
848 // Update LiveVariables.
849 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
851 // Restore kills of virtual registers that were killed by the terminators.
852 while (!KilledRegs.empty()) {
853 unsigned Reg = KilledRegs.pop_back_val();
854 for (instr_iterator I = instr_end(), E = instr_begin(); I != E;) {
855 if (!(--I)->addRegisterKilled(Reg, TRI, /* addIfNotFound= */ false))
857 if (TargetRegisterInfo::isVirtualRegister(Reg))
858 LV->getVarInfo(Reg).Kills.push_back(&*I);
859 DEBUG(dbgs() << "Restored terminator kill: " << *I);
863 // Update relevant live-through information.
864 LV->addNewBlock(NMBB, this, Succ);
868 // After splitting the edge and updating SlotIndexes, live intervals may be
869 // in one of two situations, depending on whether this block was the last in
870 // the function. If the original block was the last in the function, all
871 // live intervals will end prior to the beginning of the new split block. If
872 // the original block was not at the end of the function, all live intervals
873 // will extend to the end of the new split block.
876 std::next(MachineFunction::iterator(NMBB)) == getParent()->end();
878 SlotIndex StartIndex = Indexes->getMBBEndIdx(this);
879 SlotIndex PrevIndex = StartIndex.getPrevSlot();
880 SlotIndex EndIndex = Indexes->getMBBEndIdx(NMBB);
882 // Find the registers used from NMBB in PHIs in Succ.
883 SmallSet<unsigned, 8> PHISrcRegs;
884 for (MachineBasicBlock::instr_iterator
885 I = Succ->instr_begin(), E = Succ->instr_end();
886 I != E && I->isPHI(); ++I) {
887 for (unsigned ni = 1, ne = I->getNumOperands(); ni != ne; ni += 2) {
888 if (I->getOperand(ni+1).getMBB() == NMBB) {
889 MachineOperand &MO = I->getOperand(ni);
890 unsigned Reg = MO.getReg();
891 PHISrcRegs.insert(Reg);
895 LiveInterval &LI = LIS->getInterval(Reg);
896 VNInfo *VNI = LI.getVNInfoAt(PrevIndex);
898 "PHI sources should be live out of their predecessors.");
899 LI.addSegment(LiveInterval::Segment(StartIndex, EndIndex, VNI));
904 MachineRegisterInfo *MRI = &getParent()->getRegInfo();
905 for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
906 unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
907 if (PHISrcRegs.count(Reg) || !LIS->hasInterval(Reg))
910 LiveInterval &LI = LIS->getInterval(Reg);
911 if (!LI.liveAt(PrevIndex))
914 bool isLiveOut = LI.liveAt(LIS->getMBBStartIdx(Succ));
915 if (isLiveOut && isLastMBB) {
916 VNInfo *VNI = LI.getVNInfoAt(PrevIndex);
917 assert(VNI && "LiveInterval should have VNInfo where it is live.");
918 LI.addSegment(LiveInterval::Segment(StartIndex, EndIndex, VNI));
919 } else if (!isLiveOut && !isLastMBB) {
920 LI.removeSegment(StartIndex, EndIndex);
924 // Update all intervals for registers whose uses may have been modified by
925 // updateTerminator().
926 LIS->repairIntervalsInRange(this, getFirstTerminator(), end(), UsedRegs);
929 if (MachineDominatorTree *MDT =
930 P.getAnalysisIfAvailable<MachineDominatorTree>())
931 MDT->recordSplitCriticalEdge(this, Succ, NMBB);
933 if (MachineLoopInfo *MLI = P.getAnalysisIfAvailable<MachineLoopInfo>())
934 if (MachineLoop *TIL = MLI->getLoopFor(this)) {
935 // If one or the other blocks were not in a loop, the new block is not
936 // either, and thus LI doesn't need to be updated.
937 if (MachineLoop *DestLoop = MLI->getLoopFor(Succ)) {
938 if (TIL == DestLoop) {
939 // Both in the same loop, the NMBB joins loop.
940 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
941 } else if (TIL->contains(DestLoop)) {
942 // Edge from an outer loop to an inner loop. Add to the outer loop.
943 TIL->addBasicBlockToLoop(NMBB, MLI->getBase());
944 } else if (DestLoop->contains(TIL)) {
945 // Edge from an inner loop to an outer loop. Add to the outer loop.
946 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
948 // Edge from two loops with no containment relation. Because these
949 // are natural loops, we know that the destination block must be the
950 // header of its loop (adding a branch into a loop elsewhere would
951 // create an irreducible loop).
952 assert(DestLoop->getHeader() == Succ &&
953 "Should not create irreducible loops!");
954 if (MachineLoop *P = DestLoop->getParentLoop())
955 P->addBasicBlockToLoop(NMBB, MLI->getBase());
963 bool MachineBasicBlock::canSplitCriticalEdge(
964 const MachineBasicBlock *Succ) const {
965 // Splitting the critical edge to a landing pad block is non-trivial. Don't do
966 // it in this generic function.
970 const MachineFunction *MF = getParent();
972 // Performance might be harmed on HW that implements branching using exec mask
973 // where both sides of the branches are always executed.
974 if (MF->getTarget().requiresStructuredCFG())
977 // We may need to update this's terminator, but we can't do that if
978 // AnalyzeBranch fails. If this uses a jump table, we won't touch it.
979 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
980 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
981 SmallVector<MachineOperand, 4> Cond;
982 // AnalyzeBanch should modify this, since we did not allow modification.
983 if (TII->analyzeBranch(*const_cast<MachineBasicBlock *>(this), TBB, FBB, Cond,
984 /*AllowModify*/ false))
987 // Avoid bugpoint weirdness: A block may end with a conditional branch but
988 // jumps to the same MBB is either case. We have duplicate CFG edges in that
989 // case that we can't handle. Since this never happens in properly optimized
990 // code, just skip those edges.
991 if (TBB && TBB == FBB) {
992 DEBUG(dbgs() << "Won't split critical edge after degenerate BB#"
993 << getNumber() << '\n');
999 /// Prepare MI to be removed from its bundle. This fixes bundle flags on MI's
1000 /// neighboring instructions so the bundle won't be broken by removing MI.
1001 static void unbundleSingleMI(MachineInstr *MI) {
1002 // Removing the first instruction in a bundle.
1003 if (MI->isBundledWithSucc() && !MI->isBundledWithPred())
1004 MI->unbundleFromSucc();
1005 // Removing the last instruction in a bundle.
1006 if (MI->isBundledWithPred() && !MI->isBundledWithSucc())
1007 MI->unbundleFromPred();
1008 // If MI is not bundled, or if it is internal to a bundle, the neighbor flags
1009 // are already fine.
1012 MachineBasicBlock::instr_iterator
1013 MachineBasicBlock::erase(MachineBasicBlock::instr_iterator I) {
1014 unbundleSingleMI(&*I);
1015 return Insts.erase(I);
1018 MachineInstr *MachineBasicBlock::remove_instr(MachineInstr *MI) {
1019 unbundleSingleMI(MI);
1020 MI->clearFlag(MachineInstr::BundledPred);
1021 MI->clearFlag(MachineInstr::BundledSucc);
1022 return Insts.remove(MI);
1025 MachineBasicBlock::instr_iterator
1026 MachineBasicBlock::insert(instr_iterator I, MachineInstr *MI) {
1027 assert(!MI->isBundledWithPred() && !MI->isBundledWithSucc() &&
1028 "Cannot insert instruction with bundle flags");
1029 // Set the bundle flags when inserting inside a bundle.
1030 if (I != instr_end() && I->isBundledWithPred()) {
1031 MI->setFlag(MachineInstr::BundledPred);
1032 MI->setFlag(MachineInstr::BundledSucc);
1034 return Insts.insert(I, MI);
1037 /// This method unlinks 'this' from the containing function, and returns it, but
1038 /// does not delete it.
1039 MachineBasicBlock *MachineBasicBlock::removeFromParent() {
1040 assert(getParent() && "Not embedded in a function!");
1041 getParent()->remove(this);
1045 /// This method unlinks 'this' from the containing function, and deletes it.
1046 void MachineBasicBlock::eraseFromParent() {
1047 assert(getParent() && "Not embedded in a function!");
1048 getParent()->erase(this);
1051 /// Given a machine basic block that branched to 'Old', change the code and CFG
1052 /// so that it branches to 'New' instead.
1053 void MachineBasicBlock::ReplaceUsesOfBlockWith(MachineBasicBlock *Old,
1054 MachineBasicBlock *New) {
1055 assert(Old != New && "Cannot replace self with self!");
1057 MachineBasicBlock::instr_iterator I = instr_end();
1058 while (I != instr_begin()) {
1060 if (!I->isTerminator()) break;
1062 // Scan the operands of this machine instruction, replacing any uses of Old
1064 for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i)
1065 if (I->getOperand(i).isMBB() &&
1066 I->getOperand(i).getMBB() == Old)
1067 I->getOperand(i).setMBB(New);
1070 // Update the successor information.
1071 replaceSuccessor(Old, New);
1074 /// Various pieces of code can cause excess edges in the CFG to be inserted. If
1075 /// we have proven that MBB can only branch to DestA and DestB, remove any other
1076 /// MBB successors from the CFG. DestA and DestB can be null.
1078 /// Besides DestA and DestB, retain other edges leading to LandingPads
1079 /// (currently there can be only one; we don't check or require that here).
1080 /// Note it is possible that DestA and/or DestB are LandingPads.
1081 bool MachineBasicBlock::CorrectExtraCFGEdges(MachineBasicBlock *DestA,
1082 MachineBasicBlock *DestB,
1084 // The values of DestA and DestB frequently come from a call to the
1085 // 'TargetInstrInfo::AnalyzeBranch' method. We take our meaning of the initial
1086 // values from there.
1088 // 1. If both DestA and DestB are null, then the block ends with no branches
1089 // (it falls through to its successor).
1090 // 2. If DestA is set, DestB is null, and IsCond is false, then the block ends
1091 // with only an unconditional branch.
1092 // 3. If DestA is set, DestB is null, and IsCond is true, then the block ends
1093 // with a conditional branch that falls through to a successor (DestB).
1094 // 4. If DestA and DestB is set and IsCond is true, then the block ends with a
1095 // conditional branch followed by an unconditional branch. DestA is the
1096 // 'true' destination and DestB is the 'false' destination.
1098 bool Changed = false;
1100 MachineBasicBlock *FallThru = getNextNode();
1102 if (!DestA && !DestB) {
1103 // Block falls through to successor.
1106 } else if (DestA && !DestB) {
1108 // Block ends in conditional jump that falls through to successor.
1111 assert(DestA && DestB && IsCond &&
1112 "CFG in a bad state. Cannot correct CFG edges");
1115 // Remove superfluous edges. I.e., those which aren't destinations of this
1116 // basic block, duplicate edges, or landing pads.
1117 SmallPtrSet<const MachineBasicBlock*, 8> SeenMBBs;
1118 MachineBasicBlock::succ_iterator SI = succ_begin();
1119 while (SI != succ_end()) {
1120 const MachineBasicBlock *MBB = *SI;
1121 if (!SeenMBBs.insert(MBB).second ||
1122 (MBB != DestA && MBB != DestB && !MBB->isEHPad())) {
1123 // This is a superfluous edge, remove it.
1124 SI = removeSuccessor(SI);
1132 normalizeSuccProbs();
1136 /// Find the next valid DebugLoc starting at MBBI, skipping any DBG_VALUE
1137 /// instructions. Return UnknownLoc if there is none.
1139 MachineBasicBlock::findDebugLoc(instr_iterator MBBI) {
1140 // Skip debug declarations, we don't want a DebugLoc from them.
1141 MBBI = skipDebugInstructionsForward(MBBI, instr_end());
1142 if (MBBI != instr_end())
1143 return MBBI->getDebugLoc();
1147 /// Return probability of the edge from this block to MBB.
1149 MachineBasicBlock::getSuccProbability(const_succ_iterator Succ) const {
1151 return BranchProbability(1, succ_size());
1153 const auto &Prob = *getProbabilityIterator(Succ);
1154 if (Prob.isUnknown()) {
1155 // For unknown probabilities, collect the sum of all known ones, and evenly
1156 // ditribute the complemental of the sum to each unknown probability.
1157 unsigned KnownProbNum = 0;
1158 auto Sum = BranchProbability::getZero();
1159 for (auto &P : Probs) {
1160 if (!P.isUnknown()) {
1165 return Sum.getCompl() / (Probs.size() - KnownProbNum);
1170 /// Set successor probability of a given iterator.
1171 void MachineBasicBlock::setSuccProbability(succ_iterator I,
1172 BranchProbability Prob) {
1173 assert(!Prob.isUnknown());
1176 *getProbabilityIterator(I) = Prob;
1179 /// Return probability iterator corresonding to the I successor iterator
1180 MachineBasicBlock::const_probability_iterator
1181 MachineBasicBlock::getProbabilityIterator(
1182 MachineBasicBlock::const_succ_iterator I) const {
1183 assert(Probs.size() == Successors.size() && "Async probability list!");
1184 const size_t index = std::distance(Successors.begin(), I);
1185 assert(index < Probs.size() && "Not a current successor!");
1186 return Probs.begin() + index;
1189 /// Return probability iterator corresonding to the I successor iterator.
1190 MachineBasicBlock::probability_iterator
1191 MachineBasicBlock::getProbabilityIterator(MachineBasicBlock::succ_iterator I) {
1192 assert(Probs.size() == Successors.size() && "Async probability list!");
1193 const size_t index = std::distance(Successors.begin(), I);
1194 assert(index < Probs.size() && "Not a current successor!");
1195 return Probs.begin() + index;
1198 /// Return whether (physical) register "Reg" has been <def>ined and not <kill>ed
1199 /// as of just before "MI".
1201 /// Search is localised to a neighborhood of
1202 /// Neighborhood instructions before (searching for defs or kills) and N
1203 /// instructions after (searching just for defs) MI.
1204 MachineBasicBlock::LivenessQueryResult
1205 MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI,
1206 unsigned Reg, const_iterator Before,
1207 unsigned Neighborhood) const {
1208 unsigned N = Neighborhood;
1210 // Start by searching backwards from Before, looking for kills, reads or defs.
1211 const_iterator I(Before);
1212 // If this is the first insn in the block, don't search backwards.
1217 MachineOperandIteratorBase::PhysRegInfo Info =
1218 ConstMIOperands(*I).analyzePhysReg(Reg, TRI);
1220 // Defs happen after uses so they take precedence if both are present.
1222 // Register is dead after a dead def of the full register.
1225 // Register is (at least partially) live after a def.
1227 if (!Info.PartialDeadDef)
1229 // As soon as we saw a partial definition (dead or not),
1230 // we cannot tell if the value is partial live without
1231 // tracking the lanemasks. We are not going to do this,
1232 // so fall back on the remaining of the analysis.
1235 // Register is dead after a full kill or clobber and no def.
1236 if (Info.Killed || Info.Clobbered)
1238 // Register must be live if we read it.
1241 } while (I != begin() && --N > 0);
1244 // Did we get to the start of the block?
1246 // If so, the register's state is definitely defined by the live-in state.
1247 for (MCRegAliasIterator RAI(Reg, TRI, /*IncludeSelf=*/true); RAI.isValid();
1257 // Try searching forwards from Before, looking for reads or defs.
1258 I = const_iterator(Before);
1259 // If this is the last insn in the block, don't search forwards.
1261 for (++I; I != end() && N > 0; ++I, --N) {
1262 MachineOperandIteratorBase::PhysRegInfo Info =
1263 ConstMIOperands(*I).analyzePhysReg(Reg, TRI);
1265 // Register is live when we read it here.
1268 // Register is dead if we can fully overwrite or clobber it here.
1269 if (Info.FullyDefined || Info.Clobbered)
1274 // At this point we have no idea of the liveness of the register.
1279 MachineBasicBlock::getBeginClobberMask(const TargetRegisterInfo *TRI) const {
1280 // EH funclet entry does not preserve any registers.
1281 return isEHFuncletEntry() ? TRI->getNoPreservedMask() : nullptr;
1285 MachineBasicBlock::getEndClobberMask(const TargetRegisterInfo *TRI) const {
1286 // If we see a return block with successors, this must be a funclet return,
1287 // which does not preserve any registers. If there are no successors, we don't
1288 // care what kind of return it is, putting a mask after it is a no-op.
1289 return isReturnBlock() && !succ_empty() ? TRI->getNoPreservedMask() : nullptr;
1292 void MachineBasicBlock::clearLiveIns() {
1296 MachineBasicBlock::livein_iterator MachineBasicBlock::livein_begin() const {
1297 assert(getParent()->getProperties().hasProperty(
1298 MachineFunctionProperties::Property::TracksLiveness) &&
1299 "Liveness information is accurate");
1300 return LiveIns.begin();