1 //===- MachineCopyPropagation.cpp - Machine Copy Propagation Pass ---------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This is an extremely simple MachineInstr-level copy propagation pass.
12 // This pass forwards the source of COPYs to the users of their destinations
13 // when doing so is legal. For example:
20 // - %reg0 has not been clobbered by the time of the use of %reg1
21 // - the register class constraints are satisfied
22 // - the COPY def is the only value that reaches OP
23 // then this pass replaces the above with:
29 // This pass also removes some redundant COPYs. For example:
32 // ... // No clobber of %R1
33 // %R0 = COPY %R1 <<< Removed
38 // ... // No clobber of %R0
39 // %R1 = COPY %R0 <<< Removed
41 //===----------------------------------------------------------------------===//
43 #include "llvm/ADT/DenseMap.h"
44 #include "llvm/ADT/STLExtras.h"
45 #include "llvm/ADT/SetVector.h"
46 #include "llvm/ADT/SmallVector.h"
47 #include "llvm/ADT/Statistic.h"
48 #include "llvm/ADT/iterator_range.h"
49 #include "llvm/CodeGen/MachineBasicBlock.h"
50 #include "llvm/CodeGen/MachineFunction.h"
51 #include "llvm/CodeGen/MachineFunctionPass.h"
52 #include "llvm/CodeGen/MachineInstr.h"
53 #include "llvm/CodeGen/MachineOperand.h"
54 #include "llvm/CodeGen/MachineRegisterInfo.h"
55 #include "llvm/CodeGen/TargetInstrInfo.h"
56 #include "llvm/CodeGen/TargetRegisterInfo.h"
57 #include "llvm/CodeGen/TargetSubtargetInfo.h"
58 #include "llvm/MC/MCRegisterInfo.h"
59 #include "llvm/Pass.h"
60 #include "llvm/Support/Debug.h"
61 #include "llvm/Support/DebugCounter.h"
62 #include "llvm/Support/raw_ostream.h"
68 #define DEBUG_TYPE "machine-cp"
70 STATISTIC(NumDeletes, "Number of dead copies deleted");
71 STATISTIC(NumCopyForwards, "Number of copy uses forwarded");
72 DEBUG_COUNTER(FwdCounter, "machine-cp-fwd",
73 "Controls which register COPYs are forwarded");
77 using RegList = SmallVector<unsigned, 4>;
78 using SourceMap = DenseMap<unsigned, RegList>;
79 using Reg2MIMap = DenseMap<unsigned, MachineInstr *>;
81 class MachineCopyPropagation : public MachineFunctionPass {
82 const TargetRegisterInfo *TRI;
83 const TargetInstrInfo *TII;
84 const MachineRegisterInfo *MRI;
87 static char ID; // Pass identification, replacement for typeid
89 MachineCopyPropagation() : MachineFunctionPass(ID) {
90 initializeMachineCopyPropagationPass(*PassRegistry::getPassRegistry());
93 void getAnalysisUsage(AnalysisUsage &AU) const override {
95 MachineFunctionPass::getAnalysisUsage(AU);
98 bool runOnMachineFunction(MachineFunction &MF) override;
100 MachineFunctionProperties getRequiredProperties() const override {
101 return MachineFunctionProperties().set(
102 MachineFunctionProperties::Property::NoVRegs);
106 void ClobberRegister(unsigned Reg);
107 void ReadRegister(unsigned Reg);
108 void CopyPropagateBlock(MachineBasicBlock &MBB);
109 bool eraseIfRedundant(MachineInstr &Copy, unsigned Src, unsigned Def);
110 void forwardUses(MachineInstr &MI);
111 bool isForwardableRegClassCopy(const MachineInstr &Copy,
112 const MachineInstr &UseI, unsigned UseIdx);
113 bool hasImplicitOverlap(const MachineInstr &MI, const MachineOperand &Use);
115 /// Candidates for deletion.
116 SmallSetVector<MachineInstr*, 8> MaybeDeadCopies;
118 /// Def -> available copies map.
119 Reg2MIMap AvailCopyMap;
121 /// Def -> copies map.
130 } // end anonymous namespace
132 char MachineCopyPropagation::ID = 0;
134 char &llvm::MachineCopyPropagationID = MachineCopyPropagation::ID;
136 INITIALIZE_PASS(MachineCopyPropagation, DEBUG_TYPE,
137 "Machine Copy Propagation Pass", false, false)
139 /// Remove any entry in \p Map where the register is a subregister or equal to
140 /// a register contained in \p Regs.
141 static void removeRegsFromMap(Reg2MIMap &Map, const RegList &Regs,
142 const TargetRegisterInfo &TRI) {
143 for (unsigned Reg : Regs) {
144 // Source of copy is no longer available for propagation.
145 for (MCSubRegIterator SR(Reg, &TRI, true); SR.isValid(); ++SR)
150 /// Remove any entry in \p Map that is marked clobbered in \p RegMask.
151 /// The map will typically have a lot fewer entries than the regmask clobbers,
152 /// so this is more efficient than iterating the clobbered registers and calling
153 /// ClobberRegister() on them.
154 static void removeClobberedRegsFromMap(Reg2MIMap &Map,
155 const MachineOperand &RegMask) {
156 for (Reg2MIMap::iterator I = Map.begin(), E = Map.end(), Next; I != E;
159 unsigned Reg = I->first;
160 if (RegMask.clobbersPhysReg(Reg))
165 void MachineCopyPropagation::ClobberRegister(unsigned Reg) {
166 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) {
168 AvailCopyMap.erase(*AI);
170 SourceMap::iterator SI = SrcMap.find(*AI);
171 if (SI != SrcMap.end()) {
172 removeRegsFromMap(AvailCopyMap, SI->second, *TRI);
178 void MachineCopyPropagation::ReadRegister(unsigned Reg) {
179 // If 'Reg' is defined by a copy, the copy is no longer a candidate
181 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) {
182 Reg2MIMap::iterator CI = CopyMap.find(*AI);
183 if (CI != CopyMap.end()) {
184 LLVM_DEBUG(dbgs() << "MCP: Copy is used - not dead: ";
186 MaybeDeadCopies.remove(CI->second);
191 /// Return true if \p PreviousCopy did copy register \p Src to register \p Def.
192 /// This fact may have been obscured by sub register usage or may not be true at
193 /// all even though Src and Def are subregisters of the registers used in
194 /// PreviousCopy. e.g.
195 /// isNopCopy("ecx = COPY eax", AX, CX) == true
196 /// isNopCopy("ecx = COPY eax", AH, CL) == false
197 static bool isNopCopy(const MachineInstr &PreviousCopy, unsigned Src,
198 unsigned Def, const TargetRegisterInfo *TRI) {
199 unsigned PreviousSrc = PreviousCopy.getOperand(1).getReg();
200 unsigned PreviousDef = PreviousCopy.getOperand(0).getReg();
201 if (Src == PreviousSrc) {
202 assert(Def == PreviousDef);
205 if (!TRI->isSubRegister(PreviousSrc, Src))
207 unsigned SubIdx = TRI->getSubRegIndex(PreviousSrc, Src);
208 return SubIdx == TRI->getSubRegIndex(PreviousDef, Def);
211 /// Remove instruction \p Copy if there exists a previous copy that copies the
212 /// register \p Src to the register \p Def; This may happen indirectly by
213 /// copying the super registers.
214 bool MachineCopyPropagation::eraseIfRedundant(MachineInstr &Copy, unsigned Src,
216 // Avoid eliminating a copy from/to a reserved registers as we cannot predict
217 // the value (Example: The sparc zero register is writable but stays zero).
218 if (MRI->isReserved(Src) || MRI->isReserved(Def))
221 // Search for an existing copy.
222 Reg2MIMap::iterator CI = AvailCopyMap.find(Def);
223 if (CI == AvailCopyMap.end())
226 // Check that the existing copy uses the correct sub registers.
227 MachineInstr &PrevCopy = *CI->second;
228 if (PrevCopy.getOperand(0).isDead())
230 if (!isNopCopy(PrevCopy, Src, Def, TRI))
233 LLVM_DEBUG(dbgs() << "MCP: copy is a NOP, removing: "; Copy.dump());
235 // Copy was redundantly redefining either Src or Def. Remove earlier kill
236 // flags between Copy and PrevCopy because the value will be reused now.
237 assert(Copy.isCopy());
238 unsigned CopyDef = Copy.getOperand(0).getReg();
239 assert(CopyDef == Src || CopyDef == Def);
240 for (MachineInstr &MI :
241 make_range(PrevCopy.getIterator(), Copy.getIterator()))
242 MI.clearRegisterKills(CopyDef, TRI);
244 Copy.eraseFromParent();
250 /// Decide whether we should forward the source of \param Copy to its use in
251 /// \param UseI based on the physical register class constraints of the opcode
252 /// and avoiding introducing more cross-class COPYs.
253 bool MachineCopyPropagation::isForwardableRegClassCopy(const MachineInstr &Copy,
254 const MachineInstr &UseI,
257 unsigned CopySrcReg = Copy.getOperand(1).getReg();
259 // If the new register meets the opcode register constraints, then allow
261 if (const TargetRegisterClass *URC =
262 UseI.getRegClassConstraint(UseIdx, TII, TRI))
263 return URC->contains(CopySrcReg);
268 /// COPYs don't have register class constraints, so if the user instruction
269 /// is a COPY, we just try to avoid introducing additional cross-class
270 /// COPYs. For example:
272 /// RegClassA = COPY RegClassB // Copy parameter
274 /// RegClassB = COPY RegClassA // UseI parameter
276 /// which after forwarding becomes
278 /// RegClassA = COPY RegClassB
280 /// RegClassB = COPY RegClassB
282 /// so we have reduced the number of cross-class COPYs and potentially
283 /// introduced a nop COPY that can be removed.
284 const TargetRegisterClass *UseDstRC =
285 TRI->getMinimalPhysRegClass(UseI.getOperand(0).getReg());
287 const TargetRegisterClass *SuperRC = UseDstRC;
288 for (TargetRegisterClass::sc_iterator SuperRCI = UseDstRC->getSuperClasses();
289 SuperRC; SuperRC = *SuperRCI++)
290 if (SuperRC->contains(CopySrcReg))
296 /// Check that \p MI does not have implicit uses that overlap with it's \p Use
297 /// operand (the register being replaced), since these can sometimes be
298 /// implicitly tied to other operands. For example, on AMDGPU:
300 /// V_MOVRELS_B32_e32 %VGPR2, %M0<imp-use>, %EXEC<imp-use>, %VGPR2_VGPR3_VGPR4_VGPR5<imp-use>
302 /// the %VGPR2 is implicitly tied to the larger reg operand, but we have no
303 /// way of knowing we need to update the latter when updating the former.
304 bool MachineCopyPropagation::hasImplicitOverlap(const MachineInstr &MI,
305 const MachineOperand &Use) {
306 for (const MachineOperand &MIUse : MI.uses())
307 if (&MIUse != &Use && MIUse.isReg() && MIUse.isImplicit() &&
308 MIUse.isUse() && TRI->regsOverlap(Use.getReg(), MIUse.getReg()))
314 /// Look for available copies whose destination register is used by \p MI and
315 /// replace the use in \p MI with the copy's source register.
316 void MachineCopyPropagation::forwardUses(MachineInstr &MI) {
317 if (AvailCopyMap.empty())
320 // Look for non-tied explicit vreg uses that have an active COPY
321 // instruction that defines the physical register allocated to them.
322 // Replace the vreg with the source of the active COPY.
323 for (unsigned OpIdx = 0, OpEnd = MI.getNumOperands(); OpIdx < OpEnd;
325 MachineOperand &MOUse = MI.getOperand(OpIdx);
326 // Don't forward into undef use operands since doing so can cause problems
327 // with the machine verifier, since it doesn't treat undef reads as reads,
328 // so we can end up with a live range that ends on an undef read, leading to
329 // an error that the live range doesn't end on a read of the live range
331 if (!MOUse.isReg() || MOUse.isTied() || MOUse.isUndef() || MOUse.isDef() ||
338 // Check that the register is marked 'renamable' so we know it is safe to
339 // rename it without violating any constraints that aren't expressed in the
340 // IR (e.g. ABI or opcode requirements).
341 if (!MOUse.isRenamable())
344 auto CI = AvailCopyMap.find(MOUse.getReg());
345 if (CI == AvailCopyMap.end())
348 MachineInstr &Copy = *CI->second;
349 unsigned CopyDstReg = Copy.getOperand(0).getReg();
350 const MachineOperand &CopySrc = Copy.getOperand(1);
351 unsigned CopySrcReg = CopySrc.getReg();
353 // FIXME: Don't handle partial uses of wider COPYs yet.
354 if (MOUse.getReg() != CopyDstReg) {
356 dbgs() << "MCP: FIXME! Not forwarding COPY to sub-register use:\n "
361 // Don't forward COPYs of reserved regs unless they are constant.
362 if (MRI->isReserved(CopySrcReg) && !MRI->isConstantPhysReg(CopySrcReg))
365 if (!isForwardableRegClassCopy(Copy, MI, OpIdx))
368 if (hasImplicitOverlap(MI, MOUse))
371 if (!DebugCounter::shouldExecute(FwdCounter)) {
372 LLVM_DEBUG(dbgs() << "MCP: Skipping forwarding due to debug counter:\n "
377 LLVM_DEBUG(dbgs() << "MCP: Replacing " << printReg(MOUse.getReg(), TRI)
378 << "\n with " << printReg(CopySrcReg, TRI)
379 << "\n in " << MI << " from " << Copy);
381 MOUse.setReg(CopySrcReg);
382 if (!CopySrc.isRenamable())
383 MOUse.setIsRenamable(false);
385 LLVM_DEBUG(dbgs() << "MCP: After replacement: " << MI << "\n");
387 // Clear kill markers that may have been invalidated.
388 for (MachineInstr &KMI :
389 make_range(Copy.getIterator(), std::next(MI.getIterator())))
390 KMI.clearRegisterKills(CopySrcReg, TRI);
397 void MachineCopyPropagation::CopyPropagateBlock(MachineBasicBlock &MBB) {
398 LLVM_DEBUG(dbgs() << "MCP: CopyPropagateBlock " << MBB.getName() << "\n");
400 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ) {
401 MachineInstr *MI = &*I;
404 // Analyze copies (which don't overlap themselves).
405 if (MI->isCopy() && !TRI->regsOverlap(MI->getOperand(0).getReg(),
406 MI->getOperand(1).getReg())) {
407 unsigned Def = MI->getOperand(0).getReg();
408 unsigned Src = MI->getOperand(1).getReg();
410 assert(!TargetRegisterInfo::isVirtualRegister(Def) &&
411 !TargetRegisterInfo::isVirtualRegister(Src) &&
412 "MachineCopyPropagation should be run after register allocation!");
414 // The two copies cancel out and the source of the first copy
415 // hasn't been overridden, eliminate the second one. e.g.
417 // ... nothing clobbered eax.
425 // ... nothing clobbered eax.
429 if (eraseIfRedundant(*MI, Def, Src) || eraseIfRedundant(*MI, Src, Def))
434 // Src may have been changed by forwardUses()
435 Src = MI->getOperand(1).getReg();
437 // If Src is defined by a previous copy, the previous copy cannot be
440 for (const MachineOperand &MO : MI->implicit_operands()) {
441 if (!MO.isReg() || !MO.readsReg())
443 unsigned Reg = MO.getReg();
449 LLVM_DEBUG(dbgs() << "MCP: Copy is a deletion candidate: "; MI->dump());
451 // Copy is now a candidate for deletion.
452 if (!MRI->isReserved(Def))
453 MaybeDeadCopies.insert(MI);
455 // If 'Def' is previously source of another copy, then this earlier copy's
456 // source is no longer available. e.g.
457 // %xmm9 = copy %xmm2
459 // %xmm2 = copy %xmm0
461 // %xmm2 = copy %xmm9
462 ClobberRegister(Def);
463 for (const MachineOperand &MO : MI->implicit_operands()) {
464 if (!MO.isReg() || !MO.isDef())
466 unsigned Reg = MO.getReg();
469 ClobberRegister(Reg);
472 // Remember Def is defined by the copy.
473 for (MCSubRegIterator SR(Def, TRI, /*IncludeSelf=*/true); SR.isValid();
476 AvailCopyMap[*SR] = MI;
479 // Remember source that's copied to Def. Once it's clobbered, then
480 // it's no longer available for copy propagation.
481 RegList &DestList = SrcMap[Src];
482 if (!is_contained(DestList, Def))
483 DestList.push_back(Def);
488 // Clobber any earlyclobber regs first.
489 for (const MachineOperand &MO : MI->operands())
490 if (MO.isReg() && MO.isEarlyClobber()) {
491 unsigned Reg = MO.getReg();
492 // If we have a tied earlyclobber, that means it is also read by this
493 // instruction, so we need to make sure we don't remove it as dead
497 ClobberRegister(Reg);
503 SmallVector<unsigned, 2> Defs;
504 const MachineOperand *RegMask = nullptr;
505 for (const MachineOperand &MO : MI->operands()) {
510 unsigned Reg = MO.getReg();
514 assert(!TargetRegisterInfo::isVirtualRegister(Reg) &&
515 "MachineCopyPropagation should be run after register allocation!");
517 if (MO.isDef() && !MO.isEarlyClobber()) {
520 } else if (!MO.isDebug() && MO.readsReg())
524 // The instruction has a register mask operand which means that it clobbers
525 // a large set of registers. Treat clobbered registers the same way as
526 // defined registers.
528 // Erase any MaybeDeadCopies whose destination register is clobbered.
529 for (SmallSetVector<MachineInstr *, 8>::iterator DI =
530 MaybeDeadCopies.begin();
531 DI != MaybeDeadCopies.end();) {
532 MachineInstr *MaybeDead = *DI;
533 unsigned Reg = MaybeDead->getOperand(0).getReg();
534 assert(!MRI->isReserved(Reg));
536 if (!RegMask->clobbersPhysReg(Reg)) {
541 LLVM_DEBUG(dbgs() << "MCP: Removing copy due to regmask clobbering: ";
544 // erase() will return the next valid iterator pointing to the next
545 // element after the erased one.
546 DI = MaybeDeadCopies.erase(DI);
547 MaybeDead->eraseFromParent();
552 removeClobberedRegsFromMap(AvailCopyMap, *RegMask);
553 removeClobberedRegsFromMap(CopyMap, *RegMask);
554 for (SourceMap::iterator I = SrcMap.begin(), E = SrcMap.end(), Next;
557 if (RegMask->clobbersPhysReg(I->first)) {
558 removeRegsFromMap(AvailCopyMap, I->second, *TRI);
564 // Any previous copy definition or reading the Defs is no longer available.
565 for (unsigned Reg : Defs)
566 ClobberRegister(Reg);
569 // If MBB doesn't have successors, delete the copies whose defs are not used.
570 // If MBB does have successors, then conservative assume the defs are live-out
571 // since we don't want to trust live-in lists.
572 if (MBB.succ_empty()) {
573 for (MachineInstr *MaybeDead : MaybeDeadCopies) {
574 LLVM_DEBUG(dbgs() << "MCP: Removing copy due to no live-out succ: ";
576 assert(!MRI->isReserved(MaybeDead->getOperand(0).getReg()));
577 MaybeDead->eraseFromParent();
583 MaybeDeadCopies.clear();
584 AvailCopyMap.clear();
589 bool MachineCopyPropagation::runOnMachineFunction(MachineFunction &MF) {
590 if (skipFunction(MF.getFunction()))
595 TRI = MF.getSubtarget().getRegisterInfo();
596 TII = MF.getSubtarget().getInstrInfo();
597 MRI = &MF.getRegInfo();
599 for (MachineBasicBlock &MBB : MF)
600 CopyPropagateBlock(MBB);