1 //===-- RegUsageInfoCollector.cpp - Register Usage Information Collector --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 /// This pass is required to take advantage of the interprocedural register
11 /// allocation infrastructure.
13 /// This pass is simple MachineFunction pass which collects register usage
14 /// details by iterating through each physical registers and checking
15 /// MRI::isPhysRegUsed() then creates a RegMask based on this details.
16 /// The pass then stores this RegMask in PhysicalRegisterUsageInfo.cpp
18 //===----------------------------------------------------------------------===//
20 #include "llvm/ADT/Statistic.h"
21 #include "llvm/CodeGen/MachineBasicBlock.h"
22 #include "llvm/CodeGen/MachineFunctionPass.h"
23 #include "llvm/CodeGen/MachineInstr.h"
24 #include "llvm/CodeGen/MachineOperand.h"
25 #include "llvm/CodeGen/MachineRegisterInfo.h"
26 #include "llvm/CodeGen/Passes.h"
27 #include "llvm/CodeGen/RegisterUsageInfo.h"
28 #include "llvm/Support/Debug.h"
29 #include "llvm/Support/raw_ostream.h"
30 #include "llvm/CodeGen/TargetFrameLowering.h"
34 #define DEBUG_TYPE "ip-regalloc"
37 "Number of functions optimized for callee saved registers");
40 void initializeRegUsageInfoCollectorPass(PassRegistry &);
44 class RegUsageInfoCollector : public MachineFunctionPass {
46 RegUsageInfoCollector() : MachineFunctionPass(ID) {
47 PassRegistry &Registry = *PassRegistry::getPassRegistry();
48 initializeRegUsageInfoCollectorPass(Registry);
51 StringRef getPassName() const override {
52 return "Register Usage Information Collector Pass";
55 void getAnalysisUsage(AnalysisUsage &AU) const override;
57 bool runOnMachineFunction(MachineFunction &MF) override;
61 } // end of anonymous namespace
63 char RegUsageInfoCollector::ID = 0;
65 INITIALIZE_PASS_BEGIN(RegUsageInfoCollector, "RegUsageInfoCollector",
66 "Register Usage Information Collector", false, false)
67 INITIALIZE_PASS_DEPENDENCY(PhysicalRegisterUsageInfo)
68 INITIALIZE_PASS_END(RegUsageInfoCollector, "RegUsageInfoCollector",
69 "Register Usage Information Collector", false, false)
71 FunctionPass *llvm::createRegUsageInfoCollector() {
72 return new RegUsageInfoCollector();
75 void RegUsageInfoCollector::getAnalysisUsage(AnalysisUsage &AU) const {
76 AU.addRequired<PhysicalRegisterUsageInfo>();
78 MachineFunctionPass::getAnalysisUsage(AU);
81 bool RegUsageInfoCollector::runOnMachineFunction(MachineFunction &MF) {
82 MachineRegisterInfo *MRI = &MF.getRegInfo();
83 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
84 const TargetMachine &TM = MF.getTarget();
86 DEBUG(dbgs() << " -------------------- " << getPassName()
87 << " -------------------- \n");
88 DEBUG(dbgs() << "Function Name : " << MF.getName() << "\n");
90 std::vector<uint32_t> RegMask;
92 // Compute the size of the bit vector to represent all the registers.
93 // The bit vector is broken into 32-bit chunks, thus takes the ceil of
94 // the number of registers divided by 32 for the size.
95 unsigned RegMaskSize = (TRI->getNumRegs() + 31) / 32;
96 RegMask.resize(RegMaskSize, 0xFFFFFFFF);
98 const Function &F = MF.getFunction();
100 PhysicalRegisterUsageInfo *PRUI = &getAnalysis<PhysicalRegisterUsageInfo>();
102 PRUI->setTargetMachine(&TM);
104 DEBUG(dbgs() << "Clobbered Registers: ");
106 const BitVector &UsedPhysRegsMask = MRI->getUsedPhysRegsMask();
107 auto SetRegAsDefined = [&RegMask] (unsigned Reg) {
108 RegMask[Reg / 32] &= ~(1u << Reg % 32);
110 // Scan all the physical registers. When a register is defined in the current
111 // function set it and all the aliasing registers as defined in the regmask.
112 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) {
113 // If a register is in the UsedPhysRegsMask set then mark it as defined.
114 // All it's aliases will also be in the set, so we can skip setting
115 // as defined all the aliases here.
116 if (UsedPhysRegsMask.test(PReg)) {
117 SetRegAsDefined(PReg);
120 // If a register is defined by an instruction mark it as defined together
121 // with all it's aliases.
122 if (!MRI->def_empty(PReg)) {
123 for (MCRegAliasIterator AI(PReg, TRI, true); AI.isValid(); ++AI)
124 SetRegAsDefined(*AI);
128 if (!TargetFrameLowering::isSafeForNoCSROpt(F)) {
129 const uint32_t *CallPreservedMask =
130 TRI->getCallPreservedMask(MF, F.getCallingConv());
131 if (CallPreservedMask) {
132 // Set callee saved register as preserved.
133 for (unsigned i = 0; i < RegMaskSize; ++i)
134 RegMask[i] = RegMask[i] | CallPreservedMask[i];
138 DEBUG(dbgs() << MF.getName()
139 << " function optimized for not having CSR.\n");
142 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg)
143 if (MachineOperand::clobbersPhysReg(&(RegMask[0]), PReg))
144 DEBUG(dbgs() << printReg(PReg, TRI) << " ");
146 DEBUG(dbgs() << " \n----------------------------------------\n");
148 PRUI->storeUpdateRegUsageInfo(&F, std::move(RegMask));