1 //===- RegisterUsageInfo.cpp - Register Usage Information Storage ---------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 /// This pass is required to take advantage of the interprocedural register
11 /// allocation infrastructure.
13 //===----------------------------------------------------------------------===//
15 #include "llvm/ADT/SmallVector.h"
16 #include "llvm/CodeGen/RegisterUsageInfo.h"
17 #include "llvm/CodeGen/MachineOperand.h"
18 #include "llvm/IR/Function.h"
19 #include "llvm/IR/Module.h"
20 #include "llvm/Pass.h"
21 #include "llvm/Support/CommandLine.h"
22 #include "llvm/Support/raw_ostream.h"
23 #include "llvm/Target/TargetMachine.h"
24 #include "llvm/Target/TargetRegisterInfo.h"
25 #include "llvm/Target/TargetSubtargetInfo.h"
34 #define DEBUG_TYPE "ip-regalloc"
36 static cl::opt<bool> DumpRegUsage(
37 "print-regusage", cl::init(false), cl::Hidden,
38 cl::desc("print register usage details collected for analysis."));
40 INITIALIZE_PASS(PhysicalRegisterUsageInfo, "reg-usage-info",
41 "Register Usage Information Storage", false, true)
43 char PhysicalRegisterUsageInfo::ID = 0;
45 void PhysicalRegisterUsageInfo::anchor() {}
47 bool PhysicalRegisterUsageInfo::doInitialization(Module &M) {
48 RegMasks.grow(M.size());
52 bool PhysicalRegisterUsageInfo::doFinalization(Module &M) {
56 RegMasks.shrink_and_clear();
60 void PhysicalRegisterUsageInfo::storeUpdateRegUsageInfo(
61 const Function *FP, std::vector<uint32_t> RegMask) {
62 assert(FP != nullptr && "Function * can't be nullptr.");
63 RegMasks[FP] = std::move(RegMask);
66 const std::vector<uint32_t> *
67 PhysicalRegisterUsageInfo::getRegUsageInfo(const Function *FP) {
68 auto It = RegMasks.find(FP);
69 if (It != RegMasks.end())
74 void PhysicalRegisterUsageInfo::print(raw_ostream &OS, const Module *M) const {
75 const TargetRegisterInfo *TRI;
77 using FuncPtrRegMaskPair = std::pair<const Function *, std::vector<uint32_t>>;
79 SmallVector<const FuncPtrRegMaskPair *, 64> FPRMPairVector;
81 // Create a vector of pointer to RegMasks entries
82 for (const auto &RegMask : RegMasks)
83 FPRMPairVector.push_back(&RegMask);
85 // sort the vector to print analysis in alphabatic order of function name.
87 FPRMPairVector.begin(), FPRMPairVector.end(),
88 [](const FuncPtrRegMaskPair *A, const FuncPtrRegMaskPair *B) -> bool {
89 return A->first->getName() < B->first->getName();
92 for (const FuncPtrRegMaskPair *FPRMPair : FPRMPairVector) {
93 OS << FPRMPair->first->getName() << " "
94 << "Clobbered Registers: ";
95 TRI = TM->getSubtarget<TargetSubtargetInfo>(*(FPRMPair->first))
98 for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) {
99 if (MachineOperand::clobbersPhysReg(&(FPRMPair->second[0]), PReg))
100 OS << TRI->getName(PReg) << " ";