1 //===- ScheduleDAG.cpp - Implement the ScheduleDAG class ------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 /// \file Implements the ScheduleDAG class, which is a base class used by
11 /// scheduling implementation classes.
13 //===----------------------------------------------------------------------===//
15 #include "llvm/CodeGen/ScheduleDAG.h"
16 #include "llvm/ADT/STLExtras.h"
17 #include "llvm/ADT/SmallVector.h"
18 #include "llvm/ADT/iterator_range.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/ScheduleHazardRecognizer.h"
21 #include "llvm/CodeGen/SelectionDAGNodes.h"
22 #include "llvm/Support/CommandLine.h"
23 #include "llvm/Support/Compiler.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Support/raw_ostream.h"
26 #include "llvm/Target/TargetInstrInfo.h"
27 #include "llvm/Target/TargetRegisterInfo.h"
28 #include "llvm/Target/TargetSubtargetInfo.h"
38 #define DEBUG_TYPE "pre-RA-sched"
41 static cl::opt<bool> StressSchedOpt(
42 "stress-sched", cl::Hidden, cl::init(false),
43 cl::desc("Stress test instruction scheduling"));
46 void SchedulingPriorityQueue::anchor() {}
48 ScheduleDAG::ScheduleDAG(MachineFunction &mf)
49 : TM(mf.getTarget()), TII(mf.getSubtarget().getInstrInfo()),
50 TRI(mf.getSubtarget().getRegisterInfo()), MF(mf),
51 MRI(mf.getRegInfo()) {
53 StressSched = StressSchedOpt;
57 ScheduleDAG::~ScheduleDAG() = default;
59 void ScheduleDAG::clearDAG() {
65 const MCInstrDesc *ScheduleDAG::getNodeDesc(const SDNode *Node) const {
66 if (!Node || !Node->isMachineOpcode()) return nullptr;
67 return &TII->get(Node->getMachineOpcode());
71 raw_ostream &SDep::print(raw_ostream &OS, const TargetRegisterInfo *TRI) const {
73 case Data: OS << "Data"; break;
74 case Anti: OS << "Anti"; break;
75 case Output: OS << "Out "; break;
76 case Order: OS << "Ord "; break;
81 OS << " Latency=" << getLatency();
82 if (TRI && isAssignedRegDep())
83 OS << " Reg=" << PrintReg(getReg(), TRI);
87 OS << " Latency=" << getLatency();
90 OS << " Latency=" << getLatency();
91 switch(Contents.OrdKind) {
92 case Barrier: OS << " Barrier"; break;
94 case MustAliasMem: OS << " Memory"; break;
95 case Artificial: OS << " Artificial"; break;
96 case Weak: OS << " Weak"; break;
97 case Cluster: OS << " Cluster"; break;
105 bool SUnit::addPred(const SDep &D, bool Required) {
106 // If this node already has this dependence, don't add a redundant one.
107 for (SDep &PredDep : Preds) {
108 // Zero-latency weak edges may be added purely for heuristic ordering. Don't
109 // add them if another kind of edge already exists.
110 if (!Required && PredDep.getSUnit() == D.getSUnit())
112 if (PredDep.overlaps(D)) {
113 // Extend the latency if needed. Equivalent to
114 // removePred(PredDep) + addPred(D).
115 if (PredDep.getLatency() < D.getLatency()) {
116 SUnit *PredSU = PredDep.getSUnit();
117 // Find the corresponding successor in N.
118 SDep ForwardD = PredDep;
119 ForwardD.setSUnit(this);
120 for (SDep &SuccDep : PredSU->Succs) {
121 if (SuccDep == ForwardD) {
122 SuccDep.setLatency(D.getLatency());
126 PredDep.setLatency(D.getLatency());
131 // Now add a corresponding succ to N.
134 SUnit *N = D.getSUnit();
135 // Update the bookkeeping.
136 if (D.getKind() == SDep::Data) {
137 assert(NumPreds < std::numeric_limits<unsigned>::max() &&
138 "NumPreds will overflow!");
139 assert(N->NumSuccs < std::numeric_limits<unsigned>::max() &&
140 "NumSuccs will overflow!");
144 if (!N->isScheduled) {
149 assert(NumPredsLeft < std::numeric_limits<unsigned>::max() &&
150 "NumPredsLeft will overflow!");
159 assert(N->NumSuccsLeft < std::numeric_limits<unsigned>::max() &&
160 "NumSuccsLeft will overflow!");
165 N->Succs.push_back(P);
166 if (P.getLatency() != 0) {
167 this->setDepthDirty();
173 void SUnit::removePred(const SDep &D) {
174 // Find the matching predecessor.
175 SmallVectorImpl<SDep>::iterator I = llvm::find(Preds, D);
176 if (I == Preds.end())
178 // Find the corresponding successor in N.
181 SUnit *N = D.getSUnit();
182 SmallVectorImpl<SDep>::iterator Succ = llvm::find(N->Succs, P);
183 assert(Succ != N->Succs.end() && "Mismatching preds / succs lists!");
184 N->Succs.erase(Succ);
186 // Update the bookkeeping.
187 if (P.getKind() == SDep::Data) {
188 assert(NumPreds > 0 && "NumPreds will underflow!");
189 assert(N->NumSuccs > 0 && "NumSuccs will underflow!");
193 if (!N->isScheduled) {
197 assert(NumPredsLeft > 0 && "NumPredsLeft will underflow!");
205 assert(N->NumSuccsLeft > 0 && "NumSuccsLeft will underflow!");
209 if (P.getLatency() != 0) {
210 this->setDepthDirty();
215 void SUnit::setDepthDirty() {
216 if (!isDepthCurrent) return;
217 SmallVector<SUnit*, 8> WorkList;
218 WorkList.push_back(this);
220 SUnit *SU = WorkList.pop_back_val();
221 SU->isDepthCurrent = false;
222 for (SDep &SuccDep : SU->Succs) {
223 SUnit *SuccSU = SuccDep.getSUnit();
224 if (SuccSU->isDepthCurrent)
225 WorkList.push_back(SuccSU);
227 } while (!WorkList.empty());
230 void SUnit::setHeightDirty() {
231 if (!isHeightCurrent) return;
232 SmallVector<SUnit*, 8> WorkList;
233 WorkList.push_back(this);
235 SUnit *SU = WorkList.pop_back_val();
236 SU->isHeightCurrent = false;
237 for (SDep &PredDep : SU->Preds) {
238 SUnit *PredSU = PredDep.getSUnit();
239 if (PredSU->isHeightCurrent)
240 WorkList.push_back(PredSU);
242 } while (!WorkList.empty());
245 void SUnit::setDepthToAtLeast(unsigned NewDepth) {
246 if (NewDepth <= getDepth())
250 isDepthCurrent = true;
253 void SUnit::setHeightToAtLeast(unsigned NewHeight) {
254 if (NewHeight <= getHeight())
258 isHeightCurrent = true;
261 /// Calculates the maximal path from the node to the exit.
262 void SUnit::ComputeDepth() {
263 SmallVector<SUnit*, 8> WorkList;
264 WorkList.push_back(this);
266 SUnit *Cur = WorkList.back();
269 unsigned MaxPredDepth = 0;
270 for (const SDep &PredDep : Cur->Preds) {
271 SUnit *PredSU = PredDep.getSUnit();
272 if (PredSU->isDepthCurrent)
273 MaxPredDepth = std::max(MaxPredDepth,
274 PredSU->Depth + PredDep.getLatency());
277 WorkList.push_back(PredSU);
283 if (MaxPredDepth != Cur->Depth) {
284 Cur->setDepthDirty();
285 Cur->Depth = MaxPredDepth;
287 Cur->isDepthCurrent = true;
289 } while (!WorkList.empty());
292 /// Calculates the maximal path from the node to the entry.
293 void SUnit::ComputeHeight() {
294 SmallVector<SUnit*, 8> WorkList;
295 WorkList.push_back(this);
297 SUnit *Cur = WorkList.back();
300 unsigned MaxSuccHeight = 0;
301 for (const SDep &SuccDep : Cur->Succs) {
302 SUnit *SuccSU = SuccDep.getSUnit();
303 if (SuccSU->isHeightCurrent)
304 MaxSuccHeight = std::max(MaxSuccHeight,
305 SuccSU->Height + SuccDep.getLatency());
308 WorkList.push_back(SuccSU);
314 if (MaxSuccHeight != Cur->Height) {
315 Cur->setHeightDirty();
316 Cur->Height = MaxSuccHeight;
318 Cur->isHeightCurrent = true;
320 } while (!WorkList.empty());
323 void SUnit::biasCriticalPath() {
327 SUnit::pred_iterator BestI = Preds.begin();
328 unsigned MaxDepth = BestI->getSUnit()->getDepth();
329 for (SUnit::pred_iterator I = std::next(BestI), E = Preds.end(); I != E;
331 if (I->getKind() == SDep::Data && I->getSUnit()->getDepth() > MaxDepth)
334 if (BestI != Preds.begin())
335 std::swap(*Preds.begin(), *BestI);
338 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
340 raw_ostream &SUnit::print(raw_ostream &OS,
341 const SUnit *Entry, const SUnit *Exit) const {
344 else if (this == Exit)
347 OS << "SU(" << NodeNum << ")";
352 raw_ostream &SUnit::print(raw_ostream &OS, const ScheduleDAG *G) const {
353 return print(OS, &G->EntrySU, &G->ExitSU);
357 void SUnit::dump(const ScheduleDAG *G) const {
363 LLVM_DUMP_METHOD void SUnit::dumpAll(const ScheduleDAG *G) const {
366 dbgs() << " # preds left : " << NumPredsLeft << "\n";
367 dbgs() << " # succs left : " << NumSuccsLeft << "\n";
369 dbgs() << " # weak preds left : " << WeakPredsLeft << "\n";
371 dbgs() << " # weak succs left : " << WeakSuccsLeft << "\n";
372 dbgs() << " # rdefs left : " << NumRegDefsLeft << "\n";
373 dbgs() << " Latency : " << Latency << "\n";
374 dbgs() << " Depth : " << getDepth() << "\n";
375 dbgs() << " Height : " << getHeight() << "\n";
377 if (Preds.size() != 0) {
378 dbgs() << " Predecessors:\n";
379 for (const SDep &Dep : Preds) {
381 Dep.getSUnit()->print(dbgs(), G); dbgs() << ": ";
382 Dep.print(dbgs(), G->TRI); dbgs() << '\n';
385 if (Succs.size() != 0) {
386 dbgs() << " Successors:\n";
387 for (const SDep &Dep : Succs) {
389 Dep.getSUnit()->print(dbgs(), G); dbgs() << ": ";
390 Dep.print(dbgs(), G->TRI); dbgs() << '\n';
397 unsigned ScheduleDAG::VerifyScheduledDAG(bool isBottomUp) {
398 bool AnyNotSched = false;
399 unsigned DeadNodes = 0;
400 for (const SUnit &SUnit : SUnits) {
401 if (!SUnit.isScheduled) {
402 if (SUnit.NumPreds == 0 && SUnit.NumSuccs == 0) {
407 dbgs() << "*** Scheduling failed! ***\n";
409 dbgs() << "has not been scheduled!\n";
412 if (SUnit.isScheduled &&
413 (isBottomUp ? SUnit.getHeight() : SUnit.getDepth()) >
414 unsigned(std::numeric_limits<int>::max())) {
416 dbgs() << "*** Scheduling failed! ***\n";
418 dbgs() << "has an unexpected "
419 << (isBottomUp ? "Height" : "Depth") << " value!\n";
423 if (SUnit.NumSuccsLeft != 0) {
425 dbgs() << "*** Scheduling failed! ***\n";
427 dbgs() << "has successors left!\n";
431 if (SUnit.NumPredsLeft != 0) {
433 dbgs() << "*** Scheduling failed! ***\n";
435 dbgs() << "has predecessors left!\n";
440 assert(!AnyNotSched);
441 return SUnits.size() - DeadNodes;
445 void ScheduleDAGTopologicalSort::InitDAGTopologicalSorting() {
446 // The idea of the algorithm is taken from
447 // "Online algorithms for managing the topological order of
448 // a directed acyclic graph" by David J. Pearce and Paul H.J. Kelly
449 // This is the MNR algorithm, which was first introduced by
450 // A. Marchetti-Spaccamela, U. Nanni and H. Rohnert in
451 // "Maintaining a topological order under edge insertions".
453 // Short description of the algorithm:
455 // Topological ordering, ord, of a DAG maps each node to a topological
456 // index so that for all edges X->Y it is the case that ord(X) < ord(Y).
458 // This means that if there is a path from the node X to the node Z,
459 // then ord(X) < ord(Z).
461 // This property can be used to check for reachability of nodes:
462 // if Z is reachable from X, then an insertion of the edge Z->X would
465 // The algorithm first computes a topological ordering for the DAG by
466 // initializing the Index2Node and Node2Index arrays and then tries to keep
467 // the ordering up-to-date after edge insertions by reordering the DAG.
469 // On insertion of the edge X->Y, the algorithm first marks by calling DFS
470 // the nodes reachable from Y, and then shifts them using Shift to lie
471 // immediately after X in Index2Node.
472 unsigned DAGSize = SUnits.size();
473 std::vector<SUnit*> WorkList;
474 WorkList.reserve(DAGSize);
476 Index2Node.resize(DAGSize);
477 Node2Index.resize(DAGSize);
479 // Initialize the data structures.
481 WorkList.push_back(ExitSU);
482 for (SUnit &SU : SUnits) {
483 int NodeNum = SU.NodeNum;
484 unsigned Degree = SU.Succs.size();
485 // Temporarily use the Node2Index array as scratch space for degree counts.
486 Node2Index[NodeNum] = Degree;
488 // Is it a node without dependencies?
490 assert(SU.Succs.empty() && "SUnit should have no successors");
491 // Collect leaf nodes.
492 WorkList.push_back(&SU);
497 while (!WorkList.empty()) {
498 SUnit *SU = WorkList.back();
500 if (SU->NodeNum < DAGSize)
501 Allocate(SU->NodeNum, --Id);
502 for (const SDep &PredDep : SU->Preds) {
503 SUnit *SU = PredDep.getSUnit();
504 if (SU->NodeNum < DAGSize && !--Node2Index[SU->NodeNum])
505 // If all dependencies of the node are processed already,
506 // then the node can be computed now.
507 WorkList.push_back(SU);
511 Visited.resize(DAGSize);
514 // Check correctness of the ordering
515 for (SUnit &SU : SUnits) {
516 for (const SDep &PD : SU.Preds) {
517 assert(Node2Index[SU.NodeNum] > Node2Index[PD.getSUnit()->NodeNum] &&
518 "Wrong topological sorting");
524 void ScheduleDAGTopologicalSort::AddPred(SUnit *Y, SUnit *X) {
525 int UpperBound, LowerBound;
526 LowerBound = Node2Index[Y->NodeNum];
527 UpperBound = Node2Index[X->NodeNum];
528 bool HasLoop = false;
529 // Is Ord(X) < Ord(Y) ?
530 if (LowerBound < UpperBound) {
531 // Update the topological order.
533 DFS(Y, UpperBound, HasLoop);
534 assert(!HasLoop && "Inserted edge creates a loop!");
535 // Recompute topological indexes.
536 Shift(Visited, LowerBound, UpperBound);
540 void ScheduleDAGTopologicalSort::RemovePred(SUnit *M, SUnit *N) {
541 // InitDAGTopologicalSorting();
544 void ScheduleDAGTopologicalSort::DFS(const SUnit *SU, int UpperBound,
546 std::vector<const SUnit*> WorkList;
547 WorkList.reserve(SUnits.size());
549 WorkList.push_back(SU);
551 SU = WorkList.back();
553 Visited.set(SU->NodeNum);
554 for (const SDep &SuccDep
555 : make_range(SU->Succs.rbegin(), SU->Succs.rend())) {
556 unsigned s = SuccDep.getSUnit()->NodeNum;
557 // Edges to non-SUnits are allowed but ignored (e.g. ExitSU).
558 if (s >= Node2Index.size())
560 if (Node2Index[s] == UpperBound) {
564 // Visit successors if not already and in affected region.
565 if (!Visited.test(s) && Node2Index[s] < UpperBound) {
566 WorkList.push_back(SuccDep.getSUnit());
569 } while (!WorkList.empty());
572 std::vector<int> ScheduleDAGTopologicalSort::GetSubGraph(const SUnit &StartSU,
573 const SUnit &TargetSU,
575 std::vector<const SUnit*> WorkList;
576 int LowerBound = Node2Index[StartSU.NodeNum];
577 int UpperBound = Node2Index[TargetSU.NodeNum];
579 BitVector VisitedBack;
580 std::vector<int> Nodes;
582 if (LowerBound > UpperBound) {
587 WorkList.reserve(SUnits.size());
590 // Starting from StartSU, visit all successors up
592 WorkList.push_back(&StartSU);
594 const SUnit *SU = WorkList.back();
596 for (int I = SU->Succs.size()-1; I >= 0; --I) {
597 const SUnit *Succ = SU->Succs[I].getSUnit();
598 unsigned s = Succ->NodeNum;
599 // Edges to non-SUnits are allowed but ignored (e.g. ExitSU).
600 if (Succ->isBoundaryNode())
602 if (Node2Index[s] == UpperBound) {
606 // Visit successors if not already and in affected region.
607 if (!Visited.test(s) && Node2Index[s] < UpperBound) {
609 WorkList.push_back(Succ);
612 } while (!WorkList.empty());
620 VisitedBack.resize(SUnits.size());
623 // Starting from TargetSU, visit all predecessors up
624 // to LowerBound. SUs that are visited by the two
625 // passes are added to Nodes.
626 WorkList.push_back(&TargetSU);
628 const SUnit *SU = WorkList.back();
630 for (int I = SU->Preds.size()-1; I >= 0; --I) {
631 const SUnit *Pred = SU->Preds[I].getSUnit();
632 unsigned s = Pred->NodeNum;
633 // Edges to non-SUnits are allowed but ignored (e.g. EntrySU).
634 if (Pred->isBoundaryNode())
636 if (Node2Index[s] == LowerBound) {
640 if (!VisitedBack.test(s) && Visited.test(s)) {
642 WorkList.push_back(Pred);
646 } while (!WorkList.empty());
648 assert(Found && "Error in SUnit Graph!");
653 void ScheduleDAGTopologicalSort::Shift(BitVector& Visited, int LowerBound,
659 for (i = LowerBound; i <= UpperBound; ++i) {
660 // w is node at topological index i.
661 int w = Index2Node[i];
662 if (Visited.test(w)) {
668 Allocate(w, i - shift);
672 for (unsigned LI : L) {
673 Allocate(LI, i - shift);
678 bool ScheduleDAGTopologicalSort::WillCreateCycle(SUnit *TargetSU, SUnit *SU) {
679 // Is SU reachable from TargetSU via successor edges?
680 if (IsReachable(SU, TargetSU))
682 for (const SDep &PredDep : TargetSU->Preds)
683 if (PredDep.isAssignedRegDep() &&
684 IsReachable(SU, PredDep.getSUnit()))
689 bool ScheduleDAGTopologicalSort::IsReachable(const SUnit *SU,
690 const SUnit *TargetSU) {
691 // If insertion of the edge SU->TargetSU would create a cycle
692 // then there is a path from TargetSU to SU.
693 int UpperBound, LowerBound;
694 LowerBound = Node2Index[TargetSU->NodeNum];
695 UpperBound = Node2Index[SU->NodeNum];
696 bool HasLoop = false;
697 // Is Ord(TargetSU) < Ord(SU) ?
698 if (LowerBound < UpperBound) {
700 // There may be a path from TargetSU to SU. Check for it.
701 DFS(TargetSU, UpperBound, HasLoop);
706 void ScheduleDAGTopologicalSort::Allocate(int n, int index) {
707 Node2Index[n] = index;
708 Index2Node[index] = n;
711 ScheduleDAGTopologicalSort::
712 ScheduleDAGTopologicalSort(std::vector<SUnit> &sunits, SUnit *exitsu)
713 : SUnits(sunits), ExitSU(exitsu) {}
715 ScheduleHazardRecognizer::~ScheduleHazardRecognizer() = default;