1 //===-- FunctionLoweringInfo.cpp ------------------------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements routines for translating functions from LLVM IR into
13 //===----------------------------------------------------------------------===//
15 #include "llvm/CodeGen/FunctionLoweringInfo.h"
16 #include "llvm/CodeGen/Analysis.h"
17 #include "llvm/CodeGen/MachineFrameInfo.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/MachineInstrBuilder.h"
20 #include "llvm/CodeGen/MachineRegisterInfo.h"
21 #include "llvm/CodeGen/TargetFrameLowering.h"
22 #include "llvm/CodeGen/TargetInstrInfo.h"
23 #include "llvm/CodeGen/TargetLowering.h"
24 #include "llvm/CodeGen/TargetRegisterInfo.h"
25 #include "llvm/CodeGen/TargetSubtargetInfo.h"
26 #include "llvm/CodeGen/WinEHFuncInfo.h"
27 #include "llvm/IR/DataLayout.h"
28 #include "llvm/IR/DerivedTypes.h"
29 #include "llvm/IR/Function.h"
30 #include "llvm/IR/Instructions.h"
31 #include "llvm/IR/IntrinsicInst.h"
32 #include "llvm/IR/LLVMContext.h"
33 #include "llvm/IR/Module.h"
34 #include "llvm/Support/Debug.h"
35 #include "llvm/Support/ErrorHandling.h"
36 #include "llvm/Support/MathExtras.h"
37 #include "llvm/Support/raw_ostream.h"
38 #include "llvm/Target/TargetOptions.h"
42 #define DEBUG_TYPE "function-lowering-info"
44 /// isUsedOutsideOfDefiningBlock - Return true if this instruction is used by
45 /// PHI nodes or outside of the basic block that defines it, or used by a
46 /// switch or atomic instruction, which may expand to multiple basic blocks.
47 static bool isUsedOutsideOfDefiningBlock(const Instruction *I) {
48 if (I->use_empty()) return false;
49 if (isa<PHINode>(I)) return true;
50 const BasicBlock *BB = I->getParent();
51 for (const User *U : I->users())
52 if (cast<Instruction>(U)->getParent() != BB || isa<PHINode>(U))
58 static ISD::NodeType getPreferredExtendForValue(const Value *V) {
59 // For the users of the source value being used for compare instruction, if
60 // the number of signed predicate is greater than unsigned predicate, we
61 // prefer to use SIGN_EXTEND.
63 // With this optimization, we would be able to reduce some redundant sign or
64 // zero extension instruction, and eventually more machine CSE opportunities
66 ISD::NodeType ExtendKind = ISD::ANY_EXTEND;
67 unsigned NumOfSigned = 0, NumOfUnsigned = 0;
68 for (const User *U : V->users()) {
69 if (const auto *CI = dyn_cast<CmpInst>(U)) {
70 NumOfSigned += CI->isSigned();
71 NumOfUnsigned += CI->isUnsigned();
74 if (NumOfSigned > NumOfUnsigned)
75 ExtendKind = ISD::SIGN_EXTEND;
80 void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf,
84 TLI = MF->getSubtarget().getTargetLowering();
85 RegInfo = &MF->getRegInfo();
86 const TargetFrameLowering *TFI = MF->getSubtarget().getFrameLowering();
87 unsigned StackAlign = TFI->getStackAlignment();
89 // Check whether the function can return without sret-demotion.
90 SmallVector<ISD::OutputArg, 4> Outs;
91 GetReturnInfo(Fn->getReturnType(), Fn->getAttributes(), Outs, *TLI,
93 CanLowerReturn = TLI->CanLowerReturn(Fn->getCallingConv(), *MF,
94 Fn->isVarArg(), Outs, Fn->getContext());
96 // If this personality uses funclets, we need to do a bit more work.
97 DenseMap<const AllocaInst *, TinyPtrVector<int *>> CatchObjects;
98 EHPersonality Personality = classifyEHPersonality(
99 Fn->hasPersonalityFn() ? Fn->getPersonalityFn() : nullptr);
100 if (isFuncletEHPersonality(Personality)) {
101 // Calculate state numbers if we haven't already.
102 WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
103 if (Personality == EHPersonality::MSVC_CXX)
104 calculateWinCXXEHStateNumbers(&fn, EHInfo);
105 else if (isAsynchronousEHPersonality(Personality))
106 calculateSEHStateNumbers(&fn, EHInfo);
107 else if (Personality == EHPersonality::CoreCLR)
108 calculateClrEHStateNumbers(&fn, EHInfo);
110 // Map all BB references in the WinEH data to MBBs.
111 for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
112 for (WinEHHandlerType &H : TBME.HandlerArray) {
113 if (const AllocaInst *AI = H.CatchObj.Alloca)
114 CatchObjects.insert({AI, {}}).first->second.push_back(
115 &H.CatchObj.FrameIndex);
117 H.CatchObj.FrameIndex = INT_MAX;
122 // Initialize the mapping of values to registers. This is only set up for
123 // instruction values that are used outside of the block that defines
125 for (const BasicBlock &BB : *Fn) {
126 for (const Instruction &I : BB) {
127 if (const AllocaInst *AI = dyn_cast<AllocaInst>(&I)) {
128 Type *Ty = AI->getAllocatedType();
130 std::max((unsigned)MF->getDataLayout().getPrefTypeAlignment(Ty),
133 // Static allocas can be folded into the initial stack frame
134 // adjustment. For targets that don't realign the stack, don't
135 // do this if there is an extra alignment requirement.
136 if (AI->isStaticAlloca() &&
137 (TFI->isStackRealignable() || (Align <= StackAlign))) {
138 const ConstantInt *CUI = cast<ConstantInt>(AI->getArraySize());
139 uint64_t TySize = MF->getDataLayout().getTypeAllocSize(Ty);
141 TySize *= CUI->getZExtValue(); // Get total allocated size.
142 if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
143 int FrameIndex = INT_MAX;
144 auto Iter = CatchObjects.find(AI);
145 if (Iter != CatchObjects.end() && TLI->needsFixedCatchObjects()) {
146 FrameIndex = MF->getFrameInfo().CreateFixedObject(
147 TySize, 0, /*Immutable=*/false, /*isAliased=*/true);
148 MF->getFrameInfo().setObjectAlignment(FrameIndex, Align);
151 MF->getFrameInfo().CreateStackObject(TySize, Align, false, AI);
154 StaticAllocaMap[AI] = FrameIndex;
155 // Update the catch handler information.
156 if (Iter != CatchObjects.end()) {
157 for (int *CatchObjPtr : Iter->second)
158 *CatchObjPtr = FrameIndex;
161 // FIXME: Overaligned static allocas should be grouped into
162 // a single dynamic allocation instead of using a separate
163 // stack allocation for each one.
164 if (Align <= StackAlign)
166 // Inform the Frame Information that we have variable-sized objects.
167 MF->getFrameInfo().CreateVariableSizedObject(Align ? Align : 1, AI);
171 // Look for inline asm that clobbers the SP register.
172 if (isa<CallInst>(I) || isa<InvokeInst>(I)) {
173 ImmutableCallSite CS(&I);
174 if (isa<InlineAsm>(CS.getCalledValue())) {
175 unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
176 const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
177 std::vector<TargetLowering::AsmOperandInfo> Ops =
178 TLI->ParseConstraints(Fn->getParent()->getDataLayout(), TRI, CS);
179 for (TargetLowering::AsmOperandInfo &Op : Ops) {
180 if (Op.Type == InlineAsm::isClobber) {
181 // Clobbers don't have SDValue operands, hence SDValue().
182 TLI->ComputeConstraintToUse(Op, SDValue(), DAG);
183 std::pair<unsigned, const TargetRegisterClass *> PhysReg =
184 TLI->getRegForInlineAsmConstraint(TRI, Op.ConstraintCode,
186 if (PhysReg.first == SP)
187 MF->getFrameInfo().setHasOpaqueSPAdjustment(true);
193 // Look for calls to the @llvm.va_start intrinsic. We can omit some
194 // prologue boilerplate for variadic functions that don't examine their
196 if (const auto *II = dyn_cast<IntrinsicInst>(&I)) {
197 if (II->getIntrinsicID() == Intrinsic::vastart)
198 MF->getFrameInfo().setHasVAStart(true);
201 // If we have a musttail call in a variadic function, we need to ensure we
202 // forward implicit register parameters.
203 if (const auto *CI = dyn_cast<CallInst>(&I)) {
204 if (CI->isMustTailCall() && Fn->isVarArg())
205 MF->getFrameInfo().setHasMustTailInVarArgFunc(true);
208 // Mark values used outside their block as exported, by allocating
209 // a virtual register for them.
210 if (isUsedOutsideOfDefiningBlock(&I))
211 if (!isa<AllocaInst>(I) || !StaticAllocaMap.count(cast<AllocaInst>(&I)))
212 InitializeRegForValue(&I);
214 // Decide the preferred extend type for a value.
215 PreferredExtendType[&I] = getPreferredExtendForValue(&I);
219 // Create an initial MachineBasicBlock for each LLVM BasicBlock in F. This
220 // also creates the initial PHI MachineInstrs, though none of the input
221 // operands are populated.
222 for (const BasicBlock &BB : *Fn) {
223 // Don't create MachineBasicBlocks for imaginary EH pad blocks. These blocks
224 // are really data, and no instructions can live here.
226 const Instruction *PadInst = BB.getFirstNonPHI();
227 // If this is a non-landingpad EH pad, mark this function as using
229 // FIXME: SEH catchpads do not create funclets, so we could avoid setting
230 // this in such cases in order to improve frame layout.
231 if (!isa<LandingPadInst>(PadInst)) {
232 MF->setHasEHFunclets(true);
233 MF->getFrameInfo().setHasOpaqueSPAdjustment(true);
235 if (isa<CatchSwitchInst>(PadInst)) {
236 assert(&*BB.begin() == PadInst &&
237 "WinEHPrepare failed to remove PHIs from imaginary BBs");
240 if (isa<FuncletPadInst>(PadInst))
241 assert(&*BB.begin() == PadInst && "WinEHPrepare failed to demote PHIs");
244 MachineBasicBlock *MBB = mf.CreateMachineBasicBlock(&BB);
248 // Transfer the address-taken flag. This is necessary because there could
249 // be multiple MachineBasicBlocks corresponding to one BasicBlock, and only
250 // the first one should be marked.
251 if (BB.hasAddressTaken())
252 MBB->setHasAddressTaken();
254 // Mark landing pad blocks.
258 // Create Machine PHI nodes for LLVM PHI nodes, lowering them as
260 for (const PHINode &PN : BB.phis()) {
265 if (PN.getType()->isEmptyTy())
268 DebugLoc DL = PN.getDebugLoc();
269 unsigned PHIReg = ValueMap[&PN];
270 assert(PHIReg && "PHI node does not have an assigned virtual register!");
272 SmallVector<EVT, 4> ValueVTs;
273 ComputeValueVTs(*TLI, MF->getDataLayout(), PN.getType(), ValueVTs);
274 for (EVT VT : ValueVTs) {
275 unsigned NumRegisters = TLI->getNumRegisters(Fn->getContext(), VT);
276 const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
277 for (unsigned i = 0; i != NumRegisters; ++i)
278 BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
279 PHIReg += NumRegisters;
284 if (!isFuncletEHPersonality(Personality))
287 WinEHFuncInfo &EHInfo = *MF->getWinEHFuncInfo();
289 // Map all BB references in the WinEH data to MBBs.
290 for (WinEHTryBlockMapEntry &TBME : EHInfo.TryBlockMap) {
291 for (WinEHHandlerType &H : TBME.HandlerArray) {
293 H.Handler = MBBMap[H.Handler.get<const BasicBlock *>()];
296 for (CxxUnwindMapEntry &UME : EHInfo.CxxUnwindMap)
298 UME.Cleanup = MBBMap[UME.Cleanup.get<const BasicBlock *>()];
299 for (SEHUnwindMapEntry &UME : EHInfo.SEHUnwindMap) {
300 const BasicBlock *BB = UME.Handler.get<const BasicBlock *>();
301 UME.Handler = MBBMap[BB];
303 for (ClrEHUnwindMapEntry &CME : EHInfo.ClrEHUnwindMap) {
304 const BasicBlock *BB = CME.Handler.get<const BasicBlock *>();
305 CME.Handler = MBBMap[BB];
309 /// clear - Clear out all the function-specific state. This returns this
310 /// FunctionLoweringInfo to an empty state, ready to be used for a
311 /// different function.
312 void FunctionLoweringInfo::clear() {
315 StaticAllocaMap.clear();
316 LiveOutRegInfo.clear();
318 ArgDbgValues.clear();
319 ByValArgFrameIndexMap.clear();
321 StatepointStackSlots.clear();
322 StatepointSpillMaps.clear();
323 PreferredExtendType.clear();
326 /// CreateReg - Allocate a single virtual register for the given type.
327 unsigned FunctionLoweringInfo::CreateReg(MVT VT) {
328 return RegInfo->createVirtualRegister(
329 MF->getSubtarget().getTargetLowering()->getRegClassFor(VT));
332 /// CreateRegs - Allocate the appropriate number of virtual registers of
333 /// the correctly promoted or expanded types. Assign these registers
334 /// consecutive vreg numbers and return the first assigned number.
336 /// In the case that the given value has struct or array type, this function
337 /// will assign registers for each member or element.
339 unsigned FunctionLoweringInfo::CreateRegs(Type *Ty) {
340 const TargetLowering *TLI = MF->getSubtarget().getTargetLowering();
342 SmallVector<EVT, 4> ValueVTs;
343 ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
345 unsigned FirstReg = 0;
346 for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
347 EVT ValueVT = ValueVTs[Value];
348 MVT RegisterVT = TLI->getRegisterType(Ty->getContext(), ValueVT);
350 unsigned NumRegs = TLI->getNumRegisters(Ty->getContext(), ValueVT);
351 for (unsigned i = 0; i != NumRegs; ++i) {
352 unsigned R = CreateReg(RegisterVT);
353 if (!FirstReg) FirstReg = R;
359 /// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
360 /// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
361 /// the register's LiveOutInfo is for a smaller bit width, it is extended to
362 /// the larger bit width by zero extension. The bit width must be no smaller
363 /// than the LiveOutInfo's existing bit width.
364 const FunctionLoweringInfo::LiveOutInfo *
365 FunctionLoweringInfo::GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth) {
366 if (!LiveOutRegInfo.inBounds(Reg))
369 LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
373 if (BitWidth > LOI->Known.getBitWidth()) {
374 LOI->NumSignBits = 1;
375 LOI->Known = LOI->Known.zextOrTrunc(BitWidth);
381 /// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
382 /// register based on the LiveOutInfo of its operands.
383 void FunctionLoweringInfo::ComputePHILiveOutRegInfo(const PHINode *PN) {
384 Type *Ty = PN->getType();
385 if (!Ty->isIntegerTy() || Ty->isVectorTy())
388 SmallVector<EVT, 1> ValueVTs;
389 ComputeValueVTs(*TLI, MF->getDataLayout(), Ty, ValueVTs);
390 assert(ValueVTs.size() == 1 &&
391 "PHIs with non-vector integer types should have a single VT.");
392 EVT IntVT = ValueVTs[0];
394 if (TLI->getNumRegisters(PN->getContext(), IntVT) != 1)
396 IntVT = TLI->getTypeToTransformTo(PN->getContext(), IntVT);
397 unsigned BitWidth = IntVT.getSizeInBits();
399 unsigned DestReg = ValueMap[PN];
400 if (!TargetRegisterInfo::isVirtualRegister(DestReg))
402 LiveOutRegInfo.grow(DestReg);
403 LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg];
405 Value *V = PN->getIncomingValue(0);
406 if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
407 DestLOI.NumSignBits = 1;
408 DestLOI.Known = KnownBits(BitWidth);
412 if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
413 APInt Val = CI->getValue().zextOrTrunc(BitWidth);
414 DestLOI.NumSignBits = Val.getNumSignBits();
415 DestLOI.Known.Zero = ~Val;
416 DestLOI.Known.One = Val;
418 assert(ValueMap.count(V) && "V should have been placed in ValueMap when its"
419 "CopyToReg node was created.");
420 unsigned SrcReg = ValueMap[V];
421 if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) {
422 DestLOI.IsValid = false;
425 const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
427 DestLOI.IsValid = false;
433 assert(DestLOI.Known.Zero.getBitWidth() == BitWidth &&
434 DestLOI.Known.One.getBitWidth() == BitWidth &&
435 "Masks should have the same bit width as the type.");
437 for (unsigned i = 1, e = PN->getNumIncomingValues(); i != e; ++i) {
438 Value *V = PN->getIncomingValue(i);
439 if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
440 DestLOI.NumSignBits = 1;
441 DestLOI.Known = KnownBits(BitWidth);
445 if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
446 APInt Val = CI->getValue().zextOrTrunc(BitWidth);
447 DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, Val.getNumSignBits());
448 DestLOI.Known.Zero &= ~Val;
449 DestLOI.Known.One &= Val;
453 assert(ValueMap.count(V) && "V should have been placed in ValueMap when "
454 "its CopyToReg node was created.");
455 unsigned SrcReg = ValueMap[V];
456 if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) {
457 DestLOI.IsValid = false;
460 const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
462 DestLOI.IsValid = false;
465 DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, SrcLOI->NumSignBits);
466 DestLOI.Known.Zero &= SrcLOI->Known.Zero;
467 DestLOI.Known.One &= SrcLOI->Known.One;
471 /// setArgumentFrameIndex - Record frame index for the byval
472 /// argument. This overrides previous frame index entry for this argument,
474 void FunctionLoweringInfo::setArgumentFrameIndex(const Argument *A,
476 ByValArgFrameIndexMap[A] = FI;
479 /// getArgumentFrameIndex - Get frame index for the byval argument.
480 /// If the argument does not have any assigned frame index then 0 is
482 int FunctionLoweringInfo::getArgumentFrameIndex(const Argument *A) {
483 auto I = ByValArgFrameIndexMap.find(A);
484 if (I != ByValArgFrameIndexMap.end())
486 DEBUG(dbgs() << "Argument does not have assigned frame index!\n");
490 unsigned FunctionLoweringInfo::getCatchPadExceptionPointerVReg(
491 const Value *CPI, const TargetRegisterClass *RC) {
492 MachineRegisterInfo &MRI = MF->getRegInfo();
493 auto I = CatchPadExceptionPointers.insert({CPI, 0});
494 unsigned &VReg = I.first->second;
496 VReg = MRI.createVirtualRegister(RC);
497 assert(VReg && "null vreg in exception pointer table!");
502 FunctionLoweringInfo::getOrCreateSwiftErrorVReg(const MachineBasicBlock *MBB,
504 auto Key = std::make_pair(MBB, Val);
505 auto It = SwiftErrorVRegDefMap.find(Key);
506 // If this is the first use of this swifterror value in this basic block,
507 // create a new virtual register.
508 // After we processed all basic blocks we will satisfy this "upwards exposed
509 // use" by inserting a copy or phi at the beginning of this block.
510 if (It == SwiftErrorVRegDefMap.end()) {
511 auto &DL = MF->getDataLayout();
512 const TargetRegisterClass *RC = TLI->getRegClassFor(TLI->getPointerTy(DL));
513 auto VReg = MF->getRegInfo().createVirtualRegister(RC);
514 SwiftErrorVRegDefMap[Key] = VReg;
515 SwiftErrorVRegUpwardsUse[Key] = VReg;
517 } else return It->second;
520 void FunctionLoweringInfo::setCurrentSwiftErrorVReg(
521 const MachineBasicBlock *MBB, const Value *Val, unsigned VReg) {
522 SwiftErrorVRegDefMap[std::make_pair(MBB, Val)] = VReg;
525 std::pair<unsigned, bool>
526 FunctionLoweringInfo::getOrCreateSwiftErrorVRegDefAt(const Instruction *I) {
527 auto Key = PointerIntPair<const Instruction *, 1, bool>(I, true);
528 auto It = SwiftErrorVRegDefUses.find(Key);
529 if (It == SwiftErrorVRegDefUses.end()) {
530 auto &DL = MF->getDataLayout();
531 const TargetRegisterClass *RC = TLI->getRegClassFor(TLI->getPointerTy(DL));
532 unsigned VReg = MF->getRegInfo().createVirtualRegister(RC);
533 SwiftErrorVRegDefUses[Key] = VReg;
534 return std::make_pair(VReg, true);
536 return std::make_pair(It->second, false);
539 std::pair<unsigned, bool>
540 FunctionLoweringInfo::getOrCreateSwiftErrorVRegUseAt(const Instruction *I, const MachineBasicBlock *MBB, const Value *Val) {
541 auto Key = PointerIntPair<const Instruction *, 1, bool>(I, false);
542 auto It = SwiftErrorVRegDefUses.find(Key);
543 if (It == SwiftErrorVRegDefUses.end()) {
544 unsigned VReg = getOrCreateSwiftErrorVReg(MBB, Val);
545 SwiftErrorVRegDefUses[Key] = VReg;
546 return std::make_pair(VReg, true);
548 return std::make_pair(It->second, false);