1 //===-------- LegalizeFloatTypes.cpp - Legalization of float types --------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements float type expansion and softening for LegalizeTypes.
11 // Softening is the act of turning a computation in an illegal floating point
12 // type into a computation in an integer type of the same size; also known as
13 // "soft float". For example, turning f32 arithmetic into operations using i32.
14 // The resulting integer value is the same as what you would get by performing
15 // the floating point operation and bitcasting the result to the integer type.
16 // Expansion is the act of changing a computation in an illegal type to be a
17 // computation in two identical registers of a smaller type. For example,
18 // implementing ppcf128 arithmetic in two f64 registers.
20 //===----------------------------------------------------------------------===//
22 #include "LegalizeTypes.h"
23 #include "llvm/Support/ErrorHandling.h"
24 #include "llvm/Support/raw_ostream.h"
27 #define DEBUG_TYPE "legalize-types"
29 /// GetFPLibCall - Return the right libcall for the given floating point type.
30 static RTLIB::Libcall GetFPLibCall(EVT VT,
31 RTLIB::Libcall Call_F32,
32 RTLIB::Libcall Call_F64,
33 RTLIB::Libcall Call_F80,
34 RTLIB::Libcall Call_F128,
35 RTLIB::Libcall Call_PPCF128) {
37 VT == MVT::f32 ? Call_F32 :
38 VT == MVT::f64 ? Call_F64 :
39 VT == MVT::f80 ? Call_F80 :
40 VT == MVT::f128 ? Call_F128 :
41 VT == MVT::ppcf128 ? Call_PPCF128 :
42 RTLIB::UNKNOWN_LIBCALL;
45 //===----------------------------------------------------------------------===//
46 // Convert Float Results to Integer for Non-HW-supported Operations.
47 //===----------------------------------------------------------------------===//
49 bool DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
50 DEBUG(dbgs() << "Soften float result " << ResNo << ": "; N->dump(&DAG);
52 SDValue R = SDValue();
54 switch (N->getOpcode()) {
57 dbgs() << "SoftenFloatResult #" << ResNo << ": ";
58 N->dump(&DAG); dbgs() << "\n";
60 llvm_unreachable("Do not know how to soften the result of this operator!");
63 case ISD::CopyFromReg:
65 assert(isLegalInHWReg(N->getValueType(ResNo)) &&
66 "Unsupported SoftenFloatRes opcode!");
67 // Only when isLegalInHWReg, we can skip check of the operands.
68 R = SDValue(N, ResNo);
70 case ISD::MERGE_VALUES:R = SoftenFloatRes_MERGE_VALUES(N, ResNo); break;
71 case ISD::BITCAST: R = SoftenFloatRes_BITCAST(N, ResNo); break;
72 case ISD::BUILD_PAIR: R = SoftenFloatRes_BUILD_PAIR(N); break;
73 case ISD::ConstantFP: R = SoftenFloatRes_ConstantFP(N, ResNo); break;
74 case ISD::EXTRACT_VECTOR_ELT:
75 R = SoftenFloatRes_EXTRACT_VECTOR_ELT(N); break;
76 case ISD::FABS: R = SoftenFloatRes_FABS(N, ResNo); break;
77 case ISD::FMINNUM: R = SoftenFloatRes_FMINNUM(N); break;
78 case ISD::FMAXNUM: R = SoftenFloatRes_FMAXNUM(N); break;
79 case ISD::FADD: R = SoftenFloatRes_FADD(N); break;
80 case ISD::FCEIL: R = SoftenFloatRes_FCEIL(N); break;
81 case ISD::FCOPYSIGN: R = SoftenFloatRes_FCOPYSIGN(N, ResNo); break;
82 case ISD::FCOS: R = SoftenFloatRes_FCOS(N); break;
83 case ISD::FDIV: R = SoftenFloatRes_FDIV(N); break;
84 case ISD::FEXP: R = SoftenFloatRes_FEXP(N); break;
85 case ISD::FEXP2: R = SoftenFloatRes_FEXP2(N); break;
86 case ISD::FFLOOR: R = SoftenFloatRes_FFLOOR(N); break;
87 case ISD::FLOG: R = SoftenFloatRes_FLOG(N); break;
88 case ISD::FLOG2: R = SoftenFloatRes_FLOG2(N); break;
89 case ISD::FLOG10: R = SoftenFloatRes_FLOG10(N); break;
90 case ISD::FMA: R = SoftenFloatRes_FMA(N); break;
91 case ISD::FMUL: R = SoftenFloatRes_FMUL(N); break;
92 case ISD::FNEARBYINT: R = SoftenFloatRes_FNEARBYINT(N); break;
93 case ISD::FNEG: R = SoftenFloatRes_FNEG(N, ResNo); break;
94 case ISD::FP_EXTEND: R = SoftenFloatRes_FP_EXTEND(N); break;
95 case ISD::FP_ROUND: R = SoftenFloatRes_FP_ROUND(N); break;
96 case ISD::FP16_TO_FP: R = SoftenFloatRes_FP16_TO_FP(N); break;
97 case ISD::FPOW: R = SoftenFloatRes_FPOW(N); break;
98 case ISD::FPOWI: R = SoftenFloatRes_FPOWI(N); break;
99 case ISD::FREM: R = SoftenFloatRes_FREM(N); break;
100 case ISD::FRINT: R = SoftenFloatRes_FRINT(N); break;
101 case ISD::FROUND: R = SoftenFloatRes_FROUND(N); break;
102 case ISD::FSIN: R = SoftenFloatRes_FSIN(N); break;
103 case ISD::FSQRT: R = SoftenFloatRes_FSQRT(N); break;
104 case ISD::FSUB: R = SoftenFloatRes_FSUB(N); break;
105 case ISD::FTRUNC: R = SoftenFloatRes_FTRUNC(N); break;
106 case ISD::LOAD: R = SoftenFloatRes_LOAD(N, ResNo); break;
107 case ISD::SELECT: R = SoftenFloatRes_SELECT(N, ResNo); break;
108 case ISD::SELECT_CC: R = SoftenFloatRes_SELECT_CC(N, ResNo); break;
109 case ISD::SINT_TO_FP:
110 case ISD::UINT_TO_FP: R = SoftenFloatRes_XINT_TO_FP(N); break;
111 case ISD::UNDEF: R = SoftenFloatRes_UNDEF(N); break;
112 case ISD::VAARG: R = SoftenFloatRes_VAARG(N); break;
115 // If R is null, the sub-method took care of registering the result.
117 SetSoftenedFloat(SDValue(N, ResNo), R);
118 ReplaceSoftenFloatResult(N, ResNo, R);
120 // Return true only if the node is changed,
121 // assuming that the operands are also converted when necessary.
122 // Otherwise, return false to tell caller to scan operands.
123 return R.getNode() && R.getNode() != N;
126 SDValue DAGTypeLegalizer::SoftenFloatRes_BITCAST(SDNode *N, unsigned ResNo) {
127 if (isLegalInHWReg(N->getValueType(ResNo)))
128 return SDValue(N, ResNo);
129 return BitConvertToInteger(N->getOperand(0));
132 SDValue DAGTypeLegalizer::SoftenFloatRes_MERGE_VALUES(SDNode *N,
134 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
135 return BitConvertToInteger(Op);
138 SDValue DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) {
139 // Convert the inputs to integers, and build a new pair out of them.
140 return DAG.getNode(ISD::BUILD_PAIR, SDLoc(N),
141 TLI.getTypeToTransformTo(*DAG.getContext(),
143 BitConvertToInteger(N->getOperand(0)),
144 BitConvertToInteger(N->getOperand(1)));
147 SDValue DAGTypeLegalizer::SoftenFloatRes_ConstantFP(SDNode *N, unsigned ResNo) {
148 // When LegalInHWReg, we can load better from the constant pool.
149 if (isLegalInHWReg(N->getValueType(ResNo)))
150 return SDValue(N, ResNo);
151 ConstantFPSDNode *CN = cast<ConstantFPSDNode>(N);
152 // In ppcf128, the high 64 bits are always first in memory regardless
153 // of Endianness. LLVM's APFloat representation is not Endian sensitive,
154 // and so always converts into a 128-bit APInt in a non-Endian-sensitive
155 // way. However, APInt's are serialized in an Endian-sensitive fashion,
156 // so on big-Endian targets, the two doubles are output in the wrong
157 // order. Fix this by manually flipping the order of the high 64 bits
158 // and the low 64 bits here.
159 if (DAG.getDataLayout().isBigEndian() &&
160 CN->getValueType(0).getSimpleVT() == llvm::MVT::ppcf128) {
161 uint64_t words[2] = { CN->getValueAPF().bitcastToAPInt().getRawData()[1],
162 CN->getValueAPF().bitcastToAPInt().getRawData()[0] };
163 APInt Val(128, words);
164 return DAG.getConstant(Val, SDLoc(CN),
165 TLI.getTypeToTransformTo(*DAG.getContext(),
166 CN->getValueType(0)));
168 return DAG.getConstant(CN->getValueAPF().bitcastToAPInt(), SDLoc(CN),
169 TLI.getTypeToTransformTo(*DAG.getContext(),
170 CN->getValueType(0)));
174 SDValue DAGTypeLegalizer::SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N) {
175 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0));
176 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
177 NewOp.getValueType().getVectorElementType(),
178 NewOp, N->getOperand(1));
181 SDValue DAGTypeLegalizer::SoftenFloatRes_FABS(SDNode *N, unsigned ResNo) {
182 // When LegalInHWReg, FABS can be implemented as native bitwise operations.
183 if (isLegalInHWReg(N->getValueType(ResNo)))
184 return SDValue(N, ResNo);
185 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
186 unsigned Size = NVT.getSizeInBits();
188 // Mask = ~(1 << (Size-1))
189 APInt API = APInt::getAllOnesValue(Size);
190 API.clearBit(Size - 1);
191 SDValue Mask = DAG.getConstant(API, SDLoc(N), NVT);
192 SDValue Op = GetSoftenedFloat(N->getOperand(0));
193 return DAG.getNode(ISD::AND, SDLoc(N), NVT, Op, Mask);
196 SDValue DAGTypeLegalizer::SoftenFloatRes_FMINNUM(SDNode *N) {
197 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
198 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
199 GetSoftenedFloat(N->getOperand(1)) };
200 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
205 RTLIB::FMIN_PPCF128),
206 NVT, Ops, false, SDLoc(N)).first;
209 SDValue DAGTypeLegalizer::SoftenFloatRes_FMAXNUM(SDNode *N) {
210 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
211 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
212 GetSoftenedFloat(N->getOperand(1)) };
213 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
218 RTLIB::FMAX_PPCF128),
219 NVT, Ops, false, SDLoc(N)).first;
222 SDValue DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N) {
223 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
224 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
225 GetSoftenedFloat(N->getOperand(1)) };
226 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
232 NVT, Ops, false, SDLoc(N)).first;
235 SDValue DAGTypeLegalizer::SoftenFloatRes_FCEIL(SDNode *N) {
236 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
237 SDValue Op = GetSoftenedFloat(N->getOperand(0));
238 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
243 RTLIB::CEIL_PPCF128),
244 NVT, Op, false, SDLoc(N)).first;
247 SDValue DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N, unsigned ResNo) {
248 // When LegalInHWReg, FCOPYSIGN can be implemented as native bitwise operations.
249 if (isLegalInHWReg(N->getValueType(ResNo)))
250 return SDValue(N, ResNo);
251 SDValue LHS = GetSoftenedFloat(N->getOperand(0));
252 SDValue RHS = BitConvertToInteger(N->getOperand(1));
255 EVT LVT = LHS.getValueType();
256 EVT RVT = RHS.getValueType();
258 unsigned LSize = LVT.getSizeInBits();
259 unsigned RSize = RVT.getSizeInBits();
261 // First get the sign bit of second operand.
262 SDValue SignBit = DAG.getNode(
263 ISD::SHL, dl, RVT, DAG.getConstant(1, dl, RVT),
264 DAG.getConstant(RSize - 1, dl,
265 TLI.getShiftAmountTy(RVT, DAG.getDataLayout())));
266 SignBit = DAG.getNode(ISD::AND, dl, RVT, RHS, SignBit);
268 // Shift right or sign-extend it if the two operands have different types.
269 int SizeDiff = RVT.getSizeInBits() - LVT.getSizeInBits();
272 DAG.getNode(ISD::SRL, dl, RVT, SignBit,
273 DAG.getConstant(SizeDiff, dl,
274 TLI.getShiftAmountTy(SignBit.getValueType(),
275 DAG.getDataLayout())));
276 SignBit = DAG.getNode(ISD::TRUNCATE, dl, LVT, SignBit);
277 } else if (SizeDiff < 0) {
278 SignBit = DAG.getNode(ISD::ANY_EXTEND, dl, LVT, SignBit);
280 DAG.getNode(ISD::SHL, dl, LVT, SignBit,
281 DAG.getConstant(-SizeDiff, dl,
282 TLI.getShiftAmountTy(SignBit.getValueType(),
283 DAG.getDataLayout())));
286 // Clear the sign bit of the first operand.
287 SDValue Mask = DAG.getNode(
288 ISD::SHL, dl, LVT, DAG.getConstant(1, dl, LVT),
289 DAG.getConstant(LSize - 1, dl,
290 TLI.getShiftAmountTy(LVT, DAG.getDataLayout())));
291 Mask = DAG.getNode(ISD::SUB, dl, LVT, Mask, DAG.getConstant(1, dl, LVT));
292 LHS = DAG.getNode(ISD::AND, dl, LVT, LHS, Mask);
294 // Or the value with the sign bit.
295 return DAG.getNode(ISD::OR, dl, LVT, LHS, SignBit);
298 SDValue DAGTypeLegalizer::SoftenFloatRes_FCOS(SDNode *N) {
299 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
300 SDValue Op = GetSoftenedFloat(N->getOperand(0));
301 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
307 NVT, Op, false, SDLoc(N)).first;
310 SDValue DAGTypeLegalizer::SoftenFloatRes_FDIV(SDNode *N) {
311 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
312 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
313 GetSoftenedFloat(N->getOperand(1)) };
314 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
320 NVT, Ops, false, SDLoc(N)).first;
323 SDValue DAGTypeLegalizer::SoftenFloatRes_FEXP(SDNode *N) {
324 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
325 SDValue Op = GetSoftenedFloat(N->getOperand(0));
326 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
332 NVT, Op, false, SDLoc(N)).first;
335 SDValue DAGTypeLegalizer::SoftenFloatRes_FEXP2(SDNode *N) {
336 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
337 SDValue Op = GetSoftenedFloat(N->getOperand(0));
338 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
343 RTLIB::EXP2_PPCF128),
344 NVT, Op, false, SDLoc(N)).first;
347 SDValue DAGTypeLegalizer::SoftenFloatRes_FFLOOR(SDNode *N) {
348 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
349 SDValue Op = GetSoftenedFloat(N->getOperand(0));
350 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
355 RTLIB::FLOOR_PPCF128),
356 NVT, Op, false, SDLoc(N)).first;
359 SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG(SDNode *N) {
360 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
361 SDValue Op = GetSoftenedFloat(N->getOperand(0));
362 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
368 NVT, Op, false, SDLoc(N)).first;
371 SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG2(SDNode *N) {
372 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
373 SDValue Op = GetSoftenedFloat(N->getOperand(0));
374 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
379 RTLIB::LOG2_PPCF128),
380 NVT, Op, false, SDLoc(N)).first;
383 SDValue DAGTypeLegalizer::SoftenFloatRes_FLOG10(SDNode *N) {
384 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
385 SDValue Op = GetSoftenedFloat(N->getOperand(0));
386 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
391 RTLIB::LOG10_PPCF128),
392 NVT, Op, false, SDLoc(N)).first;
395 SDValue DAGTypeLegalizer::SoftenFloatRes_FMA(SDNode *N) {
396 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
397 SDValue Ops[3] = { GetSoftenedFloat(N->getOperand(0)),
398 GetSoftenedFloat(N->getOperand(1)),
399 GetSoftenedFloat(N->getOperand(2)) };
400 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
406 NVT, Ops, false, SDLoc(N)).first;
409 SDValue DAGTypeLegalizer::SoftenFloatRes_FMUL(SDNode *N) {
410 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
411 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
412 GetSoftenedFloat(N->getOperand(1)) };
413 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
419 NVT, Ops, false, SDLoc(N)).first;
422 SDValue DAGTypeLegalizer::SoftenFloatRes_FNEARBYINT(SDNode *N) {
423 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
424 SDValue Op = GetSoftenedFloat(N->getOperand(0));
425 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
426 RTLIB::NEARBYINT_F32,
427 RTLIB::NEARBYINT_F64,
428 RTLIB::NEARBYINT_F80,
429 RTLIB::NEARBYINT_F128,
430 RTLIB::NEARBYINT_PPCF128),
431 NVT, Op, false, SDLoc(N)).first;
434 SDValue DAGTypeLegalizer::SoftenFloatRes_FNEG(SDNode *N, unsigned ResNo) {
435 // When LegalInHWReg, FNEG can be implemented as native bitwise operations.
436 if (isLegalInHWReg(N->getValueType(ResNo)))
437 return SDValue(N, ResNo);
438 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
440 // Expand Y = FNEG(X) -> Y = SUB -0.0, X
441 SDValue Ops[2] = { DAG.getConstantFP(-0.0, dl, N->getValueType(0)),
442 GetSoftenedFloat(N->getOperand(0)) };
443 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
449 NVT, Ops, false, dl).first;
452 SDValue DAGTypeLegalizer::SoftenFloatRes_FP_EXTEND(SDNode *N) {
453 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
454 SDValue Op = N->getOperand(0);
456 // There's only a libcall for f16 -> f32, so proceed in two stages. Also, it's
457 // entirely possible for both f16 and f32 to be legal, so use the fully
458 // hard-float FP_EXTEND rather than FP16_TO_FP.
459 if (Op.getValueType() == MVT::f16 && N->getValueType(0) != MVT::f32) {
460 Op = DAG.getNode(ISD::FP_EXTEND, SDLoc(N), MVT::f32, Op);
461 if (getTypeAction(MVT::f32) == TargetLowering::TypeSoftenFloat)
462 SoftenFloatResult(Op.getNode(), 0);
465 if (getTypeAction(Op.getValueType()) == TargetLowering::TypePromoteFloat) {
466 Op = GetPromotedFloat(Op);
467 // If the promotion did the FP_EXTEND to the destination type for us,
468 // there's nothing left to do here.
469 if (Op.getValueType() == N->getValueType(0)) {
470 return BitConvertToInteger(Op);
474 RTLIB::Libcall LC = RTLIB::getFPEXT(Op.getValueType(), N->getValueType(0));
475 if (getTypeAction(Op.getValueType()) == TargetLowering::TypeSoftenFloat)
476 Op = GetSoftenedFloat(Op);
477 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!");
478 return TLI.makeLibCall(DAG, LC, NVT, Op, false, SDLoc(N)).first;
481 // FIXME: Should we just use 'normal' FP_EXTEND / FP_TRUNC instead of special
483 SDValue DAGTypeLegalizer::SoftenFloatRes_FP16_TO_FP(SDNode *N) {
484 EVT MidVT = TLI.getTypeToTransformTo(*DAG.getContext(), MVT::f32);
485 SDValue Op = N->getOperand(0);
486 SDValue Res32 = TLI.makeLibCall(DAG, RTLIB::FPEXT_F16_F32, MidVT, Op,
487 false, SDLoc(N)).first;
488 if (N->getValueType(0) == MVT::f32)
491 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
492 RTLIB::Libcall LC = RTLIB::getFPEXT(MVT::f32, N->getValueType(0));
493 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND!");
494 return TLI.makeLibCall(DAG, LC, NVT, Res32, false, SDLoc(N)).first;
497 SDValue DAGTypeLegalizer::SoftenFloatRes_FP_ROUND(SDNode *N) {
498 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
499 SDValue Op = N->getOperand(0);
500 if (N->getValueType(0) == MVT::f16) {
501 // Semi-soften first, to FP_TO_FP16, so that targets which support f16 as a
502 // storage-only type get a chance to select things.
503 return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, Op);
506 RTLIB::Libcall LC = RTLIB::getFPROUND(Op.getValueType(), N->getValueType(0));
507 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND!");
508 return TLI.makeLibCall(DAG, LC, NVT, Op, false, SDLoc(N)).first;
511 SDValue DAGTypeLegalizer::SoftenFloatRes_FPOW(SDNode *N) {
512 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
513 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
514 GetSoftenedFloat(N->getOperand(1)) };
515 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
521 NVT, Ops, false, SDLoc(N)).first;
524 SDValue DAGTypeLegalizer::SoftenFloatRes_FPOWI(SDNode *N) {
525 assert(N->getOperand(1).getValueType() == MVT::i32 &&
526 "Unsupported power type!");
527 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
528 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)), N->getOperand(1) };
529 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
534 RTLIB::POWI_PPCF128),
535 NVT, Ops, false, SDLoc(N)).first;
538 SDValue DAGTypeLegalizer::SoftenFloatRes_FREM(SDNode *N) {
539 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
540 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
541 GetSoftenedFloat(N->getOperand(1)) };
542 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
548 NVT, Ops, false, SDLoc(N)).first;
551 SDValue DAGTypeLegalizer::SoftenFloatRes_FRINT(SDNode *N) {
552 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
553 SDValue Op = GetSoftenedFloat(N->getOperand(0));
554 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
559 RTLIB::RINT_PPCF128),
560 NVT, Op, false, SDLoc(N)).first;
563 SDValue DAGTypeLegalizer::SoftenFloatRes_FROUND(SDNode *N) {
564 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
565 SDValue Op = GetSoftenedFloat(N->getOperand(0));
566 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
571 RTLIB::ROUND_PPCF128),
572 NVT, Op, false, SDLoc(N)).first;
575 SDValue DAGTypeLegalizer::SoftenFloatRes_FSIN(SDNode *N) {
576 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
577 SDValue Op = GetSoftenedFloat(N->getOperand(0));
578 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
584 NVT, Op, false, SDLoc(N)).first;
587 SDValue DAGTypeLegalizer::SoftenFloatRes_FSQRT(SDNode *N) {
588 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
589 SDValue Op = GetSoftenedFloat(N->getOperand(0));
590 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
595 RTLIB::SQRT_PPCF128),
596 NVT, Op, false, SDLoc(N)).first;
599 SDValue DAGTypeLegalizer::SoftenFloatRes_FSUB(SDNode *N) {
600 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
601 SDValue Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
602 GetSoftenedFloat(N->getOperand(1)) };
603 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
609 NVT, Ops, false, SDLoc(N)).first;
612 SDValue DAGTypeLegalizer::SoftenFloatRes_FTRUNC(SDNode *N) {
613 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
614 if (N->getValueType(0) == MVT::f16)
615 return DAG.getNode(ISD::FP_TO_FP16, SDLoc(N), NVT, N->getOperand(0));
617 SDValue Op = GetSoftenedFloat(N->getOperand(0));
618 return TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
623 RTLIB::TRUNC_PPCF128),
624 NVT, Op, false, SDLoc(N)).first;
627 SDValue DAGTypeLegalizer::SoftenFloatRes_LOAD(SDNode *N, unsigned ResNo) {
628 bool LegalInHWReg = isLegalInHWReg(N->getValueType(ResNo));
629 LoadSDNode *L = cast<LoadSDNode>(N);
630 EVT VT = N->getValueType(0);
631 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
635 L->getMemOperand()->getFlags() & ~MachineMemOperand::MOInvariant;
637 if (L->getExtensionType() == ISD::NON_EXTLOAD) {
638 NewL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), NVT, dl,
639 L->getChain(), L->getBasePtr(), L->getOffset(),
640 L->getPointerInfo(), NVT, L->getAlignment(), MMOFlags,
642 // Legalized the chain result - switch anything that used the old chain to
644 if (N != NewL.getValue(1).getNode())
645 ReplaceValueWith(SDValue(N, 1), NewL.getValue(1));
649 // Do a non-extending load followed by FP_EXTEND.
650 NewL = DAG.getLoad(L->getAddressingMode(), ISD::NON_EXTLOAD, L->getMemoryVT(),
651 dl, L->getChain(), L->getBasePtr(), L->getOffset(),
652 L->getPointerInfo(), L->getMemoryVT(), L->getAlignment(),
653 MMOFlags, L->getAAInfo());
654 // Legalized the chain result - switch anything that used the old chain to
656 ReplaceValueWith(SDValue(N, 1), NewL.getValue(1));
657 auto ExtendNode = DAG.getNode(ISD::FP_EXTEND, dl, VT, NewL);
660 return BitConvertToInteger(ExtendNode);
663 SDValue DAGTypeLegalizer::SoftenFloatRes_SELECT(SDNode *N, unsigned ResNo) {
664 if (isLegalInHWReg(N->getValueType(ResNo)))
665 return SDValue(N, ResNo);
666 SDValue LHS = GetSoftenedFloat(N->getOperand(1));
667 SDValue RHS = GetSoftenedFloat(N->getOperand(2));
668 return DAG.getSelect(SDLoc(N),
669 LHS.getValueType(), N->getOperand(0), LHS, RHS);
672 SDValue DAGTypeLegalizer::SoftenFloatRes_SELECT_CC(SDNode *N, unsigned ResNo) {
673 if (isLegalInHWReg(N->getValueType(ResNo)))
674 return SDValue(N, ResNo);
675 SDValue LHS = GetSoftenedFloat(N->getOperand(2));
676 SDValue RHS = GetSoftenedFloat(N->getOperand(3));
677 return DAG.getNode(ISD::SELECT_CC, SDLoc(N),
678 LHS.getValueType(), N->getOperand(0),
679 N->getOperand(1), LHS, RHS, N->getOperand(4));
682 SDValue DAGTypeLegalizer::SoftenFloatRes_UNDEF(SDNode *N) {
683 return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(),
684 N->getValueType(0)));
687 SDValue DAGTypeLegalizer::SoftenFloatRes_VAARG(SDNode *N) {
688 SDValue Chain = N->getOperand(0); // Get the chain.
689 SDValue Ptr = N->getOperand(1); // Get the pointer.
690 EVT VT = N->getValueType(0);
691 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
695 NewVAARG = DAG.getVAArg(NVT, dl, Chain, Ptr, N->getOperand(2),
696 N->getConstantOperandVal(3));
698 // Legalized the chain result - switch anything that used the old chain to
700 if (N != NewVAARG.getValue(1).getNode())
701 ReplaceValueWith(SDValue(N, 1), NewVAARG.getValue(1));
705 SDValue DAGTypeLegalizer::SoftenFloatRes_XINT_TO_FP(SDNode *N) {
706 bool Signed = N->getOpcode() == ISD::SINT_TO_FP;
707 EVT SVT = N->getOperand(0).getValueType();
708 EVT RVT = N->getValueType(0);
712 // If the input is not legal, eg: i1 -> fp, then it needs to be promoted to
713 // a larger type, eg: i8 -> fp. Even if it is legal, no libcall may exactly
714 // match. Look for an appropriate libcall.
715 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
716 for (unsigned t = MVT::FIRST_INTEGER_VALUETYPE;
717 t <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL; ++t) {
718 NVT = (MVT::SimpleValueType)t;
719 // The source needs to big enough to hold the operand.
721 LC = Signed ? RTLIB::getSINTTOFP(NVT, RVT):RTLIB::getUINTTOFP (NVT, RVT);
723 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!");
725 // Sign/zero extend the argument if the libcall takes a larger type.
726 SDValue Op = DAG.getNode(Signed ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
727 NVT, N->getOperand(0));
728 return TLI.makeLibCall(DAG, LC,
729 TLI.getTypeToTransformTo(*DAG.getContext(), RVT),
730 Op, Signed, dl).first;
734 //===----------------------------------------------------------------------===//
735 // Convert Float Operand to Integer for Non-HW-supported Operations.
736 //===----------------------------------------------------------------------===//
738 bool DAGTypeLegalizer::SoftenFloatOperand(SDNode *N, unsigned OpNo) {
739 DEBUG(dbgs() << "Soften float operand " << OpNo << ": "; N->dump(&DAG);
741 SDValue Res = SDValue();
743 switch (N->getOpcode()) {
745 if (CanSkipSoftenFloatOperand(N, OpNo))
748 dbgs() << "SoftenFloatOperand Op #" << OpNo << ": ";
749 N->dump(&DAG); dbgs() << "\n";
751 llvm_unreachable("Do not know how to soften this operator's operand!");
753 case ISD::BITCAST: Res = SoftenFloatOp_BITCAST(N); break;
754 case ISD::BR_CC: Res = SoftenFloatOp_BR_CC(N); break;
755 case ISD::FP_EXTEND: Res = SoftenFloatOp_FP_EXTEND(N); break;
756 case ISD::FP_TO_FP16: // Same as FP_ROUND for softening purposes
757 case ISD::FP_ROUND: Res = SoftenFloatOp_FP_ROUND(N); break;
758 case ISD::FP_TO_SINT:
759 case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_XINT(N); break;
760 case ISD::SELECT_CC: Res = SoftenFloatOp_SELECT_CC(N); break;
761 case ISD::SETCC: Res = SoftenFloatOp_SETCC(N); break;
763 Res = SoftenFloatOp_STORE(N, OpNo);
764 // Do not try to analyze or soften this node again if the value is
765 // or can be held in a register. In that case, Res.getNode() should
767 if (Res.getNode() == N &&
768 isLegalInHWReg(N->getOperand(OpNo).getValueType()))
770 // Otherwise, we need to reanalyze and lower the new Res nodes.
774 // If the result is null, the sub-method took care of registering results etc.
775 if (!Res.getNode()) return false;
777 // If the result is N, the sub-method updated N in place. Tell the legalizer
778 // core about this to re-analyze.
779 if (Res.getNode() == N)
782 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
783 "Invalid operand expansion");
785 ReplaceValueWith(SDValue(N, 0), Res);
789 bool DAGTypeLegalizer::CanSkipSoftenFloatOperand(SDNode *N, unsigned OpNo) {
790 if (!isLegalInHWReg(N->getOperand(OpNo).getValueType()))
792 // When the operand type can be kept in registers, SoftenFloatResult
793 // will call ReplaceValueWith to replace all references and we can
794 // skip softening this operand.
795 switch (N->getOperand(OpNo).getOpcode()) {
797 case ISD::ConstantFP:
798 case ISD::CopyFromReg:
808 // For some opcodes, SoftenFloatResult handles all conversion of softening
809 // and replacing operands, so that there is no need to soften operands
810 // again, although such opcode could be scanned for other illegal operands.
811 switch (N->getOpcode()) {
812 case ISD::ConstantFP:
813 case ISD::CopyFromReg:
825 SDValue DAGTypeLegalizer::SoftenFloatOp_BITCAST(SDNode *N) {
826 return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0),
827 GetSoftenedFloat(N->getOperand(0)));
830 SDValue DAGTypeLegalizer::SoftenFloatOp_FP_EXTEND(SDNode *N) {
831 // If we get here, the result must be legal but the source illegal.
832 EVT SVT = N->getOperand(0).getValueType();
833 EVT RVT = N->getValueType(0);
834 SDValue Op = GetSoftenedFloat(N->getOperand(0));
837 return DAG.getNode(ISD::FP16_TO_FP, SDLoc(N), RVT, Op);
839 RTLIB::Libcall LC = RTLIB::getFPEXT(SVT, RVT);
840 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_EXTEND libcall");
842 return TLI.makeLibCall(DAG, LC, RVT, Op, false, SDLoc(N)).first;
846 SDValue DAGTypeLegalizer::SoftenFloatOp_FP_ROUND(SDNode *N) {
847 // We actually deal with the partially-softened FP_TO_FP16 node too, which
848 // returns an i16 so doesn't meet the constraints necessary for FP_ROUND.
849 assert(N->getOpcode() == ISD::FP_ROUND || N->getOpcode() == ISD::FP_TO_FP16);
851 EVT SVT = N->getOperand(0).getValueType();
852 EVT RVT = N->getValueType(0);
853 EVT FloatRVT = N->getOpcode() == ISD::FP_TO_FP16 ? MVT::f16 : RVT;
855 RTLIB::Libcall LC = RTLIB::getFPROUND(SVT, FloatRVT);
856 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_ROUND libcall");
858 SDValue Op = GetSoftenedFloat(N->getOperand(0));
859 return TLI.makeLibCall(DAG, LC, RVT, Op, false, SDLoc(N)).first;
862 SDValue DAGTypeLegalizer::SoftenFloatOp_BR_CC(SDNode *N) {
863 SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
864 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
866 EVT VT = NewLHS.getValueType();
867 NewLHS = GetSoftenedFloat(NewLHS);
868 NewRHS = GetSoftenedFloat(NewRHS);
869 TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N));
871 // If softenSetCCOperands returned a scalar, we need to compare the result
872 // against zero to select between true and false values.
873 if (!NewRHS.getNode()) {
874 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
878 // Update N to have the operands specified.
879 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
880 DAG.getCondCode(CCCode), NewLHS, NewRHS,
885 SDValue DAGTypeLegalizer::SoftenFloatOp_FP_TO_XINT(SDNode *N) {
886 bool Signed = N->getOpcode() == ISD::FP_TO_SINT;
887 EVT SVT = N->getOperand(0).getValueType();
888 EVT RVT = N->getValueType(0);
892 // If the result is not legal, eg: fp -> i1, then it needs to be promoted to
893 // a larger type, eg: fp -> i32. Even if it is legal, no libcall may exactly
894 // match, eg. we don't have fp -> i8 conversions.
895 // Look for an appropriate libcall.
896 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
897 for (unsigned IntVT = MVT::FIRST_INTEGER_VALUETYPE;
898 IntVT <= MVT::LAST_INTEGER_VALUETYPE && LC == RTLIB::UNKNOWN_LIBCALL;
900 NVT = (MVT::SimpleValueType)IntVT;
901 // The type needs to big enough to hold the result.
903 LC = Signed ? RTLIB::getFPTOSINT(SVT, NVT):RTLIB::getFPTOUINT(SVT, NVT);
905 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_XINT!");
907 SDValue Op = GetSoftenedFloat(N->getOperand(0));
908 SDValue Res = TLI.makeLibCall(DAG, LC, NVT, Op, false, dl).first;
910 // Truncate the result if the libcall returns a larger type.
911 return DAG.getNode(ISD::TRUNCATE, dl, RVT, Res);
914 SDValue DAGTypeLegalizer::SoftenFloatOp_SELECT_CC(SDNode *N) {
915 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
916 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
918 EVT VT = NewLHS.getValueType();
919 NewLHS = GetSoftenedFloat(NewLHS);
920 NewRHS = GetSoftenedFloat(NewRHS);
921 TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N));
923 // If softenSetCCOperands returned a scalar, we need to compare the result
924 // against zero to select between true and false values.
925 if (!NewRHS.getNode()) {
926 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
930 // Update N to have the operands specified.
931 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
932 N->getOperand(2), N->getOperand(3),
933 DAG.getCondCode(CCCode)),
937 SDValue DAGTypeLegalizer::SoftenFloatOp_SETCC(SDNode *N) {
938 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
939 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
941 EVT VT = NewLHS.getValueType();
942 NewLHS = GetSoftenedFloat(NewLHS);
943 NewRHS = GetSoftenedFloat(NewRHS);
944 TLI.softenSetCCOperands(DAG, VT, NewLHS, NewRHS, CCCode, SDLoc(N));
946 // If softenSetCCOperands returned a scalar, use it.
947 if (!NewRHS.getNode()) {
948 assert(NewLHS.getValueType() == N->getValueType(0) &&
949 "Unexpected setcc expansion!");
953 // Otherwise, update N to have the operands specified.
954 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
955 DAG.getCondCode(CCCode)),
959 SDValue DAGTypeLegalizer::SoftenFloatOp_STORE(SDNode *N, unsigned OpNo) {
960 assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
961 assert(OpNo == 1 && "Can only soften the stored value!");
962 StoreSDNode *ST = cast<StoreSDNode>(N);
963 SDValue Val = ST->getValue();
966 if (ST->isTruncatingStore())
967 // Do an FP_ROUND followed by a non-truncating store.
968 Val = BitConvertToInteger(DAG.getNode(ISD::FP_ROUND, dl, ST->getMemoryVT(),
969 Val, DAG.getIntPtrConstant(0, dl)));
971 Val = GetSoftenedFloat(Val);
973 return DAG.getStore(ST->getChain(), dl, Val, ST->getBasePtr(),
974 ST->getMemOperand());
978 //===----------------------------------------------------------------------===//
979 // Float Result Expansion
980 //===----------------------------------------------------------------------===//
982 /// ExpandFloatResult - This method is called when the specified result of the
983 /// specified node is found to need expansion. At this point, the node may also
984 /// have invalid operands or may have other results that need promotion, we just
985 /// know that (at least) one result needs expansion.
986 void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
987 DEBUG(dbgs() << "Expand float result: "; N->dump(&DAG); dbgs() << "\n");
991 // See if the target wants to custom expand this node.
992 if (CustomLowerNode(N, N->getValueType(ResNo), true))
995 switch (N->getOpcode()) {
998 dbgs() << "ExpandFloatResult #" << ResNo << ": ";
999 N->dump(&DAG); dbgs() << "\n";
1001 llvm_unreachable("Do not know how to expand the result of this operator!");
1003 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
1004 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
1005 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
1007 case ISD::MERGE_VALUES: ExpandRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
1008 case ISD::BITCAST: ExpandRes_BITCAST(N, Lo, Hi); break;
1009 case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break;
1010 case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break;
1011 case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break;
1012 case ISD::VAARG: ExpandRes_VAARG(N, Lo, Hi); break;
1014 case ISD::ConstantFP: ExpandFloatRes_ConstantFP(N, Lo, Hi); break;
1015 case ISD::FABS: ExpandFloatRes_FABS(N, Lo, Hi); break;
1016 case ISD::FMINNUM: ExpandFloatRes_FMINNUM(N, Lo, Hi); break;
1017 case ISD::FMAXNUM: ExpandFloatRes_FMAXNUM(N, Lo, Hi); break;
1018 case ISD::FADD: ExpandFloatRes_FADD(N, Lo, Hi); break;
1019 case ISD::FCEIL: ExpandFloatRes_FCEIL(N, Lo, Hi); break;
1020 case ISD::FCOPYSIGN: ExpandFloatRes_FCOPYSIGN(N, Lo, Hi); break;
1021 case ISD::FCOS: ExpandFloatRes_FCOS(N, Lo, Hi); break;
1022 case ISD::FDIV: ExpandFloatRes_FDIV(N, Lo, Hi); break;
1023 case ISD::FEXP: ExpandFloatRes_FEXP(N, Lo, Hi); break;
1024 case ISD::FEXP2: ExpandFloatRes_FEXP2(N, Lo, Hi); break;
1025 case ISD::FFLOOR: ExpandFloatRes_FFLOOR(N, Lo, Hi); break;
1026 case ISD::FLOG: ExpandFloatRes_FLOG(N, Lo, Hi); break;
1027 case ISD::FLOG2: ExpandFloatRes_FLOG2(N, Lo, Hi); break;
1028 case ISD::FLOG10: ExpandFloatRes_FLOG10(N, Lo, Hi); break;
1029 case ISD::FMA: ExpandFloatRes_FMA(N, Lo, Hi); break;
1030 case ISD::FMUL: ExpandFloatRes_FMUL(N, Lo, Hi); break;
1031 case ISD::FNEARBYINT: ExpandFloatRes_FNEARBYINT(N, Lo, Hi); break;
1032 case ISD::FNEG: ExpandFloatRes_FNEG(N, Lo, Hi); break;
1033 case ISD::FP_EXTEND: ExpandFloatRes_FP_EXTEND(N, Lo, Hi); break;
1034 case ISD::FPOW: ExpandFloatRes_FPOW(N, Lo, Hi); break;
1035 case ISD::FPOWI: ExpandFloatRes_FPOWI(N, Lo, Hi); break;
1036 case ISD::FRINT: ExpandFloatRes_FRINT(N, Lo, Hi); break;
1037 case ISD::FROUND: ExpandFloatRes_FROUND(N, Lo, Hi); break;
1038 case ISD::FSIN: ExpandFloatRes_FSIN(N, Lo, Hi); break;
1039 case ISD::FSQRT: ExpandFloatRes_FSQRT(N, Lo, Hi); break;
1040 case ISD::FSUB: ExpandFloatRes_FSUB(N, Lo, Hi); break;
1041 case ISD::FTRUNC: ExpandFloatRes_FTRUNC(N, Lo, Hi); break;
1042 case ISD::LOAD: ExpandFloatRes_LOAD(N, Lo, Hi); break;
1043 case ISD::SINT_TO_FP:
1044 case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break;
1045 case ISD::FREM: ExpandFloatRes_FREM(N, Lo, Hi); break;
1048 // If Lo/Hi is null, the sub-method took care of registering results etc.
1050 SetExpandedFloat(SDValue(N, ResNo), Lo, Hi);
1053 void DAGTypeLegalizer::ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo,
1055 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1056 assert(NVT.getSizeInBits() == integerPartWidth &&
1057 "Do not know how to expand this float constant!");
1058 APInt C = cast<ConstantFPSDNode>(N)->getValueAPF().bitcastToAPInt();
1060 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1061 APInt(integerPartWidth, C.getRawData()[1])),
1063 Hi = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1064 APInt(integerPartWidth, C.getRawData()[0])),
1068 void DAGTypeLegalizer::ExpandFloatRes_FABS(SDNode *N, SDValue &Lo,
1070 assert(N->getValueType(0) == MVT::ppcf128 &&
1071 "Logic only correct for ppcf128!");
1074 GetExpandedFloat(N->getOperand(0), Lo, Tmp);
1075 Hi = DAG.getNode(ISD::FABS, dl, Tmp.getValueType(), Tmp);
1076 // Lo = Hi==fabs(Hi) ? Lo : -Lo;
1077 Lo = DAG.getSelectCC(dl, Tmp, Hi, Lo,
1078 DAG.getNode(ISD::FNEG, dl, Lo.getValueType(), Lo),
1082 void DAGTypeLegalizer::ExpandFloatRes_FMINNUM(SDNode *N, SDValue &Lo,
1084 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1085 RTLIB::FMIN_F32, RTLIB::FMIN_F64,
1086 RTLIB::FMIN_F80, RTLIB::FMIN_F128,
1087 RTLIB::FMIN_PPCF128),
1089 GetPairElements(Call, Lo, Hi);
1092 void DAGTypeLegalizer::ExpandFloatRes_FMAXNUM(SDNode *N, SDValue &Lo,
1094 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1095 RTLIB::FMAX_F32, RTLIB::FMAX_F64,
1096 RTLIB::FMAX_F80, RTLIB::FMAX_F128,
1097 RTLIB::FMAX_PPCF128),
1099 GetPairElements(Call, Lo, Hi);
1102 void DAGTypeLegalizer::ExpandFloatRes_FADD(SDNode *N, SDValue &Lo,
1104 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1105 RTLIB::ADD_F32, RTLIB::ADD_F64,
1106 RTLIB::ADD_F80, RTLIB::ADD_F128,
1107 RTLIB::ADD_PPCF128),
1109 GetPairElements(Call, Lo, Hi);
1112 void DAGTypeLegalizer::ExpandFloatRes_FCEIL(SDNode *N,
1113 SDValue &Lo, SDValue &Hi) {
1114 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1115 RTLIB::CEIL_F32, RTLIB::CEIL_F64,
1116 RTLIB::CEIL_F80, RTLIB::CEIL_F128,
1117 RTLIB::CEIL_PPCF128),
1119 GetPairElements(Call, Lo, Hi);
1122 void DAGTypeLegalizer::ExpandFloatRes_FCOPYSIGN(SDNode *N,
1123 SDValue &Lo, SDValue &Hi) {
1124 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1125 RTLIB::COPYSIGN_F32,
1126 RTLIB::COPYSIGN_F64,
1127 RTLIB::COPYSIGN_F80,
1128 RTLIB::COPYSIGN_F128,
1129 RTLIB::COPYSIGN_PPCF128),
1131 GetPairElements(Call, Lo, Hi);
1134 void DAGTypeLegalizer::ExpandFloatRes_FCOS(SDNode *N,
1135 SDValue &Lo, SDValue &Hi) {
1136 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1137 RTLIB::COS_F32, RTLIB::COS_F64,
1138 RTLIB::COS_F80, RTLIB::COS_F128,
1139 RTLIB::COS_PPCF128),
1141 GetPairElements(Call, Lo, Hi);
1144 void DAGTypeLegalizer::ExpandFloatRes_FDIV(SDNode *N, SDValue &Lo,
1146 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1147 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1152 RTLIB::DIV_PPCF128),
1153 N->getValueType(0), Ops, false,
1155 GetPairElements(Call, Lo, Hi);
1158 void DAGTypeLegalizer::ExpandFloatRes_FEXP(SDNode *N,
1159 SDValue &Lo, SDValue &Hi) {
1160 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1161 RTLIB::EXP_F32, RTLIB::EXP_F64,
1162 RTLIB::EXP_F80, RTLIB::EXP_F128,
1163 RTLIB::EXP_PPCF128),
1165 GetPairElements(Call, Lo, Hi);
1168 void DAGTypeLegalizer::ExpandFloatRes_FEXP2(SDNode *N,
1169 SDValue &Lo, SDValue &Hi) {
1170 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1171 RTLIB::EXP2_F32, RTLIB::EXP2_F64,
1172 RTLIB::EXP2_F80, RTLIB::EXP2_F128,
1173 RTLIB::EXP2_PPCF128),
1175 GetPairElements(Call, Lo, Hi);
1178 void DAGTypeLegalizer::ExpandFloatRes_FFLOOR(SDNode *N,
1179 SDValue &Lo, SDValue &Hi) {
1180 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1181 RTLIB::FLOOR_F32, RTLIB::FLOOR_F64,
1182 RTLIB::FLOOR_F80, RTLIB::FLOOR_F128,
1183 RTLIB::FLOOR_PPCF128),
1185 GetPairElements(Call, Lo, Hi);
1188 void DAGTypeLegalizer::ExpandFloatRes_FLOG(SDNode *N,
1189 SDValue &Lo, SDValue &Hi) {
1190 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1191 RTLIB::LOG_F32, RTLIB::LOG_F64,
1192 RTLIB::LOG_F80, RTLIB::LOG_F128,
1193 RTLIB::LOG_PPCF128),
1195 GetPairElements(Call, Lo, Hi);
1198 void DAGTypeLegalizer::ExpandFloatRes_FLOG2(SDNode *N,
1199 SDValue &Lo, SDValue &Hi) {
1200 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1201 RTLIB::LOG2_F32, RTLIB::LOG2_F64,
1202 RTLIB::LOG2_F80, RTLIB::LOG2_F128,
1203 RTLIB::LOG2_PPCF128),
1205 GetPairElements(Call, Lo, Hi);
1208 void DAGTypeLegalizer::ExpandFloatRes_FLOG10(SDNode *N,
1209 SDValue &Lo, SDValue &Hi) {
1210 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1211 RTLIB::LOG10_F32, RTLIB::LOG10_F64,
1212 RTLIB::LOG10_F80, RTLIB::LOG10_F128,
1213 RTLIB::LOG10_PPCF128),
1215 GetPairElements(Call, Lo, Hi);
1218 void DAGTypeLegalizer::ExpandFloatRes_FMA(SDNode *N, SDValue &Lo,
1220 SDValue Ops[3] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) };
1221 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1226 RTLIB::FMA_PPCF128),
1227 N->getValueType(0), Ops, false,
1229 GetPairElements(Call, Lo, Hi);
1232 void DAGTypeLegalizer::ExpandFloatRes_FMUL(SDNode *N, SDValue &Lo,
1234 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1235 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1240 RTLIB::MUL_PPCF128),
1241 N->getValueType(0), Ops, false,
1243 GetPairElements(Call, Lo, Hi);
1246 void DAGTypeLegalizer::ExpandFloatRes_FNEARBYINT(SDNode *N,
1247 SDValue &Lo, SDValue &Hi) {
1248 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1249 RTLIB::NEARBYINT_F32,
1250 RTLIB::NEARBYINT_F64,
1251 RTLIB::NEARBYINT_F80,
1252 RTLIB::NEARBYINT_F128,
1253 RTLIB::NEARBYINT_PPCF128),
1255 GetPairElements(Call, Lo, Hi);
1258 void DAGTypeLegalizer::ExpandFloatRes_FNEG(SDNode *N, SDValue &Lo,
1261 GetExpandedFloat(N->getOperand(0), Lo, Hi);
1262 Lo = DAG.getNode(ISD::FNEG, dl, Lo.getValueType(), Lo);
1263 Hi = DAG.getNode(ISD::FNEG, dl, Hi.getValueType(), Hi);
1266 void DAGTypeLegalizer::ExpandFloatRes_FP_EXTEND(SDNode *N, SDValue &Lo,
1268 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1270 Hi = DAG.getNode(ISD::FP_EXTEND, dl, NVT, N->getOperand(0));
1271 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1272 APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1275 void DAGTypeLegalizer::ExpandFloatRes_FPOW(SDNode *N,
1276 SDValue &Lo, SDValue &Hi) {
1277 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1278 RTLIB::POW_F32, RTLIB::POW_F64,
1279 RTLIB::POW_F80, RTLIB::POW_F128,
1280 RTLIB::POW_PPCF128),
1282 GetPairElements(Call, Lo, Hi);
1285 void DAGTypeLegalizer::ExpandFloatRes_FPOWI(SDNode *N,
1286 SDValue &Lo, SDValue &Hi) {
1287 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1288 RTLIB::POWI_F32, RTLIB::POWI_F64,
1289 RTLIB::POWI_F80, RTLIB::POWI_F128,
1290 RTLIB::POWI_PPCF128),
1292 GetPairElements(Call, Lo, Hi);
1295 void DAGTypeLegalizer::ExpandFloatRes_FREM(SDNode *N,
1296 SDValue &Lo, SDValue &Hi) {
1297 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1298 RTLIB::REM_F32, RTLIB::REM_F64,
1299 RTLIB::REM_F80, RTLIB::REM_F128,
1300 RTLIB::REM_PPCF128),
1302 GetPairElements(Call, Lo, Hi);
1305 void DAGTypeLegalizer::ExpandFloatRes_FRINT(SDNode *N,
1306 SDValue &Lo, SDValue &Hi) {
1307 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1308 RTLIB::RINT_F32, RTLIB::RINT_F64,
1309 RTLIB::RINT_F80, RTLIB::RINT_F128,
1310 RTLIB::RINT_PPCF128),
1312 GetPairElements(Call, Lo, Hi);
1315 void DAGTypeLegalizer::ExpandFloatRes_FROUND(SDNode *N,
1316 SDValue &Lo, SDValue &Hi) {
1317 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1322 RTLIB::ROUND_PPCF128),
1324 GetPairElements(Call, Lo, Hi);
1327 void DAGTypeLegalizer::ExpandFloatRes_FSIN(SDNode *N,
1328 SDValue &Lo, SDValue &Hi) {
1329 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1330 RTLIB::SIN_F32, RTLIB::SIN_F64,
1331 RTLIB::SIN_F80, RTLIB::SIN_F128,
1332 RTLIB::SIN_PPCF128),
1334 GetPairElements(Call, Lo, Hi);
1337 void DAGTypeLegalizer::ExpandFloatRes_FSQRT(SDNode *N,
1338 SDValue &Lo, SDValue &Hi) {
1339 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1340 RTLIB::SQRT_F32, RTLIB::SQRT_F64,
1341 RTLIB::SQRT_F80, RTLIB::SQRT_F128,
1342 RTLIB::SQRT_PPCF128),
1344 GetPairElements(Call, Lo, Hi);
1347 void DAGTypeLegalizer::ExpandFloatRes_FSUB(SDNode *N, SDValue &Lo,
1349 SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
1350 SDValue Call = TLI.makeLibCall(DAG, GetFPLibCall(N->getValueType(0),
1355 RTLIB::SUB_PPCF128),
1356 N->getValueType(0), Ops, false,
1358 GetPairElements(Call, Lo, Hi);
1361 void DAGTypeLegalizer::ExpandFloatRes_FTRUNC(SDNode *N,
1362 SDValue &Lo, SDValue &Hi) {
1363 SDValue Call = LibCallify(GetFPLibCall(N->getValueType(0),
1364 RTLIB::TRUNC_F32, RTLIB::TRUNC_F64,
1365 RTLIB::TRUNC_F80, RTLIB::TRUNC_F128,
1366 RTLIB::TRUNC_PPCF128),
1368 GetPairElements(Call, Lo, Hi);
1371 void DAGTypeLegalizer::ExpandFloatRes_LOAD(SDNode *N, SDValue &Lo,
1373 if (ISD::isNormalLoad(N)) {
1374 ExpandRes_NormalLoad(N, Lo, Hi);
1378 assert(ISD::isUNINDEXEDLoad(N) && "Indexed load during type legalization!");
1379 LoadSDNode *LD = cast<LoadSDNode>(N);
1380 SDValue Chain = LD->getChain();
1381 SDValue Ptr = LD->getBasePtr();
1384 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), LD->getValueType(0));
1385 assert(NVT.isByteSized() && "Expanded type not byte sized!");
1386 assert(LD->getMemoryVT().bitsLE(NVT) && "Float type not round?");
1388 Hi = DAG.getExtLoad(LD->getExtensionType(), dl, NVT, Chain, Ptr,
1389 LD->getMemoryVT(), LD->getMemOperand());
1391 // Remember the chain.
1392 Chain = Hi.getValue(1);
1394 // The low part is zero.
1395 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1396 APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1398 // Modified the chain - switch anything that used the old chain to use the
1400 ReplaceValueWith(SDValue(LD, 1), Chain);
1403 void DAGTypeLegalizer::ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo,
1405 assert(N->getValueType(0) == MVT::ppcf128 && "Unsupported XINT_TO_FP!");
1406 EVT VT = N->getValueType(0);
1407 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1408 SDValue Src = N->getOperand(0);
1409 EVT SrcVT = Src.getValueType();
1410 bool isSigned = N->getOpcode() == ISD::SINT_TO_FP;
1413 // First do an SINT_TO_FP, whether the original was signed or unsigned.
1414 // When promoting partial word types to i32 we must honor the signedness,
1416 if (SrcVT.bitsLE(MVT::i32)) {
1417 // The integer can be represented exactly in an f64.
1418 Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
1420 Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
1421 APInt(NVT.getSizeInBits(), 0)), dl, NVT);
1422 Hi = DAG.getNode(ISD::SINT_TO_FP, dl, NVT, Src);
1424 RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
1425 if (SrcVT.bitsLE(MVT::i64)) {
1426 Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
1428 LC = RTLIB::SINTTOFP_I64_PPCF128;
1429 } else if (SrcVT.bitsLE(MVT::i128)) {
1430 Src = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i128, Src);
1431 LC = RTLIB::SINTTOFP_I128_PPCF128;
1433 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!");
1435 Hi = TLI.makeLibCall(DAG, LC, VT, Src, true, dl).first;
1436 GetPairElements(Hi, Lo, Hi);
1442 // Unsigned - fix up the SINT_TO_FP value just calculated.
1443 Hi = DAG.getNode(ISD::BUILD_PAIR, dl, VT, Lo, Hi);
1444 SrcVT = Src.getValueType();
1446 // x>=0 ? (ppcf128)(iN)x : (ppcf128)(iN)x + 2^N; N=32,64,128.
1447 static const uint64_t TwoE32[] = { 0x41f0000000000000LL, 0 };
1448 static const uint64_t TwoE64[] = { 0x43f0000000000000LL, 0 };
1449 static const uint64_t TwoE128[] = { 0x47f0000000000000LL, 0 };
1450 ArrayRef<uint64_t> Parts;
1452 switch (SrcVT.getSimpleVT().SimpleTy) {
1454 llvm_unreachable("Unsupported UINT_TO_FP!");
1466 // TODO: Are there fast-math-flags to propagate to this FADD?
1467 Lo = DAG.getNode(ISD::FADD, dl, VT, Hi,
1468 DAG.getConstantFP(APFloat(APFloat::PPCDoubleDouble,
1471 Lo = DAG.getSelectCC(dl, Src, DAG.getConstant(0, dl, SrcVT),
1472 Lo, Hi, ISD::SETLT);
1473 GetPairElements(Lo, Lo, Hi);
1477 //===----------------------------------------------------------------------===//
1478 // Float Operand Expansion
1479 //===----------------------------------------------------------------------===//
1481 /// ExpandFloatOperand - This method is called when the specified operand of the
1482 /// specified node is found to need expansion. At this point, all of the result
1483 /// types of the node are known to be legal, but other operands of the node may
1484 /// need promotion or expansion as well as the specified one.
1485 bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) {
1486 DEBUG(dbgs() << "Expand float operand: "; N->dump(&DAG); dbgs() << "\n");
1487 SDValue Res = SDValue();
1489 // See if the target wants to custom expand this node.
1490 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
1493 switch (N->getOpcode()) {
1496 dbgs() << "ExpandFloatOperand Op #" << OpNo << ": ";
1497 N->dump(&DAG); dbgs() << "\n";
1499 llvm_unreachable("Do not know how to expand this operator's operand!");
1501 case ISD::BITCAST: Res = ExpandOp_BITCAST(N); break;
1502 case ISD::BUILD_VECTOR: Res = ExpandOp_BUILD_VECTOR(N); break;
1503 case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break;
1505 case ISD::BR_CC: Res = ExpandFloatOp_BR_CC(N); break;
1506 case ISD::FCOPYSIGN: Res = ExpandFloatOp_FCOPYSIGN(N); break;
1507 case ISD::FP_ROUND: Res = ExpandFloatOp_FP_ROUND(N); break;
1508 case ISD::FP_TO_SINT: Res = ExpandFloatOp_FP_TO_SINT(N); break;
1509 case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_UINT(N); break;
1510 case ISD::SELECT_CC: Res = ExpandFloatOp_SELECT_CC(N); break;
1511 case ISD::SETCC: Res = ExpandFloatOp_SETCC(N); break;
1512 case ISD::STORE: Res = ExpandFloatOp_STORE(cast<StoreSDNode>(N),
1516 // If the result is null, the sub-method took care of registering results etc.
1517 if (!Res.getNode()) return false;
1519 // If the result is N, the sub-method updated N in place. Tell the legalizer
1521 if (Res.getNode() == N)
1524 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1525 "Invalid operand expansion");
1527 ReplaceValueWith(SDValue(N, 0), Res);
1531 /// FloatExpandSetCCOperands - Expand the operands of a comparison. This code
1532 /// is shared among BR_CC, SELECT_CC, and SETCC handlers.
1533 void DAGTypeLegalizer::FloatExpandSetCCOperands(SDValue &NewLHS,
1535 ISD::CondCode &CCCode,
1537 SDValue LHSLo, LHSHi, RHSLo, RHSHi;
1538 GetExpandedFloat(NewLHS, LHSLo, LHSHi);
1539 GetExpandedFloat(NewRHS, RHSLo, RHSHi);
1541 assert(NewLHS.getValueType() == MVT::ppcf128 && "Unsupported setcc type!");
1543 // FIXME: This generated code sucks. We want to generate
1544 // FCMPU crN, hi1, hi2
1546 // FCMPU crN, lo1, lo2
1547 // The following can be improved, but not that much.
1548 SDValue Tmp1, Tmp2, Tmp3;
1549 Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1550 LHSHi, RHSHi, ISD::SETOEQ);
1551 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSLo.getValueType()),
1552 LHSLo, RHSLo, CCCode);
1553 Tmp3 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
1554 Tmp1 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1555 LHSHi, RHSHi, ISD::SETUNE);
1556 Tmp2 = DAG.getSetCC(dl, getSetCCResultType(LHSHi.getValueType()),
1557 LHSHi, RHSHi, CCCode);
1558 Tmp1 = DAG.getNode(ISD::AND, dl, Tmp1.getValueType(), Tmp1, Tmp2);
1559 NewLHS = DAG.getNode(ISD::OR, dl, Tmp1.getValueType(), Tmp1, Tmp3);
1560 NewRHS = SDValue(); // LHS is the result, not a compare.
1563 SDValue DAGTypeLegalizer::ExpandFloatOp_BR_CC(SDNode *N) {
1564 SDValue NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
1565 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
1566 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1568 // If ExpandSetCCOperands returned a scalar, we need to compare the result
1569 // against zero to select between true and false values.
1570 if (!NewRHS.getNode()) {
1571 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
1572 CCCode = ISD::SETNE;
1575 // Update N to have the operands specified.
1576 return SDValue(DAG.UpdateNodeOperands(N, N->getOperand(0),
1577 DAG.getCondCode(CCCode), NewLHS, NewRHS,
1578 N->getOperand(4)), 0);
1581 SDValue DAGTypeLegalizer::ExpandFloatOp_FCOPYSIGN(SDNode *N) {
1582 assert(N->getOperand(1).getValueType() == MVT::ppcf128 &&
1583 "Logic only correct for ppcf128!");
1585 GetExpandedFloat(N->getOperand(1), Lo, Hi);
1586 // The ppcf128 value is providing only the sign; take it from the
1587 // higher-order double (which must have the larger magnitude).
1588 return DAG.getNode(ISD::FCOPYSIGN, SDLoc(N),
1589 N->getValueType(0), N->getOperand(0), Hi);
1592 SDValue DAGTypeLegalizer::ExpandFloatOp_FP_ROUND(SDNode *N) {
1593 assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1594 "Logic only correct for ppcf128!");
1596 GetExpandedFloat(N->getOperand(0), Lo, Hi);
1597 // Round it the rest of the way (e.g. to f32) if needed.
1598 return DAG.getNode(ISD::FP_ROUND, SDLoc(N),
1599 N->getValueType(0), Hi, N->getOperand(1));
1602 SDValue DAGTypeLegalizer::ExpandFloatOp_FP_TO_SINT(SDNode *N) {
1603 EVT RVT = N->getValueType(0);
1606 // Expand ppcf128 to i32 by hand for the benefit of llvm-gcc bootstrap on
1607 // PPC (the libcall is not available). FIXME: Do this in a less hacky way.
1608 if (RVT == MVT::i32) {
1609 assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1610 "Logic only correct for ppcf128!");
1611 SDValue Res = DAG.getNode(ISD::FP_ROUND_INREG, dl, MVT::ppcf128,
1612 N->getOperand(0), DAG.getValueType(MVT::f64));
1613 Res = DAG.getNode(ISD::FP_ROUND, dl, MVT::f64, Res,
1614 DAG.getIntPtrConstant(1, dl));
1615 return DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32, Res);
1618 RTLIB::Libcall LC = RTLIB::getFPTOSINT(N->getOperand(0).getValueType(), RVT);
1619 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_SINT!");
1620 return TLI.makeLibCall(DAG, LC, RVT, N->getOperand(0), false, dl).first;
1623 SDValue DAGTypeLegalizer::ExpandFloatOp_FP_TO_UINT(SDNode *N) {
1624 EVT RVT = N->getValueType(0);
1627 // Expand ppcf128 to i32 by hand for the benefit of llvm-gcc bootstrap on
1628 // PPC (the libcall is not available). FIXME: Do this in a less hacky way.
1629 if (RVT == MVT::i32) {
1630 assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1631 "Logic only correct for ppcf128!");
1632 const uint64_t TwoE31[] = {0x41e0000000000000LL, 0};
1633 APFloat APF = APFloat(APFloat::PPCDoubleDouble, APInt(128, TwoE31));
1634 SDValue Tmp = DAG.getConstantFP(APF, dl, MVT::ppcf128);
1635 // X>=2^31 ? (int)(X-2^31)+0x80000000 : (int)X
1636 // FIXME: generated code sucks.
1637 // TODO: Are there fast-math-flags to propagate to this FSUB?
1638 return DAG.getSelectCC(dl, N->getOperand(0), Tmp,
1639 DAG.getNode(ISD::ADD, dl, MVT::i32,
1640 DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32,
1641 DAG.getNode(ISD::FSUB, dl,
1645 DAG.getConstant(0x80000000, dl,
1647 DAG.getNode(ISD::FP_TO_SINT, dl,
1648 MVT::i32, N->getOperand(0)),
1652 RTLIB::Libcall LC = RTLIB::getFPTOUINT(N->getOperand(0).getValueType(), RVT);
1653 assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_UINT!");
1654 return TLI.makeLibCall(DAG, LC, N->getValueType(0), N->getOperand(0),
1658 SDValue DAGTypeLegalizer::ExpandFloatOp_SELECT_CC(SDNode *N) {
1659 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1660 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
1661 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1663 // If ExpandSetCCOperands returned a scalar, we need to compare the result
1664 // against zero to select between true and false values.
1665 if (!NewRHS.getNode()) {
1666 NewRHS = DAG.getConstant(0, SDLoc(N), NewLHS.getValueType());
1667 CCCode = ISD::SETNE;
1670 // Update N to have the operands specified.
1671 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1672 N->getOperand(2), N->getOperand(3),
1673 DAG.getCondCode(CCCode)), 0);
1676 SDValue DAGTypeLegalizer::ExpandFloatOp_SETCC(SDNode *N) {
1677 SDValue NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1678 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1679 FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode, SDLoc(N));
1681 // If ExpandSetCCOperands returned a scalar, use it.
1682 if (!NewRHS.getNode()) {
1683 assert(NewLHS.getValueType() == N->getValueType(0) &&
1684 "Unexpected setcc expansion!");
1688 // Otherwise, update N to have the operands specified.
1689 return SDValue(DAG.UpdateNodeOperands(N, NewLHS, NewRHS,
1690 DAG.getCondCode(CCCode)), 0);
1693 SDValue DAGTypeLegalizer::ExpandFloatOp_STORE(SDNode *N, unsigned OpNo) {
1694 if (ISD::isNormalStore(N))
1695 return ExpandOp_NormalStore(N, OpNo);
1697 assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
1698 assert(OpNo == 1 && "Can only expand the stored value so far");
1699 StoreSDNode *ST = cast<StoreSDNode>(N);
1701 SDValue Chain = ST->getChain();
1702 SDValue Ptr = ST->getBasePtr();
1704 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(),
1705 ST->getValue().getValueType());
1706 assert(NVT.isByteSized() && "Expanded type not byte sized!");
1707 assert(ST->getMemoryVT().bitsLE(NVT) && "Float type not round?");
1711 GetExpandedOp(ST->getValue(), Lo, Hi);
1713 return DAG.getTruncStore(Chain, SDLoc(N), Hi, Ptr,
1714 ST->getMemoryVT(), ST->getMemOperand());
1717 //===----------------------------------------------------------------------===//
1718 // Float Operand Promotion
1719 //===----------------------------------------------------------------------===//
1722 static ISD::NodeType GetPromotionOpcode(EVT OpVT, EVT RetVT) {
1723 if (OpVT == MVT::f16) {
1724 return ISD::FP16_TO_FP;
1725 } else if (RetVT == MVT::f16) {
1726 return ISD::FP_TO_FP16;
1729 report_fatal_error("Attempt at an invalid promotion-related conversion");
1732 bool DAGTypeLegalizer::PromoteFloatOperand(SDNode *N, unsigned OpNo) {
1733 SDValue R = SDValue();
1735 // Nodes that use a promotion-requiring floating point operand, but doesn't
1736 // produce a promotion-requiring floating point result, need to be legalized
1737 // to use the promoted float operand. Nodes that produce at least one
1738 // promotion-requiring floating point result have their operands legalized as
1739 // a part of PromoteFloatResult.
1740 switch (N->getOpcode()) {
1742 llvm_unreachable("Do not know how to promote this operator's operand!");
1744 case ISD::BITCAST: R = PromoteFloatOp_BITCAST(N, OpNo); break;
1745 case ISD::FCOPYSIGN: R = PromoteFloatOp_FCOPYSIGN(N, OpNo); break;
1746 case ISD::FP_TO_SINT:
1747 case ISD::FP_TO_UINT: R = PromoteFloatOp_FP_TO_XINT(N, OpNo); break;
1748 case ISD::FP_EXTEND: R = PromoteFloatOp_FP_EXTEND(N, OpNo); break;
1749 case ISD::SELECT_CC: R = PromoteFloatOp_SELECT_CC(N, OpNo); break;
1750 case ISD::SETCC: R = PromoteFloatOp_SETCC(N, OpNo); break;
1751 case ISD::STORE: R = PromoteFloatOp_STORE(N, OpNo); break;
1755 ReplaceValueWith(SDValue(N, 0), R);
1759 SDValue DAGTypeLegalizer::PromoteFloatOp_BITCAST(SDNode *N, unsigned OpNo) {
1760 SDValue Op = N->getOperand(0);
1761 EVT OpVT = Op->getValueType(0);
1763 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), OpVT.getSizeInBits());
1764 assert (IVT == N->getValueType(0) && "Bitcast to type of different size");
1766 SDValue Promoted = GetPromotedFloat(N->getOperand(0));
1767 EVT PromotedVT = Promoted->getValueType(0);
1769 // Convert the promoted float value to the desired IVT.
1770 return DAG.getNode(GetPromotionOpcode(PromotedVT, OpVT), SDLoc(N), IVT,
1774 // Promote Operand 1 of FCOPYSIGN. Operand 0 ought to be handled by
1775 // PromoteFloatRes_FCOPYSIGN.
1776 SDValue DAGTypeLegalizer::PromoteFloatOp_FCOPYSIGN(SDNode *N, unsigned OpNo) {
1777 assert (OpNo == 1 && "Only Operand 1 must need promotion here");
1778 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
1780 return DAG.getNode(N->getOpcode(), SDLoc(N), N->getValueType(0),
1781 N->getOperand(0), Op1);
1784 // Convert the promoted float value to the desired integer type
1785 SDValue DAGTypeLegalizer::PromoteFloatOp_FP_TO_XINT(SDNode *N, unsigned OpNo) {
1786 SDValue Op = GetPromotedFloat(N->getOperand(0));
1787 return DAG.getNode(N->getOpcode(), SDLoc(N), N->getValueType(0), Op);
1790 SDValue DAGTypeLegalizer::PromoteFloatOp_FP_EXTEND(SDNode *N, unsigned OpNo) {
1791 SDValue Op = GetPromotedFloat(N->getOperand(0));
1792 EVT VT = N->getValueType(0);
1794 // Desired VT is same as promoted type. Use promoted float directly.
1795 if (VT == Op->getValueType(0))
1798 // Else, extend the promoted float value to the desired VT.
1799 return DAG.getNode(ISD::FP_EXTEND, SDLoc(N), VT, Op);
1802 // Promote the float operands used for comparison. The true- and false-
1803 // operands have the same type as the result and are promoted, if needed, by
1804 // PromoteFloatRes_SELECT_CC
1805 SDValue DAGTypeLegalizer::PromoteFloatOp_SELECT_CC(SDNode *N, unsigned OpNo) {
1806 SDValue LHS = GetPromotedFloat(N->getOperand(0));
1807 SDValue RHS = GetPromotedFloat(N->getOperand(1));
1809 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), N->getValueType(0),
1810 LHS, RHS, N->getOperand(2), N->getOperand(3),
1814 // Construct a SETCC that compares the promoted values and sets the conditional
1816 SDValue DAGTypeLegalizer::PromoteFloatOp_SETCC(SDNode *N, unsigned OpNo) {
1817 EVT VT = N->getValueType(0);
1818 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1819 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
1820 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
1821 ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1823 return DAG.getSetCC(SDLoc(N), NVT, Op0, Op1, CCCode);
1827 // Lower the promoted Float down to the integer value of same size and construct
1828 // a STORE of the integer value.
1829 SDValue DAGTypeLegalizer::PromoteFloatOp_STORE(SDNode *N, unsigned OpNo) {
1830 StoreSDNode *ST = cast<StoreSDNode>(N);
1831 SDValue Val = ST->getValue();
1834 SDValue Promoted = GetPromotedFloat(Val);
1835 EVT VT = ST->getOperand(1)->getValueType(0);
1836 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
1839 NewVal = DAG.getNode(GetPromotionOpcode(Promoted.getValueType(), VT), DL,
1842 return DAG.getStore(ST->getChain(), DL, NewVal, ST->getBasePtr(),
1843 ST->getMemOperand());
1846 //===----------------------------------------------------------------------===//
1847 // Float Result Promotion
1848 //===----------------------------------------------------------------------===//
1850 void DAGTypeLegalizer::PromoteFloatResult(SDNode *N, unsigned ResNo) {
1851 SDValue R = SDValue();
1853 switch (N->getOpcode()) {
1854 // These opcodes cannot appear if promotion of FP16 is done in the backend
1856 case ISD::FP16_TO_FP:
1857 case ISD::FP_TO_FP16:
1859 llvm_unreachable("Do not know how to promote this operator's result!");
1861 case ISD::BITCAST: R = PromoteFloatRes_BITCAST(N); break;
1862 case ISD::ConstantFP: R = PromoteFloatRes_ConstantFP(N); break;
1863 case ISD::EXTRACT_VECTOR_ELT:
1864 R = PromoteFloatRes_EXTRACT_VECTOR_ELT(N); break;
1865 case ISD::FCOPYSIGN: R = PromoteFloatRes_FCOPYSIGN(N); break;
1867 // Unary FP Operations
1877 case ISD::FNEARBYINT:
1883 case ISD::FTRUNC: R = PromoteFloatRes_UnaryOp(N); break;
1885 // Binary FP Operations
1895 case ISD::FSUB: R = PromoteFloatRes_BinOp(N); break;
1897 case ISD::FMA: // FMA is same as FMAD
1898 case ISD::FMAD: R = PromoteFloatRes_FMAD(N); break;
1900 case ISD::FPOWI: R = PromoteFloatRes_FPOWI(N); break;
1902 case ISD::FP_ROUND: R = PromoteFloatRes_FP_ROUND(N); break;
1903 case ISD::LOAD: R = PromoteFloatRes_LOAD(N); break;
1904 case ISD::SELECT: R = PromoteFloatRes_SELECT(N); break;
1905 case ISD::SELECT_CC: R = PromoteFloatRes_SELECT_CC(N); break;
1907 case ISD::SINT_TO_FP:
1908 case ISD::UINT_TO_FP: R = PromoteFloatRes_XINT_TO_FP(N); break;
1909 case ISD::UNDEF: R = PromoteFloatRes_UNDEF(N); break;
1914 SetPromotedFloat(SDValue(N, ResNo), R);
1917 // Bitcast from i16 to f16: convert the i16 to a f32 value instead.
1918 // At this point, it is not possible to determine if the bitcast value is
1919 // eventually stored to memory or promoted to f32 or promoted to a floating
1920 // point at a higher precision. Some of these cases are handled by FP_EXTEND,
1921 // STORE promotion handlers.
1922 SDValue DAGTypeLegalizer::PromoteFloatRes_BITCAST(SDNode *N) {
1923 EVT VT = N->getValueType(0);
1924 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1925 return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT,
1929 SDValue DAGTypeLegalizer::PromoteFloatRes_ConstantFP(SDNode *N) {
1930 ConstantFPSDNode *CFPNode = cast<ConstantFPSDNode>(N);
1931 EVT VT = N->getValueType(0);
1934 // Get the (bit-cast) APInt of the APFloat and build an integer constant
1935 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
1936 SDValue C = DAG.getConstant(CFPNode->getValueAPF().bitcastToAPInt(), DL,
1939 // Convert the Constant to the desired FP type
1940 // FIXME We might be able to do the conversion during compilation and get rid
1941 // of it from the object code
1942 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1943 return DAG.getNode(GetPromotionOpcode(VT, NVT), DL, NVT, C);
1946 // If the Index operand is a constant, try to redirect the extract operation to
1947 // the correct legalized vector. If not, bit-convert the input vector to
1948 // equivalent integer vector. Extract the element as an (bit-cast) integer
1949 // value and convert it to the promoted type.
1950 SDValue DAGTypeLegalizer::PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode *N) {
1953 // If the index is constant, try to extract the value from the legalized
1955 if (isa<ConstantSDNode>(N->getOperand(1))) {
1956 SDValue Vec = N->getOperand(0);
1957 SDValue Idx = N->getOperand(1);
1958 EVT VecVT = Vec->getValueType(0);
1959 EVT EltVT = VecVT.getVectorElementType();
1961 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1963 switch (getTypeAction(VecVT)) {
1965 case TargetLowering::TypeScalarizeVector: {
1966 SDValue Res = GetScalarizedVector(N->getOperand(0));
1967 ReplaceValueWith(SDValue(N, 0), Res);
1970 case TargetLowering::TypeWidenVector: {
1971 Vec = GetWidenedVector(Vec);
1972 SDValue Res = DAG.getNode(N->getOpcode(), DL, EltVT, Vec, Idx);
1973 ReplaceValueWith(SDValue(N, 0), Res);
1976 case TargetLowering::TypeSplitVector: {
1978 GetSplitVector(Vec, Lo, Hi);
1980 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1982 if (IdxVal < LoElts)
1983 Res = DAG.getNode(N->getOpcode(), DL, EltVT, Lo, Idx);
1985 Res = DAG.getNode(N->getOpcode(), DL, EltVT, Hi,
1986 DAG.getConstant(IdxVal - LoElts, DL,
1987 Idx.getValueType()));
1988 ReplaceValueWith(SDValue(N, 0), Res);
1995 // Bit-convert the input vector to the equivalent integer vector
1996 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0));
1997 EVT IVT = NewOp.getValueType().getVectorElementType();
1999 // Extract the element as an (bit-cast) integer value
2000 SDValue NewVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, IVT,
2001 NewOp, N->getOperand(1));
2003 // Convert the element to the desired FP type
2004 EVT VT = N->getValueType(0);
2005 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2006 return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, NewVal);
2009 // FCOPYSIGN(X, Y) returns the value of X with the sign of Y. If the result
2010 // needs promotion, so does the argument X. Note that Y, if needed, will be
2011 // handled during operand promotion.
2012 SDValue DAGTypeLegalizer::PromoteFloatRes_FCOPYSIGN(SDNode *N) {
2013 EVT VT = N->getValueType(0);
2014 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2015 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2017 SDValue Op1 = N->getOperand(1);
2019 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1);
2022 // Unary operation where the result and the operand have PromoteFloat type
2023 // action. Construct a new SDNode with the promoted float value of the old
2025 SDValue DAGTypeLegalizer::PromoteFloatRes_UnaryOp(SDNode *N) {
2026 EVT VT = N->getValueType(0);
2027 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2028 SDValue Op = GetPromotedFloat(N->getOperand(0));
2030 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op);
2033 // Binary operations where the result and both operands have PromoteFloat type
2034 // action. Construct a new SDNode with the promoted float values of the old
2036 SDValue DAGTypeLegalizer::PromoteFloatRes_BinOp(SDNode *N) {
2037 EVT VT = N->getValueType(0);
2038 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2039 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2040 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
2041 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1, N->getFlags());
2044 SDValue DAGTypeLegalizer::PromoteFloatRes_FMAD(SDNode *N) {
2045 EVT VT = N->getValueType(0);
2046 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2047 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2048 SDValue Op1 = GetPromotedFloat(N->getOperand(1));
2049 SDValue Op2 = GetPromotedFloat(N->getOperand(2));
2051 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1, Op2);
2054 // Promote the Float (first) operand and retain the Integer (second) operand
2055 SDValue DAGTypeLegalizer::PromoteFloatRes_FPOWI(SDNode *N) {
2056 EVT VT = N->getValueType(0);
2057 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2058 SDValue Op0 = GetPromotedFloat(N->getOperand(0));
2059 SDValue Op1 = N->getOperand(1);
2061 return DAG.getNode(N->getOpcode(), SDLoc(N), NVT, Op0, Op1);
2064 // Explicit operation to reduce precision. Reduce the value to half precision
2065 // and promote it back to the legal type.
2066 SDValue DAGTypeLegalizer::PromoteFloatRes_FP_ROUND(SDNode *N) {
2069 SDValue Op = N->getOperand(0);
2070 EVT VT = N->getValueType(0);
2071 EVT OpVT = Op->getValueType(0);
2072 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2073 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
2075 // Round promoted float to desired precision
2076 SDValue Round = DAG.getNode(GetPromotionOpcode(OpVT, VT), DL, IVT, Op);
2077 // Promote it back to the legal output type
2078 return DAG.getNode(GetPromotionOpcode(VT, NVT), DL, NVT, Round);
2081 SDValue DAGTypeLegalizer::PromoteFloatRes_LOAD(SDNode *N) {
2082 LoadSDNode *L = cast<LoadSDNode>(N);
2083 EVT VT = N->getValueType(0);
2085 // Load the value as an integer value with the same number of bits.
2086 EVT IVT = EVT::getIntegerVT(*DAG.getContext(), VT.getSizeInBits());
2088 L->getMemOperand()->getFlags() & ~MachineMemOperand::MOInvariant;
2089 SDValue newL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), IVT,
2090 SDLoc(N), L->getChain(), L->getBasePtr(),
2091 L->getOffset(), L->getPointerInfo(), IVT,
2092 L->getAlignment(), MMOFlags, L->getAAInfo());
2093 // Legalize the chain result by replacing uses of the old value chain with the
2095 ReplaceValueWith(SDValue(N, 1), newL.getValue(1));
2097 // Convert the integer value to the desired FP type
2098 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2099 return DAG.getNode(GetPromotionOpcode(VT, NVT), SDLoc(N), NVT, newL);
2102 // Construct a new SELECT node with the promoted true- and false- values.
2103 SDValue DAGTypeLegalizer::PromoteFloatRes_SELECT(SDNode *N) {
2104 SDValue TrueVal = GetPromotedFloat(N->getOperand(1));
2105 SDValue FalseVal = GetPromotedFloat(N->getOperand(2));
2107 return DAG.getNode(ISD::SELECT, SDLoc(N), TrueVal->getValueType(0),
2108 N->getOperand(0), TrueVal, FalseVal);
2111 // Construct a new SELECT_CC node with the promoted true- and false- values.
2112 // The operands used for comparison are promoted by PromoteFloatOp_SELECT_CC.
2113 SDValue DAGTypeLegalizer::PromoteFloatRes_SELECT_CC(SDNode *N) {
2114 SDValue TrueVal = GetPromotedFloat(N->getOperand(2));
2115 SDValue FalseVal = GetPromotedFloat(N->getOperand(3));
2117 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), N->getValueType(0),
2118 N->getOperand(0), N->getOperand(1), TrueVal, FalseVal,
2122 // Construct a SDNode that transforms the SINT or UINT operand to the promoted
2124 SDValue DAGTypeLegalizer::PromoteFloatRes_XINT_TO_FP(SDNode *N) {
2126 EVT VT = N->getValueType(0);
2127 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2128 SDValue NV = DAG.getNode(N->getOpcode(), DL, NVT, N->getOperand(0));
2129 // Round the value to the desired precision (that of the source type).
2131 ISD::FP_EXTEND, DL, NVT,
2132 DAG.getNode(ISD::FP_ROUND, DL, VT, NV, DAG.getIntPtrConstant(0, DL)));
2135 SDValue DAGTypeLegalizer::PromoteFloatRes_UNDEF(SDNode *N) {
2136 return DAG.getUNDEF(TLI.getTypeToTransformTo(*DAG.getContext(),
2137 N->getValueType(0)));