1 //===-- LegalizeTypes.h - DAG Type Legalizer class definition ---*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the DAGTypeLegalizer class. This is a private interface
11 // shared between the code that implements the SelectionDAG::LegalizeTypes
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H
17 #define LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H
19 #include "llvm/ADT/DenseMap.h"
20 #include "llvm/CodeGen/SelectionDAG.h"
21 #include "llvm/CodeGen/TargetLowering.h"
22 #include "llvm/Support/Compiler.h"
23 #include "llvm/Support/Debug.h"
27 //===----------------------------------------------------------------------===//
28 /// This takes an arbitrary SelectionDAG as input and hacks on it until only
29 /// value types the target machine can handle are left. This involves promoting
30 /// small sizes to large sizes or splitting up large values into small values.
32 class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
33 const TargetLowering &TLI;
36 /// This pass uses the NodeId on the SDNodes to hold information about the
37 /// state of the node. The enum has all the values.
39 /// All operands have been processed, so this node is ready to be handled.
42 /// This is a new node, not before seen, that was created in the process of
43 /// legalizing some other node.
46 /// This node's ID needs to be set to the number of its unprocessed
50 /// This is a node that has already been processed.
53 // 1+ - This is a node which has this many unprocessed operands.
57 /// This is a bitvector that contains two bits for each simple value type,
58 /// where the two bits correspond to the LegalizeAction enum from
59 /// TargetLowering. This can be queried with "getTypeAction(VT)".
60 TargetLowering::ValueTypeActionImpl ValueTypeActions;
62 /// Return how we should legalize values of this type.
63 TargetLowering::LegalizeTypeAction getTypeAction(EVT VT) const {
64 return TLI.getTypeAction(*DAG.getContext(), VT);
67 /// Return true if this type is legal on this target.
68 bool isTypeLegal(EVT VT) const {
69 return TLI.getTypeAction(*DAG.getContext(), VT) == TargetLowering::TypeLegal;
72 /// Return true if this is a simple legal type.
73 bool isSimpleLegalType(EVT VT) const {
74 return VT.isSimple() && TLI.isTypeLegal(VT);
77 /// Return true if this type can be passed in registers.
78 /// For example, x86_64's f128, should to be legally in registers
79 /// and only some operations converted to library calls or integer
80 /// bitwise operations.
81 bool isLegalInHWReg(EVT VT) const {
82 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
83 return VT == NVT && isSimpleLegalType(VT);
86 EVT getSetCCResultType(EVT VT) const {
87 return TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT);
90 /// Pretend all of this node's results are legal.
91 bool IgnoreNodeResults(SDNode *N) const {
92 return N->getOpcode() == ISD::TargetConstant ||
93 N->getOpcode() == ISD::Register;
96 // Bijection from SDValue to unique id. As each created node gets a
97 // new id we do not need to worry about reuse expunging. Should we
98 // run out of ids, we can do a one time expensive compactifcation.
99 typedef unsigned TableId;
101 TableId NextValueId = 1;
103 SmallDenseMap<SDValue, TableId, 8> ValueToIdMap;
104 SmallDenseMap<TableId, SDValue, 8> IdToValueMap;
106 /// For integer nodes that are below legal width, this map indicates what
107 /// promoted value to use.
108 SmallDenseMap<TableId, TableId, 8> PromotedIntegers;
110 /// For integer nodes that need to be expanded this map indicates which
111 /// operands are the expanded version of the input.
112 SmallDenseMap<TableId, std::pair<TableId, TableId>, 8> ExpandedIntegers;
114 /// For floating-point nodes converted to integers of the same size, this map
115 /// indicates the converted value to use.
116 SmallDenseMap<TableId, TableId, 8> SoftenedFloats;
118 /// For floating-point nodes that have a smaller precision than the smallest
119 /// supported precision, this map indicates what promoted value to use.
120 SmallDenseMap<TableId, TableId, 8> PromotedFloats;
122 /// For float nodes that need to be expanded this map indicates which operands
123 /// are the expanded version of the input.
124 SmallDenseMap<TableId, std::pair<TableId, TableId>, 8> ExpandedFloats;
126 /// For nodes that are <1 x ty>, this map indicates the scalar value of type
128 SmallDenseMap<TableId, TableId, 8> ScalarizedVectors;
130 /// For nodes that need to be split this map indicates which operands are the
131 /// expanded version of the input.
132 SmallDenseMap<TableId, std::pair<TableId, TableId>, 8> SplitVectors;
134 /// For vector nodes that need to be widened, indicates the widened value to
136 SmallDenseMap<TableId, TableId, 8> WidenedVectors;
138 /// For values that have been replaced with another, indicates the replacement
140 SmallDenseMap<TableId, TableId, 8> ReplacedValues;
142 /// This defines a worklist of nodes to process. In order to be pushed onto
143 /// this worklist, all operands of a node must have already been processed.
144 SmallVector<SDNode*, 128> Worklist;
146 TableId getTableId(SDValue V) {
147 assert(V.getNode() && "Getting TableId on SDValue()");
149 auto I = ValueToIdMap.find(V);
150 if (I != ValueToIdMap.end()) {
151 // replace if there's been a shift.
153 assert(I->second && "All Ids should be nonzero");
156 // Add if it's not there.
157 ValueToIdMap.insert(std::make_pair(V, NextValueId));
158 IdToValueMap.insert(std::make_pair(NextValueId, V));
160 assert(NextValueId != 0 &&
161 "Ran out of Ids. Increase id type size or add compactification");
162 return NextValueId - 1;
165 const SDValue &getSDValue(TableId &Id) {
167 assert(Id && "TableId should be non-zero");
168 return IdToValueMap[Id];
172 explicit DAGTypeLegalizer(SelectionDAG &dag)
173 : TLI(dag.getTargetLoweringInfo()), DAG(dag),
174 ValueTypeActions(TLI.getValueTypeActions()) {
175 static_assert(MVT::LAST_VALUETYPE <= MVT::MAX_ALLOWED_VALUETYPE,
176 "Too many value types for ValueTypeActions to hold!");
179 /// This is the main entry point for the type legalizer. This does a
180 /// top-down traversal of the dag, legalizing types as it goes. Returns
181 /// "true" if it made any changes.
184 void NoteDeletion(SDNode *Old, SDNode *New) {
185 for (unsigned i = 0, e = Old->getNumValues(); i != e; ++i) {
186 TableId NewId = getTableId(SDValue(New, i));
187 TableId OldId = getTableId(SDValue(Old, i));
190 ReplacedValues[OldId] = NewId;
192 // Delete Node from tables.
193 ValueToIdMap.erase(SDValue(Old, i));
194 IdToValueMap.erase(OldId);
195 PromotedIntegers.erase(OldId);
196 ExpandedIntegers.erase(OldId);
197 SoftenedFloats.erase(OldId);
198 PromotedFloats.erase(OldId);
199 ExpandedFloats.erase(OldId);
200 ScalarizedVectors.erase(OldId);
201 SplitVectors.erase(OldId);
202 WidenedVectors.erase(OldId);
206 SelectionDAG &getDAG() const { return DAG; }
209 SDNode *AnalyzeNewNode(SDNode *N);
210 void AnalyzeNewValue(SDValue &Val);
211 void PerformExpensiveChecks();
212 void RemapId(TableId &Id);
213 void RemapValue(SDValue &V);
216 SDValue BitConvertToInteger(SDValue Op);
217 SDValue BitConvertVectorToIntegerVector(SDValue Op);
218 SDValue CreateStackStoreLoad(SDValue Op, EVT DestVT);
219 bool CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult);
220 bool CustomWidenLowerNode(SDNode *N, EVT VT);
222 /// Replace each result of the given MERGE_VALUES node with the corresponding
223 /// input operand, except for the result 'ResNo', for which the corresponding
224 /// input operand is returned.
225 SDValue DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo);
227 SDValue JoinIntegers(SDValue Lo, SDValue Hi);
228 SDValue LibCallify(RTLIB::Libcall LC, SDNode *N, bool isSigned);
230 std::pair<SDValue, SDValue> ExpandChainLibCall(RTLIB::Libcall LC,
231 SDNode *Node, bool isSigned);
232 std::pair<SDValue, SDValue> ExpandAtomic(SDNode *Node);
234 SDValue PromoteTargetBoolean(SDValue Bool, EVT ValVT);
236 void ReplaceValueWith(SDValue From, SDValue To);
237 void SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
238 void SplitInteger(SDValue Op, EVT LoVT, EVT HiVT,
239 SDValue &Lo, SDValue &Hi);
241 void AddToWorklist(SDNode *N) {
242 N->setNodeId(ReadyToProcess);
243 Worklist.push_back(N);
246 //===--------------------------------------------------------------------===//
247 // Integer Promotion Support: LegalizeIntegerTypes.cpp
248 //===--------------------------------------------------------------------===//
250 /// Given a processed operand Op which was promoted to a larger integer type,
251 /// this returns the promoted value. The low bits of the promoted value
252 /// corresponding to the original type are exactly equal to Op.
253 /// The extra bits contain rubbish, so the promoted value may need to be zero-
254 /// or sign-extended from the original type before it is usable (the helpers
255 /// SExtPromotedInteger and ZExtPromotedInteger can do this for you).
256 /// For example, if Op is an i16 and was promoted to an i32, then this method
257 /// returns an i32, the lower 16 bits of which coincide with Op, and the upper
258 /// 16 bits of which contain rubbish.
259 SDValue GetPromotedInteger(SDValue Op) {
260 TableId &PromotedId = PromotedIntegers[getTableId(Op)];
261 SDValue PromotedOp = getSDValue(PromotedId);
262 assert(PromotedOp.getNode() && "Operand wasn't promoted?");
265 void SetPromotedInteger(SDValue Op, SDValue Result);
267 /// Get a promoted operand and sign extend it to the final size.
268 SDValue SExtPromotedInteger(SDValue Op) {
269 EVT OldVT = Op.getValueType();
271 Op = GetPromotedInteger(Op);
272 return DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, Op.getValueType(), Op,
273 DAG.getValueType(OldVT));
276 /// Get a promoted operand and zero extend it to the final size.
277 SDValue ZExtPromotedInteger(SDValue Op) {
278 EVT OldVT = Op.getValueType();
280 Op = GetPromotedInteger(Op);
281 return DAG.getZeroExtendInReg(Op, dl, OldVT.getScalarType());
284 // Get a promoted operand and sign or zero extend it to the final size
285 // (depending on TargetLoweringInfo::isSExtCheaperThanZExt). For a given
286 // subtarget and type, the choice of sign or zero-extension will be
288 SDValue SExtOrZExtPromotedInteger(SDValue Op) {
289 EVT OldVT = Op.getValueType();
291 Op = GetPromotedInteger(Op);
292 if (TLI.isSExtCheaperThanZExt(OldVT, Op.getValueType()))
293 return DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, Op.getValueType(), Op,
294 DAG.getValueType(OldVT));
295 return DAG.getZeroExtendInReg(Op, DL, OldVT.getScalarType());
298 // Integer Result Promotion.
299 void PromoteIntegerResult(SDNode *N, unsigned ResNo);
300 SDValue PromoteIntRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
301 SDValue PromoteIntRes_AssertSext(SDNode *N);
302 SDValue PromoteIntRes_AssertZext(SDNode *N);
303 SDValue PromoteIntRes_Atomic0(AtomicSDNode *N);
304 SDValue PromoteIntRes_Atomic1(AtomicSDNode *N);
305 SDValue PromoteIntRes_AtomicCmpSwap(AtomicSDNode *N, unsigned ResNo);
306 SDValue PromoteIntRes_EXTRACT_SUBVECTOR(SDNode *N);
307 SDValue PromoteIntRes_VECTOR_SHUFFLE(SDNode *N);
308 SDValue PromoteIntRes_BUILD_VECTOR(SDNode *N);
309 SDValue PromoteIntRes_SCALAR_TO_VECTOR(SDNode *N);
310 SDValue PromoteIntRes_EXTEND_VECTOR_INREG(SDNode *N);
311 SDValue PromoteIntRes_INSERT_VECTOR_ELT(SDNode *N);
312 SDValue PromoteIntRes_CONCAT_VECTORS(SDNode *N);
313 SDValue PromoteIntRes_BITCAST(SDNode *N);
314 SDValue PromoteIntRes_BSWAP(SDNode *N);
315 SDValue PromoteIntRes_BITREVERSE(SDNode *N);
316 SDValue PromoteIntRes_BUILD_PAIR(SDNode *N);
317 SDValue PromoteIntRes_Constant(SDNode *N);
318 SDValue PromoteIntRes_CTLZ(SDNode *N);
319 SDValue PromoteIntRes_CTPOP(SDNode *N);
320 SDValue PromoteIntRes_CTTZ(SDNode *N);
321 SDValue PromoteIntRes_EXTRACT_VECTOR_ELT(SDNode *N);
322 SDValue PromoteIntRes_FP_TO_XINT(SDNode *N);
323 SDValue PromoteIntRes_FP_TO_FP16(SDNode *N);
324 SDValue PromoteIntRes_INT_EXTEND(SDNode *N);
325 SDValue PromoteIntRes_LOAD(LoadSDNode *N);
326 SDValue PromoteIntRes_MLOAD(MaskedLoadSDNode *N);
327 SDValue PromoteIntRes_MGATHER(MaskedGatherSDNode *N);
328 SDValue PromoteIntRes_Overflow(SDNode *N);
329 SDValue PromoteIntRes_SADDSUBO(SDNode *N, unsigned ResNo);
330 SDValue PromoteIntRes_SELECT(SDNode *N);
331 SDValue PromoteIntRes_VSELECT(SDNode *N);
332 SDValue PromoteIntRes_SELECT_CC(SDNode *N);
333 SDValue PromoteIntRes_SETCC(SDNode *N);
334 SDValue PromoteIntRes_SHL(SDNode *N);
335 SDValue PromoteIntRes_SimpleIntBinOp(SDNode *N);
336 SDValue PromoteIntRes_ZExtIntBinOp(SDNode *N);
337 SDValue PromoteIntRes_SExtIntBinOp(SDNode *N);
338 SDValue PromoteIntRes_SIGN_EXTEND_INREG(SDNode *N);
339 SDValue PromoteIntRes_SRA(SDNode *N);
340 SDValue PromoteIntRes_SRL(SDNode *N);
341 SDValue PromoteIntRes_TRUNCATE(SDNode *N);
342 SDValue PromoteIntRes_UADDSUBO(SDNode *N, unsigned ResNo);
343 SDValue PromoteIntRes_ADDSUBCARRY(SDNode *N, unsigned ResNo);
344 SDValue PromoteIntRes_UNDEF(SDNode *N);
345 SDValue PromoteIntRes_VAARG(SDNode *N);
346 SDValue PromoteIntRes_XMULO(SDNode *N, unsigned ResNo);
347 SDValue PromoteIntRes_ADDSUBSAT(SDNode *N);
348 SDValue PromoteIntRes_SMULFIX(SDNode *N);
349 SDValue PromoteIntRes_FLT_ROUNDS(SDNode *N);
351 // Integer Operand Promotion.
352 bool PromoteIntegerOperand(SDNode *N, unsigned OpNo);
353 SDValue PromoteIntOp_ANY_EXTEND(SDNode *N);
354 SDValue PromoteIntOp_ATOMIC_STORE(AtomicSDNode *N);
355 SDValue PromoteIntOp_BITCAST(SDNode *N);
356 SDValue PromoteIntOp_BUILD_PAIR(SDNode *N);
357 SDValue PromoteIntOp_BR_CC(SDNode *N, unsigned OpNo);
358 SDValue PromoteIntOp_BRCOND(SDNode *N, unsigned OpNo);
359 SDValue PromoteIntOp_BUILD_VECTOR(SDNode *N);
360 SDValue PromoteIntOp_INSERT_VECTOR_ELT(SDNode *N, unsigned OpNo);
361 SDValue PromoteIntOp_EXTRACT_VECTOR_ELT(SDNode *N);
362 SDValue PromoteIntOp_EXTRACT_SUBVECTOR(SDNode *N);
363 SDValue PromoteIntOp_CONCAT_VECTORS(SDNode *N);
364 SDValue PromoteIntOp_SCALAR_TO_VECTOR(SDNode *N);
365 SDValue PromoteIntOp_SELECT(SDNode *N, unsigned OpNo);
366 SDValue PromoteIntOp_SELECT_CC(SDNode *N, unsigned OpNo);
367 SDValue PromoteIntOp_SETCC(SDNode *N, unsigned OpNo);
368 SDValue PromoteIntOp_Shift(SDNode *N);
369 SDValue PromoteIntOp_SIGN_EXTEND(SDNode *N);
370 SDValue PromoteIntOp_SINT_TO_FP(SDNode *N);
371 SDValue PromoteIntOp_STORE(StoreSDNode *N, unsigned OpNo);
372 SDValue PromoteIntOp_TRUNCATE(SDNode *N);
373 SDValue PromoteIntOp_UINT_TO_FP(SDNode *N);
374 SDValue PromoteIntOp_ZERO_EXTEND(SDNode *N);
375 SDValue PromoteIntOp_MSTORE(MaskedStoreSDNode *N, unsigned OpNo);
376 SDValue PromoteIntOp_MLOAD(MaskedLoadSDNode *N, unsigned OpNo);
377 SDValue PromoteIntOp_MSCATTER(MaskedScatterSDNode *N, unsigned OpNo);
378 SDValue PromoteIntOp_MGATHER(MaskedGatherSDNode *N, unsigned OpNo);
379 SDValue PromoteIntOp_ADDSUBCARRY(SDNode *N, unsigned OpNo);
380 SDValue PromoteIntOp_FRAMERETURNADDR(SDNode *N);
381 SDValue PromoteIntOp_PREFETCH(SDNode *N, unsigned OpNo);
382 SDValue PromoteIntOp_SMULFIX(SDNode *N);
384 void PromoteSetCCOperands(SDValue &LHS,SDValue &RHS, ISD::CondCode Code);
386 //===--------------------------------------------------------------------===//
387 // Integer Expansion Support: LegalizeIntegerTypes.cpp
388 //===--------------------------------------------------------------------===//
390 /// Given a processed operand Op which was expanded into two integers of half
391 /// the size, this returns the two halves. The low bits of Op are exactly
392 /// equal to the bits of Lo; the high bits exactly equal Hi.
393 /// For example, if Op is an i64 which was expanded into two i32's, then this
394 /// method returns the two i32's, with Lo being equal to the lower 32 bits of
395 /// Op, and Hi being equal to the upper 32 bits.
396 void GetExpandedInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
397 void SetExpandedInteger(SDValue Op, SDValue Lo, SDValue Hi);
399 // Integer Result Expansion.
400 void ExpandIntegerResult(SDNode *N, unsigned ResNo);
401 void ExpandIntRes_ANY_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
402 void ExpandIntRes_AssertSext (SDNode *N, SDValue &Lo, SDValue &Hi);
403 void ExpandIntRes_AssertZext (SDNode *N, SDValue &Lo, SDValue &Hi);
404 void ExpandIntRes_Constant (SDNode *N, SDValue &Lo, SDValue &Hi);
405 void ExpandIntRes_CTLZ (SDNode *N, SDValue &Lo, SDValue &Hi);
406 void ExpandIntRes_CTPOP (SDNode *N, SDValue &Lo, SDValue &Hi);
407 void ExpandIntRes_CTTZ (SDNode *N, SDValue &Lo, SDValue &Hi);
408 void ExpandIntRes_LOAD (LoadSDNode *N, SDValue &Lo, SDValue &Hi);
409 void ExpandIntRes_READCYCLECOUNTER (SDNode *N, SDValue &Lo, SDValue &Hi);
410 void ExpandIntRes_SIGN_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
411 void ExpandIntRes_SIGN_EXTEND_INREG (SDNode *N, SDValue &Lo, SDValue &Hi);
412 void ExpandIntRes_TRUNCATE (SDNode *N, SDValue &Lo, SDValue &Hi);
413 void ExpandIntRes_ZERO_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
414 void ExpandIntRes_FLT_ROUNDS (SDNode *N, SDValue &Lo, SDValue &Hi);
415 void ExpandIntRes_FP_TO_SINT (SDNode *N, SDValue &Lo, SDValue &Hi);
416 void ExpandIntRes_FP_TO_UINT (SDNode *N, SDValue &Lo, SDValue &Hi);
418 void ExpandIntRes_Logical (SDNode *N, SDValue &Lo, SDValue &Hi);
419 void ExpandIntRes_ADDSUB (SDNode *N, SDValue &Lo, SDValue &Hi);
420 void ExpandIntRes_ADDSUBC (SDNode *N, SDValue &Lo, SDValue &Hi);
421 void ExpandIntRes_ADDSUBE (SDNode *N, SDValue &Lo, SDValue &Hi);
422 void ExpandIntRes_ADDSUBCARRY (SDNode *N, SDValue &Lo, SDValue &Hi);
423 void ExpandIntRes_BITREVERSE (SDNode *N, SDValue &Lo, SDValue &Hi);
424 void ExpandIntRes_BSWAP (SDNode *N, SDValue &Lo, SDValue &Hi);
425 void ExpandIntRes_MUL (SDNode *N, SDValue &Lo, SDValue &Hi);
426 void ExpandIntRes_SDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
427 void ExpandIntRes_SREM (SDNode *N, SDValue &Lo, SDValue &Hi);
428 void ExpandIntRes_UDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
429 void ExpandIntRes_UREM (SDNode *N, SDValue &Lo, SDValue &Hi);
430 void ExpandIntRes_Shift (SDNode *N, SDValue &Lo, SDValue &Hi);
432 void ExpandIntRes_MINMAX (SDNode *N, SDValue &Lo, SDValue &Hi);
434 void ExpandIntRes_SADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi);
435 void ExpandIntRes_UADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi);
436 void ExpandIntRes_XMULO (SDNode *N, SDValue &Lo, SDValue &Hi);
437 void ExpandIntRes_ADDSUBSAT (SDNode *N, SDValue &Lo, SDValue &Hi);
438 void ExpandIntRes_SMULFIX (SDNode *N, SDValue &Lo, SDValue &Hi);
440 void ExpandIntRes_ATOMIC_LOAD (SDNode *N, SDValue &Lo, SDValue &Hi);
442 void ExpandShiftByConstant(SDNode *N, const APInt &Amt,
443 SDValue &Lo, SDValue &Hi);
444 bool ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi);
445 bool ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi);
447 // Integer Operand Expansion.
448 bool ExpandIntegerOperand(SDNode *N, unsigned OpNo);
449 SDValue ExpandIntOp_BR_CC(SDNode *N);
450 SDValue ExpandIntOp_SELECT_CC(SDNode *N);
451 SDValue ExpandIntOp_SETCC(SDNode *N);
452 SDValue ExpandIntOp_SETCCCARRY(SDNode *N);
453 SDValue ExpandIntOp_Shift(SDNode *N);
454 SDValue ExpandIntOp_SINT_TO_FP(SDNode *N);
455 SDValue ExpandIntOp_STORE(StoreSDNode *N, unsigned OpNo);
456 SDValue ExpandIntOp_TRUNCATE(SDNode *N);
457 SDValue ExpandIntOp_UINT_TO_FP(SDNode *N);
458 SDValue ExpandIntOp_RETURNADDR(SDNode *N);
459 SDValue ExpandIntOp_ATOMIC_STORE(SDNode *N);
461 void IntegerExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS,
462 ISD::CondCode &CCCode, const SDLoc &dl);
464 //===--------------------------------------------------------------------===//
465 // Float to Integer Conversion Support: LegalizeFloatTypes.cpp
466 //===--------------------------------------------------------------------===//
468 /// Given an operand Op of Float type, returns the integer if the Op is not
469 /// supported in target HW and converted to the integer.
470 /// The integer contains exactly the same bits as Op - only the type changed.
471 /// For example, if Op is an f32 which was softened to an i32, then this
472 /// method returns an i32, the bits of which coincide with those of Op.
473 /// If the Op can be efficiently supported in target HW or the operand must
474 /// stay in a register, the Op is not converted to an integer.
475 /// In that case, the given op is returned.
476 SDValue GetSoftenedFloat(SDValue Op) {
477 TableId Id = getTableId(Op);
478 auto Iter = SoftenedFloats.find(Id);
479 if (Iter == SoftenedFloats.end()) {
480 assert(isSimpleLegalType(Op.getValueType()) &&
481 "Operand wasn't converted to integer?");
484 SDValue SoftenedOp = getSDValue(Iter->second);
485 assert(SoftenedOp.getNode() && "Unconverted op in SoftenedFloats?");
488 void SetSoftenedFloat(SDValue Op, SDValue Result);
490 // Convert Float Results to Integer for Non-HW-supported Operations.
491 bool SoftenFloatResult(SDNode *N, unsigned ResNo);
492 SDValue SoftenFloatRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
493 SDValue SoftenFloatRes_BITCAST(SDNode *N, unsigned ResNo);
494 SDValue SoftenFloatRes_BUILD_PAIR(SDNode *N);
495 SDValue SoftenFloatRes_ConstantFP(SDNode *N, unsigned ResNo);
496 SDValue SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo);
497 SDValue SoftenFloatRes_FABS(SDNode *N, unsigned ResNo);
498 SDValue SoftenFloatRes_FMINNUM(SDNode *N);
499 SDValue SoftenFloatRes_FMAXNUM(SDNode *N);
500 SDValue SoftenFloatRes_FADD(SDNode *N);
501 SDValue SoftenFloatRes_FCEIL(SDNode *N);
502 SDValue SoftenFloatRes_FCOPYSIGN(SDNode *N, unsigned ResNo);
503 SDValue SoftenFloatRes_FCOS(SDNode *N);
504 SDValue SoftenFloatRes_FDIV(SDNode *N);
505 SDValue SoftenFloatRes_FEXP(SDNode *N);
506 SDValue SoftenFloatRes_FEXP2(SDNode *N);
507 SDValue SoftenFloatRes_FFLOOR(SDNode *N);
508 SDValue SoftenFloatRes_FLOG(SDNode *N);
509 SDValue SoftenFloatRes_FLOG2(SDNode *N);
510 SDValue SoftenFloatRes_FLOG10(SDNode *N);
511 SDValue SoftenFloatRes_FMA(SDNode *N);
512 SDValue SoftenFloatRes_FMUL(SDNode *N);
513 SDValue SoftenFloatRes_FNEARBYINT(SDNode *N);
514 SDValue SoftenFloatRes_FNEG(SDNode *N, unsigned ResNo);
515 SDValue SoftenFloatRes_FP_EXTEND(SDNode *N);
516 SDValue SoftenFloatRes_FP16_TO_FP(SDNode *N);
517 SDValue SoftenFloatRes_FP_ROUND(SDNode *N);
518 SDValue SoftenFloatRes_FPOW(SDNode *N);
519 SDValue SoftenFloatRes_FPOWI(SDNode *N);
520 SDValue SoftenFloatRes_FREM(SDNode *N);
521 SDValue SoftenFloatRes_FRINT(SDNode *N);
522 SDValue SoftenFloatRes_FROUND(SDNode *N);
523 SDValue SoftenFloatRes_FSIN(SDNode *N);
524 SDValue SoftenFloatRes_FSQRT(SDNode *N);
525 SDValue SoftenFloatRes_FSUB(SDNode *N);
526 SDValue SoftenFloatRes_FTRUNC(SDNode *N);
527 SDValue SoftenFloatRes_LOAD(SDNode *N, unsigned ResNo);
528 SDValue SoftenFloatRes_SELECT(SDNode *N, unsigned ResNo);
529 SDValue SoftenFloatRes_SELECT_CC(SDNode *N, unsigned ResNo);
530 SDValue SoftenFloatRes_UNDEF(SDNode *N);
531 SDValue SoftenFloatRes_VAARG(SDNode *N);
532 SDValue SoftenFloatRes_XINT_TO_FP(SDNode *N);
534 // Return true if we can skip softening the given operand or SDNode because
535 // either it was soften before by SoftenFloatResult and references to the
536 // operand were replaced by ReplaceValueWith or it's value type is legal in HW
537 // registers and the operand can be left unchanged.
538 bool CanSkipSoftenFloatOperand(SDNode *N, unsigned OpNo);
540 // Convert Float Operand to Integer for Non-HW-supported Operations.
541 bool SoftenFloatOperand(SDNode *N, unsigned OpNo);
542 SDValue SoftenFloatOp_BITCAST(SDNode *N);
543 SDValue SoftenFloatOp_COPY_TO_REG(SDNode *N);
544 SDValue SoftenFloatOp_BR_CC(SDNode *N);
545 SDValue SoftenFloatOp_FABS(SDNode *N);
546 SDValue SoftenFloatOp_FCOPYSIGN(SDNode *N);
547 SDValue SoftenFloatOp_FNEG(SDNode *N);
548 SDValue SoftenFloatOp_FP_EXTEND(SDNode *N);
549 SDValue SoftenFloatOp_FP_ROUND(SDNode *N);
550 SDValue SoftenFloatOp_FP_TO_XINT(SDNode *N);
551 SDValue SoftenFloatOp_SELECT(SDNode *N);
552 SDValue SoftenFloatOp_SELECT_CC(SDNode *N);
553 SDValue SoftenFloatOp_SETCC(SDNode *N);
554 SDValue SoftenFloatOp_STORE(SDNode *N, unsigned OpNo);
556 //===--------------------------------------------------------------------===//
557 // Float Expansion Support: LegalizeFloatTypes.cpp
558 //===--------------------------------------------------------------------===//
560 /// Given a processed operand Op which was expanded into two floating-point
561 /// values of half the size, this returns the two halves.
562 /// The low bits of Op are exactly equal to the bits of Lo; the high bits
563 /// exactly equal Hi. For example, if Op is a ppcf128 which was expanded
564 /// into two f64's, then this method returns the two f64's, with Lo being
565 /// equal to the lower 64 bits of Op, and Hi to the upper 64 bits.
566 void GetExpandedFloat(SDValue Op, SDValue &Lo, SDValue &Hi);
567 void SetExpandedFloat(SDValue Op, SDValue Lo, SDValue Hi);
569 // Float Result Expansion.
570 void ExpandFloatResult(SDNode *N, unsigned ResNo);
571 void ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo, SDValue &Hi);
572 void ExpandFloatRes_FABS (SDNode *N, SDValue &Lo, SDValue &Hi);
573 void ExpandFloatRes_FMINNUM (SDNode *N, SDValue &Lo, SDValue &Hi);
574 void ExpandFloatRes_FMAXNUM (SDNode *N, SDValue &Lo, SDValue &Hi);
575 void ExpandFloatRes_FADD (SDNode *N, SDValue &Lo, SDValue &Hi);
576 void ExpandFloatRes_FCEIL (SDNode *N, SDValue &Lo, SDValue &Hi);
577 void ExpandFloatRes_FCOPYSIGN (SDNode *N, SDValue &Lo, SDValue &Hi);
578 void ExpandFloatRes_FCOS (SDNode *N, SDValue &Lo, SDValue &Hi);
579 void ExpandFloatRes_FDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
580 void ExpandFloatRes_FEXP (SDNode *N, SDValue &Lo, SDValue &Hi);
581 void ExpandFloatRes_FEXP2 (SDNode *N, SDValue &Lo, SDValue &Hi);
582 void ExpandFloatRes_FFLOOR (SDNode *N, SDValue &Lo, SDValue &Hi);
583 void ExpandFloatRes_FLOG (SDNode *N, SDValue &Lo, SDValue &Hi);
584 void ExpandFloatRes_FLOG2 (SDNode *N, SDValue &Lo, SDValue &Hi);
585 void ExpandFloatRes_FLOG10 (SDNode *N, SDValue &Lo, SDValue &Hi);
586 void ExpandFloatRes_FMA (SDNode *N, SDValue &Lo, SDValue &Hi);
587 void ExpandFloatRes_FMUL (SDNode *N, SDValue &Lo, SDValue &Hi);
588 void ExpandFloatRes_FNEARBYINT(SDNode *N, SDValue &Lo, SDValue &Hi);
589 void ExpandFloatRes_FNEG (SDNode *N, SDValue &Lo, SDValue &Hi);
590 void ExpandFloatRes_FP_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
591 void ExpandFloatRes_FPOW (SDNode *N, SDValue &Lo, SDValue &Hi);
592 void ExpandFloatRes_FPOWI (SDNode *N, SDValue &Lo, SDValue &Hi);
593 void ExpandFloatRes_FREM (SDNode *N, SDValue &Lo, SDValue &Hi);
594 void ExpandFloatRes_FRINT (SDNode *N, SDValue &Lo, SDValue &Hi);
595 void ExpandFloatRes_FROUND (SDNode *N, SDValue &Lo, SDValue &Hi);
596 void ExpandFloatRes_FSIN (SDNode *N, SDValue &Lo, SDValue &Hi);
597 void ExpandFloatRes_FSQRT (SDNode *N, SDValue &Lo, SDValue &Hi);
598 void ExpandFloatRes_FSUB (SDNode *N, SDValue &Lo, SDValue &Hi);
599 void ExpandFloatRes_FTRUNC (SDNode *N, SDValue &Lo, SDValue &Hi);
600 void ExpandFloatRes_LOAD (SDNode *N, SDValue &Lo, SDValue &Hi);
601 void ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo, SDValue &Hi);
603 // Float Operand Expansion.
604 bool ExpandFloatOperand(SDNode *N, unsigned OpNo);
605 SDValue ExpandFloatOp_BR_CC(SDNode *N);
606 SDValue ExpandFloatOp_FCOPYSIGN(SDNode *N);
607 SDValue ExpandFloatOp_FP_ROUND(SDNode *N);
608 SDValue ExpandFloatOp_FP_TO_SINT(SDNode *N);
609 SDValue ExpandFloatOp_FP_TO_UINT(SDNode *N);
610 SDValue ExpandFloatOp_SELECT_CC(SDNode *N);
611 SDValue ExpandFloatOp_SETCC(SDNode *N);
612 SDValue ExpandFloatOp_STORE(SDNode *N, unsigned OpNo);
614 void FloatExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS,
615 ISD::CondCode &CCCode, const SDLoc &dl);
617 //===--------------------------------------------------------------------===//
618 // Float promotion support: LegalizeFloatTypes.cpp
619 //===--------------------------------------------------------------------===//
621 SDValue GetPromotedFloat(SDValue Op) {
622 TableId &PromotedId = PromotedFloats[getTableId(Op)];
623 SDValue PromotedOp = getSDValue(PromotedId);
624 assert(PromotedOp.getNode() && "Operand wasn't promoted?");
627 void SetPromotedFloat(SDValue Op, SDValue Result);
629 void PromoteFloatResult(SDNode *N, unsigned ResNo);
630 SDValue PromoteFloatRes_BITCAST(SDNode *N);
631 SDValue PromoteFloatRes_BinOp(SDNode *N);
632 SDValue PromoteFloatRes_ConstantFP(SDNode *N);
633 SDValue PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode *N);
634 SDValue PromoteFloatRes_FCOPYSIGN(SDNode *N);
635 SDValue PromoteFloatRes_FMAD(SDNode *N);
636 SDValue PromoteFloatRes_FPOWI(SDNode *N);
637 SDValue PromoteFloatRes_FP_ROUND(SDNode *N);
638 SDValue PromoteFloatRes_LOAD(SDNode *N);
639 SDValue PromoteFloatRes_SELECT(SDNode *N);
640 SDValue PromoteFloatRes_SELECT_CC(SDNode *N);
641 SDValue PromoteFloatRes_UnaryOp(SDNode *N);
642 SDValue PromoteFloatRes_UNDEF(SDNode *N);
643 SDValue PromoteFloatRes_XINT_TO_FP(SDNode *N);
645 bool PromoteFloatOperand(SDNode *N, unsigned OpNo);
646 SDValue PromoteFloatOp_BITCAST(SDNode *N, unsigned OpNo);
647 SDValue PromoteFloatOp_FCOPYSIGN(SDNode *N, unsigned OpNo);
648 SDValue PromoteFloatOp_FP_EXTEND(SDNode *N, unsigned OpNo);
649 SDValue PromoteFloatOp_FP_TO_XINT(SDNode *N, unsigned OpNo);
650 SDValue PromoteFloatOp_STORE(SDNode *N, unsigned OpNo);
651 SDValue PromoteFloatOp_SELECT_CC(SDNode *N, unsigned OpNo);
652 SDValue PromoteFloatOp_SETCC(SDNode *N, unsigned OpNo);
654 //===--------------------------------------------------------------------===//
655 // Scalarization Support: LegalizeVectorTypes.cpp
656 //===--------------------------------------------------------------------===//
658 /// Given a processed one-element vector Op which was scalarized to its
659 /// element type, this returns the element. For example, if Op is a v1i32,
660 /// Op = < i32 val >, this method returns val, an i32.
661 SDValue GetScalarizedVector(SDValue Op) {
662 TableId &ScalarizedId = ScalarizedVectors[getTableId(Op)];
663 SDValue ScalarizedOp = getSDValue(ScalarizedId);
664 assert(ScalarizedOp.getNode() && "Operand wasn't scalarized?");
667 void SetScalarizedVector(SDValue Op, SDValue Result);
669 // Vector Result Scalarization: <1 x ty> -> ty.
670 void ScalarizeVectorResult(SDNode *N, unsigned ResNo);
671 SDValue ScalarizeVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
672 SDValue ScalarizeVecRes_BinOp(SDNode *N);
673 SDValue ScalarizeVecRes_TernaryOp(SDNode *N);
674 SDValue ScalarizeVecRes_UnaryOp(SDNode *N);
675 SDValue ScalarizeVecRes_StrictFPOp(SDNode *N);
676 SDValue ScalarizeVecRes_InregOp(SDNode *N);
677 SDValue ScalarizeVecRes_VecInregOp(SDNode *N);
679 SDValue ScalarizeVecRes_BITCAST(SDNode *N);
680 SDValue ScalarizeVecRes_BUILD_VECTOR(SDNode *N);
681 SDValue ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N);
682 SDValue ScalarizeVecRes_FP_ROUND(SDNode *N);
683 SDValue ScalarizeVecRes_FPOWI(SDNode *N);
684 SDValue ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N);
685 SDValue ScalarizeVecRes_LOAD(LoadSDNode *N);
686 SDValue ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N);
687 SDValue ScalarizeVecRes_VSELECT(SDNode *N);
688 SDValue ScalarizeVecRes_SELECT(SDNode *N);
689 SDValue ScalarizeVecRes_SELECT_CC(SDNode *N);
690 SDValue ScalarizeVecRes_SETCC(SDNode *N);
691 SDValue ScalarizeVecRes_UNDEF(SDNode *N);
692 SDValue ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N);
694 SDValue ScalarizeVecRes_SMULFIX(SDNode *N);
696 // Vector Operand Scalarization: <1 x ty> -> ty.
697 bool ScalarizeVectorOperand(SDNode *N, unsigned OpNo);
698 SDValue ScalarizeVecOp_BITCAST(SDNode *N);
699 SDValue ScalarizeVecOp_UnaryOp(SDNode *N);
700 SDValue ScalarizeVecOp_CONCAT_VECTORS(SDNode *N);
701 SDValue ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
702 SDValue ScalarizeVecOp_VSELECT(SDNode *N);
703 SDValue ScalarizeVecOp_VSETCC(SDNode *N);
704 SDValue ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo);
705 SDValue ScalarizeVecOp_FP_ROUND(SDNode *N, unsigned OpNo);
707 //===--------------------------------------------------------------------===//
708 // Vector Splitting Support: LegalizeVectorTypes.cpp
709 //===--------------------------------------------------------------------===//
711 /// Given a processed vector Op which was split into vectors of half the size,
712 /// this method returns the halves. The first elements of Op coincide with the
713 /// elements of Lo; the remaining elements of Op coincide with the elements of
714 /// Hi: Op is what you would get by concatenating Lo and Hi.
715 /// For example, if Op is a v8i32 that was split into two v4i32's, then this
716 /// method returns the two v4i32's, with Lo corresponding to the first 4
717 /// elements of Op, and Hi to the last 4 elements.
718 void GetSplitVector(SDValue Op, SDValue &Lo, SDValue &Hi);
719 void SetSplitVector(SDValue Op, SDValue Lo, SDValue Hi);
721 // Vector Result Splitting: <128 x ty> -> 2 x <64 x ty>.
722 void SplitVectorResult(SDNode *N, unsigned ResNo);
723 void SplitVecRes_BinOp(SDNode *N, SDValue &Lo, SDValue &Hi);
724 void SplitVecRes_TernaryOp(SDNode *N, SDValue &Lo, SDValue &Hi);
725 void SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo, SDValue &Hi);
726 void SplitVecRes_ExtendOp(SDNode *N, SDValue &Lo, SDValue &Hi);
727 void SplitVecRes_InregOp(SDNode *N, SDValue &Lo, SDValue &Hi);
728 void SplitVecRes_ExtVecInRegOp(SDNode *N, SDValue &Lo, SDValue &Hi);
729 void SplitVecRes_StrictFPOp(SDNode *N, SDValue &Lo, SDValue &Hi);
731 void SplitVecRes_SMULFIX(SDNode *N, SDValue &Lo, SDValue &Hi);
733 void SplitVecRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi);
734 void SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
735 void SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo, SDValue &Hi);
736 void SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
737 void SplitVecRes_INSERT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
738 void SplitVecRes_FPOWI(SDNode *N, SDValue &Lo, SDValue &Hi);
739 void SplitVecRes_FCOPYSIGN(SDNode *N, SDValue &Lo, SDValue &Hi);
740 void SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi);
741 void SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo, SDValue &Hi);
742 void SplitVecRes_MLOAD(MaskedLoadSDNode *MLD, SDValue &Lo, SDValue &Hi);
743 void SplitVecRes_MGATHER(MaskedGatherSDNode *MGT, SDValue &Lo, SDValue &Hi);
744 void SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
745 void SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi);
746 void SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N, SDValue &Lo,
749 // Vector Operand Splitting: <128 x ty> -> 2 x <64 x ty>.
750 bool SplitVectorOperand(SDNode *N, unsigned OpNo);
751 SDValue SplitVecOp_VSELECT(SDNode *N, unsigned OpNo);
752 SDValue SplitVecOp_VECREDUCE(SDNode *N, unsigned OpNo);
753 SDValue SplitVecOp_UnaryOp(SDNode *N);
754 SDValue SplitVecOp_TruncateHelper(SDNode *N);
756 SDValue SplitVecOp_BITCAST(SDNode *N);
757 SDValue SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N);
758 SDValue SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
759 SDValue SplitVecOp_ExtVecInRegOp(SDNode *N);
760 SDValue SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo);
761 SDValue SplitVecOp_MSTORE(MaskedStoreSDNode *N, unsigned OpNo);
762 SDValue SplitVecOp_MSCATTER(MaskedScatterSDNode *N, unsigned OpNo);
763 SDValue SplitVecOp_MGATHER(MaskedGatherSDNode *MGT, unsigned OpNo);
764 SDValue SplitVecOp_CONCAT_VECTORS(SDNode *N);
765 SDValue SplitVecOp_VSETCC(SDNode *N);
766 SDValue SplitVecOp_FP_ROUND(SDNode *N);
767 SDValue SplitVecOp_FCOPYSIGN(SDNode *N);
769 //===--------------------------------------------------------------------===//
770 // Vector Widening Support: LegalizeVectorTypes.cpp
771 //===--------------------------------------------------------------------===//
773 /// Given a processed vector Op which was widened into a larger vector, this
774 /// method returns the larger vector. The elements of the returned vector
775 /// consist of the elements of Op followed by elements containing rubbish.
776 /// For example, if Op is a v2i32 that was widened to a v4i32, then this
777 /// method returns a v4i32 for which the first two elements are the same as
778 /// those of Op, while the last two elements contain rubbish.
779 SDValue GetWidenedVector(SDValue Op) {
780 TableId &WidenedId = WidenedVectors[getTableId(Op)];
781 SDValue WidenedOp = getSDValue(WidenedId);
782 assert(WidenedOp.getNode() && "Operand wasn't widened?");
785 void SetWidenedVector(SDValue Op, SDValue Result);
787 // Widen Vector Result Promotion.
788 void WidenVectorResult(SDNode *N, unsigned ResNo);
789 SDValue WidenVecRes_MERGE_VALUES(SDNode* N, unsigned ResNo);
790 SDValue WidenVecRes_BITCAST(SDNode* N);
791 SDValue WidenVecRes_BUILD_VECTOR(SDNode* N);
792 SDValue WidenVecRes_CONCAT_VECTORS(SDNode* N);
793 SDValue WidenVecRes_EXTEND_VECTOR_INREG(SDNode* N);
794 SDValue WidenVecRes_EXTRACT_SUBVECTOR(SDNode* N);
795 SDValue WidenVecRes_INSERT_VECTOR_ELT(SDNode* N);
796 SDValue WidenVecRes_LOAD(SDNode* N);
797 SDValue WidenVecRes_MLOAD(MaskedLoadSDNode* N);
798 SDValue WidenVecRes_MGATHER(MaskedGatherSDNode* N);
799 SDValue WidenVecRes_SCALAR_TO_VECTOR(SDNode* N);
800 SDValue WidenVecRes_SELECT(SDNode* N);
801 SDValue WidenVSELECTAndMask(SDNode *N);
802 SDValue WidenVecRes_SELECT_CC(SDNode* N);
803 SDValue WidenVecRes_SETCC(SDNode* N);
804 SDValue WidenVecRes_UNDEF(SDNode *N);
805 SDValue WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N);
807 SDValue WidenVecRes_Ternary(SDNode *N);
808 SDValue WidenVecRes_Binary(SDNode *N);
809 SDValue WidenVecRes_BinaryCanTrap(SDNode *N);
810 SDValue WidenVecRes_StrictFP(SDNode *N);
811 SDValue WidenVecRes_Convert(SDNode *N);
812 SDValue WidenVecRes_FCOPYSIGN(SDNode *N);
813 SDValue WidenVecRes_POWI(SDNode *N);
814 SDValue WidenVecRes_Shift(SDNode *N);
815 SDValue WidenVecRes_Unary(SDNode *N);
816 SDValue WidenVecRes_InregOp(SDNode *N);
818 // Widen Vector Operand.
819 bool WidenVectorOperand(SDNode *N, unsigned OpNo);
820 SDValue WidenVecOp_BITCAST(SDNode *N);
821 SDValue WidenVecOp_CONCAT_VECTORS(SDNode *N);
822 SDValue WidenVecOp_EXTEND(SDNode *N);
823 SDValue WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
824 SDValue WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N);
825 SDValue WidenVecOp_STORE(SDNode* N);
826 SDValue WidenVecOp_MSTORE(SDNode* N, unsigned OpNo);
827 SDValue WidenVecOp_MGATHER(SDNode* N, unsigned OpNo);
828 SDValue WidenVecOp_MSCATTER(SDNode* N, unsigned OpNo);
829 SDValue WidenVecOp_SETCC(SDNode* N);
831 SDValue WidenVecOp_Convert(SDNode *N);
832 SDValue WidenVecOp_FCOPYSIGN(SDNode *N);
834 //===--------------------------------------------------------------------===//
835 // Vector Widening Utilities Support: LegalizeVectorTypes.cpp
836 //===--------------------------------------------------------------------===//
838 /// Helper function to generate a set of loads to load a vector with a
839 /// resulting wider type. It takes:
840 /// LdChain: list of chains for the load to be generated.
841 /// Ld: load to widen
842 SDValue GenWidenVectorLoads(SmallVectorImpl<SDValue> &LdChain,
845 /// Helper function to generate a set of extension loads to load a vector with
846 /// a resulting wider type. It takes:
847 /// LdChain: list of chains for the load to be generated.
848 /// Ld: load to widen
849 /// ExtType: extension element type
850 SDValue GenWidenVectorExtLoads(SmallVectorImpl<SDValue> &LdChain,
851 LoadSDNode *LD, ISD::LoadExtType ExtType);
853 /// Helper function to generate a set of stores to store a widen vector into
854 /// non-widen memory.
855 /// StChain: list of chains for the stores we have generated
856 /// ST: store of a widen value
857 void GenWidenVectorStores(SmallVectorImpl<SDValue> &StChain, StoreSDNode *ST);
859 /// Helper function to generate a set of stores to store a truncate widen
860 /// vector into non-widen memory.
861 /// StChain: list of chains for the stores we have generated
862 /// ST: store of a widen value
863 void GenWidenVectorTruncStores(SmallVectorImpl<SDValue> &StChain,
866 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
867 /// input vector must have the same element type as NVT.
868 /// When FillWithZeroes is "on" the vector will be widened with zeroes.
869 /// By default, the vector will be widened with undefined values.
870 SDValue ModifyToType(SDValue InOp, EVT NVT, bool FillWithZeroes = false);
872 /// Return a mask of vector type MaskVT to replace InMask. Also adjust
873 /// MaskVT to ToMaskVT if needed with vector extension or truncation.
874 SDValue convertMask(SDValue InMask, EVT MaskVT, EVT ToMaskVT);
876 //===--------------------------------------------------------------------===//
877 // Generic Splitting: LegalizeTypesGeneric.cpp
878 //===--------------------------------------------------------------------===//
880 // Legalization methods which only use that the illegal type is split into two
881 // not necessarily identical types. As such they can be used for splitting
882 // vectors and expanding integers and floats.
884 void GetSplitOp(SDValue Op, SDValue &Lo, SDValue &Hi) {
885 if (Op.getValueType().isVector())
886 GetSplitVector(Op, Lo, Hi);
887 else if (Op.getValueType().isInteger())
888 GetExpandedInteger(Op, Lo, Hi);
890 GetExpandedFloat(Op, Lo, Hi);
893 /// Use ISD::EXTRACT_ELEMENT nodes to extract the low and high parts of the
895 void GetPairElements(SDValue Pair, SDValue &Lo, SDValue &Hi);
897 // Generic Result Splitting.
898 void SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo,
899 SDValue &Lo, SDValue &Hi);
900 void SplitRes_SELECT (SDNode *N, SDValue &Lo, SDValue &Hi);
901 void SplitRes_SELECT_CC (SDNode *N, SDValue &Lo, SDValue &Hi);
902 void SplitRes_UNDEF (SDNode *N, SDValue &Lo, SDValue &Hi);
904 //===--------------------------------------------------------------------===//
905 // Generic Expansion: LegalizeTypesGeneric.cpp
906 //===--------------------------------------------------------------------===//
908 // Legalization methods which only use that the illegal type is split into two
909 // identical types of half the size, and that the Lo/Hi part is stored first
910 // in memory on little/big-endian machines, followed by the Hi/Lo part. As
911 // such they can be used for expanding integers and floats.
913 void GetExpandedOp(SDValue Op, SDValue &Lo, SDValue &Hi) {
914 if (Op.getValueType().isInteger())
915 GetExpandedInteger(Op, Lo, Hi);
917 GetExpandedFloat(Op, Lo, Hi);
921 /// This function will split the integer \p Op into \p NumElements
922 /// operations of type \p EltVT and store them in \p Ops.
923 void IntegerToVector(SDValue Op, unsigned NumElements,
924 SmallVectorImpl<SDValue> &Ops, EVT EltVT);
926 // Generic Result Expansion.
927 void ExpandRes_MERGE_VALUES (SDNode *N, unsigned ResNo,
928 SDValue &Lo, SDValue &Hi);
929 void ExpandRes_BITCAST (SDNode *N, SDValue &Lo, SDValue &Hi);
930 void ExpandRes_BUILD_PAIR (SDNode *N, SDValue &Lo, SDValue &Hi);
931 void ExpandRes_EXTRACT_ELEMENT (SDNode *N, SDValue &Lo, SDValue &Hi);
932 void ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi);
933 void ExpandRes_NormalLoad (SDNode *N, SDValue &Lo, SDValue &Hi);
934 void ExpandRes_VAARG (SDNode *N, SDValue &Lo, SDValue &Hi);
936 // Generic Operand Expansion.
937 SDValue ExpandOp_BITCAST (SDNode *N);
938 SDValue ExpandOp_BUILD_VECTOR (SDNode *N);
939 SDValue ExpandOp_EXTRACT_ELEMENT (SDNode *N);
940 SDValue ExpandOp_INSERT_VECTOR_ELT(SDNode *N);
941 SDValue ExpandOp_SCALAR_TO_VECTOR (SDNode *N);
942 SDValue ExpandOp_NormalStore (SDNode *N, unsigned OpNo);
945 } // end namespace llvm.