1 //===-- LegalizeTypes.h - DAG Type Legalizer class definition ---*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the DAGTypeLegalizer class. This is a private interface
11 // shared between the code that implements the SelectionDAG::LegalizeTypes
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H
17 #define LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H
19 #include "llvm/ADT/DenseMap.h"
20 #include "llvm/CodeGen/SelectionDAG.h"
21 #include "llvm/Support/Compiler.h"
22 #include "llvm/Support/Debug.h"
23 #include "llvm/Target/TargetLowering.h"
27 //===----------------------------------------------------------------------===//
28 /// This takes an arbitrary SelectionDAG as input and hacks on it until only
29 /// value types the target machine can handle are left. This involves promoting
30 /// small sizes to large sizes or splitting up large values into small values.
32 class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
33 const TargetLowering &TLI;
36 /// This pass uses the NodeId on the SDNodes to hold information about the
37 /// state of the node. The enum has all the values.
39 /// All operands have been processed, so this node is ready to be handled.
42 /// This is a new node, not before seen, that was created in the process of
43 /// legalizing some other node.
46 /// This node's ID needs to be set to the number of its unprocessed
50 /// This is a node that has already been processed.
53 // 1+ - This is a node which has this many unprocessed operands.
57 /// This is a bitvector that contains two bits for each simple value type,
58 /// where the two bits correspond to the LegalizeAction enum from
59 /// TargetLowering. This can be queried with "getTypeAction(VT)".
60 TargetLowering::ValueTypeActionImpl ValueTypeActions;
62 /// Return how we should legalize values of this type.
63 TargetLowering::LegalizeTypeAction getTypeAction(EVT VT) const {
64 return TLI.getTypeAction(*DAG.getContext(), VT);
67 /// Return true if this type is legal on this target.
68 bool isTypeLegal(EVT VT) const {
69 return TLI.getTypeAction(*DAG.getContext(), VT) == TargetLowering::TypeLegal;
72 /// Return true if this is a simple legal type.
73 bool isSimpleLegalType(EVT VT) const {
74 return VT.isSimple() && TLI.isTypeLegal(VT);
77 /// Return true if this type can be passed in registers.
78 /// For example, x86_64's f128, should to be legally in registers
79 /// and only some operations converted to library calls or integer
80 /// bitwise operations.
81 bool isLegalInHWReg(EVT VT) const {
82 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
83 return VT == NVT && isSimpleLegalType(VT);
86 EVT getSetCCResultType(EVT VT) const {
87 return TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT);
90 /// Pretend all of this node's results are legal.
91 bool IgnoreNodeResults(SDNode *N) const {
92 return N->getOpcode() == ISD::TargetConstant;
95 /// For integer nodes that are below legal width, this map indicates what
96 /// promoted value to use.
97 SmallDenseMap<SDValue, SDValue, 8> PromotedIntegers;
99 /// For integer nodes that need to be expanded this map indicates which
100 /// operands are the expanded version of the input.
101 SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> ExpandedIntegers;
103 /// For floating-point nodes converted to integers of the same size, this map
104 /// indicates the converted value to use.
105 SmallDenseMap<SDValue, SDValue, 8> SoftenedFloats;
107 /// For floating-point nodes that have a smaller precision than the smallest
108 /// supported precision, this map indicates what promoted value to use.
109 SmallDenseMap<SDValue, SDValue, 8> PromotedFloats;
111 /// For float nodes that need to be expanded this map indicates which operands
112 /// are the expanded version of the input.
113 SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> ExpandedFloats;
115 /// For nodes that are <1 x ty>, this map indicates the scalar value of type
117 SmallDenseMap<SDValue, SDValue, 8> ScalarizedVectors;
119 /// For nodes that need to be split this map indicates which operands are the
120 /// expanded version of the input.
121 SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> SplitVectors;
123 /// For vector nodes that need to be widened, indicates the widened value to
125 SmallDenseMap<SDValue, SDValue, 8> WidenedVectors;
127 /// For values that have been replaced with another, indicates the replacement
129 SmallDenseMap<SDValue, SDValue, 8> ReplacedValues;
131 /// This defines a worklist of nodes to process. In order to be pushed onto
132 /// this worklist, all operands of a node must have already been processed.
133 SmallVector<SDNode*, 128> Worklist;
136 explicit DAGTypeLegalizer(SelectionDAG &dag)
137 : TLI(dag.getTargetLoweringInfo()), DAG(dag),
138 ValueTypeActions(TLI.getValueTypeActions()) {
139 static_assert(MVT::LAST_VALUETYPE <= MVT::MAX_ALLOWED_VALUETYPE,
140 "Too many value types for ValueTypeActions to hold!");
143 /// This is the main entry point for the type legalizer. This does a
144 /// top-down traversal of the dag, legalizing types as it goes. Returns
145 /// "true" if it made any changes.
148 void NoteDeletion(SDNode *Old, SDNode *New) {
151 for (unsigned i = 0, e = Old->getNumValues(); i != e; ++i)
152 ReplacedValues[SDValue(Old, i)] = SDValue(New, i);
155 SelectionDAG &getDAG() const { return DAG; }
158 SDNode *AnalyzeNewNode(SDNode *N);
159 void AnalyzeNewValue(SDValue &Val);
160 void ExpungeNode(SDNode *N);
161 void PerformExpensiveChecks();
162 void RemapValue(SDValue &N);
165 SDValue BitConvertToInteger(SDValue Op);
166 SDValue BitConvertVectorToIntegerVector(SDValue Op);
167 SDValue CreateStackStoreLoad(SDValue Op, EVT DestVT);
168 bool CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult);
169 bool CustomWidenLowerNode(SDNode *N, EVT VT);
171 /// Replace each result of the given MERGE_VALUES node with the corresponding
172 /// input operand, except for the result 'ResNo', for which the corresponding
173 /// input operand is returned.
174 SDValue DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo);
176 SDValue JoinIntegers(SDValue Lo, SDValue Hi);
177 SDValue LibCallify(RTLIB::Libcall LC, SDNode *N, bool isSigned);
179 std::pair<SDValue, SDValue> ExpandChainLibCall(RTLIB::Libcall LC,
180 SDNode *Node, bool isSigned);
181 std::pair<SDValue, SDValue> ExpandAtomic(SDNode *Node);
183 SDValue PromoteTargetBoolean(SDValue Bool, EVT ValVT);
185 /// Modify Bit Vector to match SetCC result type of ValVT.
186 /// The bit vector is widened with zeroes when WithZeroes is true.
187 SDValue WidenTargetBoolean(SDValue Bool, EVT ValVT, bool WithZeroes = false);
189 void ReplaceValueWith(SDValue From, SDValue To);
190 void SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
191 void SplitInteger(SDValue Op, EVT LoVT, EVT HiVT,
192 SDValue &Lo, SDValue &Hi);
194 void AddToWorklist(SDNode *N) {
195 N->setNodeId(ReadyToProcess);
196 Worklist.push_back(N);
199 //===--------------------------------------------------------------------===//
200 // Integer Promotion Support: LegalizeIntegerTypes.cpp
201 //===--------------------------------------------------------------------===//
203 /// Given a processed operand Op which was promoted to a larger integer type,
204 /// this returns the promoted value. The low bits of the promoted value
205 /// corresponding to the original type are exactly equal to Op.
206 /// The extra bits contain rubbish, so the promoted value may need to be zero-
207 /// or sign-extended from the original type before it is usable (the helpers
208 /// SExtPromotedInteger and ZExtPromotedInteger can do this for you).
209 /// For example, if Op is an i16 and was promoted to an i32, then this method
210 /// returns an i32, the lower 16 bits of which coincide with Op, and the upper
211 /// 16 bits of which contain rubbish.
212 SDValue GetPromotedInteger(SDValue Op) {
213 SDValue &PromotedOp = PromotedIntegers[Op];
214 RemapValue(PromotedOp);
215 assert(PromotedOp.getNode() && "Operand wasn't promoted?");
218 void SetPromotedInteger(SDValue Op, SDValue Result);
220 /// Get a promoted operand and sign extend it to the final size.
221 SDValue SExtPromotedInteger(SDValue Op) {
222 EVT OldVT = Op.getValueType();
224 Op = GetPromotedInteger(Op);
225 return DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, Op.getValueType(), Op,
226 DAG.getValueType(OldVT));
229 /// Get a promoted operand and zero extend it to the final size.
230 SDValue ZExtPromotedInteger(SDValue Op) {
231 EVT OldVT = Op.getValueType();
233 Op = GetPromotedInteger(Op);
234 return DAG.getZeroExtendInReg(Op, dl, OldVT.getScalarType());
237 // Integer Result Promotion.
238 void PromoteIntegerResult(SDNode *N, unsigned ResNo);
239 SDValue PromoteIntRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
240 SDValue PromoteIntRes_AssertSext(SDNode *N);
241 SDValue PromoteIntRes_AssertZext(SDNode *N);
242 SDValue PromoteIntRes_Atomic0(AtomicSDNode *N);
243 SDValue PromoteIntRes_Atomic1(AtomicSDNode *N);
244 SDValue PromoteIntRes_AtomicCmpSwap(AtomicSDNode *N, unsigned ResNo);
245 SDValue PromoteIntRes_EXTRACT_SUBVECTOR(SDNode *N);
246 SDValue PromoteIntRes_VECTOR_SHUFFLE(SDNode *N);
247 SDValue PromoteIntRes_BUILD_VECTOR(SDNode *N);
248 SDValue PromoteIntRes_SCALAR_TO_VECTOR(SDNode *N);
249 SDValue PromoteIntRes_EXTEND_VECTOR_INREG(SDNode *N);
250 SDValue PromoteIntRes_INSERT_VECTOR_ELT(SDNode *N);
251 SDValue PromoteIntRes_CONCAT_VECTORS(SDNode *N);
252 SDValue PromoteIntRes_BITCAST(SDNode *N);
253 SDValue PromoteIntRes_BSWAP(SDNode *N);
254 SDValue PromoteIntRes_BITREVERSE(SDNode *N);
255 SDValue PromoteIntRes_BUILD_PAIR(SDNode *N);
256 SDValue PromoteIntRes_Constant(SDNode *N);
257 SDValue PromoteIntRes_CTLZ(SDNode *N);
258 SDValue PromoteIntRes_CTPOP(SDNode *N);
259 SDValue PromoteIntRes_CTTZ(SDNode *N);
260 SDValue PromoteIntRes_EXTRACT_VECTOR_ELT(SDNode *N);
261 SDValue PromoteIntRes_FP_TO_XINT(SDNode *N);
262 SDValue PromoteIntRes_FP_TO_FP16(SDNode *N);
263 SDValue PromoteIntRes_INT_EXTEND(SDNode *N);
264 SDValue PromoteIntRes_LOAD(LoadSDNode *N);
265 SDValue PromoteIntRes_MLOAD(MaskedLoadSDNode *N);
266 SDValue PromoteIntRes_MGATHER(MaskedGatherSDNode *N);
267 SDValue PromoteIntRes_Overflow(SDNode *N);
268 SDValue PromoteIntRes_SADDSUBO(SDNode *N, unsigned ResNo);
269 SDValue PromoteIntRes_SELECT(SDNode *N);
270 SDValue PromoteIntRes_VSELECT(SDNode *N);
271 SDValue PromoteIntRes_SELECT_CC(SDNode *N);
272 SDValue PromoteIntRes_SETCC(SDNode *N);
273 SDValue PromoteIntRes_SHL(SDNode *N);
274 SDValue PromoteIntRes_SimpleIntBinOp(SDNode *N);
275 SDValue PromoteIntRes_ZExtIntBinOp(SDNode *N);
276 SDValue PromoteIntRes_SExtIntBinOp(SDNode *N);
277 SDValue PromoteIntRes_SIGN_EXTEND_INREG(SDNode *N);
278 SDValue PromoteIntRes_SRA(SDNode *N);
279 SDValue PromoteIntRes_SRL(SDNode *N);
280 SDValue PromoteIntRes_TRUNCATE(SDNode *N);
281 SDValue PromoteIntRes_UADDSUBO(SDNode *N, unsigned ResNo);
282 SDValue PromoteIntRes_UNDEF(SDNode *N);
283 SDValue PromoteIntRes_VAARG(SDNode *N);
284 SDValue PromoteIntRes_XMULO(SDNode *N, unsigned ResNo);
286 // Integer Operand Promotion.
287 bool PromoteIntegerOperand(SDNode *N, unsigned OperandNo);
288 SDValue PromoteIntOp_ANY_EXTEND(SDNode *N);
289 SDValue PromoteIntOp_ATOMIC_STORE(AtomicSDNode *N);
290 SDValue PromoteIntOp_BITCAST(SDNode *N);
291 SDValue PromoteIntOp_BUILD_PAIR(SDNode *N);
292 SDValue PromoteIntOp_BR_CC(SDNode *N, unsigned OpNo);
293 SDValue PromoteIntOp_BRCOND(SDNode *N, unsigned OpNo);
294 SDValue PromoteIntOp_BUILD_VECTOR(SDNode *N);
295 SDValue PromoteIntOp_INSERT_VECTOR_ELT(SDNode *N, unsigned OpNo);
296 SDValue PromoteIntOp_EXTRACT_VECTOR_ELT(SDNode *N);
297 SDValue PromoteIntOp_EXTRACT_SUBVECTOR(SDNode *N);
298 SDValue PromoteIntOp_CONCAT_VECTORS(SDNode *N);
299 SDValue PromoteIntOp_SCALAR_TO_VECTOR(SDNode *N);
300 SDValue PromoteIntOp_SELECT(SDNode *N, unsigned OpNo);
301 SDValue PromoteIntOp_SELECT_CC(SDNode *N, unsigned OpNo);
302 SDValue PromoteIntOp_SETCC(SDNode *N, unsigned OpNo);
303 SDValue PromoteIntOp_Shift(SDNode *N);
304 SDValue PromoteIntOp_SIGN_EXTEND(SDNode *N);
305 SDValue PromoteIntOp_SINT_TO_FP(SDNode *N);
306 SDValue PromoteIntOp_STORE(StoreSDNode *N, unsigned OpNo);
307 SDValue PromoteIntOp_TRUNCATE(SDNode *N);
308 SDValue PromoteIntOp_UINT_TO_FP(SDNode *N);
309 SDValue PromoteIntOp_ZERO_EXTEND(SDNode *N);
310 SDValue PromoteIntOp_MSTORE(MaskedStoreSDNode *N, unsigned OpNo);
311 SDValue PromoteIntOp_MLOAD(MaskedLoadSDNode *N, unsigned OpNo);
312 SDValue PromoteIntOp_MSCATTER(MaskedScatterSDNode *N, unsigned OpNo);
313 SDValue PromoteIntOp_MGATHER(MaskedGatherSDNode *N, unsigned OpNo);
315 void PromoteSetCCOperands(SDValue &LHS,SDValue &RHS, ISD::CondCode Code);
317 //===--------------------------------------------------------------------===//
318 // Integer Expansion Support: LegalizeIntegerTypes.cpp
319 //===--------------------------------------------------------------------===//
321 /// Given a processed operand Op which was expanded into two integers of half
322 /// the size, this returns the two halves. The low bits of Op are exactly
323 /// equal to the bits of Lo; the high bits exactly equal Hi.
324 /// For example, if Op is an i64 which was expanded into two i32's, then this
325 /// method returns the two i32's, with Lo being equal to the lower 32 bits of
326 /// Op, and Hi being equal to the upper 32 bits.
327 void GetExpandedInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
328 void SetExpandedInteger(SDValue Op, SDValue Lo, SDValue Hi);
330 // Integer Result Expansion.
331 void ExpandIntegerResult(SDNode *N, unsigned ResNo);
332 void ExpandIntRes_ANY_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
333 void ExpandIntRes_AssertSext (SDNode *N, SDValue &Lo, SDValue &Hi);
334 void ExpandIntRes_AssertZext (SDNode *N, SDValue &Lo, SDValue &Hi);
335 void ExpandIntRes_Constant (SDNode *N, SDValue &Lo, SDValue &Hi);
336 void ExpandIntRes_CTLZ (SDNode *N, SDValue &Lo, SDValue &Hi);
337 void ExpandIntRes_CTPOP (SDNode *N, SDValue &Lo, SDValue &Hi);
338 void ExpandIntRes_CTTZ (SDNode *N, SDValue &Lo, SDValue &Hi);
339 void ExpandIntRes_LOAD (LoadSDNode *N, SDValue &Lo, SDValue &Hi);
340 void ExpandIntRes_READCYCLECOUNTER (SDNode *N, SDValue &Lo, SDValue &Hi);
341 void ExpandIntRes_SIGN_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
342 void ExpandIntRes_SIGN_EXTEND_INREG (SDNode *N, SDValue &Lo, SDValue &Hi);
343 void ExpandIntRes_TRUNCATE (SDNode *N, SDValue &Lo, SDValue &Hi);
344 void ExpandIntRes_ZERO_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
345 void ExpandIntRes_FLT_ROUNDS (SDNode *N, SDValue &Lo, SDValue &Hi);
346 void ExpandIntRes_FP_TO_SINT (SDNode *N, SDValue &Lo, SDValue &Hi);
347 void ExpandIntRes_FP_TO_UINT (SDNode *N, SDValue &Lo, SDValue &Hi);
349 void ExpandIntRes_Logical (SDNode *N, SDValue &Lo, SDValue &Hi);
350 void ExpandIntRes_ADDSUB (SDNode *N, SDValue &Lo, SDValue &Hi);
351 void ExpandIntRes_ADDSUBC (SDNode *N, SDValue &Lo, SDValue &Hi);
352 void ExpandIntRes_ADDSUBE (SDNode *N, SDValue &Lo, SDValue &Hi);
353 void ExpandIntRes_BITREVERSE (SDNode *N, SDValue &Lo, SDValue &Hi);
354 void ExpandIntRes_BSWAP (SDNode *N, SDValue &Lo, SDValue &Hi);
355 void ExpandIntRes_MUL (SDNode *N, SDValue &Lo, SDValue &Hi);
356 void ExpandIntRes_SDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
357 void ExpandIntRes_SREM (SDNode *N, SDValue &Lo, SDValue &Hi);
358 void ExpandIntRes_UDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
359 void ExpandIntRes_UREM (SDNode *N, SDValue &Lo, SDValue &Hi);
360 void ExpandIntRes_Shift (SDNode *N, SDValue &Lo, SDValue &Hi);
362 void ExpandIntRes_MINMAX (SDNode *N, SDValue &Lo, SDValue &Hi);
364 void ExpandIntRes_SADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi);
365 void ExpandIntRes_UADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi);
366 void ExpandIntRes_XMULO (SDNode *N, SDValue &Lo, SDValue &Hi);
368 void ExpandIntRes_ATOMIC_LOAD (SDNode *N, SDValue &Lo, SDValue &Hi);
370 void ExpandShiftByConstant(SDNode *N, const APInt &Amt,
371 SDValue &Lo, SDValue &Hi);
372 bool ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi);
373 bool ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi);
375 // Integer Operand Expansion.
376 bool ExpandIntegerOperand(SDNode *N, unsigned OperandNo);
377 SDValue ExpandIntOp_BR_CC(SDNode *N);
378 SDValue ExpandIntOp_SELECT_CC(SDNode *N);
379 SDValue ExpandIntOp_SETCC(SDNode *N);
380 SDValue ExpandIntOp_SETCCE(SDNode *N);
381 SDValue ExpandIntOp_Shift(SDNode *N);
382 SDValue ExpandIntOp_SINT_TO_FP(SDNode *N);
383 SDValue ExpandIntOp_STORE(StoreSDNode *N, unsigned OpNo);
384 SDValue ExpandIntOp_TRUNCATE(SDNode *N);
385 SDValue ExpandIntOp_UINT_TO_FP(SDNode *N);
386 SDValue ExpandIntOp_RETURNADDR(SDNode *N);
387 SDValue ExpandIntOp_ATOMIC_STORE(SDNode *N);
389 void IntegerExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS,
390 ISD::CondCode &CCCode, const SDLoc &dl);
392 //===--------------------------------------------------------------------===//
393 // Float to Integer Conversion Support: LegalizeFloatTypes.cpp
394 //===--------------------------------------------------------------------===//
396 /// Given an operand Op of Float type, returns the integer if the Op is not
397 /// supported in target HW and converted to the integer.
398 /// The integer contains exactly the same bits as Op - only the type changed.
399 /// For example, if Op is an f32 which was softened to an i32, then this method
400 /// returns an i32, the bits of which coincide with those of Op.
401 /// If the Op can be efficiently supported in target HW or the operand must
402 /// stay in a register, the Op is not converted to an integer.
403 /// In that case, the given op is returned.
404 SDValue GetSoftenedFloat(SDValue Op) {
405 SDValue &SoftenedOp = SoftenedFloats[Op];
406 if (!SoftenedOp.getNode() &&
407 isSimpleLegalType(Op.getValueType()))
409 RemapValue(SoftenedOp);
410 assert(SoftenedOp.getNode() && "Operand wasn't converted to integer?");
413 void SetSoftenedFloat(SDValue Op, SDValue Result);
415 // Call ReplaceValueWith(SDValue(N, ResNo), Res) if necessary.
416 void ReplaceSoftenFloatResult(SDNode *N, unsigned ResNo, SDValue &NewRes) {
417 // When the result type can be kept in HW registers, the converted
418 // NewRes node could have the same type. We can save the effort in
419 // cloning every user of N in SoftenFloatOperand or other legalization functions,
420 // by calling ReplaceValueWith here to update all users.
421 if (NewRes.getNode() != N && isLegalInHWReg(N->getValueType(ResNo)))
422 ReplaceValueWith(SDValue(N, ResNo), NewRes);
425 // Convert Float Results to Integer for Non-HW-supported Operations.
426 bool SoftenFloatResult(SDNode *N, unsigned ResNo);
427 SDValue SoftenFloatRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
428 SDValue SoftenFloatRes_BITCAST(SDNode *N, unsigned ResNo);
429 SDValue SoftenFloatRes_BUILD_PAIR(SDNode *N);
430 SDValue SoftenFloatRes_ConstantFP(SDNode *N, unsigned ResNo);
431 SDValue SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N, unsigned ResNo);
432 SDValue SoftenFloatRes_FABS(SDNode *N, unsigned ResNo);
433 SDValue SoftenFloatRes_FMINNUM(SDNode *N);
434 SDValue SoftenFloatRes_FMAXNUM(SDNode *N);
435 SDValue SoftenFloatRes_FADD(SDNode *N);
436 SDValue SoftenFloatRes_FCEIL(SDNode *N);
437 SDValue SoftenFloatRes_FCOPYSIGN(SDNode *N, unsigned ResNo);
438 SDValue SoftenFloatRes_FCOS(SDNode *N);
439 SDValue SoftenFloatRes_FDIV(SDNode *N);
440 SDValue SoftenFloatRes_FEXP(SDNode *N);
441 SDValue SoftenFloatRes_FEXP2(SDNode *N);
442 SDValue SoftenFloatRes_FFLOOR(SDNode *N);
443 SDValue SoftenFloatRes_FLOG(SDNode *N);
444 SDValue SoftenFloatRes_FLOG2(SDNode *N);
445 SDValue SoftenFloatRes_FLOG10(SDNode *N);
446 SDValue SoftenFloatRes_FMA(SDNode *N);
447 SDValue SoftenFloatRes_FMUL(SDNode *N);
448 SDValue SoftenFloatRes_FNEARBYINT(SDNode *N);
449 SDValue SoftenFloatRes_FNEG(SDNode *N, unsigned ResNo);
450 SDValue SoftenFloatRes_FP_EXTEND(SDNode *N);
451 SDValue SoftenFloatRes_FP16_TO_FP(SDNode *N);
452 SDValue SoftenFloatRes_FP_ROUND(SDNode *N);
453 SDValue SoftenFloatRes_FPOW(SDNode *N);
454 SDValue SoftenFloatRes_FPOWI(SDNode *N);
455 SDValue SoftenFloatRes_FREM(SDNode *N);
456 SDValue SoftenFloatRes_FRINT(SDNode *N);
457 SDValue SoftenFloatRes_FROUND(SDNode *N);
458 SDValue SoftenFloatRes_FSIN(SDNode *N);
459 SDValue SoftenFloatRes_FSQRT(SDNode *N);
460 SDValue SoftenFloatRes_FSUB(SDNode *N);
461 SDValue SoftenFloatRes_FTRUNC(SDNode *N);
462 SDValue SoftenFloatRes_LOAD(SDNode *N, unsigned ResNo);
463 SDValue SoftenFloatRes_SELECT(SDNode *N, unsigned ResNo);
464 SDValue SoftenFloatRes_SELECT_CC(SDNode *N, unsigned ResNo);
465 SDValue SoftenFloatRes_UNDEF(SDNode *N);
466 SDValue SoftenFloatRes_VAARG(SDNode *N);
467 SDValue SoftenFloatRes_XINT_TO_FP(SDNode *N);
469 // Return true if we can skip softening the given operand or SDNode because
470 // it was soften before by SoftenFloatResult and references to the operand
471 // were replaced by ReplaceValueWith.
472 bool CanSkipSoftenFloatOperand(SDNode *N, unsigned OpNo);
474 // Convert Float Operand to Integer for Non-HW-supported Operations.
475 bool SoftenFloatOperand(SDNode *N, unsigned OpNo);
476 SDValue SoftenFloatOp_BITCAST(SDNode *N);
477 SDValue SoftenFloatOp_BR_CC(SDNode *N);
478 SDValue SoftenFloatOp_FP_EXTEND(SDNode *N);
479 SDValue SoftenFloatOp_FP_ROUND(SDNode *N);
480 SDValue SoftenFloatOp_FP_TO_XINT(SDNode *N);
481 SDValue SoftenFloatOp_SELECT_CC(SDNode *N);
482 SDValue SoftenFloatOp_SETCC(SDNode *N);
483 SDValue SoftenFloatOp_STORE(SDNode *N, unsigned OpNo);
485 //===--------------------------------------------------------------------===//
486 // Float Expansion Support: LegalizeFloatTypes.cpp
487 //===--------------------------------------------------------------------===//
489 /// Given a processed operand Op which was expanded into two floating-point
490 /// values of half the size, this returns the two halves.
491 /// The low bits of Op are exactly equal to the bits of Lo; the high bits
492 /// exactly equal Hi. For example, if Op is a ppcf128 which was expanded
493 /// into two f64's, then this method returns the two f64's, with Lo being
494 /// equal to the lower 64 bits of Op, and Hi to the upper 64 bits.
495 void GetExpandedFloat(SDValue Op, SDValue &Lo, SDValue &Hi);
496 void SetExpandedFloat(SDValue Op, SDValue Lo, SDValue Hi);
498 // Float Result Expansion.
499 void ExpandFloatResult(SDNode *N, unsigned ResNo);
500 void ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo, SDValue &Hi);
501 void ExpandFloatRes_FABS (SDNode *N, SDValue &Lo, SDValue &Hi);
502 void ExpandFloatRes_FMINNUM (SDNode *N, SDValue &Lo, SDValue &Hi);
503 void ExpandFloatRes_FMAXNUM (SDNode *N, SDValue &Lo, SDValue &Hi);
504 void ExpandFloatRes_FADD (SDNode *N, SDValue &Lo, SDValue &Hi);
505 void ExpandFloatRes_FCEIL (SDNode *N, SDValue &Lo, SDValue &Hi);
506 void ExpandFloatRes_FCOPYSIGN (SDNode *N, SDValue &Lo, SDValue &Hi);
507 void ExpandFloatRes_FCOS (SDNode *N, SDValue &Lo, SDValue &Hi);
508 void ExpandFloatRes_FDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
509 void ExpandFloatRes_FEXP (SDNode *N, SDValue &Lo, SDValue &Hi);
510 void ExpandFloatRes_FEXP2 (SDNode *N, SDValue &Lo, SDValue &Hi);
511 void ExpandFloatRes_FFLOOR (SDNode *N, SDValue &Lo, SDValue &Hi);
512 void ExpandFloatRes_FLOG (SDNode *N, SDValue &Lo, SDValue &Hi);
513 void ExpandFloatRes_FLOG2 (SDNode *N, SDValue &Lo, SDValue &Hi);
514 void ExpandFloatRes_FLOG10 (SDNode *N, SDValue &Lo, SDValue &Hi);
515 void ExpandFloatRes_FMA (SDNode *N, SDValue &Lo, SDValue &Hi);
516 void ExpandFloatRes_FMUL (SDNode *N, SDValue &Lo, SDValue &Hi);
517 void ExpandFloatRes_FNEARBYINT(SDNode *N, SDValue &Lo, SDValue &Hi);
518 void ExpandFloatRes_FNEG (SDNode *N, SDValue &Lo, SDValue &Hi);
519 void ExpandFloatRes_FP_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
520 void ExpandFloatRes_FPOW (SDNode *N, SDValue &Lo, SDValue &Hi);
521 void ExpandFloatRes_FPOWI (SDNode *N, SDValue &Lo, SDValue &Hi);
522 void ExpandFloatRes_FREM (SDNode *N, SDValue &Lo, SDValue &Hi);
523 void ExpandFloatRes_FRINT (SDNode *N, SDValue &Lo, SDValue &Hi);
524 void ExpandFloatRes_FROUND (SDNode *N, SDValue &Lo, SDValue &Hi);
525 void ExpandFloatRes_FSIN (SDNode *N, SDValue &Lo, SDValue &Hi);
526 void ExpandFloatRes_FSQRT (SDNode *N, SDValue &Lo, SDValue &Hi);
527 void ExpandFloatRes_FSUB (SDNode *N, SDValue &Lo, SDValue &Hi);
528 void ExpandFloatRes_FTRUNC (SDNode *N, SDValue &Lo, SDValue &Hi);
529 void ExpandFloatRes_LOAD (SDNode *N, SDValue &Lo, SDValue &Hi);
530 void ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo, SDValue &Hi);
532 // Float Operand Expansion.
533 bool ExpandFloatOperand(SDNode *N, unsigned OperandNo);
534 SDValue ExpandFloatOp_BR_CC(SDNode *N);
535 SDValue ExpandFloatOp_FCOPYSIGN(SDNode *N);
536 SDValue ExpandFloatOp_FP_ROUND(SDNode *N);
537 SDValue ExpandFloatOp_FP_TO_SINT(SDNode *N);
538 SDValue ExpandFloatOp_FP_TO_UINT(SDNode *N);
539 SDValue ExpandFloatOp_SELECT_CC(SDNode *N);
540 SDValue ExpandFloatOp_SETCC(SDNode *N);
541 SDValue ExpandFloatOp_STORE(SDNode *N, unsigned OpNo);
543 void FloatExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS,
544 ISD::CondCode &CCCode, const SDLoc &dl);
546 //===--------------------------------------------------------------------===//
547 // Float promotion support: LegalizeFloatTypes.cpp
548 //===--------------------------------------------------------------------===//
550 SDValue GetPromotedFloat(SDValue Op) {
551 SDValue &PromotedOp = PromotedFloats[Op];
552 RemapValue(PromotedOp);
553 assert(PromotedOp.getNode() && "Operand wasn't promoted?");
556 void SetPromotedFloat(SDValue Op, SDValue Result);
558 void PromoteFloatResult(SDNode *N, unsigned ResNo);
559 SDValue PromoteFloatRes_BITCAST(SDNode *N);
560 SDValue PromoteFloatRes_BinOp(SDNode *N);
561 SDValue PromoteFloatRes_ConstantFP(SDNode *N);
562 SDValue PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode *N);
563 SDValue PromoteFloatRes_FCOPYSIGN(SDNode *N);
564 SDValue PromoteFloatRes_FMAD(SDNode *N);
565 SDValue PromoteFloatRes_FPOWI(SDNode *N);
566 SDValue PromoteFloatRes_FP_ROUND(SDNode *N);
567 SDValue PromoteFloatRes_LOAD(SDNode *N);
568 SDValue PromoteFloatRes_SELECT(SDNode *N);
569 SDValue PromoteFloatRes_SELECT_CC(SDNode *N);
570 SDValue PromoteFloatRes_UnaryOp(SDNode *N);
571 SDValue PromoteFloatRes_UNDEF(SDNode *N);
572 SDValue PromoteFloatRes_XINT_TO_FP(SDNode *N);
574 bool PromoteFloatOperand(SDNode *N, unsigned ResNo);
575 SDValue PromoteFloatOp_BITCAST(SDNode *N, unsigned OpNo);
576 SDValue PromoteFloatOp_FCOPYSIGN(SDNode *N, unsigned OpNo);
577 SDValue PromoteFloatOp_FP_EXTEND(SDNode *N, unsigned OpNo);
578 SDValue PromoteFloatOp_FP_TO_XINT(SDNode *N, unsigned OpNo);
579 SDValue PromoteFloatOp_STORE(SDNode *N, unsigned OpNo);
580 SDValue PromoteFloatOp_SELECT_CC(SDNode *N, unsigned OpNo);
581 SDValue PromoteFloatOp_SETCC(SDNode *N, unsigned OpNo);
583 //===--------------------------------------------------------------------===//
584 // Scalarization Support: LegalizeVectorTypes.cpp
585 //===--------------------------------------------------------------------===//
587 /// Given a processed one-element vector Op which was scalarized to its
588 /// element type, this returns the element. For example, if Op is a v1i32,
589 /// Op = < i32 val >, this method returns val, an i32.
590 SDValue GetScalarizedVector(SDValue Op) {
591 SDValue &ScalarizedOp = ScalarizedVectors[Op];
592 RemapValue(ScalarizedOp);
593 assert(ScalarizedOp.getNode() && "Operand wasn't scalarized?");
596 void SetScalarizedVector(SDValue Op, SDValue Result);
598 // Vector Result Scalarization: <1 x ty> -> ty.
599 void ScalarizeVectorResult(SDNode *N, unsigned OpNo);
600 SDValue ScalarizeVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
601 SDValue ScalarizeVecRes_BinOp(SDNode *N);
602 SDValue ScalarizeVecRes_TernaryOp(SDNode *N);
603 SDValue ScalarizeVecRes_UnaryOp(SDNode *N);
604 SDValue ScalarizeVecRes_InregOp(SDNode *N);
605 SDValue ScalarizeVecRes_VecInregOp(SDNode *N);
607 SDValue ScalarizeVecRes_BITCAST(SDNode *N);
608 SDValue ScalarizeVecRes_BUILD_VECTOR(SDNode *N);
609 SDValue ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N);
610 SDValue ScalarizeVecRes_FP_ROUND(SDNode *N);
611 SDValue ScalarizeVecRes_FPOWI(SDNode *N);
612 SDValue ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N);
613 SDValue ScalarizeVecRes_LOAD(LoadSDNode *N);
614 SDValue ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N);
615 SDValue ScalarizeVecRes_VSELECT(SDNode *N);
616 SDValue ScalarizeVecRes_SELECT(SDNode *N);
617 SDValue ScalarizeVecRes_SELECT_CC(SDNode *N);
618 SDValue ScalarizeVecRes_SETCC(SDNode *N);
619 SDValue ScalarizeVecRes_UNDEF(SDNode *N);
620 SDValue ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N);
621 SDValue ScalarizeVecRes_VSETCC(SDNode *N);
623 // Vector Operand Scalarization: <1 x ty> -> ty.
624 bool ScalarizeVectorOperand(SDNode *N, unsigned OpNo);
625 SDValue ScalarizeVecOp_BITCAST(SDNode *N);
626 SDValue ScalarizeVecOp_UnaryOp(SDNode *N);
627 SDValue ScalarizeVecOp_CONCAT_VECTORS(SDNode *N);
628 SDValue ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
629 SDValue ScalarizeVecOp_VSELECT(SDNode *N);
630 SDValue ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo);
631 SDValue ScalarizeVecOp_FP_ROUND(SDNode *N, unsigned OpNo);
633 //===--------------------------------------------------------------------===//
634 // Vector Splitting Support: LegalizeVectorTypes.cpp
635 //===--------------------------------------------------------------------===//
637 /// Given a processed vector Op which was split into vectors of half the size,
638 /// this method returns the halves. The first elements of Op coincide with the
639 /// elements of Lo; the remaining elements of Op coincide with the elements of
640 /// Hi: Op is what you would get by concatenating Lo and Hi.
641 /// For example, if Op is a v8i32 that was split into two v4i32's, then this
642 /// method returns the two v4i32's, with Lo corresponding to the first 4
643 /// elements of Op, and Hi to the last 4 elements.
644 void GetSplitVector(SDValue Op, SDValue &Lo, SDValue &Hi);
645 void SetSplitVector(SDValue Op, SDValue Lo, SDValue Hi);
647 // Vector Result Splitting: <128 x ty> -> 2 x <64 x ty>.
648 void SplitVectorResult(SDNode *N, unsigned OpNo);
649 void SplitVecRes_BinOp(SDNode *N, SDValue &Lo, SDValue &Hi);
650 void SplitVecRes_TernaryOp(SDNode *N, SDValue &Lo, SDValue &Hi);
651 void SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo, SDValue &Hi);
652 void SplitVecRes_ExtendOp(SDNode *N, SDValue &Lo, SDValue &Hi);
653 void SplitVecRes_InregOp(SDNode *N, SDValue &Lo, SDValue &Hi);
654 void SplitVecRes_ExtVecInRegOp(SDNode *N, SDValue &Lo, SDValue &Hi);
656 void SplitVecRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi);
657 void SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
658 void SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo, SDValue &Hi);
659 void SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
660 void SplitVecRes_INSERT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
661 void SplitVecRes_FPOWI(SDNode *N, SDValue &Lo, SDValue &Hi);
662 void SplitVecRes_FCOPYSIGN(SDNode *N, SDValue &Lo, SDValue &Hi);
663 void SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi);
664 void SplitVecRes_LOAD(LoadSDNode *N, SDValue &Lo, SDValue &Hi);
665 void SplitVecRes_MLOAD(MaskedLoadSDNode *N, SDValue &Lo, SDValue &Hi);
666 void SplitVecRes_MGATHER(MaskedGatherSDNode *N, SDValue &Lo, SDValue &Hi);
667 void SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
668 void SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi);
669 void SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N, SDValue &Lo,
672 // Vector Operand Splitting: <128 x ty> -> 2 x <64 x ty>.
673 bool SplitVectorOperand(SDNode *N, unsigned OpNo);
674 SDValue SplitVecOp_VSELECT(SDNode *N, unsigned OpNo);
675 SDValue SplitVecOp_UnaryOp(SDNode *N);
676 SDValue SplitVecOp_TruncateHelper(SDNode *N);
678 SDValue SplitVecOp_BITCAST(SDNode *N);
679 SDValue SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N);
680 SDValue SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
681 SDValue SplitVecOp_ExtVecInRegOp(SDNode *N);
682 SDValue SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo);
683 SDValue SplitVecOp_MSTORE(MaskedStoreSDNode *N, unsigned OpNo);
684 SDValue SplitVecOp_MSCATTER(MaskedScatterSDNode *N, unsigned OpNo);
685 SDValue SplitVecOp_MGATHER(MaskedGatherSDNode *N, unsigned OpNo);
686 SDValue SplitVecOp_CONCAT_VECTORS(SDNode *N);
687 SDValue SplitVecOp_VSETCC(SDNode *N);
688 SDValue SplitVecOp_FP_ROUND(SDNode *N);
689 SDValue SplitVecOp_FCOPYSIGN(SDNode *N);
691 //===--------------------------------------------------------------------===//
692 // Vector Widening Support: LegalizeVectorTypes.cpp
693 //===--------------------------------------------------------------------===//
695 /// Given a processed vector Op which was widened into a larger vector, this
696 /// method returns the larger vector. The elements of the returned vector
697 /// consist of the elements of Op followed by elements containing rubbish.
698 /// For example, if Op is a v2i32 that was widened to a v4i32, then this
699 /// method returns a v4i32 for which the first two elements are the same as
700 /// those of Op, while the last two elements contain rubbish.
701 SDValue GetWidenedVector(SDValue Op) {
702 SDValue &WidenedOp = WidenedVectors[Op];
703 RemapValue(WidenedOp);
704 assert(WidenedOp.getNode() && "Operand wasn't widened?");
707 void SetWidenedVector(SDValue Op, SDValue Result);
709 // Widen Vector Result Promotion.
710 void WidenVectorResult(SDNode *N, unsigned ResNo);
711 SDValue WidenVecRes_MERGE_VALUES(SDNode* N, unsigned ResNo);
712 SDValue WidenVecRes_BITCAST(SDNode* N);
713 SDValue WidenVecRes_BUILD_VECTOR(SDNode* N);
714 SDValue WidenVecRes_CONCAT_VECTORS(SDNode* N);
715 SDValue WidenVecRes_EXTEND_VECTOR_INREG(SDNode* N);
716 SDValue WidenVecRes_EXTRACT_SUBVECTOR(SDNode* N);
717 SDValue WidenVecRes_INSERT_VECTOR_ELT(SDNode* N);
718 SDValue WidenVecRes_LOAD(SDNode* N);
719 SDValue WidenVecRes_MLOAD(MaskedLoadSDNode* N);
720 SDValue WidenVecRes_MGATHER(MaskedGatherSDNode* N);
721 SDValue WidenVecRes_SCALAR_TO_VECTOR(SDNode* N);
722 SDValue WidenVecRes_SELECT(SDNode* N);
723 SDValue WidenVSELECTAndMask(SDNode *N);
724 SDValue WidenVecRes_SELECT_CC(SDNode* N);
725 SDValue WidenVecRes_SETCC(SDNode* N);
726 SDValue WidenVecRes_UNDEF(SDNode *N);
727 SDValue WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N);
728 SDValue WidenVecRes_VSETCC(SDNode* N);
730 SDValue WidenVecRes_Ternary(SDNode *N);
731 SDValue WidenVecRes_Binary(SDNode *N);
732 SDValue WidenVecRes_BinaryCanTrap(SDNode *N);
733 SDValue WidenVecRes_Convert(SDNode *N);
734 SDValue WidenVecRes_FCOPYSIGN(SDNode *N);
735 SDValue WidenVecRes_POWI(SDNode *N);
736 SDValue WidenVecRes_Shift(SDNode *N);
737 SDValue WidenVecRes_Unary(SDNode *N);
738 SDValue WidenVecRes_InregOp(SDNode *N);
740 // Widen Vector Operand.
741 bool WidenVectorOperand(SDNode *N, unsigned OpNo);
742 SDValue WidenVecOp_BITCAST(SDNode *N);
743 SDValue WidenVecOp_CONCAT_VECTORS(SDNode *N);
744 SDValue WidenVecOp_EXTEND(SDNode *N);
745 SDValue WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
746 SDValue WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N);
747 SDValue WidenVecOp_STORE(SDNode* N);
748 SDValue WidenVecOp_MSTORE(SDNode* N, unsigned OpNo);
749 SDValue WidenVecOp_MSCATTER(SDNode* N, unsigned OpNo);
750 SDValue WidenVecOp_SETCC(SDNode* N);
752 SDValue WidenVecOp_Convert(SDNode *N);
753 SDValue WidenVecOp_FCOPYSIGN(SDNode *N);
755 //===--------------------------------------------------------------------===//
756 // Vector Widening Utilities Support: LegalizeVectorTypes.cpp
757 //===--------------------------------------------------------------------===//
759 /// Helper function to generate a set of loads to load a vector with a
760 /// resulting wider type. It takes:
761 /// LdChain: list of chains for the load to be generated.
762 /// Ld: load to widen
763 SDValue GenWidenVectorLoads(SmallVectorImpl<SDValue> &LdChain,
766 /// Helper function to generate a set of extension loads to load a vector with
767 /// a resulting wider type. It takes:
768 /// LdChain: list of chains for the load to be generated.
769 /// Ld: load to widen
770 /// ExtType: extension element type
771 SDValue GenWidenVectorExtLoads(SmallVectorImpl<SDValue> &LdChain,
772 LoadSDNode *LD, ISD::LoadExtType ExtType);
774 /// Helper function to generate a set of stores to store a widen vector into
775 /// non-widen memory.
776 /// StChain: list of chains for the stores we have generated
777 /// ST: store of a widen value
778 void GenWidenVectorStores(SmallVectorImpl<SDValue> &StChain, StoreSDNode *ST);
780 /// Helper function to generate a set of stores to store a truncate widen
781 /// vector into non-widen memory.
782 /// StChain: list of chains for the stores we have generated
783 /// ST: store of a widen value
784 void GenWidenVectorTruncStores(SmallVectorImpl<SDValue> &StChain,
787 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
788 /// input vector must have the same element type as NVT.
789 /// When FillWithZeroes is "on" the vector will be widened with zeroes.
790 /// By default, the vector will be widened with undefined values.
791 SDValue ModifyToType(SDValue InOp, EVT NVT, bool FillWithZeroes = false);
793 /// Return a mask of vector type MaskVT to replace InMask. Also adjust
794 /// MaskVT to ToMaskVT if needed with vector extension or truncation.
795 SDValue convertMask(SDValue InMask, EVT MaskVT, EVT ToMaskVT);
797 /// Get the target mask VT, and widen if needed.
798 EVT getSETCCWidenedResultTy(SDValue SetCC);
800 //===--------------------------------------------------------------------===//
801 // Generic Splitting: LegalizeTypesGeneric.cpp
802 //===--------------------------------------------------------------------===//
804 // Legalization methods which only use that the illegal type is split into two
805 // not necessarily identical types. As such they can be used for splitting
806 // vectors and expanding integers and floats.
808 void GetSplitOp(SDValue Op, SDValue &Lo, SDValue &Hi) {
809 if (Op.getValueType().isVector())
810 GetSplitVector(Op, Lo, Hi);
811 else if (Op.getValueType().isInteger())
812 GetExpandedInteger(Op, Lo, Hi);
814 GetExpandedFloat(Op, Lo, Hi);
817 /// Use ISD::EXTRACT_ELEMENT nodes to extract the low and high parts of the
819 void GetPairElements(SDValue Pair, SDValue &Lo, SDValue &Hi);
821 // Generic Result Splitting.
822 void SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo,
823 SDValue &Lo, SDValue &Hi);
824 void SplitRes_SELECT (SDNode *N, SDValue &Lo, SDValue &Hi);
825 void SplitRes_SELECT_CC (SDNode *N, SDValue &Lo, SDValue &Hi);
826 void SplitRes_UNDEF (SDNode *N, SDValue &Lo, SDValue &Hi);
828 //===--------------------------------------------------------------------===//
829 // Generic Expansion: LegalizeTypesGeneric.cpp
830 //===--------------------------------------------------------------------===//
832 // Legalization methods which only use that the illegal type is split into two
833 // identical types of half the size, and that the Lo/Hi part is stored first
834 // in memory on little/big-endian machines, followed by the Hi/Lo part. As
835 // such they can be used for expanding integers and floats.
837 void GetExpandedOp(SDValue Op, SDValue &Lo, SDValue &Hi) {
838 if (Op.getValueType().isInteger())
839 GetExpandedInteger(Op, Lo, Hi);
841 GetExpandedFloat(Op, Lo, Hi);
845 /// This function will split the integer \p Op into \p NumElements
846 /// operations of type \p EltVT and store them in \p Ops.
847 void IntegerToVector(SDValue Op, unsigned NumElements,
848 SmallVectorImpl<SDValue> &Ops, EVT EltVT);
850 // Generic Result Expansion.
851 void ExpandRes_MERGE_VALUES (SDNode *N, unsigned ResNo,
852 SDValue &Lo, SDValue &Hi);
853 void ExpandRes_BITCAST (SDNode *N, SDValue &Lo, SDValue &Hi);
854 void ExpandRes_BUILD_PAIR (SDNode *N, SDValue &Lo, SDValue &Hi);
855 void ExpandRes_EXTRACT_ELEMENT (SDNode *N, SDValue &Lo, SDValue &Hi);
856 void ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi);
857 void ExpandRes_NormalLoad (SDNode *N, SDValue &Lo, SDValue &Hi);
858 void ExpandRes_VAARG (SDNode *N, SDValue &Lo, SDValue &Hi);
860 // Generic Operand Expansion.
861 SDValue ExpandOp_BITCAST (SDNode *N);
862 SDValue ExpandOp_BUILD_VECTOR (SDNode *N);
863 SDValue ExpandOp_EXTRACT_ELEMENT (SDNode *N);
864 SDValue ExpandOp_INSERT_VECTOR_ELT(SDNode *N);
865 SDValue ExpandOp_SCALAR_TO_VECTOR (SDNode *N);
866 SDValue ExpandOp_NormalStore (SDNode *N, unsigned OpNo);
869 } // end namespace llvm.