1 //===-- LegalizeTypes.h - DAG Type Legalizer class definition ---*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the DAGTypeLegalizer class. This is a private interface
11 // shared between the code that implements the SelectionDAG::LegalizeTypes
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H
17 #define LLVM_LIB_CODEGEN_SELECTIONDAG_LEGALIZETYPES_H
19 #include "llvm/ADT/DenseMap.h"
20 #include "llvm/CodeGen/SelectionDAG.h"
21 #include "llvm/Support/Compiler.h"
22 #include "llvm/Support/Debug.h"
23 #include "llvm/Target/TargetLowering.h"
27 //===----------------------------------------------------------------------===//
28 /// This takes an arbitrary SelectionDAG as input and hacks on it until only
29 /// value types the target machine can handle are left. This involves promoting
30 /// small sizes to large sizes or splitting up large values into small values.
32 class LLVM_LIBRARY_VISIBILITY DAGTypeLegalizer {
33 const TargetLowering &TLI;
36 /// This pass uses the NodeId on the SDNodes to hold information about the
37 /// state of the node. The enum has all the values.
39 /// All operands have been processed, so this node is ready to be handled.
42 /// This is a new node, not before seen, that was created in the process of
43 /// legalizing some other node.
46 /// This node's ID needs to be set to the number of its unprocessed
50 /// This is a node that has already been processed.
53 // 1+ - This is a node which has this many unprocessed operands.
57 /// This is a bitvector that contains two bits for each simple value type,
58 /// where the two bits correspond to the LegalizeAction enum from
59 /// TargetLowering. This can be queried with "getTypeAction(VT)".
60 TargetLowering::ValueTypeActionImpl ValueTypeActions;
62 /// Return how we should legalize values of this type.
63 TargetLowering::LegalizeTypeAction getTypeAction(EVT VT) const {
64 return TLI.getTypeAction(*DAG.getContext(), VT);
67 /// Return true if this type is legal on this target.
68 bool isTypeLegal(EVT VT) const {
69 return TLI.getTypeAction(*DAG.getContext(), VT) == TargetLowering::TypeLegal;
72 /// Return true if this is a simple legal type.
73 bool isSimpleLegalType(EVT VT) const {
74 return VT.isSimple() && TLI.isTypeLegal(VT);
77 /// Return true if this type can be passed in registers.
78 /// For example, x86_64's f128, should to be legally in registers
79 /// and only some operations converted to library calls or integer
80 /// bitwise operations.
81 bool isLegalInHWReg(EVT VT) const {
82 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
83 return VT == NVT && isSimpleLegalType(VT);
86 EVT getSetCCResultType(EVT VT) const {
87 return TLI.getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT);
90 /// Pretend all of this node's results are legal.
91 bool IgnoreNodeResults(SDNode *N) const {
92 return N->getOpcode() == ISD::TargetConstant;
95 /// For integer nodes that are below legal width, this map indicates what
96 /// promoted value to use.
97 SmallDenseMap<SDValue, SDValue, 8> PromotedIntegers;
99 /// For integer nodes that need to be expanded this map indicates which
100 /// operands are the expanded version of the input.
101 SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> ExpandedIntegers;
103 /// For floating-point nodes converted to integers of the same size, this map
104 /// indicates the converted value to use.
105 SmallDenseMap<SDValue, SDValue, 8> SoftenedFloats;
107 /// For floating-point nodes that have a smaller precision than the smallest
108 /// supported precision, this map indicates what promoted value to use.
109 SmallDenseMap<SDValue, SDValue, 8> PromotedFloats;
111 /// For float nodes that need to be expanded this map indicates which operands
112 /// are the expanded version of the input.
113 SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> ExpandedFloats;
115 /// For nodes that are <1 x ty>, this map indicates the scalar value of type
117 SmallDenseMap<SDValue, SDValue, 8> ScalarizedVectors;
119 /// For nodes that need to be split this map indicates which operands are the
120 /// expanded version of the input.
121 SmallDenseMap<SDValue, std::pair<SDValue, SDValue>, 8> SplitVectors;
123 /// For vector nodes that need to be widened, indicates the widened value to
125 SmallDenseMap<SDValue, SDValue, 8> WidenedVectors;
127 /// For values that have been replaced with another, indicates the replacement
129 SmallDenseMap<SDValue, SDValue, 8> ReplacedValues;
131 /// This defines a worklist of nodes to process. In order to be pushed onto
132 /// this worklist, all operands of a node must have already been processed.
133 SmallVector<SDNode*, 128> Worklist;
136 explicit DAGTypeLegalizer(SelectionDAG &dag)
137 : TLI(dag.getTargetLoweringInfo()), DAG(dag),
138 ValueTypeActions(TLI.getValueTypeActions()) {
139 static_assert(MVT::LAST_VALUETYPE <= MVT::MAX_ALLOWED_VALUETYPE,
140 "Too many value types for ValueTypeActions to hold!");
143 /// This is the main entry point for the type legalizer. This does a
144 /// top-down traversal of the dag, legalizing types as it goes. Returns
145 /// "true" if it made any changes.
148 void NoteDeletion(SDNode *Old, SDNode *New) {
151 for (unsigned i = 0, e = Old->getNumValues(); i != e; ++i)
152 ReplacedValues[SDValue(Old, i)] = SDValue(New, i);
155 SelectionDAG &getDAG() const { return DAG; }
158 SDNode *AnalyzeNewNode(SDNode *N);
159 void AnalyzeNewValue(SDValue &Val);
160 void ExpungeNode(SDNode *N);
161 void PerformExpensiveChecks();
162 void RemapValue(SDValue &N);
165 SDValue BitConvertToInteger(SDValue Op);
166 SDValue BitConvertVectorToIntegerVector(SDValue Op);
167 SDValue CreateStackStoreLoad(SDValue Op, EVT DestVT);
168 bool CustomLowerNode(SDNode *N, EVT VT, bool LegalizeResult);
169 bool CustomWidenLowerNode(SDNode *N, EVT VT);
171 /// Replace each result of the given MERGE_VALUES node with the corresponding
172 /// input operand, except for the result 'ResNo', for which the corresponding
173 /// input operand is returned.
174 SDValue DisintegrateMERGE_VALUES(SDNode *N, unsigned ResNo);
176 SDValue JoinIntegers(SDValue Lo, SDValue Hi);
177 SDValue LibCallify(RTLIB::Libcall LC, SDNode *N, bool isSigned);
179 std::pair<SDValue, SDValue> ExpandChainLibCall(RTLIB::Libcall LC,
180 SDNode *Node, bool isSigned);
181 std::pair<SDValue, SDValue> ExpandAtomic(SDNode *Node);
183 SDValue PromoteTargetBoolean(SDValue Bool, EVT ValVT);
185 /// Modify Bit Vector to match SetCC result type of ValVT.
186 /// The bit vector is widened with zeroes when WithZeroes is true.
187 SDValue WidenTargetBoolean(SDValue Bool, EVT ValVT, bool WithZeroes = false);
189 void ReplaceValueWith(SDValue From, SDValue To);
190 void SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
191 void SplitInteger(SDValue Op, EVT LoVT, EVT HiVT,
192 SDValue &Lo, SDValue &Hi);
194 //===--------------------------------------------------------------------===//
195 // Integer Promotion Support: LegalizeIntegerTypes.cpp
196 //===--------------------------------------------------------------------===//
198 /// Given a processed operand Op which was promoted to a larger integer type,
199 /// this returns the promoted value. The low bits of the promoted value
200 /// corresponding to the original type are exactly equal to Op.
201 /// The extra bits contain rubbish, so the promoted value may need to be zero-
202 /// or sign-extended from the original type before it is usable (the helpers
203 /// SExtPromotedInteger and ZExtPromotedInteger can do this for you).
204 /// For example, if Op is an i16 and was promoted to an i32, then this method
205 /// returns an i32, the lower 16 bits of which coincide with Op, and the upper
206 /// 16 bits of which contain rubbish.
207 SDValue GetPromotedInteger(SDValue Op) {
208 SDValue &PromotedOp = PromotedIntegers[Op];
209 RemapValue(PromotedOp);
210 assert(PromotedOp.getNode() && "Operand wasn't promoted?");
213 void SetPromotedInteger(SDValue Op, SDValue Result);
215 /// Get a promoted operand and sign extend it to the final size.
216 SDValue SExtPromotedInteger(SDValue Op) {
217 EVT OldVT = Op.getValueType();
219 Op = GetPromotedInteger(Op);
220 return DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, Op.getValueType(), Op,
221 DAG.getValueType(OldVT));
224 /// Get a promoted operand and zero extend it to the final size.
225 SDValue ZExtPromotedInteger(SDValue Op) {
226 EVT OldVT = Op.getValueType();
228 Op = GetPromotedInteger(Op);
229 return DAG.getZeroExtendInReg(Op, dl, OldVT.getScalarType());
232 // Integer Result Promotion.
233 void PromoteIntegerResult(SDNode *N, unsigned ResNo);
234 SDValue PromoteIntRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
235 SDValue PromoteIntRes_AssertSext(SDNode *N);
236 SDValue PromoteIntRes_AssertZext(SDNode *N);
237 SDValue PromoteIntRes_Atomic0(AtomicSDNode *N);
238 SDValue PromoteIntRes_Atomic1(AtomicSDNode *N);
239 SDValue PromoteIntRes_AtomicCmpSwap(AtomicSDNode *N, unsigned ResNo);
240 SDValue PromoteIntRes_EXTRACT_SUBVECTOR(SDNode *N);
241 SDValue PromoteIntRes_VECTOR_SHUFFLE(SDNode *N);
242 SDValue PromoteIntRes_BUILD_VECTOR(SDNode *N);
243 SDValue PromoteIntRes_SCALAR_TO_VECTOR(SDNode *N);
244 SDValue PromoteIntRes_EXTEND_VECTOR_INREG(SDNode *N);
245 SDValue PromoteIntRes_INSERT_VECTOR_ELT(SDNode *N);
246 SDValue PromoteIntRes_CONCAT_VECTORS(SDNode *N);
247 SDValue PromoteIntRes_BITCAST(SDNode *N);
248 SDValue PromoteIntRes_BSWAP(SDNode *N);
249 SDValue PromoteIntRes_BITREVERSE(SDNode *N);
250 SDValue PromoteIntRes_BUILD_PAIR(SDNode *N);
251 SDValue PromoteIntRes_Constant(SDNode *N);
252 SDValue PromoteIntRes_CTLZ(SDNode *N);
253 SDValue PromoteIntRes_CTPOP(SDNode *N);
254 SDValue PromoteIntRes_CTTZ(SDNode *N);
255 SDValue PromoteIntRes_EXTRACT_VECTOR_ELT(SDNode *N);
256 SDValue PromoteIntRes_FP_TO_XINT(SDNode *N);
257 SDValue PromoteIntRes_FP_TO_FP16(SDNode *N);
258 SDValue PromoteIntRes_INT_EXTEND(SDNode *N);
259 SDValue PromoteIntRes_LOAD(LoadSDNode *N);
260 SDValue PromoteIntRes_MLOAD(MaskedLoadSDNode *N);
261 SDValue PromoteIntRes_MGATHER(MaskedGatherSDNode *N);
262 SDValue PromoteIntRes_Overflow(SDNode *N);
263 SDValue PromoteIntRes_SADDSUBO(SDNode *N, unsigned ResNo);
264 SDValue PromoteIntRes_SELECT(SDNode *N);
265 SDValue PromoteIntRes_VSELECT(SDNode *N);
266 SDValue PromoteIntRes_SELECT_CC(SDNode *N);
267 SDValue PromoteIntRes_SETCC(SDNode *N);
268 SDValue PromoteIntRes_SHL(SDNode *N);
269 SDValue PromoteIntRes_SimpleIntBinOp(SDNode *N);
270 SDValue PromoteIntRes_ZExtIntBinOp(SDNode *N);
271 SDValue PromoteIntRes_SExtIntBinOp(SDNode *N);
272 SDValue PromoteIntRes_SIGN_EXTEND_INREG(SDNode *N);
273 SDValue PromoteIntRes_SRA(SDNode *N);
274 SDValue PromoteIntRes_SRL(SDNode *N);
275 SDValue PromoteIntRes_TRUNCATE(SDNode *N);
276 SDValue PromoteIntRes_UADDSUBO(SDNode *N, unsigned ResNo);
277 SDValue PromoteIntRes_UNDEF(SDNode *N);
278 SDValue PromoteIntRes_VAARG(SDNode *N);
279 SDValue PromoteIntRes_XMULO(SDNode *N, unsigned ResNo);
281 // Integer Operand Promotion.
282 bool PromoteIntegerOperand(SDNode *N, unsigned OperandNo);
283 SDValue PromoteIntOp_ANY_EXTEND(SDNode *N);
284 SDValue PromoteIntOp_ATOMIC_STORE(AtomicSDNode *N);
285 SDValue PromoteIntOp_BITCAST(SDNode *N);
286 SDValue PromoteIntOp_BUILD_PAIR(SDNode *N);
287 SDValue PromoteIntOp_BR_CC(SDNode *N, unsigned OpNo);
288 SDValue PromoteIntOp_BRCOND(SDNode *N, unsigned OpNo);
289 SDValue PromoteIntOp_BUILD_VECTOR(SDNode *N);
290 SDValue PromoteIntOp_INSERT_VECTOR_ELT(SDNode *N, unsigned OpNo);
291 SDValue PromoteIntOp_EXTRACT_VECTOR_ELT(SDNode *N);
292 SDValue PromoteIntOp_EXTRACT_SUBVECTOR(SDNode *N);
293 SDValue PromoteIntOp_CONCAT_VECTORS(SDNode *N);
294 SDValue PromoteIntOp_SCALAR_TO_VECTOR(SDNode *N);
295 SDValue PromoteIntOp_SELECT(SDNode *N, unsigned OpNo);
296 SDValue PromoteIntOp_SELECT_CC(SDNode *N, unsigned OpNo);
297 SDValue PromoteIntOp_SETCC(SDNode *N, unsigned OpNo);
298 SDValue PromoteIntOp_Shift(SDNode *N);
299 SDValue PromoteIntOp_SIGN_EXTEND(SDNode *N);
300 SDValue PromoteIntOp_SINT_TO_FP(SDNode *N);
301 SDValue PromoteIntOp_STORE(StoreSDNode *N, unsigned OpNo);
302 SDValue PromoteIntOp_TRUNCATE(SDNode *N);
303 SDValue PromoteIntOp_UINT_TO_FP(SDNode *N);
304 SDValue PromoteIntOp_ZERO_EXTEND(SDNode *N);
305 SDValue PromoteIntOp_MSTORE(MaskedStoreSDNode *N, unsigned OpNo);
306 SDValue PromoteIntOp_MLOAD(MaskedLoadSDNode *N, unsigned OpNo);
307 SDValue PromoteIntOp_MSCATTER(MaskedScatterSDNode *N, unsigned OpNo);
308 SDValue PromoteIntOp_MGATHER(MaskedGatherSDNode *N, unsigned OpNo);
310 void PromoteSetCCOperands(SDValue &LHS,SDValue &RHS, ISD::CondCode Code);
312 //===--------------------------------------------------------------------===//
313 // Integer Expansion Support: LegalizeIntegerTypes.cpp
314 //===--------------------------------------------------------------------===//
316 /// Given a processed operand Op which was expanded into two integers of half
317 /// the size, this returns the two halves. The low bits of Op are exactly
318 /// equal to the bits of Lo; the high bits exactly equal Hi.
319 /// For example, if Op is an i64 which was expanded into two i32's, then this
320 /// method returns the two i32's, with Lo being equal to the lower 32 bits of
321 /// Op, and Hi being equal to the upper 32 bits.
322 void GetExpandedInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
323 void SetExpandedInteger(SDValue Op, SDValue Lo, SDValue Hi);
325 // Integer Result Expansion.
326 void ExpandIntegerResult(SDNode *N, unsigned ResNo);
327 void ExpandIntRes_ANY_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
328 void ExpandIntRes_AssertSext (SDNode *N, SDValue &Lo, SDValue &Hi);
329 void ExpandIntRes_AssertZext (SDNode *N, SDValue &Lo, SDValue &Hi);
330 void ExpandIntRes_Constant (SDNode *N, SDValue &Lo, SDValue &Hi);
331 void ExpandIntRes_CTLZ (SDNode *N, SDValue &Lo, SDValue &Hi);
332 void ExpandIntRes_CTPOP (SDNode *N, SDValue &Lo, SDValue &Hi);
333 void ExpandIntRes_CTTZ (SDNode *N, SDValue &Lo, SDValue &Hi);
334 void ExpandIntRes_LOAD (LoadSDNode *N, SDValue &Lo, SDValue &Hi);
335 void ExpandIntRes_READCYCLECOUNTER (SDNode *N, SDValue &Lo, SDValue &Hi);
336 void ExpandIntRes_SIGN_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
337 void ExpandIntRes_SIGN_EXTEND_INREG (SDNode *N, SDValue &Lo, SDValue &Hi);
338 void ExpandIntRes_TRUNCATE (SDNode *N, SDValue &Lo, SDValue &Hi);
339 void ExpandIntRes_ZERO_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
340 void ExpandIntRes_FLT_ROUNDS (SDNode *N, SDValue &Lo, SDValue &Hi);
341 void ExpandIntRes_FP_TO_SINT (SDNode *N, SDValue &Lo, SDValue &Hi);
342 void ExpandIntRes_FP_TO_UINT (SDNode *N, SDValue &Lo, SDValue &Hi);
344 void ExpandIntRes_Logical (SDNode *N, SDValue &Lo, SDValue &Hi);
345 void ExpandIntRes_ADDSUB (SDNode *N, SDValue &Lo, SDValue &Hi);
346 void ExpandIntRes_ADDSUBC (SDNode *N, SDValue &Lo, SDValue &Hi);
347 void ExpandIntRes_ADDSUBE (SDNode *N, SDValue &Lo, SDValue &Hi);
348 void ExpandIntRes_BITREVERSE (SDNode *N, SDValue &Lo, SDValue &Hi);
349 void ExpandIntRes_BSWAP (SDNode *N, SDValue &Lo, SDValue &Hi);
350 void ExpandIntRes_MUL (SDNode *N, SDValue &Lo, SDValue &Hi);
351 void ExpandIntRes_SDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
352 void ExpandIntRes_SREM (SDNode *N, SDValue &Lo, SDValue &Hi);
353 void ExpandIntRes_UDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
354 void ExpandIntRes_UREM (SDNode *N, SDValue &Lo, SDValue &Hi);
355 void ExpandIntRes_Shift (SDNode *N, SDValue &Lo, SDValue &Hi);
357 void ExpandIntRes_MINMAX (SDNode *N, SDValue &Lo, SDValue &Hi);
359 void ExpandIntRes_SADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi);
360 void ExpandIntRes_UADDSUBO (SDNode *N, SDValue &Lo, SDValue &Hi);
361 void ExpandIntRes_XMULO (SDNode *N, SDValue &Lo, SDValue &Hi);
363 void ExpandIntRes_ATOMIC_LOAD (SDNode *N, SDValue &Lo, SDValue &Hi);
365 void ExpandShiftByConstant(SDNode *N, const APInt &Amt,
366 SDValue &Lo, SDValue &Hi);
367 bool ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi);
368 bool ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi);
370 // Integer Operand Expansion.
371 bool ExpandIntegerOperand(SDNode *N, unsigned OperandNo);
372 SDValue ExpandIntOp_BR_CC(SDNode *N);
373 SDValue ExpandIntOp_SELECT_CC(SDNode *N);
374 SDValue ExpandIntOp_SETCC(SDNode *N);
375 SDValue ExpandIntOp_SETCCE(SDNode *N);
376 SDValue ExpandIntOp_Shift(SDNode *N);
377 SDValue ExpandIntOp_SINT_TO_FP(SDNode *N);
378 SDValue ExpandIntOp_STORE(StoreSDNode *N, unsigned OpNo);
379 SDValue ExpandIntOp_TRUNCATE(SDNode *N);
380 SDValue ExpandIntOp_UINT_TO_FP(SDNode *N);
381 SDValue ExpandIntOp_RETURNADDR(SDNode *N);
382 SDValue ExpandIntOp_ATOMIC_STORE(SDNode *N);
384 void IntegerExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS,
385 ISD::CondCode &CCCode, const SDLoc &dl);
387 //===--------------------------------------------------------------------===//
388 // Float to Integer Conversion Support: LegalizeFloatTypes.cpp
389 //===--------------------------------------------------------------------===//
391 /// Given an operand Op of Float type, returns the integer if the Op is not
392 /// supported in target HW and converted to the integer.
393 /// The integer contains exactly the same bits as Op - only the type changed.
394 /// For example, if Op is an f32 which was softened to an i32, then this method
395 /// returns an i32, the bits of which coincide with those of Op.
396 /// If the Op can be efficiently supported in target HW or the operand must
397 /// stay in a register, the Op is not converted to an integer.
398 /// In that case, the given op is returned.
399 SDValue GetSoftenedFloat(SDValue Op) {
400 SDValue &SoftenedOp = SoftenedFloats[Op];
401 if (!SoftenedOp.getNode() &&
402 isSimpleLegalType(Op.getValueType()))
404 RemapValue(SoftenedOp);
405 assert(SoftenedOp.getNode() && "Operand wasn't converted to integer?");
408 void SetSoftenedFloat(SDValue Op, SDValue Result);
410 // Call ReplaceValueWith(SDValue(N, ResNo), Res) if necessary.
411 void ReplaceSoftenFloatResult(SDNode *N, unsigned ResNo, SDValue &NewRes) {
412 // When the result type can be kept in HW registers, the converted
413 // NewRes node could have the same type. We can save the effort in
414 // cloning every user of N in SoftenFloatOperand or other legalization functions,
415 // by calling ReplaceValueWith here to update all users.
416 if (NewRes.getNode() != N && isLegalInHWReg(N->getValueType(ResNo)))
417 ReplaceValueWith(SDValue(N, ResNo), NewRes);
420 // Convert Float Results to Integer for Non-HW-supported Operations.
421 bool SoftenFloatResult(SDNode *N, unsigned ResNo);
422 SDValue SoftenFloatRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
423 SDValue SoftenFloatRes_BITCAST(SDNode *N, unsigned ResNo);
424 SDValue SoftenFloatRes_BUILD_PAIR(SDNode *N);
425 SDValue SoftenFloatRes_ConstantFP(SDNode *N, unsigned ResNo);
426 SDValue SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N);
427 SDValue SoftenFloatRes_FABS(SDNode *N, unsigned ResNo);
428 SDValue SoftenFloatRes_FMINNUM(SDNode *N);
429 SDValue SoftenFloatRes_FMAXNUM(SDNode *N);
430 SDValue SoftenFloatRes_FADD(SDNode *N);
431 SDValue SoftenFloatRes_FCEIL(SDNode *N);
432 SDValue SoftenFloatRes_FCOPYSIGN(SDNode *N, unsigned ResNo);
433 SDValue SoftenFloatRes_FCOS(SDNode *N);
434 SDValue SoftenFloatRes_FDIV(SDNode *N);
435 SDValue SoftenFloatRes_FEXP(SDNode *N);
436 SDValue SoftenFloatRes_FEXP2(SDNode *N);
437 SDValue SoftenFloatRes_FFLOOR(SDNode *N);
438 SDValue SoftenFloatRes_FLOG(SDNode *N);
439 SDValue SoftenFloatRes_FLOG2(SDNode *N);
440 SDValue SoftenFloatRes_FLOG10(SDNode *N);
441 SDValue SoftenFloatRes_FMA(SDNode *N);
442 SDValue SoftenFloatRes_FMUL(SDNode *N);
443 SDValue SoftenFloatRes_FNEARBYINT(SDNode *N);
444 SDValue SoftenFloatRes_FNEG(SDNode *N, unsigned ResNo);
445 SDValue SoftenFloatRes_FP_EXTEND(SDNode *N);
446 SDValue SoftenFloatRes_FP16_TO_FP(SDNode *N);
447 SDValue SoftenFloatRes_FP_ROUND(SDNode *N);
448 SDValue SoftenFloatRes_FPOW(SDNode *N);
449 SDValue SoftenFloatRes_FPOWI(SDNode *N);
450 SDValue SoftenFloatRes_FREM(SDNode *N);
451 SDValue SoftenFloatRes_FRINT(SDNode *N);
452 SDValue SoftenFloatRes_FROUND(SDNode *N);
453 SDValue SoftenFloatRes_FSIN(SDNode *N);
454 SDValue SoftenFloatRes_FSQRT(SDNode *N);
455 SDValue SoftenFloatRes_FSUB(SDNode *N);
456 SDValue SoftenFloatRes_FTRUNC(SDNode *N);
457 SDValue SoftenFloatRes_LOAD(SDNode *N, unsigned ResNo);
458 SDValue SoftenFloatRes_SELECT(SDNode *N, unsigned ResNo);
459 SDValue SoftenFloatRes_SELECT_CC(SDNode *N, unsigned ResNo);
460 SDValue SoftenFloatRes_UNDEF(SDNode *N);
461 SDValue SoftenFloatRes_VAARG(SDNode *N);
462 SDValue SoftenFloatRes_XINT_TO_FP(SDNode *N);
464 // Return true if we can skip softening the given operand or SDNode because
465 // it was soften before by SoftenFloatResult and references to the operand
466 // were replaced by ReplaceValueWith.
467 bool CanSkipSoftenFloatOperand(SDNode *N, unsigned OpNo);
469 // Convert Float Operand to Integer for Non-HW-supported Operations.
470 bool SoftenFloatOperand(SDNode *N, unsigned OpNo);
471 SDValue SoftenFloatOp_BITCAST(SDNode *N);
472 SDValue SoftenFloatOp_BR_CC(SDNode *N);
473 SDValue SoftenFloatOp_FP_EXTEND(SDNode *N);
474 SDValue SoftenFloatOp_FP_ROUND(SDNode *N);
475 SDValue SoftenFloatOp_FP_TO_XINT(SDNode *N);
476 SDValue SoftenFloatOp_SELECT_CC(SDNode *N);
477 SDValue SoftenFloatOp_SETCC(SDNode *N);
478 SDValue SoftenFloatOp_STORE(SDNode *N, unsigned OpNo);
480 //===--------------------------------------------------------------------===//
481 // Float Expansion Support: LegalizeFloatTypes.cpp
482 //===--------------------------------------------------------------------===//
484 /// Given a processed operand Op which was expanded into two floating-point
485 /// values of half the size, this returns the two halves.
486 /// The low bits of Op are exactly equal to the bits of Lo; the high bits
487 /// exactly equal Hi. For example, if Op is a ppcf128 which was expanded
488 /// into two f64's, then this method returns the two f64's, with Lo being
489 /// equal to the lower 64 bits of Op, and Hi to the upper 64 bits.
490 void GetExpandedFloat(SDValue Op, SDValue &Lo, SDValue &Hi);
491 void SetExpandedFloat(SDValue Op, SDValue Lo, SDValue Hi);
493 // Float Result Expansion.
494 void ExpandFloatResult(SDNode *N, unsigned ResNo);
495 void ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo, SDValue &Hi);
496 void ExpandFloatRes_FABS (SDNode *N, SDValue &Lo, SDValue &Hi);
497 void ExpandFloatRes_FMINNUM (SDNode *N, SDValue &Lo, SDValue &Hi);
498 void ExpandFloatRes_FMAXNUM (SDNode *N, SDValue &Lo, SDValue &Hi);
499 void ExpandFloatRes_FADD (SDNode *N, SDValue &Lo, SDValue &Hi);
500 void ExpandFloatRes_FCEIL (SDNode *N, SDValue &Lo, SDValue &Hi);
501 void ExpandFloatRes_FCOPYSIGN (SDNode *N, SDValue &Lo, SDValue &Hi);
502 void ExpandFloatRes_FCOS (SDNode *N, SDValue &Lo, SDValue &Hi);
503 void ExpandFloatRes_FDIV (SDNode *N, SDValue &Lo, SDValue &Hi);
504 void ExpandFloatRes_FEXP (SDNode *N, SDValue &Lo, SDValue &Hi);
505 void ExpandFloatRes_FEXP2 (SDNode *N, SDValue &Lo, SDValue &Hi);
506 void ExpandFloatRes_FFLOOR (SDNode *N, SDValue &Lo, SDValue &Hi);
507 void ExpandFloatRes_FLOG (SDNode *N, SDValue &Lo, SDValue &Hi);
508 void ExpandFloatRes_FLOG2 (SDNode *N, SDValue &Lo, SDValue &Hi);
509 void ExpandFloatRes_FLOG10 (SDNode *N, SDValue &Lo, SDValue &Hi);
510 void ExpandFloatRes_FMA (SDNode *N, SDValue &Lo, SDValue &Hi);
511 void ExpandFloatRes_FMUL (SDNode *N, SDValue &Lo, SDValue &Hi);
512 void ExpandFloatRes_FNEARBYINT(SDNode *N, SDValue &Lo, SDValue &Hi);
513 void ExpandFloatRes_FNEG (SDNode *N, SDValue &Lo, SDValue &Hi);
514 void ExpandFloatRes_FP_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
515 void ExpandFloatRes_FPOW (SDNode *N, SDValue &Lo, SDValue &Hi);
516 void ExpandFloatRes_FPOWI (SDNode *N, SDValue &Lo, SDValue &Hi);
517 void ExpandFloatRes_FREM (SDNode *N, SDValue &Lo, SDValue &Hi);
518 void ExpandFloatRes_FRINT (SDNode *N, SDValue &Lo, SDValue &Hi);
519 void ExpandFloatRes_FROUND (SDNode *N, SDValue &Lo, SDValue &Hi);
520 void ExpandFloatRes_FSIN (SDNode *N, SDValue &Lo, SDValue &Hi);
521 void ExpandFloatRes_FSQRT (SDNode *N, SDValue &Lo, SDValue &Hi);
522 void ExpandFloatRes_FSUB (SDNode *N, SDValue &Lo, SDValue &Hi);
523 void ExpandFloatRes_FTRUNC (SDNode *N, SDValue &Lo, SDValue &Hi);
524 void ExpandFloatRes_LOAD (SDNode *N, SDValue &Lo, SDValue &Hi);
525 void ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo, SDValue &Hi);
527 // Float Operand Expansion.
528 bool ExpandFloatOperand(SDNode *N, unsigned OperandNo);
529 SDValue ExpandFloatOp_BR_CC(SDNode *N);
530 SDValue ExpandFloatOp_FCOPYSIGN(SDNode *N);
531 SDValue ExpandFloatOp_FP_ROUND(SDNode *N);
532 SDValue ExpandFloatOp_FP_TO_SINT(SDNode *N);
533 SDValue ExpandFloatOp_FP_TO_UINT(SDNode *N);
534 SDValue ExpandFloatOp_SELECT_CC(SDNode *N);
535 SDValue ExpandFloatOp_SETCC(SDNode *N);
536 SDValue ExpandFloatOp_STORE(SDNode *N, unsigned OpNo);
538 void FloatExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS,
539 ISD::CondCode &CCCode, const SDLoc &dl);
541 //===--------------------------------------------------------------------===//
542 // Float promotion support: LegalizeFloatTypes.cpp
543 //===--------------------------------------------------------------------===//
545 SDValue GetPromotedFloat(SDValue Op) {
546 SDValue &PromotedOp = PromotedFloats[Op];
547 RemapValue(PromotedOp);
548 assert(PromotedOp.getNode() && "Operand wasn't promoted?");
551 void SetPromotedFloat(SDValue Op, SDValue Result);
553 void PromoteFloatResult(SDNode *N, unsigned ResNo);
554 SDValue PromoteFloatRes_BITCAST(SDNode *N);
555 SDValue PromoteFloatRes_BinOp(SDNode *N);
556 SDValue PromoteFloatRes_ConstantFP(SDNode *N);
557 SDValue PromoteFloatRes_EXTRACT_VECTOR_ELT(SDNode *N);
558 SDValue PromoteFloatRes_FCOPYSIGN(SDNode *N);
559 SDValue PromoteFloatRes_FMAD(SDNode *N);
560 SDValue PromoteFloatRes_FPOWI(SDNode *N);
561 SDValue PromoteFloatRes_FP_ROUND(SDNode *N);
562 SDValue PromoteFloatRes_LOAD(SDNode *N);
563 SDValue PromoteFloatRes_SELECT(SDNode *N);
564 SDValue PromoteFloatRes_SELECT_CC(SDNode *N);
565 SDValue PromoteFloatRes_UnaryOp(SDNode *N);
566 SDValue PromoteFloatRes_UNDEF(SDNode *N);
567 SDValue PromoteFloatRes_XINT_TO_FP(SDNode *N);
569 bool PromoteFloatOperand(SDNode *N, unsigned ResNo);
570 SDValue PromoteFloatOp_BITCAST(SDNode *N, unsigned OpNo);
571 SDValue PromoteFloatOp_FCOPYSIGN(SDNode *N, unsigned OpNo);
572 SDValue PromoteFloatOp_FP_EXTEND(SDNode *N, unsigned OpNo);
573 SDValue PromoteFloatOp_FP_TO_XINT(SDNode *N, unsigned OpNo);
574 SDValue PromoteFloatOp_STORE(SDNode *N, unsigned OpNo);
575 SDValue PromoteFloatOp_SELECT_CC(SDNode *N, unsigned OpNo);
576 SDValue PromoteFloatOp_SETCC(SDNode *N, unsigned OpNo);
578 //===--------------------------------------------------------------------===//
579 // Scalarization Support: LegalizeVectorTypes.cpp
580 //===--------------------------------------------------------------------===//
582 /// Given a processed one-element vector Op which was scalarized to its
583 /// element type, this returns the element. For example, if Op is a v1i32,
584 /// Op = < i32 val >, this method returns val, an i32.
585 SDValue GetScalarizedVector(SDValue Op) {
586 SDValue &ScalarizedOp = ScalarizedVectors[Op];
587 RemapValue(ScalarizedOp);
588 assert(ScalarizedOp.getNode() && "Operand wasn't scalarized?");
591 void SetScalarizedVector(SDValue Op, SDValue Result);
593 // Vector Result Scalarization: <1 x ty> -> ty.
594 void ScalarizeVectorResult(SDNode *N, unsigned OpNo);
595 SDValue ScalarizeVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo);
596 SDValue ScalarizeVecRes_BinOp(SDNode *N);
597 SDValue ScalarizeVecRes_TernaryOp(SDNode *N);
598 SDValue ScalarizeVecRes_UnaryOp(SDNode *N);
599 SDValue ScalarizeVecRes_InregOp(SDNode *N);
601 SDValue ScalarizeVecRes_BITCAST(SDNode *N);
602 SDValue ScalarizeVecRes_BUILD_VECTOR(SDNode *N);
603 SDValue ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N);
604 SDValue ScalarizeVecRes_FP_ROUND(SDNode *N);
605 SDValue ScalarizeVecRes_FPOWI(SDNode *N);
606 SDValue ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N);
607 SDValue ScalarizeVecRes_LOAD(LoadSDNode *N);
608 SDValue ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N);
609 SDValue ScalarizeVecRes_VSELECT(SDNode *N);
610 SDValue ScalarizeVecRes_SELECT(SDNode *N);
611 SDValue ScalarizeVecRes_SELECT_CC(SDNode *N);
612 SDValue ScalarizeVecRes_SETCC(SDNode *N);
613 SDValue ScalarizeVecRes_UNDEF(SDNode *N);
614 SDValue ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N);
615 SDValue ScalarizeVecRes_VSETCC(SDNode *N);
617 // Vector Operand Scalarization: <1 x ty> -> ty.
618 bool ScalarizeVectorOperand(SDNode *N, unsigned OpNo);
619 SDValue ScalarizeVecOp_BITCAST(SDNode *N);
620 SDValue ScalarizeVecOp_UnaryOp(SDNode *N);
621 SDValue ScalarizeVecOp_CONCAT_VECTORS(SDNode *N);
622 SDValue ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
623 SDValue ScalarizeVecOp_VSELECT(SDNode *N);
624 SDValue ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo);
625 SDValue ScalarizeVecOp_FP_ROUND(SDNode *N, unsigned OpNo);
627 //===--------------------------------------------------------------------===//
628 // Vector Splitting Support: LegalizeVectorTypes.cpp
629 //===--------------------------------------------------------------------===//
631 /// Given a processed vector Op which was split into vectors of half the size,
632 /// this method returns the halves. The first elements of Op coincide with the
633 /// elements of Lo; the remaining elements of Op coincide with the elements of
634 /// Hi: Op is what you would get by concatenating Lo and Hi.
635 /// For example, if Op is a v8i32 that was split into two v4i32's, then this
636 /// method returns the two v4i32's, with Lo corresponding to the first 4
637 /// elements of Op, and Hi to the last 4 elements.
638 void GetSplitVector(SDValue Op, SDValue &Lo, SDValue &Hi);
639 void SetSplitVector(SDValue Op, SDValue Lo, SDValue Hi);
641 // Vector Result Splitting: <128 x ty> -> 2 x <64 x ty>.
642 void SplitVectorResult(SDNode *N, unsigned OpNo);
643 void SplitVecRes_BinOp(SDNode *N, SDValue &Lo, SDValue &Hi);
644 void SplitVecRes_TernaryOp(SDNode *N, SDValue &Lo, SDValue &Hi);
645 void SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo, SDValue &Hi);
646 void SplitVecRes_ExtendOp(SDNode *N, SDValue &Lo, SDValue &Hi);
647 void SplitVecRes_InregOp(SDNode *N, SDValue &Lo, SDValue &Hi);
648 void SplitVecRes_ExtVecInRegOp(SDNode *N, SDValue &Lo, SDValue &Hi);
650 void SplitVecRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi);
651 void SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
652 void SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo, SDValue &Hi);
653 void SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
654 void SplitVecRes_INSERT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
655 void SplitVecRes_FPOWI(SDNode *N, SDValue &Lo, SDValue &Hi);
656 void SplitVecRes_FCOPYSIGN(SDNode *N, SDValue &Lo, SDValue &Hi);
657 void SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi);
658 void SplitVecRes_LOAD(LoadSDNode *N, SDValue &Lo, SDValue &Hi);
659 void SplitVecRes_MLOAD(MaskedLoadSDNode *N, SDValue &Lo, SDValue &Hi);
660 void SplitVecRes_MGATHER(MaskedGatherSDNode *N, SDValue &Lo, SDValue &Hi);
661 void SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi);
662 void SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi);
663 void SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N, SDValue &Lo,
666 // Vector Operand Splitting: <128 x ty> -> 2 x <64 x ty>.
667 bool SplitVectorOperand(SDNode *N, unsigned OpNo);
668 SDValue SplitVecOp_VSELECT(SDNode *N, unsigned OpNo);
669 SDValue SplitVecOp_UnaryOp(SDNode *N);
670 SDValue SplitVecOp_TruncateHelper(SDNode *N);
672 SDValue SplitVecOp_BITCAST(SDNode *N);
673 SDValue SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N);
674 SDValue SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
675 SDValue SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo);
676 SDValue SplitVecOp_MSTORE(MaskedStoreSDNode *N, unsigned OpNo);
677 SDValue SplitVecOp_MSCATTER(MaskedScatterSDNode *N, unsigned OpNo);
678 SDValue SplitVecOp_MGATHER(MaskedGatherSDNode *N, unsigned OpNo);
679 SDValue SplitVecOp_CONCAT_VECTORS(SDNode *N);
680 SDValue SplitVecOp_VSETCC(SDNode *N);
681 SDValue SplitVecOp_FP_ROUND(SDNode *N);
682 SDValue SplitVecOp_FCOPYSIGN(SDNode *N);
684 //===--------------------------------------------------------------------===//
685 // Vector Widening Support: LegalizeVectorTypes.cpp
686 //===--------------------------------------------------------------------===//
688 /// Given a processed vector Op which was widened into a larger vector, this
689 /// method returns the larger vector. The elements of the returned vector
690 /// consist of the elements of Op followed by elements containing rubbish.
691 /// For example, if Op is a v2i32 that was widened to a v4i32, then this
692 /// method returns a v4i32 for which the first two elements are the same as
693 /// those of Op, while the last two elements contain rubbish.
694 SDValue GetWidenedVector(SDValue Op) {
695 SDValue &WidenedOp = WidenedVectors[Op];
696 RemapValue(WidenedOp);
697 assert(WidenedOp.getNode() && "Operand wasn't widened?");
700 void SetWidenedVector(SDValue Op, SDValue Result);
702 // Widen Vector Result Promotion.
703 void WidenVectorResult(SDNode *N, unsigned ResNo);
704 SDValue WidenVecRes_MERGE_VALUES(SDNode* N, unsigned ResNo);
705 SDValue WidenVecRes_BITCAST(SDNode* N);
706 SDValue WidenVecRes_BUILD_VECTOR(SDNode* N);
707 SDValue WidenVecRes_CONCAT_VECTORS(SDNode* N);
708 SDValue WidenVecRes_EXTEND_VECTOR_INREG(SDNode* N);
709 SDValue WidenVecRes_EXTRACT_SUBVECTOR(SDNode* N);
710 SDValue WidenVecRes_INSERT_VECTOR_ELT(SDNode* N);
711 SDValue WidenVecRes_LOAD(SDNode* N);
712 SDValue WidenVecRes_MLOAD(MaskedLoadSDNode* N);
713 SDValue WidenVecRes_MGATHER(MaskedGatherSDNode* N);
714 SDValue WidenVecRes_SCALAR_TO_VECTOR(SDNode* N);
715 SDValue WidenVecRes_SELECT(SDNode* N);
716 SDValue WidenVecRes_SELECT_CC(SDNode* N);
717 SDValue WidenVecRes_SETCC(SDNode* N);
718 SDValue WidenVecRes_UNDEF(SDNode *N);
719 SDValue WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N);
720 SDValue WidenVecRes_VSETCC(SDNode* N);
722 SDValue WidenVecRes_Ternary(SDNode *N);
723 SDValue WidenVecRes_Binary(SDNode *N);
724 SDValue WidenVecRes_BinaryCanTrap(SDNode *N);
725 SDValue WidenVecRes_Convert(SDNode *N);
726 SDValue WidenVecRes_FCOPYSIGN(SDNode *N);
727 SDValue WidenVecRes_POWI(SDNode *N);
728 SDValue WidenVecRes_Shift(SDNode *N);
729 SDValue WidenVecRes_Unary(SDNode *N);
730 SDValue WidenVecRes_InregOp(SDNode *N);
732 // Widen Vector Operand.
733 bool WidenVectorOperand(SDNode *N, unsigned OpNo);
734 SDValue WidenVecOp_BITCAST(SDNode *N);
735 SDValue WidenVecOp_CONCAT_VECTORS(SDNode *N);
736 SDValue WidenVecOp_EXTEND(SDNode *N);
737 SDValue WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N);
738 SDValue WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N);
739 SDValue WidenVecOp_STORE(SDNode* N);
740 SDValue WidenVecOp_MSTORE(SDNode* N, unsigned OpNo);
741 SDValue WidenVecOp_MSCATTER(SDNode* N, unsigned OpNo);
742 SDValue WidenVecOp_SETCC(SDNode* N);
744 SDValue WidenVecOp_Convert(SDNode *N);
745 SDValue WidenVecOp_FCOPYSIGN(SDNode *N);
747 //===--------------------------------------------------------------------===//
748 // Vector Widening Utilities Support: LegalizeVectorTypes.cpp
749 //===--------------------------------------------------------------------===//
751 /// Helper function to generate a set of loads to load a vector with a
752 /// resulting wider type. It takes:
753 /// LdChain: list of chains for the load to be generated.
754 /// Ld: load to widen
755 SDValue GenWidenVectorLoads(SmallVectorImpl<SDValue> &LdChain,
758 /// Helper function to generate a set of extension loads to load a vector with
759 /// a resulting wider type. It takes:
760 /// LdChain: list of chains for the load to be generated.
761 /// Ld: load to widen
762 /// ExtType: extension element type
763 SDValue GenWidenVectorExtLoads(SmallVectorImpl<SDValue> &LdChain,
764 LoadSDNode *LD, ISD::LoadExtType ExtType);
766 /// Helper function to generate a set of stores to store a widen vector into
767 /// non-widen memory.
768 /// StChain: list of chains for the stores we have generated
769 /// ST: store of a widen value
770 void GenWidenVectorStores(SmallVectorImpl<SDValue> &StChain, StoreSDNode *ST);
772 /// Helper function to generate a set of stores to store a truncate widen
773 /// vector into non-widen memory.
774 /// StChain: list of chains for the stores we have generated
775 /// ST: store of a widen value
776 void GenWidenVectorTruncStores(SmallVectorImpl<SDValue> &StChain,
779 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
780 /// input vector must have the same element type as NVT.
781 /// When FillWithZeroes is "on" the vector will be widened with zeroes.
782 /// By default, the vector will be widened with undefined values.
783 SDValue ModifyToType(SDValue InOp, EVT NVT, bool FillWithZeroes = false);
785 //===--------------------------------------------------------------------===//
786 // Generic Splitting: LegalizeTypesGeneric.cpp
787 //===--------------------------------------------------------------------===//
789 // Legalization methods which only use that the illegal type is split into two
790 // not necessarily identical types. As such they can be used for splitting
791 // vectors and expanding integers and floats.
793 void GetSplitOp(SDValue Op, SDValue &Lo, SDValue &Hi) {
794 if (Op.getValueType().isVector())
795 GetSplitVector(Op, Lo, Hi);
796 else if (Op.getValueType().isInteger())
797 GetExpandedInteger(Op, Lo, Hi);
799 GetExpandedFloat(Op, Lo, Hi);
802 /// Use ISD::EXTRACT_ELEMENT nodes to extract the low and high parts of the
804 void GetPairElements(SDValue Pair, SDValue &Lo, SDValue &Hi);
806 // Generic Result Splitting.
807 void SplitRes_MERGE_VALUES(SDNode *N, unsigned ResNo,
808 SDValue &Lo, SDValue &Hi);
809 void SplitRes_SELECT (SDNode *N, SDValue &Lo, SDValue &Hi);
810 void SplitRes_SELECT_CC (SDNode *N, SDValue &Lo, SDValue &Hi);
811 void SplitRes_UNDEF (SDNode *N, SDValue &Lo, SDValue &Hi);
813 //===--------------------------------------------------------------------===//
814 // Generic Expansion: LegalizeTypesGeneric.cpp
815 //===--------------------------------------------------------------------===//
817 // Legalization methods which only use that the illegal type is split into two
818 // identical types of half the size, and that the Lo/Hi part is stored first
819 // in memory on little/big-endian machines, followed by the Hi/Lo part. As
820 // such they can be used for expanding integers and floats.
822 void GetExpandedOp(SDValue Op, SDValue &Lo, SDValue &Hi) {
823 if (Op.getValueType().isInteger())
824 GetExpandedInteger(Op, Lo, Hi);
826 GetExpandedFloat(Op, Lo, Hi);
830 /// This function will split the integer \p Op into \p NumElements
831 /// operations of type \p EltVT and store them in \p Ops.
832 void IntegerToVector(SDValue Op, unsigned NumElements,
833 SmallVectorImpl<SDValue> &Ops, EVT EltVT);
835 // Generic Result Expansion.
836 void ExpandRes_MERGE_VALUES (SDNode *N, unsigned ResNo,
837 SDValue &Lo, SDValue &Hi);
838 void ExpandRes_BITCAST (SDNode *N, SDValue &Lo, SDValue &Hi);
839 void ExpandRes_BUILD_PAIR (SDNode *N, SDValue &Lo, SDValue &Hi);
840 void ExpandRes_EXTRACT_ELEMENT (SDNode *N, SDValue &Lo, SDValue &Hi);
841 void ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi);
842 void ExpandRes_NormalLoad (SDNode *N, SDValue &Lo, SDValue &Hi);
843 void ExpandRes_VAARG (SDNode *N, SDValue &Lo, SDValue &Hi);
845 // Generic Operand Expansion.
846 SDValue ExpandOp_BITCAST (SDNode *N);
847 SDValue ExpandOp_BUILD_VECTOR (SDNode *N);
848 SDValue ExpandOp_EXTRACT_ELEMENT (SDNode *N);
849 SDValue ExpandOp_INSERT_VECTOR_ELT(SDNode *N);
850 SDValue ExpandOp_SCALAR_TO_VECTOR (SDNode *N);
851 SDValue ExpandOp_NormalStore (SDNode *N, unsigned OpNo);
854 } // end namespace llvm.