1 //==- AArch64RegisterInfo.h - AArch64 Register Information Impl --*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the AArch64 implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64REGISTERINFO_H
15 #define LLVM_LIB_TARGET_AARCH64_AARCH64REGISTERINFO_H
17 #define GET_REGINFO_HEADER
18 #include "AArch64GenRegisterInfo.inc"
22 class MachineFunction;
24 class TargetRegisterClass;
27 class AArch64RegisterInfo final : public AArch64GenRegisterInfo {
31 AArch64RegisterInfo(const Triple &TT);
33 bool isReservedReg(const MachineFunction &MF, unsigned Reg) const;
35 /// Code Generation virtual methods...
36 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
38 getCalleeSavedRegsViaCopy(const MachineFunction *MF) const;
39 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
40 CallingConv::ID) const override;
42 unsigned getCSRFirstUseCost() const override {
43 // The cost will be compared against BlockFrequency where entry has the
44 // value of 1 << 14. A value of 5 will choose to spill or split really
45 // cold path instead of using a callee-saved register.
49 const TargetRegisterClass *
50 getSubClassWithSubReg(const TargetRegisterClass *RC,
51 unsigned Idx) const override;
53 // Calls involved in thread-local variable lookup save more registers than
54 // normal calls, so they need a different mask to represent this.
55 const uint32_t *getTLSCallPreservedMask() const;
57 /// getThisReturnPreservedMask - Returns a call preserved mask specific to the
58 /// case that 'returned' is on an i64 first argument if the calling convention
59 /// is one that can (partially) model this attribute with a preserved mask
60 /// (i.e. it is a calling convention that uses the same register for the first
61 /// i64 argument and an i64 return value)
63 /// Should return NULL in the case that the calling convention does not have
65 const uint32_t *getThisReturnPreservedMask(const MachineFunction &MF,
66 CallingConv::ID) const;
68 /// Stack probing calls preserve different CSRs to the normal CC.
69 const uint32_t *getWindowsStackProbePreservedMask() const;
71 BitVector getReservedRegs(const MachineFunction &MF) const override;
72 bool isConstantPhysReg(unsigned PhysReg) const override;
73 const TargetRegisterClass *
74 getPointerRegClass(const MachineFunction &MF,
75 unsigned Kind = 0) const override;
76 const TargetRegisterClass *
77 getCrossCopyRegClass(const TargetRegisterClass *RC) const override;
79 bool enableMultipleCopyHints() const override { return true; }
81 bool requiresRegisterScavenging(const MachineFunction &MF) const override;
82 bool useFPForScavengingIndex(const MachineFunction &MF) const override;
83 bool requiresFrameIndexScavenging(const MachineFunction &MF) const override;
85 bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override;
86 bool isFrameOffsetLegal(const MachineInstr *MI, unsigned BaseReg,
87 int64_t Offset) const override;
88 void materializeFrameBaseRegister(MachineBasicBlock *MBB, unsigned BaseReg,
90 int64_t Offset) const override;
91 void resolveFrameIndex(MachineInstr &MI, unsigned BaseReg,
92 int64_t Offset) const override;
93 void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
94 unsigned FIOperandNum,
95 RegScavenger *RS = nullptr) const override;
96 bool cannotEliminateFrame(const MachineFunction &MF) const;
98 bool requiresVirtualBaseRegisters(const MachineFunction &MF) const override;
99 bool hasBasePointer(const MachineFunction &MF) const;
100 unsigned getBaseRegister() const;
102 // Debug information queries.
103 unsigned getFrameRegister(const MachineFunction &MF) const override;
105 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
106 MachineFunction &MF) const override;
108 bool trackLivenessAfterRegAlloc(const MachineFunction&) const override {
113 } // end namespace llvm