1 //=- AArch64SVEInstrInfo.td - AArch64 SVE Instructions -*- tablegen -*-----=//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // AArch64 Scalable Vector Extension (SVE) Instruction definitions.
12 //===----------------------------------------------------------------------===//
14 let Predicates = [HasSVE] in {
16 def RDFFR_PPz : sve_int_rdffr_pred<0b0, "rdffr">;
17 def RDFFRS_PPz : sve_int_rdffr_pred<0b1, "rdffrs">;
18 def RDFFR_P : sve_int_rdffr_unpred<"rdffr">;
19 def SETFFR : sve_int_setffr<"setffr">;
20 def WRFFR : sve_int_wrffr<"wrffr">;
22 defm ADD_ZZZ : sve_int_bin_cons_arit_0<0b000, "add">;
23 defm SUB_ZZZ : sve_int_bin_cons_arit_0<0b001, "sub">;
24 defm SQADD_ZZZ : sve_int_bin_cons_arit_0<0b100, "sqadd">;
25 defm UQADD_ZZZ : sve_int_bin_cons_arit_0<0b101, "uqadd">;
26 defm SQSUB_ZZZ : sve_int_bin_cons_arit_0<0b110, "sqsub">;
27 defm UQSUB_ZZZ : sve_int_bin_cons_arit_0<0b111, "uqsub">;
29 def AND_ZZZ : sve_int_bin_cons_log<0b00, "and">;
30 def ORR_ZZZ : sve_int_bin_cons_log<0b01, "orr">;
31 def EOR_ZZZ : sve_int_bin_cons_log<0b10, "eor">;
32 def BIC_ZZZ : sve_int_bin_cons_log<0b11, "bic">;
34 defm ADD_ZPmZ : sve_int_bin_pred_arit_0<0b000, "add">;
35 defm SUB_ZPmZ : sve_int_bin_pred_arit_0<0b001, "sub">;
36 defm SUBR_ZPmZ : sve_int_bin_pred_arit_0<0b011, "subr">;
38 defm ORR_ZPmZ : sve_int_bin_pred_log<0b000, "orr">;
39 defm EOR_ZPmZ : sve_int_bin_pred_log<0b001, "eor">;
40 defm AND_ZPmZ : sve_int_bin_pred_log<0b010, "and">;
41 defm BIC_ZPmZ : sve_int_bin_pred_log<0b011, "bic">;
43 defm ADD_ZI : sve_int_arith_imm0<0b000, "add">;
44 defm SUB_ZI : sve_int_arith_imm0<0b001, "sub">;
45 defm SUBR_ZI : sve_int_arith_imm0<0b011, "subr">;
46 defm SQADD_ZI : sve_int_arith_imm0<0b100, "sqadd">;
47 defm UQADD_ZI : sve_int_arith_imm0<0b101, "uqadd">;
48 defm SQSUB_ZI : sve_int_arith_imm0<0b110, "sqsub">;
49 defm UQSUB_ZI : sve_int_arith_imm0<0b111, "uqsub">;
51 defm MAD_ZPmZZ : sve_int_mladdsub_vvv_pred<0b0, "mad">;
52 defm MSB_ZPmZZ : sve_int_mladdsub_vvv_pred<0b1, "msb">;
53 defm MLA_ZPmZZ : sve_int_mlas_vvv_pred<0b0, "mla">;
54 defm MLS_ZPmZZ : sve_int_mlas_vvv_pred<0b1, "mls">;
56 // SVE predicated integer reductions.
57 defm SADDV_VPZ : sve_int_reduce_0_saddv<0b000, "saddv">;
58 defm UADDV_VPZ : sve_int_reduce_0_uaddv<0b001, "uaddv">;
59 defm SMAXV_VPZ : sve_int_reduce_1<0b000, "smaxv">;
60 defm UMAXV_VPZ : sve_int_reduce_1<0b001, "umaxv">;
61 defm SMINV_VPZ : sve_int_reduce_1<0b010, "sminv">;
62 defm UMINV_VPZ : sve_int_reduce_1<0b011, "uminv">;
63 defm ORV_VPZ : sve_int_reduce_2<0b000, "orv">;
64 defm EORV_VPZ : sve_int_reduce_2<0b001, "eorv">;
65 defm ANDV_VPZ : sve_int_reduce_2<0b010, "andv">;
67 defm ORR_ZI : sve_int_log_imm<0b00, "orr", "orn">;
68 defm EOR_ZI : sve_int_log_imm<0b01, "eor", "eon">;
69 defm AND_ZI : sve_int_log_imm<0b10, "and", "bic">;
71 defm SMAX_ZI : sve_int_arith_imm1<0b00, "smax", simm8>;
72 defm SMIN_ZI : sve_int_arith_imm1<0b10, "smin", simm8>;
73 defm UMAX_ZI : sve_int_arith_imm1<0b01, "umax", imm0_255>;
74 defm UMIN_ZI : sve_int_arith_imm1<0b11, "umin", imm0_255>;
76 defm MUL_ZI : sve_int_arith_imm2<"mul">;
77 defm MUL_ZPmZ : sve_int_bin_pred_arit_2<0b000, "mul">;
78 defm SMULH_ZPmZ : sve_int_bin_pred_arit_2<0b010, "smulh">;
79 defm UMULH_ZPmZ : sve_int_bin_pred_arit_2<0b011, "umulh">;
81 defm SDIV_ZPmZ : sve_int_bin_pred_arit_2_div<0b100, "sdiv">;
82 defm UDIV_ZPmZ : sve_int_bin_pred_arit_2_div<0b101, "udiv">;
83 defm SDIVR_ZPmZ : sve_int_bin_pred_arit_2_div<0b110, "sdivr">;
84 defm UDIVR_ZPmZ : sve_int_bin_pred_arit_2_div<0b111, "udivr">;
86 defm SDOT_ZZZ : sve_intx_dot<0b0, "sdot">;
87 defm UDOT_ZZZ : sve_intx_dot<0b1, "udot">;
89 defm SDOT_ZZZI : sve_intx_dot_by_indexed_elem<0b0, "sdot">;
90 defm UDOT_ZZZI : sve_intx_dot_by_indexed_elem<0b1, "udot">;
92 defm SXTB_ZPmZ : sve_int_un_pred_arit_0_h<0b000, "sxtb">;
93 defm UXTB_ZPmZ : sve_int_un_pred_arit_0_h<0b001, "uxtb">;
94 defm SXTH_ZPmZ : sve_int_un_pred_arit_0_w<0b010, "sxth">;
95 defm UXTH_ZPmZ : sve_int_un_pred_arit_0_w<0b011, "uxth">;
96 defm SXTW_ZPmZ : sve_int_un_pred_arit_0_d<0b100, "sxtw">;
97 defm UXTW_ZPmZ : sve_int_un_pred_arit_0_d<0b101, "uxtw">;
98 defm ABS_ZPmZ : sve_int_un_pred_arit_0< 0b110, "abs">;
99 defm NEG_ZPmZ : sve_int_un_pred_arit_0< 0b111, "neg">;
101 defm CLS_ZPmZ : sve_int_un_pred_arit_1< 0b000, "cls">;
102 defm CLZ_ZPmZ : sve_int_un_pred_arit_1< 0b001, "clz">;
103 defm CNT_ZPmZ : sve_int_un_pred_arit_1< 0b010, "cnt">;
104 defm CNOT_ZPmZ : sve_int_un_pred_arit_1< 0b011, "cnot">;
105 defm NOT_ZPmZ : sve_int_un_pred_arit_1< 0b110, "not">;
106 defm FABS_ZPmZ : sve_int_un_pred_arit_1_fp<0b100, "fabs">;
107 defm FNEG_ZPmZ : sve_int_un_pred_arit_1_fp<0b101, "fneg">;
109 defm SMAX_ZPmZ : sve_int_bin_pred_arit_1<0b000, "smax">;
110 defm UMAX_ZPmZ : sve_int_bin_pred_arit_1<0b001, "umax">;
111 defm SMIN_ZPmZ : sve_int_bin_pred_arit_1<0b010, "smin">;
112 defm UMIN_ZPmZ : sve_int_bin_pred_arit_1<0b011, "umin">;
113 defm SABD_ZPmZ : sve_int_bin_pred_arit_1<0b100, "sabd">;
114 defm UABD_ZPmZ : sve_int_bin_pred_arit_1<0b101, "uabd">;
116 defm FRECPE_ZZ : sve_fp_2op_u_zd<0b110, "frecpe">;
117 defm FRSQRTE_ZZ : sve_fp_2op_u_zd<0b111, "frsqrte">;
119 defm FADD_ZPmI : sve_fp_2op_i_p_zds<0b000, "fadd", sve_fpimm_half_one>;
120 defm FSUB_ZPmI : sve_fp_2op_i_p_zds<0b001, "fsub", sve_fpimm_half_one>;
121 defm FMUL_ZPmI : sve_fp_2op_i_p_zds<0b010, "fmul", sve_fpimm_half_two>;
122 defm FSUBR_ZPmI : sve_fp_2op_i_p_zds<0b011, "fsubr", sve_fpimm_half_one>;
123 defm FMAXNM_ZPmI : sve_fp_2op_i_p_zds<0b100, "fmaxnm", sve_fpimm_zero_one>;
124 defm FMINNM_ZPmI : sve_fp_2op_i_p_zds<0b101, "fminnm", sve_fpimm_zero_one>;
125 defm FMAX_ZPmI : sve_fp_2op_i_p_zds<0b110, "fmax", sve_fpimm_zero_one>;
126 defm FMIN_ZPmI : sve_fp_2op_i_p_zds<0b111, "fmin", sve_fpimm_zero_one>;
128 defm FADD_ZPmZ : sve_fp_2op_p_zds<0b0000, "fadd">;
129 defm FSUB_ZPmZ : sve_fp_2op_p_zds<0b0001, "fsub">;
130 defm FMUL_ZPmZ : sve_fp_2op_p_zds<0b0010, "fmul">;
131 defm FSUBR_ZPmZ : sve_fp_2op_p_zds<0b0011, "fsubr">;
132 defm FMAXNM_ZPmZ : sve_fp_2op_p_zds<0b0100, "fmaxnm">;
133 defm FMINNM_ZPmZ : sve_fp_2op_p_zds<0b0101, "fminnm">;
134 defm FMAX_ZPmZ : sve_fp_2op_p_zds<0b0110, "fmax">;
135 defm FMIN_ZPmZ : sve_fp_2op_p_zds<0b0111, "fmin">;
136 defm FABD_ZPmZ : sve_fp_2op_p_zds<0b1000, "fabd">;
137 defm FSCALE_ZPmZ : sve_fp_2op_p_zds<0b1001, "fscale">;
138 defm FMULX_ZPmZ : sve_fp_2op_p_zds<0b1010, "fmulx">;
139 defm FDIVR_ZPmZ : sve_fp_2op_p_zds<0b1100, "fdivr">;
140 defm FDIV_ZPmZ : sve_fp_2op_p_zds<0b1101, "fdiv">;
142 defm FADD_ZZZ : sve_fp_3op_u_zd<0b000, "fadd">;
143 defm FSUB_ZZZ : sve_fp_3op_u_zd<0b001, "fsub">;
144 defm FMUL_ZZZ : sve_fp_3op_u_zd<0b010, "fmul">;
145 defm FTSMUL_ZZZ : sve_fp_3op_u_zd<0b011, "ftsmul">;
146 defm FRECPS_ZZZ : sve_fp_3op_u_zd<0b110, "frecps">;
147 defm FRSQRTS_ZZZ : sve_fp_3op_u_zd<0b111, "frsqrts">;
149 defm FTSSEL_ZZZ : sve_int_bin_cons_misc_0_b<"ftssel">;
151 defm FCADD_ZPmZ : sve_fp_fcadd<"fcadd">;
152 defm FCMLA_ZPmZZ : sve_fp_fcmla<"fcmla">;
154 defm FMLA_ZPmZZ : sve_fp_3op_p_zds_a<0b00, "fmla">;
155 defm FMLS_ZPmZZ : sve_fp_3op_p_zds_a<0b01, "fmls">;
156 defm FNMLA_ZPmZZ : sve_fp_3op_p_zds_a<0b10, "fnmla">;
157 defm FNMLS_ZPmZZ : sve_fp_3op_p_zds_a<0b11, "fnmls">;
159 defm FMAD_ZPmZZ : sve_fp_3op_p_zds_b<0b00, "fmad">;
160 defm FMSB_ZPmZZ : sve_fp_3op_p_zds_b<0b01, "fmsb">;
161 defm FNMAD_ZPmZZ : sve_fp_3op_p_zds_b<0b10, "fnmad">;
162 defm FNMSB_ZPmZZ : sve_fp_3op_p_zds_b<0b11, "fnmsb">;
164 defm FTMAD_ZZI : sve_fp_ftmad<"ftmad">;
166 defm FMLA_ZZZI : sve_fp_fma_by_indexed_elem<0b0, "fmla">;
167 defm FMLS_ZZZI : sve_fp_fma_by_indexed_elem<0b1, "fmls">;
169 defm FCMLA_ZZZI : sve_fp_fcmla_by_indexed_elem<"fcmla">;
170 defm FMUL_ZZZI : sve_fp_fmul_by_indexed_elem<"fmul">;
172 // SVE floating point reductions.
173 defm FADDA_VPZ : sve_fp_2op_p_vd<0b000, "fadda">;
174 defm FADDV_VPZ : sve_fp_fast_red<0b000, "faddv">;
175 defm FMAXNMV_VPZ : sve_fp_fast_red<0b100, "fmaxnmv">;
176 defm FMINNMV_VPZ : sve_fp_fast_red<0b101, "fminnmv">;
177 defm FMAXV_VPZ : sve_fp_fast_red<0b110, "fmaxv">;
178 defm FMINV_VPZ : sve_fp_fast_red<0b111, "fminv">;
180 // Splat immediate (unpredicated)
181 defm DUP_ZI : sve_int_dup_imm<"dup">;
182 defm FDUP_ZI : sve_int_dup_fpimm<"fdup">;
183 defm DUPM_ZI : sve_int_dup_mask_imm<"dupm">;
185 // Splat immediate (predicated)
186 defm CPY_ZPmI : sve_int_dup_imm_pred_merge<"cpy">;
187 defm CPY_ZPzI : sve_int_dup_imm_pred_zero<"cpy">;
188 defm FCPY_ZPmI : sve_int_dup_fpimm_pred<"fcpy">;
190 // Splat scalar register (unpredicated, GPR or vector + element index)
191 defm DUP_ZR : sve_int_perm_dup_r<"dup">;
192 defm DUP_ZZI : sve_int_perm_dup_i<"dup">;
194 // Splat scalar register (predicated)
195 defm CPY_ZPmR : sve_int_perm_cpy_r<"cpy">;
196 defm CPY_ZPmV : sve_int_perm_cpy_v<"cpy">;
198 // Select elements from either vector (predicated)
199 defm SEL_ZPZZ : sve_int_sel_vvv<"sel">;
201 defm SPLICE_ZPZ : sve_int_perm_splice<"splice">;
202 defm COMPACT_ZPZ : sve_int_perm_compact<"compact">;
203 defm INSR_ZR : sve_int_perm_insrs<"insr">;
204 defm INSR_ZV : sve_int_perm_insrv<"insr">;
205 def EXT_ZZI : sve_int_perm_extract_i<"ext">;
207 defm RBIT_ZPmZ : sve_int_perm_rev_rbit<"rbit">;
208 defm REVB_ZPmZ : sve_int_perm_rev_revb<"revb">;
209 defm REVH_ZPmZ : sve_int_perm_rev_revh<"revh">;
210 defm REVW_ZPmZ : sve_int_perm_rev_revw<"revw">;
212 defm REV_PP : sve_int_perm_reverse_p<"rev">;
213 defm REV_ZZ : sve_int_perm_reverse_z<"rev">;
215 defm SUNPKLO_ZZ : sve_int_perm_unpk<0b00, "sunpklo">;
216 defm SUNPKHI_ZZ : sve_int_perm_unpk<0b01, "sunpkhi">;
217 defm UUNPKLO_ZZ : sve_int_perm_unpk<0b10, "uunpklo">;
218 defm UUNPKHI_ZZ : sve_int_perm_unpk<0b11, "uunpkhi">;
220 def PUNPKLO_PP : sve_int_perm_punpk<0b0, "punpklo">;
221 def PUNPKHI_PP : sve_int_perm_punpk<0b1, "punpkhi">;
223 defm MOVPRFX_ZPzZ : sve_int_movprfx_pred_zero<0b000, "movprfx">;
224 defm MOVPRFX_ZPmZ : sve_int_movprfx_pred_merge<0b001, "movprfx">;
225 def MOVPRFX_ZZ : sve_int_bin_cons_misc_0_c<0b00000001, "movprfx", ZPRAny>;
226 def FEXPA_ZZ_H : sve_int_bin_cons_misc_0_c<0b01000000, "fexpa", ZPR16>;
227 def FEXPA_ZZ_S : sve_int_bin_cons_misc_0_c<0b10000000, "fexpa", ZPR32>;
228 def FEXPA_ZZ_D : sve_int_bin_cons_misc_0_c<0b11000000, "fexpa", ZPR64>;
230 def BRKPA_PPzPP : sve_int_brkp<0b00, "brkpa">;
231 def BRKPAS_PPzPP : sve_int_brkp<0b10, "brkpas">;
232 def BRKPB_PPzPP : sve_int_brkp<0b01, "brkpb">;
233 def BRKPBS_PPzPP : sve_int_brkp<0b11, "brkpbs">;
235 def BRKN_PPzP : sve_int_brkn<0b0, "brkn">;
236 def BRKNS_PPzP : sve_int_brkn<0b1, "brkns">;
238 defm BRKA_PPzP : sve_int_break_z<0b000, "brka">;
239 defm BRKA_PPmP : sve_int_break_m<0b001, "brka">;
240 defm BRKAS_PPzP : sve_int_break_z<0b010, "brkas">;
241 defm BRKB_PPzP : sve_int_break_z<0b100, "brkb">;
242 defm BRKB_PPmP : sve_int_break_m<0b101, "brkb">;
243 defm BRKBS_PPzP : sve_int_break_z<0b110, "brkbs">;
245 def PTEST_PP : sve_int_ptest<0b010000, "ptest">;
246 def PFALSE : sve_int_pfalse<0b000000, "pfalse">;
247 defm PFIRST : sve_int_pfirst<0b00000, "pfirst">;
248 defm PNEXT : sve_int_pnext<0b00110, "pnext">;
250 def AND_PPzPP : sve_int_pred_log<0b0000, "and">;
251 def BIC_PPzPP : sve_int_pred_log<0b0001, "bic">;
252 def EOR_PPzPP : sve_int_pred_log<0b0010, "eor">;
253 def SEL_PPPP : sve_int_pred_log<0b0011, "sel">;
254 def ANDS_PPzPP : sve_int_pred_log<0b0100, "ands">;
255 def BICS_PPzPP : sve_int_pred_log<0b0101, "bics">;
256 def EORS_PPzPP : sve_int_pred_log<0b0110, "eors">;
257 def ORR_PPzPP : sve_int_pred_log<0b1000, "orr">;
258 def ORN_PPzPP : sve_int_pred_log<0b1001, "orn">;
259 def NOR_PPzPP : sve_int_pred_log<0b1010, "nor">;
260 def NAND_PPzPP : sve_int_pred_log<0b1011, "nand">;
261 def ORRS_PPzPP : sve_int_pred_log<0b1100, "orrs">;
262 def ORNS_PPzPP : sve_int_pred_log<0b1101, "orns">;
263 def NORS_PPzPP : sve_int_pred_log<0b1110, "nors">;
264 def NANDS_PPzPP : sve_int_pred_log<0b1111, "nands">;
266 defm CLASTA_RPZ : sve_int_perm_clast_rz<0, "clasta">;
267 defm CLASTB_RPZ : sve_int_perm_clast_rz<1, "clastb">;
268 defm CLASTA_VPZ : sve_int_perm_clast_vz<0, "clasta">;
269 defm CLASTB_VPZ : sve_int_perm_clast_vz<1, "clastb">;
270 defm CLASTA_ZPZ : sve_int_perm_clast_zz<0, "clasta">;
271 defm CLASTB_ZPZ : sve_int_perm_clast_zz<1, "clastb">;
273 defm LASTA_RPZ : sve_int_perm_last_r<0, "lasta">;
274 defm LASTB_RPZ : sve_int_perm_last_r<1, "lastb">;
275 defm LASTA_VPZ : sve_int_perm_last_v<0, "lasta">;
276 defm LASTB_VPZ : sve_int_perm_last_v<1, "lastb">;
278 // continuous load with reg+immediate
279 defm LD1B_IMM : sve_mem_cld_si<0b0000, "ld1b", Z_b, ZPR8>;
280 defm LD1B_H_IMM : sve_mem_cld_si<0b0001, "ld1b", Z_h, ZPR16>;
281 defm LD1B_S_IMM : sve_mem_cld_si<0b0010, "ld1b", Z_s, ZPR32>;
282 defm LD1B_D_IMM : sve_mem_cld_si<0b0011, "ld1b", Z_d, ZPR64>;
283 defm LD1SW_D_IMM : sve_mem_cld_si<0b0100, "ld1sw", Z_d, ZPR64>;
284 defm LD1H_IMM : sve_mem_cld_si<0b0101, "ld1h", Z_h, ZPR16>;
285 defm LD1H_S_IMM : sve_mem_cld_si<0b0110, "ld1h", Z_s, ZPR32>;
286 defm LD1H_D_IMM : sve_mem_cld_si<0b0111, "ld1h", Z_d, ZPR64>;
287 defm LD1SH_D_IMM : sve_mem_cld_si<0b1000, "ld1sh", Z_d, ZPR64>;
288 defm LD1SH_S_IMM : sve_mem_cld_si<0b1001, "ld1sh", Z_s, ZPR32>;
289 defm LD1W_IMM : sve_mem_cld_si<0b1010, "ld1w", Z_s, ZPR32>;
290 defm LD1W_D_IMM : sve_mem_cld_si<0b1011, "ld1w", Z_d, ZPR64>;
291 defm LD1SB_D_IMM : sve_mem_cld_si<0b1100, "ld1sb", Z_d, ZPR64>;
292 defm LD1SB_S_IMM : sve_mem_cld_si<0b1101, "ld1sb", Z_s, ZPR32>;
293 defm LD1SB_H_IMM : sve_mem_cld_si<0b1110, "ld1sb", Z_h, ZPR16>;
294 defm LD1D_IMM : sve_mem_cld_si<0b1111, "ld1d", Z_d, ZPR64>;
296 // LD1R loads (splat scalar to vector)
297 defm LD1RB_IMM : sve_mem_ld_dup<0b00, 0b00, "ld1rb", Z_b, ZPR8, uimm6s1>;
298 defm LD1RB_H_IMM : sve_mem_ld_dup<0b00, 0b01, "ld1rb", Z_h, ZPR16, uimm6s1>;
299 defm LD1RB_S_IMM : sve_mem_ld_dup<0b00, 0b10, "ld1rb", Z_s, ZPR32, uimm6s1>;
300 defm LD1RB_D_IMM : sve_mem_ld_dup<0b00, 0b11, "ld1rb", Z_d, ZPR64, uimm6s1>;
301 defm LD1RSW_IMM : sve_mem_ld_dup<0b01, 0b00, "ld1rsw", Z_d, ZPR64, uimm6s4>;
302 defm LD1RH_IMM : sve_mem_ld_dup<0b01, 0b01, "ld1rh", Z_h, ZPR16, uimm6s2>;
303 defm LD1RH_S_IMM : sve_mem_ld_dup<0b01, 0b10, "ld1rh", Z_s, ZPR32, uimm6s2>;
304 defm LD1RH_D_IMM : sve_mem_ld_dup<0b01, 0b11, "ld1rh", Z_d, ZPR64, uimm6s2>;
305 defm LD1RSH_D_IMM : sve_mem_ld_dup<0b10, 0b00, "ld1rsh", Z_d, ZPR64, uimm6s2>;
306 defm LD1RSH_S_IMM : sve_mem_ld_dup<0b10, 0b01, "ld1rsh", Z_s, ZPR32, uimm6s2>;
307 defm LD1RW_IMM : sve_mem_ld_dup<0b10, 0b10, "ld1rw", Z_s, ZPR32, uimm6s4>;
308 defm LD1RW_D_IMM : sve_mem_ld_dup<0b10, 0b11, "ld1rw", Z_d, ZPR64, uimm6s4>;
309 defm LD1RSB_D_IMM : sve_mem_ld_dup<0b11, 0b00, "ld1rsb", Z_d, ZPR64, uimm6s1>;
310 defm LD1RSB_S_IMM : sve_mem_ld_dup<0b11, 0b01, "ld1rsb", Z_s, ZPR32, uimm6s1>;
311 defm LD1RSB_H_IMM : sve_mem_ld_dup<0b11, 0b10, "ld1rsb", Z_h, ZPR16, uimm6s1>;
312 defm LD1RD_IMM : sve_mem_ld_dup<0b11, 0b11, "ld1rd", Z_d, ZPR64, uimm6s8>;
314 // LD1RQ loads (load quadword-vector and splat to scalable vector)
315 defm LD1RQ_B_IMM : sve_mem_ldqr_si<0b00, "ld1rqb", Z_b, ZPR8>;
316 defm LD1RQ_H_IMM : sve_mem_ldqr_si<0b01, "ld1rqh", Z_h, ZPR16>;
317 defm LD1RQ_W_IMM : sve_mem_ldqr_si<0b10, "ld1rqw", Z_s, ZPR32>;
318 defm LD1RQ_D_IMM : sve_mem_ldqr_si<0b11, "ld1rqd", Z_d, ZPR64>;
319 defm LD1RQ_B : sve_mem_ldqr_ss<0b00, "ld1rqb", Z_b, ZPR8, GPR64NoXZRshifted8>;
320 defm LD1RQ_H : sve_mem_ldqr_ss<0b01, "ld1rqh", Z_h, ZPR16, GPR64NoXZRshifted16>;
321 defm LD1RQ_W : sve_mem_ldqr_ss<0b10, "ld1rqw", Z_s, ZPR32, GPR64NoXZRshifted32>;
322 defm LD1RQ_D : sve_mem_ldqr_ss<0b11, "ld1rqd", Z_d, ZPR64, GPR64NoXZRshifted64>;
324 // continuous load with reg+reg addressing.
325 defm LD1B : sve_mem_cld_ss<0b0000, "ld1b", Z_b, ZPR8, GPR64NoXZRshifted8>;
326 defm LD1B_H : sve_mem_cld_ss<0b0001, "ld1b", Z_h, ZPR16, GPR64NoXZRshifted8>;
327 defm LD1B_S : sve_mem_cld_ss<0b0010, "ld1b", Z_s, ZPR32, GPR64NoXZRshifted8>;
328 defm LD1B_D : sve_mem_cld_ss<0b0011, "ld1b", Z_d, ZPR64, GPR64NoXZRshifted8>;
329 defm LD1SW_D : sve_mem_cld_ss<0b0100, "ld1sw", Z_d, ZPR64, GPR64NoXZRshifted32>;
330 defm LD1H : sve_mem_cld_ss<0b0101, "ld1h", Z_h, ZPR16, GPR64NoXZRshifted16>;
331 defm LD1H_S : sve_mem_cld_ss<0b0110, "ld1h", Z_s, ZPR32, GPR64NoXZRshifted16>;
332 defm LD1H_D : sve_mem_cld_ss<0b0111, "ld1h", Z_d, ZPR64, GPR64NoXZRshifted16>;
333 defm LD1SH_D : sve_mem_cld_ss<0b1000, "ld1sh", Z_d, ZPR64, GPR64NoXZRshifted16>;
334 defm LD1SH_S : sve_mem_cld_ss<0b1001, "ld1sh", Z_s, ZPR32, GPR64NoXZRshifted16>;
335 defm LD1W : sve_mem_cld_ss<0b1010, "ld1w", Z_s, ZPR32, GPR64NoXZRshifted32>;
336 defm LD1W_D : sve_mem_cld_ss<0b1011, "ld1w", Z_d, ZPR64, GPR64NoXZRshifted32>;
337 defm LD1SB_D : sve_mem_cld_ss<0b1100, "ld1sb", Z_d, ZPR64, GPR64NoXZRshifted8>;
338 defm LD1SB_S : sve_mem_cld_ss<0b1101, "ld1sb", Z_s, ZPR32, GPR64NoXZRshifted8>;
339 defm LD1SB_H : sve_mem_cld_ss<0b1110, "ld1sb", Z_h, ZPR16, GPR64NoXZRshifted8>;
340 defm LD1D : sve_mem_cld_ss<0b1111, "ld1d", Z_d, ZPR64, GPR64NoXZRshifted64>;
342 // non-faulting continuous load with reg+immediate
343 defm LDNF1B_IMM : sve_mem_cldnf_si<0b0000, "ldnf1b", Z_b, ZPR8>;
344 defm LDNF1B_H_IMM : sve_mem_cldnf_si<0b0001, "ldnf1b", Z_h, ZPR16>;
345 defm LDNF1B_S_IMM : sve_mem_cldnf_si<0b0010, "ldnf1b", Z_s, ZPR32>;
346 defm LDNF1B_D_IMM : sve_mem_cldnf_si<0b0011, "ldnf1b", Z_d, ZPR64>;
347 defm LDNF1SW_D_IMM : sve_mem_cldnf_si<0b0100, "ldnf1sw", Z_d, ZPR64>;
348 defm LDNF1H_IMM : sve_mem_cldnf_si<0b0101, "ldnf1h", Z_h, ZPR16>;
349 defm LDNF1H_S_IMM : sve_mem_cldnf_si<0b0110, "ldnf1h", Z_s, ZPR32>;
350 defm LDNF1H_D_IMM : sve_mem_cldnf_si<0b0111, "ldnf1h", Z_d, ZPR64>;
351 defm LDNF1SH_D_IMM : sve_mem_cldnf_si<0b1000, "ldnf1sh", Z_d, ZPR64>;
352 defm LDNF1SH_S_IMM : sve_mem_cldnf_si<0b1001, "ldnf1sh", Z_s, ZPR32>;
353 defm LDNF1W_IMM : sve_mem_cldnf_si<0b1010, "ldnf1w", Z_s, ZPR32>;
354 defm LDNF1W_D_IMM : sve_mem_cldnf_si<0b1011, "ldnf1w", Z_d, ZPR64>;
355 defm LDNF1SB_D_IMM : sve_mem_cldnf_si<0b1100, "ldnf1sb", Z_d, ZPR64>;
356 defm LDNF1SB_S_IMM : sve_mem_cldnf_si<0b1101, "ldnf1sb", Z_s, ZPR32>;
357 defm LDNF1SB_H_IMM : sve_mem_cldnf_si<0b1110, "ldnf1sb", Z_h, ZPR16>;
358 defm LDNF1D_IMM : sve_mem_cldnf_si<0b1111, "ldnf1d", Z_d, ZPR64>;
360 // First-faulting loads with reg+reg addressing.
361 defm LDFF1B : sve_mem_cldff_ss<0b0000, "ldff1b", Z_b, ZPR8, GPR64shifted8>;
362 defm LDFF1B_H : sve_mem_cldff_ss<0b0001, "ldff1b", Z_h, ZPR16, GPR64shifted8>;
363 defm LDFF1B_S : sve_mem_cldff_ss<0b0010, "ldff1b", Z_s, ZPR32, GPR64shifted8>;
364 defm LDFF1B_D : sve_mem_cldff_ss<0b0011, "ldff1b", Z_d, ZPR64, GPR64shifted8>;
365 defm LDFF1SW_D : sve_mem_cldff_ss<0b0100, "ldff1sw", Z_d, ZPR64, GPR64shifted32>;
366 defm LDFF1H : sve_mem_cldff_ss<0b0101, "ldff1h", Z_h, ZPR16, GPR64shifted16>;
367 defm LDFF1H_S : sve_mem_cldff_ss<0b0110, "ldff1h", Z_s, ZPR32, GPR64shifted16>;
368 defm LDFF1H_D : sve_mem_cldff_ss<0b0111, "ldff1h", Z_d, ZPR64, GPR64shifted16>;
369 defm LDFF1SH_D : sve_mem_cldff_ss<0b1000, "ldff1sh", Z_d, ZPR64, GPR64shifted16>;
370 defm LDFF1SH_S : sve_mem_cldff_ss<0b1001, "ldff1sh", Z_s, ZPR32, GPR64shifted16>;
371 defm LDFF1W : sve_mem_cldff_ss<0b1010, "ldff1w", Z_s, ZPR32, GPR64shifted32>;
372 defm LDFF1W_D : sve_mem_cldff_ss<0b1011, "ldff1w", Z_d, ZPR64, GPR64shifted32>;
373 defm LDFF1SB_D : sve_mem_cldff_ss<0b1100, "ldff1sb", Z_d, ZPR64, GPR64shifted8>;
374 defm LDFF1SB_S : sve_mem_cldff_ss<0b1101, "ldff1sb", Z_s, ZPR32, GPR64shifted8>;
375 defm LDFF1SB_H : sve_mem_cldff_ss<0b1110, "ldff1sb", Z_h, ZPR16, GPR64shifted8>;
376 defm LDFF1D : sve_mem_cldff_ss<0b1111, "ldff1d", Z_d, ZPR64, GPR64shifted64>;
378 // LD(2|3|4) structured loads with reg+immediate
379 defm LD2B_IMM : sve_mem_eld_si<0b00, 0b01, ZZ_b, "ld2b", simm4s2>;
380 defm LD3B_IMM : sve_mem_eld_si<0b00, 0b10, ZZZ_b, "ld3b", simm4s3>;
381 defm LD4B_IMM : sve_mem_eld_si<0b00, 0b11, ZZZZ_b, "ld4b", simm4s4>;
382 defm LD2H_IMM : sve_mem_eld_si<0b01, 0b01, ZZ_h, "ld2h", simm4s2>;
383 defm LD3H_IMM : sve_mem_eld_si<0b01, 0b10, ZZZ_h, "ld3h", simm4s3>;
384 defm LD4H_IMM : sve_mem_eld_si<0b01, 0b11, ZZZZ_h, "ld4h", simm4s4>;
385 defm LD2W_IMM : sve_mem_eld_si<0b10, 0b01, ZZ_s, "ld2w", simm4s2>;
386 defm LD3W_IMM : sve_mem_eld_si<0b10, 0b10, ZZZ_s, "ld3w", simm4s3>;
387 defm LD4W_IMM : sve_mem_eld_si<0b10, 0b11, ZZZZ_s, "ld4w", simm4s4>;
388 defm LD2D_IMM : sve_mem_eld_si<0b11, 0b01, ZZ_d, "ld2d", simm4s2>;
389 defm LD3D_IMM : sve_mem_eld_si<0b11, 0b10, ZZZ_d, "ld3d", simm4s3>;
390 defm LD4D_IMM : sve_mem_eld_si<0b11, 0b11, ZZZZ_d, "ld4d", simm4s4>;
392 // LD(2|3|4) structured loads (register + register)
393 def LD2B : sve_mem_eld_ss<0b00, 0b01, ZZ_b, "ld2b", GPR64NoXZRshifted8>;
394 def LD3B : sve_mem_eld_ss<0b00, 0b10, ZZZ_b, "ld3b", GPR64NoXZRshifted8>;
395 def LD4B : sve_mem_eld_ss<0b00, 0b11, ZZZZ_b, "ld4b", GPR64NoXZRshifted8>;
396 def LD2H : sve_mem_eld_ss<0b01, 0b01, ZZ_h, "ld2h", GPR64NoXZRshifted16>;
397 def LD3H : sve_mem_eld_ss<0b01, 0b10, ZZZ_h, "ld3h", GPR64NoXZRshifted16>;
398 def LD4H : sve_mem_eld_ss<0b01, 0b11, ZZZZ_h, "ld4h", GPR64NoXZRshifted16>;
399 def LD2W : sve_mem_eld_ss<0b10, 0b01, ZZ_s, "ld2w", GPR64NoXZRshifted32>;
400 def LD3W : sve_mem_eld_ss<0b10, 0b10, ZZZ_s, "ld3w", GPR64NoXZRshifted32>;
401 def LD4W : sve_mem_eld_ss<0b10, 0b11, ZZZZ_s, "ld4w", GPR64NoXZRshifted32>;
402 def LD2D : sve_mem_eld_ss<0b11, 0b01, ZZ_d, "ld2d", GPR64NoXZRshifted64>;
403 def LD3D : sve_mem_eld_ss<0b11, 0b10, ZZZ_d, "ld3d", GPR64NoXZRshifted64>;
404 def LD4D : sve_mem_eld_ss<0b11, 0b11, ZZZZ_d, "ld4d", GPR64NoXZRshifted64>;
406 // Gathers using unscaled 32-bit offsets, e.g.
407 // ld1h z0.s, p0/z, [x0, z0.s, uxtw]
408 defm GLD1SB_S : sve_mem_32b_gld_vs_32_unscaled<0b0000, "ld1sb", ZPR32ExtSXTW8Only, ZPR32ExtUXTW8Only>;
409 defm GLDFF1SB_S : sve_mem_32b_gld_vs_32_unscaled<0b0001, "ldff1sb", ZPR32ExtSXTW8Only, ZPR32ExtUXTW8Only>;
410 defm GLD1B_S : sve_mem_32b_gld_vs_32_unscaled<0b0010, "ld1b", ZPR32ExtSXTW8Only, ZPR32ExtUXTW8Only>;
411 defm GLDFF1B_S : sve_mem_32b_gld_vs_32_unscaled<0b0011, "ldff1b", ZPR32ExtSXTW8Only, ZPR32ExtUXTW8Only>;
412 defm GLD1SH_S : sve_mem_32b_gld_vs_32_unscaled<0b0100, "ld1sh", ZPR32ExtSXTW8, ZPR32ExtUXTW8>;
413 defm GLDFF1SH_S : sve_mem_32b_gld_vs_32_unscaled<0b0101, "ldff1sh", ZPR32ExtSXTW8, ZPR32ExtUXTW8>;
414 defm GLD1H_S : sve_mem_32b_gld_vs_32_unscaled<0b0110, "ld1h", ZPR32ExtSXTW8, ZPR32ExtUXTW8>;
415 defm GLDFF1H_S : sve_mem_32b_gld_vs_32_unscaled<0b0111, "ldff1h", ZPR32ExtSXTW8, ZPR32ExtUXTW8>;
416 defm GLD1W : sve_mem_32b_gld_vs_32_unscaled<0b1010, "ld1w", ZPR32ExtSXTW8, ZPR32ExtUXTW8>;
417 defm GLDFF1W : sve_mem_32b_gld_vs_32_unscaled<0b1011, "ldff1w", ZPR32ExtSXTW8, ZPR32ExtUXTW8>;
419 // Gathers using scaled 32-bit offsets, e.g.
420 // ld1h z0.s, p0/z, [x0, z0.s, uxtw #1]
421 defm GLD1SH_S : sve_mem_32b_gld_sv_32_scaled<0b0100, "ld1sh", ZPR32ExtSXTW16, ZPR32ExtUXTW16>;
422 defm GLDFF1SH_S : sve_mem_32b_gld_sv_32_scaled<0b0101, "ldff1sh", ZPR32ExtSXTW16, ZPR32ExtUXTW16>;
423 defm GLD1H_S : sve_mem_32b_gld_sv_32_scaled<0b0110, "ld1h", ZPR32ExtSXTW16, ZPR32ExtUXTW16>;
424 defm GLDFF1H_S : sve_mem_32b_gld_sv_32_scaled<0b0111, "ldff1h", ZPR32ExtSXTW16, ZPR32ExtUXTW16>;
425 defm GLD1W : sve_mem_32b_gld_sv_32_scaled<0b1010, "ld1w", ZPR32ExtSXTW32, ZPR32ExtUXTW32>;
426 defm GLDFF1W : sve_mem_32b_gld_sv_32_scaled<0b1011, "ldff1w", ZPR32ExtSXTW32, ZPR32ExtUXTW32>;
428 // Gathers using scaled 32-bit pointers with offset, e.g.
429 // ld1h z0.s, p0/z, [z0.s, #16]
430 defm GLD1SB_S : sve_mem_32b_gld_vi_32_ptrs<0b0000, "ld1sb", imm0_31>;
431 defm GLDFF1SB_S : sve_mem_32b_gld_vi_32_ptrs<0b0001, "ldff1sb", imm0_31>;
432 defm GLD1B_S : sve_mem_32b_gld_vi_32_ptrs<0b0010, "ld1b", imm0_31>;
433 defm GLDFF1B_S : sve_mem_32b_gld_vi_32_ptrs<0b0011, "ldff1b", imm0_31>;
434 defm GLD1SH_S : sve_mem_32b_gld_vi_32_ptrs<0b0100, "ld1sh", uimm5s2>;
435 defm GLDFF1SH_S : sve_mem_32b_gld_vi_32_ptrs<0b0101, "ldff1sh", uimm5s2>;
436 defm GLD1H_S : sve_mem_32b_gld_vi_32_ptrs<0b0110, "ld1h", uimm5s2>;
437 defm GLDFF1H_S : sve_mem_32b_gld_vi_32_ptrs<0b0111, "ldff1h", uimm5s2>;
438 defm GLD1W : sve_mem_32b_gld_vi_32_ptrs<0b1010, "ld1w", uimm5s4>;
439 defm GLDFF1W : sve_mem_32b_gld_vi_32_ptrs<0b1011, "ldff1w", uimm5s4>;
441 // Gathers using scaled 64-bit pointers with offset, e.g.
442 // ld1h z0.d, p0/z, [z0.d, #16]
443 defm GLD1SB_D : sve_mem_64b_gld_vi_64_ptrs<0b0000, "ld1sb", imm0_31>;
444 defm GLDFF1SB_D : sve_mem_64b_gld_vi_64_ptrs<0b0001, "ldff1sb", imm0_31>;
445 defm GLD1B_D : sve_mem_64b_gld_vi_64_ptrs<0b0010, "ld1b", imm0_31>;
446 defm GLDFF1B_D : sve_mem_64b_gld_vi_64_ptrs<0b0011, "ldff1b", imm0_31>;
447 defm GLD1SH_D : sve_mem_64b_gld_vi_64_ptrs<0b0100, "ld1sh", uimm5s2>;
448 defm GLDFF1SH_D : sve_mem_64b_gld_vi_64_ptrs<0b0101, "ldff1sh", uimm5s2>;
449 defm GLD1H_D : sve_mem_64b_gld_vi_64_ptrs<0b0110, "ld1h", uimm5s2>;
450 defm GLDFF1H_D : sve_mem_64b_gld_vi_64_ptrs<0b0111, "ldff1h", uimm5s2>;
451 defm GLD1SW_D : sve_mem_64b_gld_vi_64_ptrs<0b1000, "ld1sw", uimm5s4>;
452 defm GLDFF1SW_D : sve_mem_64b_gld_vi_64_ptrs<0b1001, "ldff1sw", uimm5s4>;
453 defm GLD1W_D : sve_mem_64b_gld_vi_64_ptrs<0b1010, "ld1w", uimm5s4>;
454 defm GLDFF1W_D : sve_mem_64b_gld_vi_64_ptrs<0b1011, "ldff1w", uimm5s4>;
455 defm GLD1D : sve_mem_64b_gld_vi_64_ptrs<0b1110, "ld1d", uimm5s8>;
456 defm GLDFF1D : sve_mem_64b_gld_vi_64_ptrs<0b1111, "ldff1d", uimm5s8>;
458 // Gathers using unscaled 64-bit offsets, e.g.
459 // ld1h z0.d, p0/z, [x0, z0.d]
460 defm GLD1SB_D : sve_mem_64b_gld_vs2_64_unscaled<0b0000, "ld1sb">;
461 defm GLDFF1SB_D : sve_mem_64b_gld_vs2_64_unscaled<0b0001, "ldff1sb">;
462 defm GLD1B_D : sve_mem_64b_gld_vs2_64_unscaled<0b0010, "ld1b">;
463 defm GLDFF1B_D : sve_mem_64b_gld_vs2_64_unscaled<0b0011, "ldff1b">;
464 defm GLD1SH_D : sve_mem_64b_gld_vs2_64_unscaled<0b0100, "ld1sh">;
465 defm GLDFF1SH_D : sve_mem_64b_gld_vs2_64_unscaled<0b0101, "ldff1sh">;
466 defm GLD1H_D : sve_mem_64b_gld_vs2_64_unscaled<0b0110, "ld1h">;
467 defm GLDFF1H_D : sve_mem_64b_gld_vs2_64_unscaled<0b0111, "ldff1h">;
468 defm GLD1SW_D : sve_mem_64b_gld_vs2_64_unscaled<0b1000, "ld1sw">;
469 defm GLDFF1SW_D : sve_mem_64b_gld_vs2_64_unscaled<0b1001, "ldff1sw">;
470 defm GLD1W_D : sve_mem_64b_gld_vs2_64_unscaled<0b1010, "ld1w">;
471 defm GLDFF1W_D : sve_mem_64b_gld_vs2_64_unscaled<0b1011, "ldff1w">;
472 defm GLD1D : sve_mem_64b_gld_vs2_64_unscaled<0b1110, "ld1d">;
473 defm GLDFF1D : sve_mem_64b_gld_vs2_64_unscaled<0b1111, "ldff1d">;
475 // Gathers using scaled 64-bit offsets, e.g.
476 // ld1h z0.d, p0/z, [x0, z0.d, lsl #1]
477 defm GLD1SH_D : sve_mem_64b_gld_sv2_64_scaled<0b0100, "ld1sh", ZPR64ExtLSL16>;
478 defm GLDFF1SH_D : sve_mem_64b_gld_sv2_64_scaled<0b0101, "ldff1sh", ZPR64ExtLSL16>;
479 defm GLD1H_D : sve_mem_64b_gld_sv2_64_scaled<0b0110, "ld1h", ZPR64ExtLSL16>;
480 defm GLDFF1H_D : sve_mem_64b_gld_sv2_64_scaled<0b0111, "ldff1h", ZPR64ExtLSL16>;
481 defm GLD1SW_D : sve_mem_64b_gld_sv2_64_scaled<0b1000, "ld1sw", ZPR64ExtLSL32>;
482 defm GLDFF1SW_D : sve_mem_64b_gld_sv2_64_scaled<0b1001, "ldff1sw", ZPR64ExtLSL32>;
483 defm GLD1W_D : sve_mem_64b_gld_sv2_64_scaled<0b1010, "ld1w", ZPR64ExtLSL32>;
484 defm GLDFF1W_D : sve_mem_64b_gld_sv2_64_scaled<0b1011, "ldff1w", ZPR64ExtLSL32>;
485 defm GLD1D : sve_mem_64b_gld_sv2_64_scaled<0b1110, "ld1d", ZPR64ExtLSL64>;
486 defm GLDFF1D : sve_mem_64b_gld_sv2_64_scaled<0b1111, "ldff1d", ZPR64ExtLSL64>;
488 // Gathers using unscaled 32-bit offsets unpacked in 64-bits elements, e.g.
489 // ld1h z0.d, p0/z, [x0, z0.d, uxtw]
490 defm GLD1SB_D : sve_mem_64b_gld_vs_32_unscaled<0b0000, "ld1sb", ZPR64ExtSXTW8Only, ZPR64ExtUXTW8Only>;
491 defm GLDFF1SB_D : sve_mem_64b_gld_vs_32_unscaled<0b0001, "ldff1sb", ZPR64ExtSXTW8Only, ZPR64ExtUXTW8Only>;
492 defm GLD1B_D : sve_mem_64b_gld_vs_32_unscaled<0b0010, "ld1b", ZPR64ExtSXTW8Only, ZPR64ExtUXTW8Only>;
493 defm GLDFF1B_D : sve_mem_64b_gld_vs_32_unscaled<0b0011, "ldff1b", ZPR64ExtSXTW8Only, ZPR64ExtUXTW8Only>;
494 defm GLD1SH_D : sve_mem_64b_gld_vs_32_unscaled<0b0100, "ld1sh", ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
495 defm GLDFF1SH_D : sve_mem_64b_gld_vs_32_unscaled<0b0101, "ldff1sh", ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
496 defm GLD1H_D : sve_mem_64b_gld_vs_32_unscaled<0b0110, "ld1h", ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
497 defm GLDFF1H_D : sve_mem_64b_gld_vs_32_unscaled<0b0111, "ldff1h", ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
498 defm GLD1SW_D : sve_mem_64b_gld_vs_32_unscaled<0b1000, "ld1sw", ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
499 defm GLDFF1SW_D : sve_mem_64b_gld_vs_32_unscaled<0b1001, "ldff1sw", ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
500 defm GLD1W_D : sve_mem_64b_gld_vs_32_unscaled<0b1010, "ld1w", ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
501 defm GLDFF1W_D : sve_mem_64b_gld_vs_32_unscaled<0b1011, "ldff1w", ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
502 defm GLD1D : sve_mem_64b_gld_vs_32_unscaled<0b1110, "ld1d", ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
503 defm GLDFF1D : sve_mem_64b_gld_vs_32_unscaled<0b1111, "ldff1d", ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
505 // Gathers using scaled 32-bit offsets unpacked in 64-bits elements, e.g.
506 // ld1h z0.d, p0/z, [x0, z0.d, uxtw #1]
507 defm GLD1SH_D : sve_mem_64b_gld_sv_32_scaled<0b0100, "ld1sh", ZPR64ExtSXTW16, ZPR64ExtUXTW16>;
508 defm GLDFF1SH_D : sve_mem_64b_gld_sv_32_scaled<0b0101, "ldff1sh",ZPR64ExtSXTW16, ZPR64ExtUXTW16>;
509 defm GLD1H_D : sve_mem_64b_gld_sv_32_scaled<0b0110, "ld1h", ZPR64ExtSXTW16, ZPR64ExtUXTW16>;
510 defm GLDFF1H_D : sve_mem_64b_gld_sv_32_scaled<0b0111, "ldff1h", ZPR64ExtSXTW16, ZPR64ExtUXTW16>;
511 defm GLD1SW_D : sve_mem_64b_gld_sv_32_scaled<0b1000, "ld1sw", ZPR64ExtSXTW32, ZPR64ExtUXTW32>;
512 defm GLDFF1SW_D : sve_mem_64b_gld_sv_32_scaled<0b1001, "ldff1sw",ZPR64ExtSXTW32, ZPR64ExtUXTW32>;
513 defm GLD1W_D : sve_mem_64b_gld_sv_32_scaled<0b1010, "ld1w", ZPR64ExtSXTW32, ZPR64ExtUXTW32>;
514 defm GLDFF1W_D : sve_mem_64b_gld_sv_32_scaled<0b1011, "ldff1w", ZPR64ExtSXTW32, ZPR64ExtUXTW32>;
515 defm GLD1D : sve_mem_64b_gld_sv_32_scaled<0b1110, "ld1d", ZPR64ExtSXTW64, ZPR64ExtUXTW64>;
516 defm GLDFF1D : sve_mem_64b_gld_sv_32_scaled<0b1111, "ldff1d", ZPR64ExtSXTW64, ZPR64ExtUXTW64>;
518 // Non-temporal contiguous loads (register + immediate)
519 defm LDNT1B_ZRI : sve_mem_cldnt_si<0b00, "ldnt1b", Z_b, ZPR8>;
520 defm LDNT1H_ZRI : sve_mem_cldnt_si<0b01, "ldnt1h", Z_h, ZPR16>;
521 defm LDNT1W_ZRI : sve_mem_cldnt_si<0b10, "ldnt1w", Z_s, ZPR32>;
522 defm LDNT1D_ZRI : sve_mem_cldnt_si<0b11, "ldnt1d", Z_d, ZPR64>;
524 // Non-temporal contiguous loads (register + register)
525 defm LDNT1B_ZRR : sve_mem_cldnt_ss<0b00, "ldnt1b", Z_b, ZPR8, GPR64NoXZRshifted8>;
526 defm LDNT1H_ZRR : sve_mem_cldnt_ss<0b01, "ldnt1h", Z_h, ZPR16, GPR64NoXZRshifted16>;
527 defm LDNT1W_ZRR : sve_mem_cldnt_ss<0b10, "ldnt1w", Z_s, ZPR32, GPR64NoXZRshifted32>;
528 defm LDNT1D_ZRR : sve_mem_cldnt_ss<0b11, "ldnt1d", Z_d, ZPR64, GPR64NoXZRshifted64>;
530 // contiguous store with immediates
531 defm ST1B_IMM : sve_mem_cst_si<0b00, 0b00, "st1b", Z_b, ZPR8>;
532 defm ST1B_H_IMM : sve_mem_cst_si<0b00, 0b01, "st1b", Z_h, ZPR16>;
533 defm ST1B_S_IMM : sve_mem_cst_si<0b00, 0b10, "st1b", Z_s, ZPR32>;
534 defm ST1B_D_IMM : sve_mem_cst_si<0b00, 0b11, "st1b", Z_d, ZPR64>;
535 defm ST1H_IMM : sve_mem_cst_si<0b01, 0b01, "st1h", Z_h, ZPR16>;
536 defm ST1H_S_IMM : sve_mem_cst_si<0b01, 0b10, "st1h", Z_s, ZPR32>;
537 defm ST1H_D_IMM : sve_mem_cst_si<0b01, 0b11, "st1h", Z_d, ZPR64>;
538 defm ST1W_IMM : sve_mem_cst_si<0b10, 0b10, "st1w", Z_s, ZPR32>;
539 defm ST1W_D_IMM : sve_mem_cst_si<0b10, 0b11, "st1w", Z_d, ZPR64>;
540 defm ST1D_IMM : sve_mem_cst_si<0b11, 0b11, "st1d", Z_d, ZPR64>;
542 // contiguous store with reg+reg addressing.
543 defm ST1B : sve_mem_cst_ss<0b0000, "st1b", Z_b, ZPR8, GPR64NoXZRshifted8>;
544 defm ST1B_H : sve_mem_cst_ss<0b0001, "st1b", Z_h, ZPR16, GPR64NoXZRshifted8>;
545 defm ST1B_S : sve_mem_cst_ss<0b0010, "st1b", Z_s, ZPR32, GPR64NoXZRshifted8>;
546 defm ST1B_D : sve_mem_cst_ss<0b0011, "st1b", Z_d, ZPR64, GPR64NoXZRshifted8>;
547 defm ST1H : sve_mem_cst_ss<0b0101, "st1h", Z_h, ZPR16, GPR64NoXZRshifted16>;
548 defm ST1H_S : sve_mem_cst_ss<0b0110, "st1h", Z_s, ZPR32, GPR64NoXZRshifted16>;
549 defm ST1H_D : sve_mem_cst_ss<0b0111, "st1h", Z_d, ZPR64, GPR64NoXZRshifted16>;
550 defm ST1W : sve_mem_cst_ss<0b1010, "st1w", Z_s, ZPR32, GPR64NoXZRshifted32>;
551 defm ST1W_D : sve_mem_cst_ss<0b1011, "st1w", Z_d, ZPR64, GPR64NoXZRshifted32>;
552 defm ST1D : sve_mem_cst_ss<0b1111, "st1d", Z_d, ZPR64, GPR64NoXZRshifted64>;
554 // Scatters using unscaled 32-bit offsets, e.g.
555 // st1h z0.s, p0, [x0, z0.s, uxtw]
557 // st1h z0.d, p0, [x0, z0.d, uxtw]
558 defm SST1B_D : sve_mem_sst_sv_32_unscaled<0b000, "st1b", Z_d, ZPR64, ZPR64ExtSXTW8Only, ZPR64ExtUXTW8Only>;
559 defm SST1B_S : sve_mem_sst_sv_32_unscaled<0b001, "st1b", Z_s, ZPR32, ZPR32ExtSXTW8Only, ZPR32ExtUXTW8Only>;
560 defm SST1H_D : sve_mem_sst_sv_32_unscaled<0b010, "st1h", Z_d, ZPR64, ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
561 defm SST1H_S : sve_mem_sst_sv_32_unscaled<0b011, "st1h", Z_s, ZPR32, ZPR32ExtSXTW8, ZPR32ExtUXTW8>;
562 defm SST1W_D : sve_mem_sst_sv_32_unscaled<0b100, "st1w", Z_d, ZPR64, ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
563 defm SST1W : sve_mem_sst_sv_32_unscaled<0b101, "st1w", Z_s, ZPR32, ZPR32ExtSXTW8, ZPR32ExtUXTW8>;
564 defm SST1D : sve_mem_sst_sv_32_unscaled<0b110, "st1d", Z_d, ZPR64, ZPR64ExtSXTW8, ZPR64ExtUXTW8>;
566 // Scatters using scaled 32-bit offsets, e.g.
567 // st1h z0.s, p0, [x0, z0.s, uxtw #1]
569 // st1h z0.d, p0, [x0, z0.d, uxtw #1]
570 defm SST1H_D : sve_mem_sst_sv_32_scaled<0b010, "st1h", Z_d, ZPR64, ZPR64ExtSXTW16, ZPR64ExtUXTW16>;
571 defm SST1H_S : sve_mem_sst_sv_32_scaled<0b011, "st1h", Z_s, ZPR32, ZPR32ExtSXTW16, ZPR32ExtUXTW16>;
572 defm SST1W_D : sve_mem_sst_sv_32_scaled<0b100, "st1w", Z_d, ZPR64, ZPR64ExtSXTW32, ZPR64ExtUXTW32>;
573 defm SST1W : sve_mem_sst_sv_32_scaled<0b101, "st1w", Z_s, ZPR32, ZPR32ExtSXTW32, ZPR32ExtUXTW32>;
574 defm SST1D : sve_mem_sst_sv_32_scaled<0b110, "st1d", Z_d, ZPR64, ZPR64ExtSXTW64, ZPR64ExtUXTW64>;
576 // Scatters using 32/64-bit pointers with offset, e.g.
577 // st1h z0.s, p0, [z0.s, #16]
578 // st1h z0.d, p0, [z0.d, #16]
579 defm SST1B_D : sve_mem_sst_vi_ptrs<0b000, "st1b", Z_d, ZPR64, imm0_31>;
580 defm SST1B_S : sve_mem_sst_vi_ptrs<0b001, "st1b", Z_s, ZPR32, imm0_31>;
581 defm SST1H_D : sve_mem_sst_vi_ptrs<0b010, "st1h", Z_d, ZPR64, uimm5s2>;
582 defm SST1H_S : sve_mem_sst_vi_ptrs<0b011, "st1h", Z_s, ZPR32, uimm5s2>;
583 defm SST1W_D : sve_mem_sst_vi_ptrs<0b100, "st1w", Z_d, ZPR64, uimm5s4>;
584 defm SST1W : sve_mem_sst_vi_ptrs<0b101, "st1w", Z_s, ZPR32, uimm5s4>;
585 defm SST1D : sve_mem_sst_vi_ptrs<0b110, "st1d", Z_d, ZPR64, uimm5s8>;
587 // Scatters using unscaled 64-bit offsets, e.g.
588 // st1h z0.d, p0, [x0, z0.d]
589 defm SST1B_D : sve_mem_sst_sv_64_unscaled<0b00, "st1b">;
590 defm SST1H_D : sve_mem_sst_sv_64_unscaled<0b01, "st1h">;
591 defm SST1W_D : sve_mem_sst_sv_64_unscaled<0b10, "st1w">;
592 defm SST1D : sve_mem_sst_sv_64_unscaled<0b11, "st1d">;
594 // Scatters using scaled 64-bit offsets, e.g.
595 // st1h z0.d, p0, [x0, z0.d, lsl #1]
596 defm SST1H_D_SCALED : sve_mem_sst_sv_64_scaled<0b01, "st1h", ZPR64ExtLSL16>;
597 defm SST1W_D_SCALED : sve_mem_sst_sv_64_scaled<0b10, "st1w", ZPR64ExtLSL32>;
598 defm SST1D_SCALED : sve_mem_sst_sv_64_scaled<0b11, "st1d", ZPR64ExtLSL64>;
600 // ST(2|3|4) structured stores (register + immediate)
601 defm ST2B_IMM : sve_mem_est_si<0b00, 0b01, ZZ_b, "st2b", simm4s2>;
602 defm ST3B_IMM : sve_mem_est_si<0b00, 0b10, ZZZ_b, "st3b", simm4s3>;
603 defm ST4B_IMM : sve_mem_est_si<0b00, 0b11, ZZZZ_b, "st4b", simm4s4>;
604 defm ST2H_IMM : sve_mem_est_si<0b01, 0b01, ZZ_h, "st2h", simm4s2>;
605 defm ST3H_IMM : sve_mem_est_si<0b01, 0b10, ZZZ_h, "st3h", simm4s3>;
606 defm ST4H_IMM : sve_mem_est_si<0b01, 0b11, ZZZZ_h, "st4h", simm4s4>;
607 defm ST2W_IMM : sve_mem_est_si<0b10, 0b01, ZZ_s, "st2w", simm4s2>;
608 defm ST3W_IMM : sve_mem_est_si<0b10, 0b10, ZZZ_s, "st3w", simm4s3>;
609 defm ST4W_IMM : sve_mem_est_si<0b10, 0b11, ZZZZ_s, "st4w", simm4s4>;
610 defm ST2D_IMM : sve_mem_est_si<0b11, 0b01, ZZ_d, "st2d", simm4s2>;
611 defm ST3D_IMM : sve_mem_est_si<0b11, 0b10, ZZZ_d, "st3d", simm4s3>;
612 defm ST4D_IMM : sve_mem_est_si<0b11, 0b11, ZZZZ_d, "st4d", simm4s4>;
614 // ST(2|3|4) structured stores (register + register)
615 def ST2B : sve_mem_est_ss<0b00, 0b01, ZZ_b, "st2b", GPR64NoXZRshifted8>;
616 def ST3B : sve_mem_est_ss<0b00, 0b10, ZZZ_b, "st3b", GPR64NoXZRshifted8>;
617 def ST4B : sve_mem_est_ss<0b00, 0b11, ZZZZ_b, "st4b", GPR64NoXZRshifted8>;
618 def ST2H : sve_mem_est_ss<0b01, 0b01, ZZ_h, "st2h", GPR64NoXZRshifted16>;
619 def ST3H : sve_mem_est_ss<0b01, 0b10, ZZZ_h, "st3h", GPR64NoXZRshifted16>;
620 def ST4H : sve_mem_est_ss<0b01, 0b11, ZZZZ_h, "st4h", GPR64NoXZRshifted16>;
621 def ST2W : sve_mem_est_ss<0b10, 0b01, ZZ_s, "st2w", GPR64NoXZRshifted32>;
622 def ST3W : sve_mem_est_ss<0b10, 0b10, ZZZ_s, "st3w", GPR64NoXZRshifted32>;
623 def ST4W : sve_mem_est_ss<0b10, 0b11, ZZZZ_s, "st4w", GPR64NoXZRshifted32>;
624 def ST2D : sve_mem_est_ss<0b11, 0b01, ZZ_d, "st2d", GPR64NoXZRshifted64>;
625 def ST3D : sve_mem_est_ss<0b11, 0b10, ZZZ_d, "st3d", GPR64NoXZRshifted64>;
626 def ST4D : sve_mem_est_ss<0b11, 0b11, ZZZZ_d, "st4d", GPR64NoXZRshifted64>;
628 // Non-temporal contiguous stores (register + immediate)
629 defm STNT1B_ZRI : sve_mem_cstnt_si<0b00, "stnt1b", Z_b, ZPR8>;
630 defm STNT1H_ZRI : sve_mem_cstnt_si<0b01, "stnt1h", Z_h, ZPR16>;
631 defm STNT1W_ZRI : sve_mem_cstnt_si<0b10, "stnt1w", Z_s, ZPR32>;
632 defm STNT1D_ZRI : sve_mem_cstnt_si<0b11, "stnt1d", Z_d, ZPR64>;
634 // Non-temporal contiguous stores (register + register)
635 defm STNT1B_ZRR : sve_mem_cstnt_ss<0b00, "stnt1b", Z_b, ZPR8, GPR64NoXZRshifted8>;
636 defm STNT1H_ZRR : sve_mem_cstnt_ss<0b01, "stnt1h", Z_h, ZPR16, GPR64NoXZRshifted16>;
637 defm STNT1W_ZRR : sve_mem_cstnt_ss<0b10, "stnt1w", Z_s, ZPR32, GPR64NoXZRshifted32>;
638 defm STNT1D_ZRR : sve_mem_cstnt_ss<0b11, "stnt1d", Z_d, ZPR64, GPR64NoXZRshifted64>;
641 defm LDR_ZXI : sve_mem_z_fill<"ldr">;
642 defm LDR_PXI : sve_mem_p_fill<"ldr">;
643 defm STR_ZXI : sve_mem_z_spill<"str">;
644 defm STR_PXI : sve_mem_p_spill<"str">;
646 // Contiguous prefetch (register + immediate)
647 defm PRFB_PRI : sve_mem_prfm_si<0b00, "prfb">;
648 defm PRFH_PRI : sve_mem_prfm_si<0b01, "prfh">;
649 defm PRFW_PRI : sve_mem_prfm_si<0b10, "prfw">;
650 defm PRFD_PRI : sve_mem_prfm_si<0b11, "prfd">;
652 // Contiguous prefetch (register + register)
653 def PRFB_PRR : sve_mem_prfm_ss<0b001, "prfb", GPR64NoXZRshifted8>;
654 def PRFH_PRR : sve_mem_prfm_ss<0b011, "prfh", GPR64NoXZRshifted16>;
655 def PRFS_PRR : sve_mem_prfm_ss<0b101, "prfw", GPR64NoXZRshifted32>;
656 def PRFD_PRR : sve_mem_prfm_ss<0b111, "prfd", GPR64NoXZRshifted64>;
658 // Gather prefetch using scaled 32-bit offsets, e.g.
659 // prfh pldl1keep, p0, [x0, z0.s, uxtw #1]
660 defm PRFB_S : sve_mem_32b_prfm_sv_scaled<0b00, "prfb", ZPR32ExtSXTW8Only, ZPR32ExtUXTW8Only>;
661 defm PRFH_S : sve_mem_32b_prfm_sv_scaled<0b01, "prfh", ZPR32ExtSXTW16, ZPR32ExtUXTW16>;
662 defm PRFW_S : sve_mem_32b_prfm_sv_scaled<0b10, "prfw", ZPR32ExtSXTW32, ZPR32ExtUXTW32>;
663 defm PRFD_S : sve_mem_32b_prfm_sv_scaled<0b11, "prfd", ZPR32ExtSXTW64, ZPR32ExtUXTW64>;
665 // Gather prefetch using unpacked, scaled 32-bit offsets, e.g.
666 // prfh pldl1keep, p0, [x0, z0.d, uxtw #1]
667 defm PRFB_D : sve_mem_64b_prfm_sv_ext_scaled<0b00, "prfb", ZPR64ExtSXTW8Only, ZPR64ExtUXTW8Only>;
668 defm PRFH_D : sve_mem_64b_prfm_sv_ext_scaled<0b01, "prfh", ZPR64ExtSXTW16, ZPR64ExtUXTW16>;
669 defm PRFW_D : sve_mem_64b_prfm_sv_ext_scaled<0b10, "prfw", ZPR64ExtSXTW32, ZPR64ExtUXTW32>;
670 defm PRFD_D : sve_mem_64b_prfm_sv_ext_scaled<0b11, "prfd", ZPR64ExtSXTW64, ZPR64ExtUXTW64>;
672 // Gather prefetch using scaled 64-bit offsets, e.g.
673 // prfh pldl1keep, p0, [x0, z0.d, lsl #1]
674 defm PRFB_D_SCALED : sve_mem_64b_prfm_sv_lsl_scaled<0b00, "prfb", ZPR64ExtLSL8>;
675 defm PRFH_D_SCALED : sve_mem_64b_prfm_sv_lsl_scaled<0b01, "prfh", ZPR64ExtLSL16>;
676 defm PRFW_D_SCALED : sve_mem_64b_prfm_sv_lsl_scaled<0b10, "prfw", ZPR64ExtLSL32>;
677 defm PRFD_D_SCALED : sve_mem_64b_prfm_sv_lsl_scaled<0b11, "prfd", ZPR64ExtLSL64>;
679 // Gather prefetch using 32/64-bit pointers with offset, e.g.
680 // prfh pldl1keep, p0, [z0.s, #16]
681 // prfh pldl1keep, p0, [z0.d, #16]
682 defm PRFB_S_PZI : sve_mem_32b_prfm_vi<0b00, "prfb", imm0_31>;
683 defm PRFH_S_PZI : sve_mem_32b_prfm_vi<0b01, "prfh", uimm5s2>;
684 defm PRFW_S_PZI : sve_mem_32b_prfm_vi<0b10, "prfw", uimm5s4>;
685 defm PRFD_S_PZI : sve_mem_32b_prfm_vi<0b11, "prfd", uimm5s8>;
687 defm PRFB_D_PZI : sve_mem_64b_prfm_vi<0b00, "prfb", imm0_31>;
688 defm PRFH_D_PZI : sve_mem_64b_prfm_vi<0b01, "prfh", uimm5s2>;
689 defm PRFW_D_PZI : sve_mem_64b_prfm_vi<0b10, "prfw", uimm5s4>;
690 defm PRFD_D_PZI : sve_mem_64b_prfm_vi<0b11, "prfd", uimm5s8>;
692 defm ADR_SXTW_ZZZ_D : sve_int_bin_cons_misc_0_a_sxtw<0b00, "adr">;
693 defm ADR_UXTW_ZZZ_D : sve_int_bin_cons_misc_0_a_uxtw<0b01, "adr">;
694 defm ADR_LSL_ZZZ_S : sve_int_bin_cons_misc_0_a_32_lsl<0b10, "adr">;
695 defm ADR_LSL_ZZZ_D : sve_int_bin_cons_misc_0_a_64_lsl<0b11, "adr">;
697 defm TBL_ZZZ : sve_int_perm_tbl<"tbl">;
699 defm ZIP1_ZZZ : sve_int_perm_bin_perm_zz<0b000, "zip1">;
700 defm ZIP2_ZZZ : sve_int_perm_bin_perm_zz<0b001, "zip2">;
701 defm UZP1_ZZZ : sve_int_perm_bin_perm_zz<0b010, "uzp1">;
702 defm UZP2_ZZZ : sve_int_perm_bin_perm_zz<0b011, "uzp2">;
703 defm TRN1_ZZZ : sve_int_perm_bin_perm_zz<0b100, "trn1">;
704 defm TRN2_ZZZ : sve_int_perm_bin_perm_zz<0b101, "trn2">;
706 defm ZIP1_PPP : sve_int_perm_bin_perm_pp<0b000, "zip1">;
707 defm ZIP2_PPP : sve_int_perm_bin_perm_pp<0b001, "zip2">;
708 defm UZP1_PPP : sve_int_perm_bin_perm_pp<0b010, "uzp1">;
709 defm UZP2_PPP : sve_int_perm_bin_perm_pp<0b011, "uzp2">;
710 defm TRN1_PPP : sve_int_perm_bin_perm_pp<0b100, "trn1">;
711 defm TRN2_PPP : sve_int_perm_bin_perm_pp<0b101, "trn2">;
713 defm CMPHS_PPzZZ : sve_int_cmp_0<0b000, "cmphs">;
714 defm CMPHI_PPzZZ : sve_int_cmp_0<0b001, "cmphi">;
715 defm CMPGE_PPzZZ : sve_int_cmp_0<0b100, "cmpge">;
716 defm CMPGT_PPzZZ : sve_int_cmp_0<0b101, "cmpgt">;
717 defm CMPEQ_PPzZZ : sve_int_cmp_0<0b110, "cmpeq">;
718 defm CMPNE_PPzZZ : sve_int_cmp_0<0b111, "cmpne">;
720 defm CMPEQ_WIDE_PPzZZ : sve_int_cmp_0_wide<0b010, "cmpeq">;
721 defm CMPNE_WIDE_PPzZZ : sve_int_cmp_0_wide<0b011, "cmpne">;
722 defm CMPGE_WIDE_PPzZZ : sve_int_cmp_1_wide<0b000, "cmpge">;
723 defm CMPGT_WIDE_PPzZZ : sve_int_cmp_1_wide<0b001, "cmpgt">;
724 defm CMPLT_WIDE_PPzZZ : sve_int_cmp_1_wide<0b010, "cmplt">;
725 defm CMPLE_WIDE_PPzZZ : sve_int_cmp_1_wide<0b011, "cmple">;
726 defm CMPHS_WIDE_PPzZZ : sve_int_cmp_1_wide<0b100, "cmphs">;
727 defm CMPHI_WIDE_PPzZZ : sve_int_cmp_1_wide<0b101, "cmphi">;
728 defm CMPLO_WIDE_PPzZZ : sve_int_cmp_1_wide<0b110, "cmplo">;
729 defm CMPLS_WIDE_PPzZZ : sve_int_cmp_1_wide<0b111, "cmpls">;
731 defm CMPGE_PPzZI : sve_int_scmp_vi<0b000, "cmpge">;
732 defm CMPGT_PPzZI : sve_int_scmp_vi<0b001, "cmpgt">;
733 defm CMPLT_PPzZI : sve_int_scmp_vi<0b010, "cmplt">;
734 defm CMPLE_PPzZI : sve_int_scmp_vi<0b011, "cmple">;
735 defm CMPEQ_PPzZI : sve_int_scmp_vi<0b100, "cmpeq">;
736 defm CMPNE_PPzZI : sve_int_scmp_vi<0b101, "cmpne">;
737 defm CMPHS_PPzZI : sve_int_ucmp_vi<0b00, "cmphs">;
738 defm CMPHI_PPzZI : sve_int_ucmp_vi<0b01, "cmphi">;
739 defm CMPLO_PPzZI : sve_int_ucmp_vi<0b10, "cmplo">;
740 defm CMPLS_PPzZI : sve_int_ucmp_vi<0b11, "cmpls">;
742 defm FCMGE_PPzZZ : sve_fp_3op_p_pd<0b000, "fcmge">;
743 defm FCMGT_PPzZZ : sve_fp_3op_p_pd<0b001, "fcmgt">;
744 defm FCMEQ_PPzZZ : sve_fp_3op_p_pd<0b010, "fcmeq">;
745 defm FCMNE_PPzZZ : sve_fp_3op_p_pd<0b011, "fcmne">;
746 defm FCMUO_PPzZZ : sve_fp_3op_p_pd<0b100, "fcmuo">;
747 defm FACGE_PPzZZ : sve_fp_3op_p_pd<0b101, "facge">;
748 defm FACGT_PPzZZ : sve_fp_3op_p_pd<0b111, "facgt">;
750 defm FCMGE_PPzZ0 : sve_fp_2op_p_pd<0b000, "fcmge">;
751 defm FCMGT_PPzZ0 : sve_fp_2op_p_pd<0b001, "fcmgt">;
752 defm FCMLT_PPzZ0 : sve_fp_2op_p_pd<0b010, "fcmlt">;
753 defm FCMLE_PPzZ0 : sve_fp_2op_p_pd<0b011, "fcmle">;
754 defm FCMEQ_PPzZ0 : sve_fp_2op_p_pd<0b100, "fcmeq">;
755 defm FCMNE_PPzZ0 : sve_fp_2op_p_pd<0b110, "fcmne">;
757 defm WHILELT_PWW : sve_int_while4_rr<0b010, "whilelt">;
758 defm WHILELE_PWW : sve_int_while4_rr<0b011, "whilele">;
759 defm WHILELO_PWW : sve_int_while4_rr<0b110, "whilelo">;
760 defm WHILELS_PWW : sve_int_while4_rr<0b111, "whilels">;
762 defm WHILELT_PXX : sve_int_while8_rr<0b010, "whilelt">;
763 defm WHILELE_PXX : sve_int_while8_rr<0b011, "whilele">;
764 defm WHILELO_PXX : sve_int_while8_rr<0b110, "whilelo">;
765 defm WHILELS_PXX : sve_int_while8_rr<0b111, "whilels">;
767 def CTERMEQ_WW : sve_int_cterm<0b0, 0b0, "ctermeq", GPR32>;
768 def CTERMNE_WW : sve_int_cterm<0b0, 0b1, "ctermne", GPR32>;
769 def CTERMEQ_XX : sve_int_cterm<0b1, 0b0, "ctermeq", GPR64>;
770 def CTERMNE_XX : sve_int_cterm<0b1, 0b1, "ctermne", GPR64>;
772 def RDVLI_XI : sve_int_read_vl_a<0b0, 0b11111, "rdvl">;
773 def ADDVL_XXI : sve_int_arith_vl<0b0, "addvl">;
774 def ADDPL_XXI : sve_int_arith_vl<0b1, "addpl">;
776 defm CNTB_XPiI : sve_int_count<0b000, "cntb">;
777 defm CNTH_XPiI : sve_int_count<0b010, "cnth">;
778 defm CNTW_XPiI : sve_int_count<0b100, "cntw">;
779 defm CNTD_XPiI : sve_int_count<0b110, "cntd">;
780 defm CNTP_XPP : sve_int_pcount_pred<0b0000, "cntp">;
782 defm INCB_XPiI : sve_int_pred_pattern_a<0b000, "incb">;
783 defm DECB_XPiI : sve_int_pred_pattern_a<0b001, "decb">;
784 defm INCH_XPiI : sve_int_pred_pattern_a<0b010, "inch">;
785 defm DECH_XPiI : sve_int_pred_pattern_a<0b011, "dech">;
786 defm INCW_XPiI : sve_int_pred_pattern_a<0b100, "incw">;
787 defm DECW_XPiI : sve_int_pred_pattern_a<0b101, "decw">;
788 defm INCD_XPiI : sve_int_pred_pattern_a<0b110, "incd">;
789 defm DECD_XPiI : sve_int_pred_pattern_a<0b111, "decd">;
791 defm SQINCB_XPiWdI : sve_int_pred_pattern_b_s32<0b00000, "sqincb">;
792 defm UQINCB_WPiI : sve_int_pred_pattern_b_u32<0b00001, "uqincb">;
793 defm SQDECB_XPiWdI : sve_int_pred_pattern_b_s32<0b00010, "sqdecb">;
794 defm UQDECB_WPiI : sve_int_pred_pattern_b_u32<0b00011, "uqdecb">;
795 defm SQINCB_XPiI : sve_int_pred_pattern_b_x64<0b00100, "sqincb">;
796 defm UQINCB_XPiI : sve_int_pred_pattern_b_x64<0b00101, "uqincb">;
797 defm SQDECB_XPiI : sve_int_pred_pattern_b_x64<0b00110, "sqdecb">;
798 defm UQDECB_XPiI : sve_int_pred_pattern_b_x64<0b00111, "uqdecb">;
800 defm SQINCH_XPiWdI : sve_int_pred_pattern_b_s32<0b01000, "sqinch">;
801 defm UQINCH_WPiI : sve_int_pred_pattern_b_u32<0b01001, "uqinch">;
802 defm SQDECH_XPiWdI : sve_int_pred_pattern_b_s32<0b01010, "sqdech">;
803 defm UQDECH_WPiI : sve_int_pred_pattern_b_u32<0b01011, "uqdech">;
804 defm SQINCH_XPiI : sve_int_pred_pattern_b_x64<0b01100, "sqinch">;
805 defm UQINCH_XPiI : sve_int_pred_pattern_b_x64<0b01101, "uqinch">;
806 defm SQDECH_XPiI : sve_int_pred_pattern_b_x64<0b01110, "sqdech">;
807 defm UQDECH_XPiI : sve_int_pred_pattern_b_x64<0b01111, "uqdech">;
809 defm SQINCW_XPiWdI : sve_int_pred_pattern_b_s32<0b10000, "sqincw">;
810 defm UQINCW_WPiI : sve_int_pred_pattern_b_u32<0b10001, "uqincw">;
811 defm SQDECW_XPiWdI : sve_int_pred_pattern_b_s32<0b10010, "sqdecw">;
812 defm UQDECW_WPiI : sve_int_pred_pattern_b_u32<0b10011, "uqdecw">;
813 defm SQINCW_XPiI : sve_int_pred_pattern_b_x64<0b10100, "sqincw">;
814 defm UQINCW_XPiI : sve_int_pred_pattern_b_x64<0b10101, "uqincw">;
815 defm SQDECW_XPiI : sve_int_pred_pattern_b_x64<0b10110, "sqdecw">;
816 defm UQDECW_XPiI : sve_int_pred_pattern_b_x64<0b10111, "uqdecw">;
818 defm SQINCD_XPiWdI : sve_int_pred_pattern_b_s32<0b11000, "sqincd">;
819 defm UQINCD_WPiI : sve_int_pred_pattern_b_u32<0b11001, "uqincd">;
820 defm SQDECD_XPiWdI : sve_int_pred_pattern_b_s32<0b11010, "sqdecd">;
821 defm UQDECD_WPiI : sve_int_pred_pattern_b_u32<0b11011, "uqdecd">;
822 defm SQINCD_XPiI : sve_int_pred_pattern_b_x64<0b11100, "sqincd">;
823 defm UQINCD_XPiI : sve_int_pred_pattern_b_x64<0b11101, "uqincd">;
824 defm SQDECD_XPiI : sve_int_pred_pattern_b_x64<0b11110, "sqdecd">;
825 defm UQDECD_XPiI : sve_int_pred_pattern_b_x64<0b11111, "uqdecd">;
827 defm SQINCH_ZPiI : sve_int_countvlv<0b01000, "sqinch", ZPR16>;
828 defm UQINCH_ZPiI : sve_int_countvlv<0b01001, "uqinch", ZPR16>;
829 defm SQDECH_ZPiI : sve_int_countvlv<0b01010, "sqdech", ZPR16>;
830 defm UQDECH_ZPiI : sve_int_countvlv<0b01011, "uqdech", ZPR16>;
831 defm INCH_ZPiI : sve_int_countvlv<0b01100, "inch", ZPR16>;
832 defm DECH_ZPiI : sve_int_countvlv<0b01101, "dech", ZPR16>;
833 defm SQINCW_ZPiI : sve_int_countvlv<0b10000, "sqincw", ZPR32>;
834 defm UQINCW_ZPiI : sve_int_countvlv<0b10001, "uqincw", ZPR32>;
835 defm SQDECW_ZPiI : sve_int_countvlv<0b10010, "sqdecw", ZPR32>;
836 defm UQDECW_ZPiI : sve_int_countvlv<0b10011, "uqdecw", ZPR32>;
837 defm INCW_ZPiI : sve_int_countvlv<0b10100, "incw", ZPR32>;
838 defm DECW_ZPiI : sve_int_countvlv<0b10101, "decw", ZPR32>;
839 defm SQINCD_ZPiI : sve_int_countvlv<0b11000, "sqincd", ZPR64>;
840 defm UQINCD_ZPiI : sve_int_countvlv<0b11001, "uqincd", ZPR64>;
841 defm SQDECD_ZPiI : sve_int_countvlv<0b11010, "sqdecd", ZPR64>;
842 defm UQDECD_ZPiI : sve_int_countvlv<0b11011, "uqdecd", ZPR64>;
843 defm INCD_ZPiI : sve_int_countvlv<0b11100, "incd", ZPR64>;
844 defm DECD_ZPiI : sve_int_countvlv<0b11101, "decd", ZPR64>;
846 defm SQINCP_XPWd : sve_int_count_r_s32<0b00000, "sqincp">;
847 defm SQINCP_XP : sve_int_count_r_x64<0b00010, "sqincp">;
848 defm UQINCP_WP : sve_int_count_r_u32<0b00100, "uqincp">;
849 defm UQINCP_XP : sve_int_count_r_x64<0b00110, "uqincp">;
850 defm SQDECP_XPWd : sve_int_count_r_s32<0b01000, "sqdecp">;
851 defm SQDECP_XP : sve_int_count_r_x64<0b01010, "sqdecp">;
852 defm UQDECP_WP : sve_int_count_r_u32<0b01100, "uqdecp">;
853 defm UQDECP_XP : sve_int_count_r_x64<0b01110, "uqdecp">;
854 defm INCP_XP : sve_int_count_r_x64<0b10000, "incp">;
855 defm DECP_XP : sve_int_count_r_x64<0b10100, "decp">;
857 defm SQINCP_ZP : sve_int_count_v<0b00000, "sqincp">;
858 defm UQINCP_ZP : sve_int_count_v<0b00100, "uqincp">;
859 defm SQDECP_ZP : sve_int_count_v<0b01000, "sqdecp">;
860 defm UQDECP_ZP : sve_int_count_v<0b01100, "uqdecp">;
861 defm INCP_ZP : sve_int_count_v<0b10000, "incp">;
862 defm DECP_ZP : sve_int_count_v<0b10100, "decp">;
864 defm INDEX_RR : sve_int_index_rr<"index">;
865 defm INDEX_IR : sve_int_index_ir<"index">;
866 defm INDEX_RI : sve_int_index_ri<"index">;
867 defm INDEX_II : sve_int_index_ii<"index">;
869 // Unpredicated shifts
870 defm ASR_ZZI : sve_int_bin_cons_shift_imm_right<0b00, "asr">;
871 defm LSR_ZZI : sve_int_bin_cons_shift_imm_right<0b01, "lsr">;
872 defm LSL_ZZI : sve_int_bin_cons_shift_imm_left< 0b11, "lsl">;
874 defm ASR_WIDE_ZZZ : sve_int_bin_cons_shift_wide<0b00, "asr">;
875 defm LSR_WIDE_ZZZ : sve_int_bin_cons_shift_wide<0b01, "lsr">;
876 defm LSL_WIDE_ZZZ : sve_int_bin_cons_shift_wide<0b11, "lsl">;
879 defm ASR_ZPmI : sve_int_bin_pred_shift_imm_right<0b000, "asr">;
880 defm LSR_ZPmI : sve_int_bin_pred_shift_imm_right<0b001, "lsr">;
881 defm LSL_ZPmI : sve_int_bin_pred_shift_imm_left< 0b011, "lsl">;
882 defm ASRD_ZPmI : sve_int_bin_pred_shift_imm_right<0b100, "asrd">;
884 defm ASR_ZPmZ : sve_int_bin_pred_shift<0b000, "asr">;
885 defm LSR_ZPmZ : sve_int_bin_pred_shift<0b001, "lsr">;
886 defm LSL_ZPmZ : sve_int_bin_pred_shift<0b011, "lsl">;
887 defm ASRR_ZPmZ : sve_int_bin_pred_shift<0b100, "asrr">;
888 defm LSRR_ZPmZ : sve_int_bin_pred_shift<0b101, "lsrr">;
889 defm LSLR_ZPmZ : sve_int_bin_pred_shift<0b111, "lslr">;
891 defm ASR_WIDE_ZPmZ : sve_int_bin_pred_shift_wide<0b000, "asr">;
892 defm LSR_WIDE_ZPmZ : sve_int_bin_pred_shift_wide<0b001, "lsr">;
893 defm LSL_WIDE_ZPmZ : sve_int_bin_pred_shift_wide<0b011, "lsl">;
895 def FCVT_ZPmZ_StoH : sve_fp_2op_p_zd<0b1001000, "fcvt", ZPR32, ZPR16, ElementSizeS>;
896 def FCVT_ZPmZ_HtoS : sve_fp_2op_p_zd<0b1001001, "fcvt", ZPR16, ZPR32, ElementSizeS>;
897 def SCVTF_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0110010, "scvtf", ZPR16, ZPR16, ElementSizeH>;
898 def SCVTF_ZPmZ_StoS : sve_fp_2op_p_zd<0b1010100, "scvtf", ZPR32, ZPR32, ElementSizeS>;
899 def UCVTF_ZPmZ_StoS : sve_fp_2op_p_zd<0b1010101, "ucvtf", ZPR32, ZPR32, ElementSizeS>;
900 def UCVTF_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0110011, "ucvtf", ZPR16, ZPR16, ElementSizeH>;
901 def FCVTZS_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0111010, "fcvtzs", ZPR16, ZPR16, ElementSizeH>;
902 def FCVTZS_ZPmZ_StoS : sve_fp_2op_p_zd<0b1011100, "fcvtzs", ZPR32, ZPR32, ElementSizeS>;
903 def FCVTZU_ZPmZ_HtoH : sve_fp_2op_p_zd<0b0111011, "fcvtzu", ZPR16, ZPR16, ElementSizeH>;
904 def FCVTZU_ZPmZ_StoS : sve_fp_2op_p_zd<0b1011101, "fcvtzu", ZPR32, ZPR32, ElementSizeS>;
905 def FCVT_ZPmZ_DtoH : sve_fp_2op_p_zd<0b1101000, "fcvt", ZPR64, ZPR16, ElementSizeD>;
906 def FCVT_ZPmZ_HtoD : sve_fp_2op_p_zd<0b1101001, "fcvt", ZPR16, ZPR64, ElementSizeD>;
907 def FCVT_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1101010, "fcvt", ZPR64, ZPR32, ElementSizeD>;
908 def FCVT_ZPmZ_StoD : sve_fp_2op_p_zd<0b1101011, "fcvt", ZPR32, ZPR64, ElementSizeD>;
909 def SCVTF_ZPmZ_StoD : sve_fp_2op_p_zd<0b1110000, "scvtf", ZPR32, ZPR64, ElementSizeD>;
910 def UCVTF_ZPmZ_StoD : sve_fp_2op_p_zd<0b1110001, "ucvtf", ZPR32, ZPR64, ElementSizeD>;
911 def UCVTF_ZPmZ_StoH : sve_fp_2op_p_zd<0b0110101, "ucvtf", ZPR32, ZPR16, ElementSizeS>;
912 def SCVTF_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1110100, "scvtf", ZPR64, ZPR32, ElementSizeD>;
913 def SCVTF_ZPmZ_StoH : sve_fp_2op_p_zd<0b0110100, "scvtf", ZPR32, ZPR16, ElementSizeS>;
914 def SCVTF_ZPmZ_DtoH : sve_fp_2op_p_zd<0b0110110, "scvtf", ZPR64, ZPR16, ElementSizeD>;
915 def UCVTF_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1110101, "ucvtf", ZPR64, ZPR32, ElementSizeD>;
916 def UCVTF_ZPmZ_DtoH : sve_fp_2op_p_zd<0b0110111, "ucvtf", ZPR64, ZPR16, ElementSizeD>;
917 def SCVTF_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1110110, "scvtf", ZPR64, ZPR64, ElementSizeD>;
918 def UCVTF_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1110111, "ucvtf", ZPR64, ZPR64, ElementSizeD>;
919 def FCVTZS_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1111000, "fcvtzs", ZPR64, ZPR32, ElementSizeD>;
920 def FCVTZU_ZPmZ_DtoS : sve_fp_2op_p_zd<0b1111001, "fcvtzu", ZPR64, ZPR32, ElementSizeD>;
921 def FCVTZS_ZPmZ_StoD : sve_fp_2op_p_zd<0b1111100, "fcvtzs", ZPR32, ZPR64, ElementSizeD>;
922 def FCVTZS_ZPmZ_HtoS : sve_fp_2op_p_zd<0b0111100, "fcvtzs", ZPR16, ZPR32, ElementSizeS>;
923 def FCVTZS_ZPmZ_HtoD : sve_fp_2op_p_zd<0b0111110, "fcvtzs", ZPR16, ZPR64, ElementSizeD>;
924 def FCVTZU_ZPmZ_HtoS : sve_fp_2op_p_zd<0b0111101, "fcvtzu", ZPR16, ZPR32, ElementSizeS>;
925 def FCVTZU_ZPmZ_HtoD : sve_fp_2op_p_zd<0b0111111, "fcvtzu", ZPR16, ZPR64, ElementSizeD>;
926 def FCVTZU_ZPmZ_StoD : sve_fp_2op_p_zd<0b1111101, "fcvtzu", ZPR32, ZPR64, ElementSizeD>;
927 def FCVTZS_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1111110, "fcvtzs", ZPR64, ZPR64, ElementSizeD>;
928 def FCVTZU_ZPmZ_DtoD : sve_fp_2op_p_zd<0b1111111, "fcvtzu", ZPR64, ZPR64, ElementSizeD>;
930 defm FRINTN_ZPmZ : sve_fp_2op_p_zd_HSD<0b00000, "frintn">;
931 defm FRINTP_ZPmZ : sve_fp_2op_p_zd_HSD<0b00001, "frintp">;
932 defm FRINTM_ZPmZ : sve_fp_2op_p_zd_HSD<0b00010, "frintm">;
933 defm FRINTZ_ZPmZ : sve_fp_2op_p_zd_HSD<0b00011, "frintz">;
934 defm FRINTA_ZPmZ : sve_fp_2op_p_zd_HSD<0b00100, "frinta">;
935 defm FRINTX_ZPmZ : sve_fp_2op_p_zd_HSD<0b00110, "frintx">;
936 defm FRINTI_ZPmZ : sve_fp_2op_p_zd_HSD<0b00111, "frinti">;
937 defm FRECPX_ZPmZ : sve_fp_2op_p_zd_HSD<0b01100, "frecpx">;
938 defm FSQRT_ZPmZ : sve_fp_2op_p_zd_HSD<0b01101, "fsqrt">;
941 def : InstAlias<"mov $Zd, $Zn",
942 (ORR_ZZZ ZPR64:$Zd, ZPR64:$Zn, ZPR64:$Zn), 1>;
943 def : InstAlias<"mov $Pd, $Pg/m, $Pn",
944 (SEL_PPPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPR8:$Pd), 1>;
945 def : InstAlias<"mov $Pd, $Pn",
946 (ORR_PPzPP PPR8:$Pd, PPR8:$Pn, PPR8:$Pn, PPR8:$Pn), 1>;
947 def : InstAlias<"mov $Pd, $Pg/z, $Pn",
948 (AND_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPR8:$Pn), 1>;
950 def : InstAlias<"movs $Pd, $Pn",
951 (ORRS_PPzPP PPR8:$Pd, PPR8:$Pn, PPR8:$Pn, PPR8:$Pn), 1>;
952 def : InstAlias<"movs $Pd, $Pg/z, $Pn",
953 (ANDS_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPR8:$Pn), 1>;
955 def : InstAlias<"not $Pd, $Pg/z, $Pn",
956 (EOR_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPRAny:$Pg), 1>;
958 def : InstAlias<"nots $Pd, $Pg/z, $Pn",
959 (EORS_PPzPP PPR8:$Pd, PPRAny:$Pg, PPR8:$Pn, PPRAny:$Pg), 1>;
961 def : InstAlias<"cmple $Zd, $Pg/z, $Zm, $Zn",
962 (CMPGE_PPzZZ_B PPR8:$Zd, PPR3bAny:$Pg, ZPR8:$Zn, ZPR8:$Zm), 0>;
963 def : InstAlias<"cmple $Zd, $Pg/z, $Zm, $Zn",
964 (CMPGE_PPzZZ_H PPR16:$Zd, PPR3bAny:$Pg, ZPR16:$Zn, ZPR16:$Zm), 0>;
965 def : InstAlias<"cmple $Zd, $Pg/z, $Zm, $Zn",
966 (CMPGE_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>;
967 def : InstAlias<"cmple $Zd, $Pg/z, $Zm, $Zn",
968 (CMPGE_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>;
970 def : InstAlias<"cmplo $Zd, $Pg/z, $Zm, $Zn",
971 (CMPHI_PPzZZ_B PPR8:$Zd, PPR3bAny:$Pg, ZPR8:$Zn, ZPR8:$Zm), 0>;
972 def : InstAlias<"cmplo $Zd, $Pg/z, $Zm, $Zn",
973 (CMPHI_PPzZZ_H PPR16:$Zd, PPR3bAny:$Pg, ZPR16:$Zn, ZPR16:$Zm), 0>;
974 def : InstAlias<"cmplo $Zd, $Pg/z, $Zm, $Zn",
975 (CMPHI_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>;
976 def : InstAlias<"cmplo $Zd, $Pg/z, $Zm, $Zn",
977 (CMPHI_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>;
979 def : InstAlias<"cmpls $Zd, $Pg/z, $Zm, $Zn",
980 (CMPHS_PPzZZ_B PPR8:$Zd, PPR3bAny:$Pg, ZPR8:$Zn, ZPR8:$Zm), 0>;
981 def : InstAlias<"cmpls $Zd, $Pg/z, $Zm, $Zn",
982 (CMPHS_PPzZZ_H PPR16:$Zd, PPR3bAny:$Pg, ZPR16:$Zn, ZPR16:$Zm), 0>;
983 def : InstAlias<"cmpls $Zd, $Pg/z, $Zm, $Zn",
984 (CMPHS_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>;
985 def : InstAlias<"cmpls $Zd, $Pg/z, $Zm, $Zn",
986 (CMPHS_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>;
988 def : InstAlias<"cmplt $Zd, $Pg/z, $Zm, $Zn",
989 (CMPGT_PPzZZ_B PPR8:$Zd, PPR3bAny:$Pg, ZPR8:$Zn, ZPR8:$Zm), 0>;
990 def : InstAlias<"cmplt $Zd, $Pg/z, $Zm, $Zn",
991 (CMPGT_PPzZZ_H PPR16:$Zd, PPR3bAny:$Pg, ZPR16:$Zn, ZPR16:$Zm), 0>;
992 def : InstAlias<"cmplt $Zd, $Pg/z, $Zm, $Zn",
993 (CMPGT_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>;
994 def : InstAlias<"cmplt $Zd, $Pg/z, $Zm, $Zn",
995 (CMPGT_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>;
997 def : InstAlias<"facle $Zd, $Pg/z, $Zm, $Zn",
998 (FACGE_PPzZZ_H PPR16:$Zd, PPR3bAny:$Pg, ZPR16:$Zn, ZPR16:$Zm), 0>;
999 def : InstAlias<"facle $Zd, $Pg/z, $Zm, $Zn",
1000 (FACGE_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>;
1001 def : InstAlias<"facle $Zd, $Pg/z, $Zm, $Zn",
1002 (FACGE_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>;
1004 def : InstAlias<"faclt $Zd, $Pg/z, $Zm, $Zn",
1005 (FACGT_PPzZZ_H PPR16:$Zd, PPR3bAny:$Pg, ZPR16:$Zn, ZPR16:$Zm), 0>;
1006 def : InstAlias<"faclt $Zd, $Pg/z, $Zm, $Zn",
1007 (FACGT_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>;
1008 def : InstAlias<"faclt $Zd, $Pg/z, $Zm, $Zn",
1009 (FACGT_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>;
1011 def : InstAlias<"fcmle $Zd, $Pg/z, $Zm, $Zn",
1012 (FCMGE_PPzZZ_H PPR16:$Zd, PPR3bAny:$Pg, ZPR16:$Zn, ZPR16:$Zm), 0>;
1013 def : InstAlias<"fcmle $Zd, $Pg/z, $Zm, $Zn",
1014 (FCMGE_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>;
1015 def : InstAlias<"fcmle $Zd, $Pg/z, $Zm, $Zn",
1016 (FCMGE_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>;
1018 def : InstAlias<"fcmlt $Zd, $Pg/z, $Zm, $Zn",
1019 (FCMGT_PPzZZ_H PPR16:$Zd, PPR3bAny:$Pg, ZPR16:$Zn, ZPR16:$Zm), 0>;
1020 def : InstAlias<"fcmlt $Zd, $Pg/z, $Zm, $Zn",
1021 (FCMGT_PPzZZ_S PPR32:$Zd, PPR3bAny:$Pg, ZPR32:$Zn, ZPR32:$Zm), 0>;
1022 def : InstAlias<"fcmlt $Zd, $Pg/z, $Zm, $Zn",
1023 (FCMGT_PPzZZ_D PPR64:$Zd, PPR3bAny:$Pg, ZPR64:$Zn, ZPR64:$Zm), 0>;