1 //==-- AArch64TargetMachine.h - Define TargetMachine for AArch64 -*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the AArch64 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H
15 #define LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H
17 #include "AArch64InstrInfo.h"
18 #include "AArch64Subtarget.h"
19 #include "llvm/IR/DataLayout.h"
20 #include "llvm/Target/TargetMachine.h"
24 class AArch64RegisterBankInfo;
26 class AArch64TargetMachine : public LLVMTargetMachine {
28 std::unique_ptr<TargetLoweringObjectFile> TLOF;
29 mutable StringMap<std::unique_ptr<AArch64Subtarget>> SubtargetMap;
32 AArch64TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
33 StringRef FS, const TargetOptions &Options,
34 Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM,
35 CodeGenOpt::Level OL, bool JIT, bool IsLittleEndian);
37 ~AArch64TargetMachine() override;
38 const AArch64Subtarget *getSubtargetImpl(const Function &F) const override;
39 // DO NOT IMPLEMENT: There is no such thing as a valid default subtarget,
40 // subtargets are per-function entities based on the target-specific
41 // attributes of each function.
42 const AArch64Subtarget *getSubtargetImpl() const = delete;
44 // Pass Pipeline Configuration
45 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
47 /// \brief Get the TargetIRAnalysis for this target.
48 TargetIRAnalysis getTargetIRAnalysis() override;
50 TargetLoweringObjectFile* getObjFileLowering() const override {
58 // AArch64 little endian target machine.
60 class AArch64leTargetMachine : public AArch64TargetMachine {
61 virtual void anchor();
63 AArch64leTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
64 StringRef FS, const TargetOptions &Options,
65 Optional<Reloc::Model> RM,
66 Optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
70 // AArch64 big endian target machine.
72 class AArch64beTargetMachine : public AArch64TargetMachine {
73 virtual void anchor();
75 AArch64beTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
76 StringRef FS, const TargetOptions &Options,
77 Optional<Reloc::Model> RM,
78 Optional<CodeModel::Model> CM, CodeGenOpt::Level OL,
82 } // end namespace llvm